1 // SPDX-License-Identifier: GPL-2.0
2 
3 /* Copyright (C) 2019-2020 Linaro Ltd. */
4 
5 #include <linux/log2.h>
6 
7 #include "gsi.h"
8 #include "ipa_data.h"
9 #include "ipa_endpoint.h"
10 #include "ipa_mem.h"
11 
12 /* Endpoint configuration for the SC7180 SoC. */
13 static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
14 	[IPA_ENDPOINT_AP_COMMAND_TX] = {
15 		.ee_id		= GSI_EE_AP,
16 		.channel_id	= 1,
17 		.endpoint_id	= 6,
18 		.toward_ipa	= true,
19 		.channel = {
20 			.tre_count	= 256,
21 			.event_count	= 256,
22 			.tlv_count	= 20,
23 		},
24 		.endpoint = {
25 			.seq_type	= IPA_SEQ_DMA_ONLY,
26 			.config = {
27 				.dma_mode	= true,
28 				.dma_endpoint	= IPA_ENDPOINT_AP_LAN_RX,
29 			},
30 		},
31 	},
32 	[IPA_ENDPOINT_AP_LAN_RX] = {
33 		.ee_id		= GSI_EE_AP,
34 		.channel_id	= 2,
35 		.endpoint_id	= 8,
36 		.toward_ipa	= false,
37 		.channel = {
38 			.tre_count	= 256,
39 			.event_count	= 256,
40 			.tlv_count	= 6,
41 		},
42 		.endpoint = {
43 			.seq_type	= IPA_SEQ_INVALID,
44 			.config = {
45 				.aggregation	= true,
46 				.status_enable	= true,
47 				.rx = {
48 					.pad_align	= ilog2(sizeof(u32)),
49 				},
50 			},
51 		},
52 	},
53 	[IPA_ENDPOINT_AP_MODEM_TX] = {
54 		.ee_id		= GSI_EE_AP,
55 		.channel_id	= 0,
56 		.endpoint_id	= 1,
57 		.toward_ipa	= true,
58 		.channel = {
59 			.tre_count	= 512,
60 			.event_count	= 512,
61 			.tlv_count	= 8,
62 		},
63 		.endpoint = {
64 			.filter_support	= true,
65 			.seq_type	=
66 				IPA_SEQ_PKT_PROCESS_NO_DEC_NO_UCP_DMAP,
67 			.config = {
68 				.checksum	= true,
69 				.qmap		= true,
70 				.status_enable	= true,
71 				.tx = {
72 					.status_endpoint =
73 						IPA_ENDPOINT_MODEM_AP_RX,
74 				},
75 			},
76 		},
77 	},
78 	[IPA_ENDPOINT_AP_MODEM_RX] = {
79 		.ee_id		= GSI_EE_AP,
80 		.channel_id	= 3,
81 		.endpoint_id	= 9,
82 		.toward_ipa	= false,
83 		.channel = {
84 			.tre_count	= 256,
85 			.event_count	= 256,
86 			.tlv_count	= 6,
87 		},
88 		.endpoint = {
89 			.seq_type	= IPA_SEQ_INVALID,
90 			.config = {
91 				.checksum	= true,
92 				.qmap		= true,
93 				.aggregation	= true,
94 				.rx = {
95 					.aggr_close_eof	= true,
96 				},
97 			},
98 		},
99 	},
100 	[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
101 		.ee_id		= GSI_EE_MODEM,
102 		.channel_id	= 1,
103 		.endpoint_id	= 5,
104 		.toward_ipa	= true,
105 	},
106 	[IPA_ENDPOINT_MODEM_LAN_RX] = {
107 		.ee_id		= GSI_EE_MODEM,
108 		.channel_id	= 3,
109 		.endpoint_id	= 11,
110 		.toward_ipa	= false,
111 	},
112 	[IPA_ENDPOINT_MODEM_AP_TX] = {
113 		.ee_id		= GSI_EE_MODEM,
114 		.channel_id	= 0,
115 		.endpoint_id	= 4,
116 		.toward_ipa	= true,
117 		.endpoint = {
118 			.filter_support	= true,
119 		},
120 	},
121 	[IPA_ENDPOINT_MODEM_AP_RX] = {
122 		.ee_id		= GSI_EE_MODEM,
123 		.channel_id	= 2,
124 		.endpoint_id	= 10,
125 		.toward_ipa	= false,
126 	},
127 };
128 
129 /* For the SC7180, resource groups are allocated this way:
130  *   group 0:	UL_DL
131  */
132 static const struct ipa_resource_src ipa_resource_src[] = {
133 	{
134 		.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
135 		.limits[0] = {
136 			.min = 3,
137 			.max = 63,
138 		},
139 	},
140 	{
141 		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
142 		.limits[0] = {
143 			.min = 3,
144 			.max = 3,
145 		},
146 	},
147 	{
148 		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
149 		.limits[0] = {
150 			.min = 10,
151 			.max = 10,
152 		},
153 	},
154 	{
155 		.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
156 		.limits[0] = {
157 			.min = 1,
158 			.max = 1,
159 		},
160 	},
161 	{
162 		.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
163 		.limits[0] = {
164 			.min = 5,
165 			.max = 5,
166 		},
167 	},
168 };
169 
170 static const struct ipa_resource_dst ipa_resource_dst[] = {
171 	{
172 		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
173 		.limits[0] = {
174 			.min = 3,
175 			.max = 3,
176 		},
177 	},
178 	{
179 		.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
180 		.limits[0] = {
181 			.min = 1,
182 			.max = 63,
183 		},
184 	},
185 };
186 
187 /* Resource configuration for the SC7180 SoC. */
188 static const struct ipa_resource_data ipa_resource_data = {
189 	.resource_src_count	= ARRAY_SIZE(ipa_resource_src),
190 	.resource_src		= ipa_resource_src,
191 	.resource_dst_count	= ARRAY_SIZE(ipa_resource_dst),
192 	.resource_dst		= ipa_resource_dst,
193 };
194 
195 /* IPA-resident memory region configuration for the SC7180 SoC. */
196 static const struct ipa_mem ipa_mem_local_data[] = {
197 	[IPA_MEM_UC_SHARED] = {
198 		.offset		= 0x0000,
199 		.size		= 0x0080,
200 		.canary_count	= 0,
201 	},
202 	[IPA_MEM_UC_INFO] = {
203 		.offset		= 0x0080,
204 		.size		= 0x0200,
205 		.canary_count	= 2,
206 	},
207 	[IPA_MEM_V4_FILTER_HASHED] = {
208 		.offset		= 0x0288,
209 		.size		= 0,
210 		.canary_count	= 2,
211 	},
212 	[IPA_MEM_V4_FILTER] = {
213 		.offset		= 0x0290,
214 		.size		= 0x0078,
215 		.canary_count	= 2,
216 	},
217 	[IPA_MEM_V6_FILTER_HASHED] = {
218 		.offset		= 0x0310,
219 		.size		= 0,
220 		.canary_count	= 2,
221 	},
222 	[IPA_MEM_V6_FILTER] = {
223 		.offset		= 0x0318,
224 		.size		= 0x0078,
225 		.canary_count	= 2,
226 	},
227 	[IPA_MEM_V4_ROUTE_HASHED] = {
228 		.offset		= 0x0398,
229 		.size		= 0,
230 		.canary_count	= 2,
231 	},
232 	[IPA_MEM_V4_ROUTE] = {
233 		.offset		= 0x03a0,
234 		.size		= 0x0078,
235 		.canary_count	= 2,
236 	},
237 	[IPA_MEM_V6_ROUTE_HASHED] = {
238 		.offset		= 0x0420,
239 		.size		= 0,
240 		.canary_count	= 2,
241 	},
242 	[IPA_MEM_V6_ROUTE] = {
243 		.offset		= 0x0428,
244 		.size		= 0x0078,
245 		.canary_count	= 2,
246 	},
247 	[IPA_MEM_MODEM_HEADER] = {
248 		.offset		= 0x04a8,
249 		.size		= 0x0140,
250 		.canary_count	= 2,
251 	},
252 	[IPA_MEM_AP_HEADER] = {
253 		.offset		= 0x05e8,
254 		.size		= 0x0000,
255 		.canary_count	= 0,
256 	},
257 	[IPA_MEM_MODEM_PROC_CTX] = {
258 		.offset		= 0x05f0,
259 		.size		= 0x0200,
260 		.canary_count	= 2,
261 	},
262 	[IPA_MEM_AP_PROC_CTX] = {
263 		.offset		= 0x07f0,
264 		.size		= 0x0200,
265 		.canary_count	= 0,
266 	},
267 	[IPA_MEM_PDN_CONFIG] = {
268 		.offset		= 0x09f8,
269 		.size		= 0x0050,
270 		.canary_count	= 2,
271 	},
272 	[IPA_MEM_STATS_QUOTA] = {
273 		.offset		= 0x0a50,
274 		.size		= 0x0060,
275 		.canary_count	= 2,
276 	},
277 	[IPA_MEM_STATS_TETHERING] = {
278 		.offset		= 0x0ab0,
279 		.size		= 0x0140,
280 		.canary_count	= 0,
281 	},
282 	[IPA_MEM_STATS_DROP] = {
283 		.offset		= 0x0bf0,
284 		.size		= 0,
285 		.canary_count	= 0,
286 	},
287 	[IPA_MEM_MODEM] = {
288 		.offset		= 0x0bf0,
289 		.size		= 0x140c,
290 		.canary_count	= 0,
291 	},
292 	[IPA_MEM_UC_EVENT_RING] = {
293 		.offset		= 0x2000,
294 		.size		= 0,
295 		.canary_count	= 1,
296 	},
297 };
298 
299 static struct ipa_mem_data ipa_mem_data = {
300 	.local_count	= ARRAY_SIZE(ipa_mem_local_data),
301 	.local		= ipa_mem_local_data,
302 	.imem_addr	= 0x146a8000,
303 	.imem_size	= 0x00002000,
304 	.smem_id	= 497,
305 	.smem_size	= 0x00002000,
306 };
307 
308 /* Configuration data for the SC7180 SoC. */
309 const struct ipa_data ipa_data_sc7180 = {
310 	.version	= IPA_VERSION_4_2,
311 	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
312 	.endpoint_data	= ipa_gsi_endpoint_data,
313 	.resource_data	= &ipa_resource_data,
314 	.mem_data	= &ipa_mem_data,
315 };
316