1 /*
2  *	Routines to identify additional cpu features that are scattered in
3  *	cpuid space.
4  */
5 #include <linux/cpu.h>
6 
7 #include <asm/memtype.h>
8 #include <asm/apic.h>
9 #include <asm/processor.h>
10 
11 #include "cpu.h"
12 
13 struct cpuid_bit {
14 	u16 feature;
15 	u8 reg;
16 	u8 bit;
17 	u32 level;
18 	u32 sub_leaf;
19 };
20 
21 /*
22  * Please keep the leaf sorted by cpuid_bit.level for faster search.
23  * X86_FEATURE_MBA is supported by both Intel and AMD. But the CPUID
24  * levels are different and there is a separate entry for each.
25  */
26 static const struct cpuid_bit cpuid_bits[] = {
27 	{ X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
28 	{ X86_FEATURE_EPB,		CPUID_ECX,  3, 0x00000006, 0 },
29 	{ X86_FEATURE_CQM_LLC,		CPUID_EDX,  1, 0x0000000f, 0 },
30 	{ X86_FEATURE_CQM_OCCUP_LLC,	CPUID_EDX,  0, 0x0000000f, 1 },
31 	{ X86_FEATURE_CQM_MBM_TOTAL,	CPUID_EDX,  1, 0x0000000f, 1 },
32 	{ X86_FEATURE_CQM_MBM_LOCAL,	CPUID_EDX,  2, 0x0000000f, 1 },
33 	{ X86_FEATURE_CAT_L3,		CPUID_EBX,  1, 0x00000010, 0 },
34 	{ X86_FEATURE_CAT_L2,		CPUID_EBX,  2, 0x00000010, 0 },
35 	{ X86_FEATURE_CDP_L3,		CPUID_ECX,  2, 0x00000010, 1 },
36 	{ X86_FEATURE_CDP_L2,		CPUID_ECX,  2, 0x00000010, 2 },
37 	{ X86_FEATURE_MBA,		CPUID_EBX,  3, 0x00000010, 0 },
38 	{ X86_FEATURE_PER_THREAD_MBA,	CPUID_ECX,  0, 0x00000010, 3 },
39 	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
40 	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
41 	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
42 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
43 	{ X86_FEATURE_SME,		CPUID_EAX,  0, 0x8000001f, 0 },
44 	{ X86_FEATURE_SEV,		CPUID_EAX,  1, 0x8000001f, 0 },
45 	{ X86_FEATURE_SEV_ES,		CPUID_EAX,  3, 0x8000001f, 0 },
46 	{ X86_FEATURE_SME_COHERENT,	CPUID_EAX, 10, 0x8000001f, 0 },
47 	{ 0, 0, 0, 0, 0 }
48 };
49 
init_scattered_cpuid_features(struct cpuinfo_x86 * c)50 void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
51 {
52 	u32 max_level;
53 	u32 regs[4];
54 	const struct cpuid_bit *cb;
55 
56 	for (cb = cpuid_bits; cb->feature; cb++) {
57 
58 		/* Verify that the level is valid */
59 		max_level = cpuid_eax(cb->level & 0xffff0000);
60 		if (max_level < cb->level ||
61 		    max_level > (cb->level | 0xffff))
62 			continue;
63 
64 		cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
65 			    &regs[CPUID_EBX], &regs[CPUID_ECX],
66 			    &regs[CPUID_EDX]);
67 
68 		if (regs[cb->reg] & (1 << cb->bit))
69 			set_cpu_cap(c, cb->feature);
70 	}
71 }
72