1 /*
2  * SPDX-License-Identifier: MIT
3  *
4  * Copyright © 2011-2012 Intel Corporation
5  */
6 
7 /*
8  * This file implements HW context support. On gen5+ a HW context consists of an
9  * opaque GPU object which is referenced at times of context saves and restores.
10  * With RC6 enabled, the context is also referenced as the GPU enters and exists
11  * from RC6 (GPU has it's own internal power context, except on gen5). Though
12  * something like a context does exist for the media ring, the code only
13  * supports contexts for the render ring.
14  *
15  * In software, there is a distinction between contexts created by the user,
16  * and the default HW context. The default HW context is used by GPU clients
17  * that do not request setup of their own hardware context. The default
18  * context's state is never restored to help prevent programming errors. This
19  * would happen if a client ran and piggy-backed off another clients GPU state.
20  * The default context only exists to give the GPU some offset to load as the
21  * current to invoke a save of the context we actually care about. In fact, the
22  * code could likely be constructed, albeit in a more complicated fashion, to
23  * never use the default context, though that limits the driver's ability to
24  * swap out, and/or destroy other contexts.
25  *
26  * All other contexts are created as a request by the GPU client. These contexts
27  * store GPU state, and thus allow GPU clients to not re-emit state (and
28  * potentially query certain state) at any time. The kernel driver makes
29  * certain that the appropriate commands are inserted.
30  *
31  * The context life cycle is semi-complicated in that context BOs may live
32  * longer than the context itself because of the way the hardware, and object
33  * tracking works. Below is a very crude representation of the state machine
34  * describing the context life.
35  *                                         refcount     pincount     active
36  * S0: initial state                          0            0           0
37  * S1: context created                        1            0           0
38  * S2: context is currently running           2            1           X
39  * S3: GPU referenced, but not current        2            0           1
40  * S4: context is current, but destroyed      1            1           0
41  * S5: like S3, but destroyed                 1            0           1
42  *
43  * The most common (but not all) transitions:
44  * S0->S1: client creates a context
45  * S1->S2: client submits execbuf with context
46  * S2->S3: other clients submits execbuf with context
47  * S3->S1: context object was retired
48  * S3->S2: clients submits another execbuf
49  * S2->S4: context destroy called with current context
50  * S3->S5->S0: destroy path
51  * S4->S5->S0: destroy path on current context
52  *
53  * There are two confusing terms used above:
54  *  The "current context" means the context which is currently running on the
55  *  GPU. The GPU has loaded its state already and has stored away the gtt
56  *  offset of the BO. The GPU is not actively referencing the data at this
57  *  offset, but it will on the next context switch. The only way to avoid this
58  *  is to do a GPU reset.
59  *
60  *  An "active context' is one which was previously the "current context" and is
61  *  on the active list waiting for the next context switch to occur. Until this
62  *  happens, the object must remain at the same gtt offset. It is therefore
63  *  possible to destroy a context, but it is still active.
64  *
65  */
66 
67 #include <linux/highmem.h>
68 #include <linux/log2.h>
69 #include <linux/nospec.h>
70 
71 #include <drm/drm_cache.h>
72 #include <drm/drm_syncobj.h>
73 
74 #include "gt/gen6_ppgtt.h"
75 #include "gt/intel_context.h"
76 #include "gt/intel_context_param.h"
77 #include "gt/intel_engine_heartbeat.h"
78 #include "gt/intel_engine_user.h"
79 #include "gt/intel_gpu_commands.h"
80 #include "gt/intel_ring.h"
81 
82 #include "pxp/intel_pxp.h"
83 
84 #include "i915_file_private.h"
85 #include "i915_gem_context.h"
86 #include "i915_trace.h"
87 #include "i915_user_extensions.h"
88 
89 #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
90 
91 static struct kmem_cache *slab_luts;
92 
i915_lut_handle_alloc(void)93 struct i915_lut_handle *i915_lut_handle_alloc(void)
94 {
95 	return kmem_cache_alloc(slab_luts, GFP_KERNEL);
96 }
97 
i915_lut_handle_free(struct i915_lut_handle * lut)98 void i915_lut_handle_free(struct i915_lut_handle *lut)
99 {
100 	return kmem_cache_free(slab_luts, lut);
101 }
102 
lut_close(struct i915_gem_context * ctx)103 static void lut_close(struct i915_gem_context *ctx)
104 {
105 	struct radix_tree_iter iter;
106 	void __rcu **slot;
107 
108 	mutex_lock(&ctx->lut_mutex);
109 	rcu_read_lock();
110 	radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
111 		struct i915_vma *vma = rcu_dereference_raw(*slot);
112 		struct drm_i915_gem_object *obj = vma->obj;
113 		struct i915_lut_handle *lut;
114 
115 		if (!kref_get_unless_zero(&obj->base.refcount))
116 			continue;
117 
118 		spin_lock(&obj->lut_lock);
119 		list_for_each_entry(lut, &obj->lut_list, obj_link) {
120 			if (lut->ctx != ctx)
121 				continue;
122 
123 			if (lut->handle != iter.index)
124 				continue;
125 
126 			list_del(&lut->obj_link);
127 			break;
128 		}
129 		spin_unlock(&obj->lut_lock);
130 
131 		if (&lut->obj_link != &obj->lut_list) {
132 			i915_lut_handle_free(lut);
133 			radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
134 			i915_vma_close(vma);
135 			i915_gem_object_put(obj);
136 		}
137 
138 		i915_gem_object_put(obj);
139 	}
140 	rcu_read_unlock();
141 	mutex_unlock(&ctx->lut_mutex);
142 }
143 
144 static struct intel_context *
lookup_user_engine(struct i915_gem_context * ctx,unsigned long flags,const struct i915_engine_class_instance * ci)145 lookup_user_engine(struct i915_gem_context *ctx,
146 		   unsigned long flags,
147 		   const struct i915_engine_class_instance *ci)
148 #define LOOKUP_USER_INDEX BIT(0)
149 {
150 	int idx;
151 
152 	if (!!(flags & LOOKUP_USER_INDEX) != i915_gem_context_user_engines(ctx))
153 		return ERR_PTR(-EINVAL);
154 
155 	if (!i915_gem_context_user_engines(ctx)) {
156 		struct intel_engine_cs *engine;
157 
158 		engine = intel_engine_lookup_user(ctx->i915,
159 						  ci->engine_class,
160 						  ci->engine_instance);
161 		if (!engine)
162 			return ERR_PTR(-EINVAL);
163 
164 		idx = engine->legacy_idx;
165 	} else {
166 		idx = ci->engine_instance;
167 	}
168 
169 	return i915_gem_context_get_engine(ctx, idx);
170 }
171 
validate_priority(struct drm_i915_private * i915,const struct drm_i915_gem_context_param * args)172 static int validate_priority(struct drm_i915_private *i915,
173 			     const struct drm_i915_gem_context_param *args)
174 {
175 	s64 priority = args->value;
176 
177 	if (args->size)
178 		return -EINVAL;
179 
180 	if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
181 		return -ENODEV;
182 
183 	if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
184 	    priority < I915_CONTEXT_MIN_USER_PRIORITY)
185 		return -EINVAL;
186 
187 	if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
188 	    !capable(CAP_SYS_NICE))
189 		return -EPERM;
190 
191 	return 0;
192 }
193 
proto_context_close(struct drm_i915_private * i915,struct i915_gem_proto_context * pc)194 static void proto_context_close(struct drm_i915_private *i915,
195 				struct i915_gem_proto_context *pc)
196 {
197 	int i;
198 
199 	if (pc->pxp_wakeref)
200 		intel_runtime_pm_put(&i915->runtime_pm, pc->pxp_wakeref);
201 	if (pc->vm)
202 		i915_vm_put(pc->vm);
203 	if (pc->user_engines) {
204 		for (i = 0; i < pc->num_user_engines; i++)
205 			kfree(pc->user_engines[i].siblings);
206 		kfree(pc->user_engines);
207 	}
208 	kfree(pc);
209 }
210 
proto_context_set_persistence(struct drm_i915_private * i915,struct i915_gem_proto_context * pc,bool persist)211 static int proto_context_set_persistence(struct drm_i915_private *i915,
212 					 struct i915_gem_proto_context *pc,
213 					 bool persist)
214 {
215 	if (persist) {
216 		/*
217 		 * Only contexts that are short-lived [that will expire or be
218 		 * reset] are allowed to survive past termination. We require
219 		 * hangcheck to ensure that the persistent requests are healthy.
220 		 */
221 		if (!i915->params.enable_hangcheck)
222 			return -EINVAL;
223 
224 		pc->user_flags |= BIT(UCONTEXT_PERSISTENCE);
225 	} else {
226 		/* To cancel a context we use "preempt-to-idle" */
227 		if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
228 			return -ENODEV;
229 
230 		/*
231 		 * If the cancel fails, we then need to reset, cleanly!
232 		 *
233 		 * If the per-engine reset fails, all hope is lost! We resort
234 		 * to a full GPU reset in that unlikely case, but realistically
235 		 * if the engine could not reset, the full reset does not fare
236 		 * much better. The damage has been done.
237 		 *
238 		 * However, if we cannot reset an engine by itself, we cannot
239 		 * cleanup a hanging persistent context without causing
240 		 * colateral damage, and we should not pretend we can by
241 		 * exposing the interface.
242 		 */
243 		if (!intel_has_reset_engine(to_gt(i915)))
244 			return -ENODEV;
245 
246 		pc->user_flags &= ~BIT(UCONTEXT_PERSISTENCE);
247 	}
248 
249 	return 0;
250 }
251 
proto_context_set_protected(struct drm_i915_private * i915,struct i915_gem_proto_context * pc,bool protected)252 static int proto_context_set_protected(struct drm_i915_private *i915,
253 				       struct i915_gem_proto_context *pc,
254 				       bool protected)
255 {
256 	int ret = 0;
257 
258 	if (!protected) {
259 		pc->uses_protected_content = false;
260 	} else if (!intel_pxp_is_enabled(i915->pxp)) {
261 		ret = -ENODEV;
262 	} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||
263 		   !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
264 		ret = -EPERM;
265 	} else {
266 		pc->uses_protected_content = true;
267 
268 		/*
269 		 * protected context usage requires the PXP session to be up,
270 		 * which in turn requires the device to be active.
271 		 */
272 		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
273 
274 		if (!intel_pxp_is_active(i915->pxp))
275 			ret = intel_pxp_start(i915->pxp);
276 	}
277 
278 	return ret;
279 }
280 
281 static struct i915_gem_proto_context *
proto_context_create(struct drm_i915_private * i915,unsigned int flags)282 proto_context_create(struct drm_i915_private *i915, unsigned int flags)
283 {
284 	struct i915_gem_proto_context *pc, *err;
285 
286 	pc = kzalloc(sizeof(*pc), GFP_KERNEL);
287 	if (!pc)
288 		return ERR_PTR(-ENOMEM);
289 
290 	pc->num_user_engines = -1;
291 	pc->user_engines = NULL;
292 	pc->user_flags = BIT(UCONTEXT_BANNABLE) |
293 			 BIT(UCONTEXT_RECOVERABLE);
294 	if (i915->params.enable_hangcheck)
295 		pc->user_flags |= BIT(UCONTEXT_PERSISTENCE);
296 	pc->sched.priority = I915_PRIORITY_NORMAL;
297 
298 	if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
299 		if (!HAS_EXECLISTS(i915)) {
300 			err = ERR_PTR(-EINVAL);
301 			goto proto_close;
302 		}
303 		pc->single_timeline = true;
304 	}
305 
306 	return pc;
307 
308 proto_close:
309 	proto_context_close(i915, pc);
310 	return err;
311 }
312 
proto_context_register_locked(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,u32 * id)313 static int proto_context_register_locked(struct drm_i915_file_private *fpriv,
314 					 struct i915_gem_proto_context *pc,
315 					 u32 *id)
316 {
317 	int ret;
318 	void *old;
319 
320 	lockdep_assert_held(&fpriv->proto_context_lock);
321 
322 	ret = xa_alloc(&fpriv->context_xa, id, NULL, xa_limit_32b, GFP_KERNEL);
323 	if (ret)
324 		return ret;
325 
326 	old = xa_store(&fpriv->proto_context_xa, *id, pc, GFP_KERNEL);
327 	if (xa_is_err(old)) {
328 		xa_erase(&fpriv->context_xa, *id);
329 		return xa_err(old);
330 	}
331 	WARN_ON(old);
332 
333 	return 0;
334 }
335 
proto_context_register(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,u32 * id)336 static int proto_context_register(struct drm_i915_file_private *fpriv,
337 				  struct i915_gem_proto_context *pc,
338 				  u32 *id)
339 {
340 	int ret;
341 
342 	mutex_lock(&fpriv->proto_context_lock);
343 	ret = proto_context_register_locked(fpriv, pc, id);
344 	mutex_unlock(&fpriv->proto_context_lock);
345 
346 	return ret;
347 }
348 
349 static struct i915_address_space *
i915_gem_vm_lookup(struct drm_i915_file_private * file_priv,u32 id)350 i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
351 {
352 	struct i915_address_space *vm;
353 
354 	xa_lock(&file_priv->vm_xa);
355 	vm = xa_load(&file_priv->vm_xa, id);
356 	if (vm)
357 		kref_get(&vm->ref);
358 	xa_unlock(&file_priv->vm_xa);
359 
360 	return vm;
361 }
362 
set_proto_ctx_vm(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,const struct drm_i915_gem_context_param * args)363 static int set_proto_ctx_vm(struct drm_i915_file_private *fpriv,
364 			    struct i915_gem_proto_context *pc,
365 			    const struct drm_i915_gem_context_param *args)
366 {
367 	struct drm_i915_private *i915 = fpriv->i915;
368 	struct i915_address_space *vm;
369 
370 	if (args->size)
371 		return -EINVAL;
372 
373 	if (!HAS_FULL_PPGTT(i915))
374 		return -ENODEV;
375 
376 	if (upper_32_bits(args->value))
377 		return -ENOENT;
378 
379 	vm = i915_gem_vm_lookup(fpriv, args->value);
380 	if (!vm)
381 		return -ENOENT;
382 
383 	if (pc->vm)
384 		i915_vm_put(pc->vm);
385 	pc->vm = vm;
386 
387 	return 0;
388 }
389 
390 struct set_proto_ctx_engines {
391 	struct drm_i915_private *i915;
392 	unsigned num_engines;
393 	struct i915_gem_proto_engine *engines;
394 };
395 
396 static int
set_proto_ctx_engines_balance(struct i915_user_extension __user * base,void * data)397 set_proto_ctx_engines_balance(struct i915_user_extension __user *base,
398 			      void *data)
399 {
400 	struct i915_context_engines_load_balance __user *ext =
401 		container_of_user(base, typeof(*ext), base);
402 	const struct set_proto_ctx_engines *set = data;
403 	struct drm_i915_private *i915 = set->i915;
404 	struct intel_engine_cs **siblings;
405 	u16 num_siblings, idx;
406 	unsigned int n;
407 	int err;
408 
409 	if (!HAS_EXECLISTS(i915))
410 		return -ENODEV;
411 
412 	if (get_user(idx, &ext->engine_index))
413 		return -EFAULT;
414 
415 	if (idx >= set->num_engines) {
416 		drm_dbg(&i915->drm, "Invalid placement value, %d >= %d\n",
417 			idx, set->num_engines);
418 		return -EINVAL;
419 	}
420 
421 	idx = array_index_nospec(idx, set->num_engines);
422 	if (set->engines[idx].type != I915_GEM_ENGINE_TYPE_INVALID) {
423 		drm_dbg(&i915->drm,
424 			"Invalid placement[%d], already occupied\n", idx);
425 		return -EEXIST;
426 	}
427 
428 	if (get_user(num_siblings, &ext->num_siblings))
429 		return -EFAULT;
430 
431 	err = check_user_mbz(&ext->flags);
432 	if (err)
433 		return err;
434 
435 	err = check_user_mbz(&ext->mbz64);
436 	if (err)
437 		return err;
438 
439 	if (num_siblings == 0)
440 		return 0;
441 
442 	siblings = kmalloc_array(num_siblings, sizeof(*siblings), GFP_KERNEL);
443 	if (!siblings)
444 		return -ENOMEM;
445 
446 	for (n = 0; n < num_siblings; n++) {
447 		struct i915_engine_class_instance ci;
448 
449 		if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
450 			err = -EFAULT;
451 			goto err_siblings;
452 		}
453 
454 		siblings[n] = intel_engine_lookup_user(i915,
455 						       ci.engine_class,
456 						       ci.engine_instance);
457 		if (!siblings[n]) {
458 			drm_dbg(&i915->drm,
459 				"Invalid sibling[%d]: { class:%d, inst:%d }\n",
460 				n, ci.engine_class, ci.engine_instance);
461 			err = -EINVAL;
462 			goto err_siblings;
463 		}
464 	}
465 
466 	if (num_siblings == 1) {
467 		set->engines[idx].type = I915_GEM_ENGINE_TYPE_PHYSICAL;
468 		set->engines[idx].engine = siblings[0];
469 		kfree(siblings);
470 	} else {
471 		set->engines[idx].type = I915_GEM_ENGINE_TYPE_BALANCED;
472 		set->engines[idx].num_siblings = num_siblings;
473 		set->engines[idx].siblings = siblings;
474 	}
475 
476 	return 0;
477 
478 err_siblings:
479 	kfree(siblings);
480 
481 	return err;
482 }
483 
484 static int
set_proto_ctx_engines_bond(struct i915_user_extension __user * base,void * data)485 set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
486 {
487 	struct i915_context_engines_bond __user *ext =
488 		container_of_user(base, typeof(*ext), base);
489 	const struct set_proto_ctx_engines *set = data;
490 	struct drm_i915_private *i915 = set->i915;
491 	struct i915_engine_class_instance ci;
492 	struct intel_engine_cs *master;
493 	u16 idx, num_bonds;
494 	int err, n;
495 
496 	if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915) &&
497 	    !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) {
498 		drm_dbg(&i915->drm,
499 			"Bonding not supported on this platform\n");
500 		return -ENODEV;
501 	}
502 
503 	if (get_user(idx, &ext->virtual_index))
504 		return -EFAULT;
505 
506 	if (idx >= set->num_engines) {
507 		drm_dbg(&i915->drm,
508 			"Invalid index for virtual engine: %d >= %d\n",
509 			idx, set->num_engines);
510 		return -EINVAL;
511 	}
512 
513 	idx = array_index_nospec(idx, set->num_engines);
514 	if (set->engines[idx].type == I915_GEM_ENGINE_TYPE_INVALID) {
515 		drm_dbg(&i915->drm, "Invalid engine at %d\n", idx);
516 		return -EINVAL;
517 	}
518 
519 	if (set->engines[idx].type != I915_GEM_ENGINE_TYPE_PHYSICAL) {
520 		drm_dbg(&i915->drm,
521 			"Bonding with virtual engines not allowed\n");
522 		return -EINVAL;
523 	}
524 
525 	err = check_user_mbz(&ext->flags);
526 	if (err)
527 		return err;
528 
529 	for (n = 0; n < ARRAY_SIZE(ext->mbz64); n++) {
530 		err = check_user_mbz(&ext->mbz64[n]);
531 		if (err)
532 			return err;
533 	}
534 
535 	if (copy_from_user(&ci, &ext->master, sizeof(ci)))
536 		return -EFAULT;
537 
538 	master = intel_engine_lookup_user(i915,
539 					  ci.engine_class,
540 					  ci.engine_instance);
541 	if (!master) {
542 		drm_dbg(&i915->drm,
543 			"Unrecognised master engine: { class:%u, instance:%u }\n",
544 			ci.engine_class, ci.engine_instance);
545 		return -EINVAL;
546 	}
547 
548 	if (intel_engine_uses_guc(master)) {
549 		drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
550 		return -ENODEV;
551 	}
552 
553 	if (get_user(num_bonds, &ext->num_bonds))
554 		return -EFAULT;
555 
556 	for (n = 0; n < num_bonds; n++) {
557 		struct intel_engine_cs *bond;
558 
559 		if (copy_from_user(&ci, &ext->engines[n], sizeof(ci)))
560 			return -EFAULT;
561 
562 		bond = intel_engine_lookup_user(i915,
563 						ci.engine_class,
564 						ci.engine_instance);
565 		if (!bond) {
566 			drm_dbg(&i915->drm,
567 				"Unrecognised engine[%d] for bonding: { class:%d, instance: %d }\n",
568 				n, ci.engine_class, ci.engine_instance);
569 			return -EINVAL;
570 		}
571 	}
572 
573 	return 0;
574 }
575 
576 static int
set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user * base,void * data)577 set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user *base,
578 				      void *data)
579 {
580 	struct i915_context_engines_parallel_submit __user *ext =
581 		container_of_user(base, typeof(*ext), base);
582 	const struct set_proto_ctx_engines *set = data;
583 	struct drm_i915_private *i915 = set->i915;
584 	struct i915_engine_class_instance prev_engine;
585 	u64 flags;
586 	int err = 0, n, i, j;
587 	u16 slot, width, num_siblings;
588 	struct intel_engine_cs **siblings = NULL;
589 	intel_engine_mask_t prev_mask;
590 
591 	if (get_user(slot, &ext->engine_index))
592 		return -EFAULT;
593 
594 	if (get_user(width, &ext->width))
595 		return -EFAULT;
596 
597 	if (get_user(num_siblings, &ext->num_siblings))
598 		return -EFAULT;
599 
600 	if (!intel_uc_uses_guc_submission(&to_gt(i915)->uc) &&
601 	    num_siblings != 1) {
602 		drm_dbg(&i915->drm, "Only 1 sibling (%d) supported in non-GuC mode\n",
603 			num_siblings);
604 		return -EINVAL;
605 	}
606 
607 	if (slot >= set->num_engines) {
608 		drm_dbg(&i915->drm, "Invalid placement value, %d >= %d\n",
609 			slot, set->num_engines);
610 		return -EINVAL;
611 	}
612 
613 	if (set->engines[slot].type != I915_GEM_ENGINE_TYPE_INVALID) {
614 		drm_dbg(&i915->drm,
615 			"Invalid placement[%d], already occupied\n", slot);
616 		return -EINVAL;
617 	}
618 
619 	if (get_user(flags, &ext->flags))
620 		return -EFAULT;
621 
622 	if (flags) {
623 		drm_dbg(&i915->drm, "Unknown flags 0x%02llx", flags);
624 		return -EINVAL;
625 	}
626 
627 	for (n = 0; n < ARRAY_SIZE(ext->mbz64); n++) {
628 		err = check_user_mbz(&ext->mbz64[n]);
629 		if (err)
630 			return err;
631 	}
632 
633 	if (width < 2) {
634 		drm_dbg(&i915->drm, "Width (%d) < 2\n", width);
635 		return -EINVAL;
636 	}
637 
638 	if (num_siblings < 1) {
639 		drm_dbg(&i915->drm, "Number siblings (%d) < 1\n",
640 			num_siblings);
641 		return -EINVAL;
642 	}
643 
644 	siblings = kmalloc_array(num_siblings * width,
645 				 sizeof(*siblings),
646 				 GFP_KERNEL);
647 	if (!siblings)
648 		return -ENOMEM;
649 
650 	/* Create contexts / engines */
651 	for (i = 0; i < width; ++i) {
652 		intel_engine_mask_t current_mask = 0;
653 
654 		for (j = 0; j < num_siblings; ++j) {
655 			struct i915_engine_class_instance ci;
656 
657 			n = i * num_siblings + j;
658 			if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
659 				err = -EFAULT;
660 				goto out_err;
661 			}
662 
663 			siblings[n] =
664 				intel_engine_lookup_user(i915, ci.engine_class,
665 							 ci.engine_instance);
666 			if (!siblings[n]) {
667 				drm_dbg(&i915->drm,
668 					"Invalid sibling[%d]: { class:%d, inst:%d }\n",
669 					n, ci.engine_class, ci.engine_instance);
670 				err = -EINVAL;
671 				goto out_err;
672 			}
673 
674 			/*
675 			 * We don't support breadcrumb handshake on these
676 			 * classes
677 			 */
678 			if (siblings[n]->class == RENDER_CLASS ||
679 			    siblings[n]->class == COMPUTE_CLASS) {
680 				err = -EINVAL;
681 				goto out_err;
682 			}
683 
684 			if (n) {
685 				if (prev_engine.engine_class !=
686 				    ci.engine_class) {
687 					drm_dbg(&i915->drm,
688 						"Mismatched class %d, %d\n",
689 						prev_engine.engine_class,
690 						ci.engine_class);
691 					err = -EINVAL;
692 					goto out_err;
693 				}
694 			}
695 
696 			prev_engine = ci;
697 			current_mask |= siblings[n]->logical_mask;
698 		}
699 
700 		if (i > 0) {
701 			if (current_mask != prev_mask << 1) {
702 				drm_dbg(&i915->drm,
703 					"Non contiguous logical mask 0x%x, 0x%x\n",
704 					prev_mask, current_mask);
705 				err = -EINVAL;
706 				goto out_err;
707 			}
708 		}
709 		prev_mask = current_mask;
710 	}
711 
712 	set->engines[slot].type = I915_GEM_ENGINE_TYPE_PARALLEL;
713 	set->engines[slot].num_siblings = num_siblings;
714 	set->engines[slot].width = width;
715 	set->engines[slot].siblings = siblings;
716 
717 	return 0;
718 
719 out_err:
720 	kfree(siblings);
721 
722 	return err;
723 }
724 
725 static const i915_user_extension_fn set_proto_ctx_engines_extensions[] = {
726 	[I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE] = set_proto_ctx_engines_balance,
727 	[I915_CONTEXT_ENGINES_EXT_BOND] = set_proto_ctx_engines_bond,
728 	[I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT] =
729 		set_proto_ctx_engines_parallel_submit,
730 };
731 
set_proto_ctx_engines(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,const struct drm_i915_gem_context_param * args)732 static int set_proto_ctx_engines(struct drm_i915_file_private *fpriv,
733 			         struct i915_gem_proto_context *pc,
734 			         const struct drm_i915_gem_context_param *args)
735 {
736 	struct drm_i915_private *i915 = fpriv->i915;
737 	struct set_proto_ctx_engines set = { .i915 = i915 };
738 	struct i915_context_param_engines __user *user =
739 		u64_to_user_ptr(args->value);
740 	unsigned int n;
741 	u64 extensions;
742 	int err;
743 
744 	if (pc->num_user_engines >= 0) {
745 		drm_dbg(&i915->drm, "Cannot set engines twice");
746 		return -EINVAL;
747 	}
748 
749 	if (args->size < sizeof(*user) ||
750 	    !IS_ALIGNED(args->size - sizeof(*user), sizeof(*user->engines))) {
751 		drm_dbg(&i915->drm, "Invalid size for engine array: %d\n",
752 			args->size);
753 		return -EINVAL;
754 	}
755 
756 	set.num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines);
757 	/* RING_MASK has no shift so we can use it directly here */
758 	if (set.num_engines > I915_EXEC_RING_MASK + 1)
759 		return -EINVAL;
760 
761 	set.engines = kmalloc_array(set.num_engines, sizeof(*set.engines), GFP_KERNEL);
762 	if (!set.engines)
763 		return -ENOMEM;
764 
765 	for (n = 0; n < set.num_engines; n++) {
766 		struct i915_engine_class_instance ci;
767 		struct intel_engine_cs *engine;
768 
769 		if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) {
770 			kfree(set.engines);
771 			return -EFAULT;
772 		}
773 
774 		memset(&set.engines[n], 0, sizeof(set.engines[n]));
775 
776 		if (ci.engine_class == (u16)I915_ENGINE_CLASS_INVALID &&
777 		    ci.engine_instance == (u16)I915_ENGINE_CLASS_INVALID_NONE)
778 			continue;
779 
780 		engine = intel_engine_lookup_user(i915,
781 						  ci.engine_class,
782 						  ci.engine_instance);
783 		if (!engine) {
784 			drm_dbg(&i915->drm,
785 				"Invalid engine[%d]: { class:%d, instance:%d }\n",
786 				n, ci.engine_class, ci.engine_instance);
787 			kfree(set.engines);
788 			return -ENOENT;
789 		}
790 
791 		set.engines[n].type = I915_GEM_ENGINE_TYPE_PHYSICAL;
792 		set.engines[n].engine = engine;
793 	}
794 
795 	err = -EFAULT;
796 	if (!get_user(extensions, &user->extensions))
797 		err = i915_user_extensions(u64_to_user_ptr(extensions),
798 					   set_proto_ctx_engines_extensions,
799 					   ARRAY_SIZE(set_proto_ctx_engines_extensions),
800 					   &set);
801 	if (err) {
802 		kfree(set.engines);
803 		return err;
804 	}
805 
806 	pc->num_user_engines = set.num_engines;
807 	pc->user_engines = set.engines;
808 
809 	return 0;
810 }
811 
set_proto_ctx_sseu(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,struct drm_i915_gem_context_param * args)812 static int set_proto_ctx_sseu(struct drm_i915_file_private *fpriv,
813 			      struct i915_gem_proto_context *pc,
814 			      struct drm_i915_gem_context_param *args)
815 {
816 	struct drm_i915_private *i915 = fpriv->i915;
817 	struct drm_i915_gem_context_param_sseu user_sseu;
818 	struct intel_sseu *sseu;
819 	int ret;
820 
821 	if (args->size < sizeof(user_sseu))
822 		return -EINVAL;
823 
824 	if (GRAPHICS_VER(i915) != 11)
825 		return -ENODEV;
826 
827 	if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
828 			   sizeof(user_sseu)))
829 		return -EFAULT;
830 
831 	if (user_sseu.rsvd)
832 		return -EINVAL;
833 
834 	if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
835 		return -EINVAL;
836 
837 	if (!!(user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX) != (pc->num_user_engines >= 0))
838 		return -EINVAL;
839 
840 	if (pc->num_user_engines >= 0) {
841 		int idx = user_sseu.engine.engine_instance;
842 		struct i915_gem_proto_engine *pe;
843 
844 		if (idx >= pc->num_user_engines)
845 			return -EINVAL;
846 
847 		pe = &pc->user_engines[idx];
848 
849 		/* Only render engine supports RPCS configuration. */
850 		if (pe->engine->class != RENDER_CLASS)
851 			return -EINVAL;
852 
853 		sseu = &pe->sseu;
854 	} else {
855 		/* Only render engine supports RPCS configuration. */
856 		if (user_sseu.engine.engine_class != I915_ENGINE_CLASS_RENDER)
857 			return -EINVAL;
858 
859 		/* There is only one render engine */
860 		if (user_sseu.engine.engine_instance != 0)
861 			return -EINVAL;
862 
863 		sseu = &pc->legacy_rcs_sseu;
864 	}
865 
866 	ret = i915_gem_user_to_context_sseu(to_gt(i915), &user_sseu, sseu);
867 	if (ret)
868 		return ret;
869 
870 	args->size = sizeof(user_sseu);
871 
872 	return 0;
873 }
874 
set_proto_ctx_param(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,struct drm_i915_gem_context_param * args)875 static int set_proto_ctx_param(struct drm_i915_file_private *fpriv,
876 			       struct i915_gem_proto_context *pc,
877 			       struct drm_i915_gem_context_param *args)
878 {
879 	int ret = 0;
880 
881 	switch (args->param) {
882 	case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
883 		if (args->size)
884 			ret = -EINVAL;
885 		else if (args->value)
886 			pc->user_flags |= BIT(UCONTEXT_NO_ERROR_CAPTURE);
887 		else
888 			pc->user_flags &= ~BIT(UCONTEXT_NO_ERROR_CAPTURE);
889 		break;
890 
891 	case I915_CONTEXT_PARAM_BANNABLE:
892 		if (args->size)
893 			ret = -EINVAL;
894 		else if (!capable(CAP_SYS_ADMIN) && !args->value)
895 			ret = -EPERM;
896 		else if (args->value)
897 			pc->user_flags |= BIT(UCONTEXT_BANNABLE);
898 		else if (pc->uses_protected_content)
899 			ret = -EPERM;
900 		else
901 			pc->user_flags &= ~BIT(UCONTEXT_BANNABLE);
902 		break;
903 
904 	case I915_CONTEXT_PARAM_RECOVERABLE:
905 		if (args->size)
906 			ret = -EINVAL;
907 		else if (!args->value)
908 			pc->user_flags &= ~BIT(UCONTEXT_RECOVERABLE);
909 		else if (pc->uses_protected_content)
910 			ret = -EPERM;
911 		else
912 			pc->user_flags |= BIT(UCONTEXT_RECOVERABLE);
913 		break;
914 
915 	case I915_CONTEXT_PARAM_PRIORITY:
916 		ret = validate_priority(fpriv->i915, args);
917 		if (!ret)
918 			pc->sched.priority = args->value;
919 		break;
920 
921 	case I915_CONTEXT_PARAM_SSEU:
922 		ret = set_proto_ctx_sseu(fpriv, pc, args);
923 		break;
924 
925 	case I915_CONTEXT_PARAM_VM:
926 		ret = set_proto_ctx_vm(fpriv, pc, args);
927 		break;
928 
929 	case I915_CONTEXT_PARAM_ENGINES:
930 		ret = set_proto_ctx_engines(fpriv, pc, args);
931 		break;
932 
933 	case I915_CONTEXT_PARAM_PERSISTENCE:
934 		if (args->size)
935 			ret = -EINVAL;
936 		else
937 			ret = proto_context_set_persistence(fpriv->i915, pc,
938 							    args->value);
939 		break;
940 
941 	case I915_CONTEXT_PARAM_PROTECTED_CONTENT:
942 		ret = proto_context_set_protected(fpriv->i915, pc,
943 						  args->value);
944 		break;
945 
946 	case I915_CONTEXT_PARAM_NO_ZEROMAP:
947 	case I915_CONTEXT_PARAM_BAN_PERIOD:
948 	case I915_CONTEXT_PARAM_RINGSIZE:
949 	default:
950 		ret = -EINVAL;
951 		break;
952 	}
953 
954 	return ret;
955 }
956 
intel_context_set_gem(struct intel_context * ce,struct i915_gem_context * ctx,struct intel_sseu sseu)957 static int intel_context_set_gem(struct intel_context *ce,
958 				 struct i915_gem_context *ctx,
959 				 struct intel_sseu sseu)
960 {
961 	int ret = 0;
962 
963 	GEM_BUG_ON(rcu_access_pointer(ce->gem_context));
964 	RCU_INIT_POINTER(ce->gem_context, ctx);
965 
966 	GEM_BUG_ON(intel_context_is_pinned(ce));
967 
968 	if (ce->engine->class == COMPUTE_CLASS)
969 		ce->ring_size = SZ_512K;
970 	else
971 		ce->ring_size = SZ_16K;
972 
973 	i915_vm_put(ce->vm);
974 	ce->vm = i915_gem_context_get_eb_vm(ctx);
975 
976 	if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
977 	    intel_engine_has_timeslices(ce->engine) &&
978 	    intel_engine_has_semaphores(ce->engine))
979 		__set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
980 
981 	if (CONFIG_DRM_I915_REQUEST_TIMEOUT &&
982 	    ctx->i915->params.request_timeout_ms) {
983 		unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
984 
985 		intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000);
986 	}
987 
988 	/* A valid SSEU has no zero fields */
989 	if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS))
990 		ret = intel_context_reconfigure_sseu(ce, sseu);
991 
992 	return ret;
993 }
994 
__unpin_engines(struct i915_gem_engines * e,unsigned int count)995 static void __unpin_engines(struct i915_gem_engines *e, unsigned int count)
996 {
997 	while (count--) {
998 		struct intel_context *ce = e->engines[count], *child;
999 
1000 		if (!ce || !test_bit(CONTEXT_PERMA_PIN, &ce->flags))
1001 			continue;
1002 
1003 		for_each_child(ce, child)
1004 			intel_context_unpin(child);
1005 		intel_context_unpin(ce);
1006 	}
1007 }
1008 
unpin_engines(struct i915_gem_engines * e)1009 static void unpin_engines(struct i915_gem_engines *e)
1010 {
1011 	__unpin_engines(e, e->num_engines);
1012 }
1013 
__free_engines(struct i915_gem_engines * e,unsigned int count)1014 static void __free_engines(struct i915_gem_engines *e, unsigned int count)
1015 {
1016 	while (count--) {
1017 		if (!e->engines[count])
1018 			continue;
1019 
1020 		intel_context_put(e->engines[count]);
1021 	}
1022 	kfree(e);
1023 }
1024 
free_engines(struct i915_gem_engines * e)1025 static void free_engines(struct i915_gem_engines *e)
1026 {
1027 	__free_engines(e, e->num_engines);
1028 }
1029 
free_engines_rcu(struct rcu_head * rcu)1030 static void free_engines_rcu(struct rcu_head *rcu)
1031 {
1032 	struct i915_gem_engines *engines =
1033 		container_of(rcu, struct i915_gem_engines, rcu);
1034 
1035 	i915_sw_fence_fini(&engines->fence);
1036 	free_engines(engines);
1037 }
1038 
accumulate_runtime(struct i915_drm_client * client,struct i915_gem_engines * engines)1039 static void accumulate_runtime(struct i915_drm_client *client,
1040 			       struct i915_gem_engines *engines)
1041 {
1042 	struct i915_gem_engines_iter it;
1043 	struct intel_context *ce;
1044 
1045 	if (!client)
1046 		return;
1047 
1048 	/* Transfer accumulated runtime to the parent GEM context. */
1049 	for_each_gem_engine(ce, engines, it) {
1050 		unsigned int class = ce->engine->uabi_class;
1051 
1052 		GEM_BUG_ON(class >= ARRAY_SIZE(client->past_runtime));
1053 		atomic64_add(intel_context_get_total_runtime_ns(ce),
1054 			     &client->past_runtime[class]);
1055 	}
1056 }
1057 
1058 static int
engines_notify(struct i915_sw_fence * fence,enum i915_sw_fence_notify state)1059 engines_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
1060 {
1061 	struct i915_gem_engines *engines =
1062 		container_of(fence, typeof(*engines), fence);
1063 	struct i915_gem_context *ctx = engines->ctx;
1064 
1065 	switch (state) {
1066 	case FENCE_COMPLETE:
1067 		if (!list_empty(&engines->link)) {
1068 			unsigned long flags;
1069 
1070 			spin_lock_irqsave(&ctx->stale.lock, flags);
1071 			list_del(&engines->link);
1072 			spin_unlock_irqrestore(&ctx->stale.lock, flags);
1073 		}
1074 		accumulate_runtime(ctx->client, engines);
1075 		i915_gem_context_put(ctx);
1076 
1077 		break;
1078 
1079 	case FENCE_FREE:
1080 		init_rcu_head(&engines->rcu);
1081 		call_rcu(&engines->rcu, free_engines_rcu);
1082 		break;
1083 	}
1084 
1085 	return NOTIFY_DONE;
1086 }
1087 
alloc_engines(unsigned int count)1088 static struct i915_gem_engines *alloc_engines(unsigned int count)
1089 {
1090 	struct i915_gem_engines *e;
1091 
1092 	e = kzalloc(struct_size(e, engines, count), GFP_KERNEL);
1093 	if (!e)
1094 		return NULL;
1095 
1096 	i915_sw_fence_init(&e->fence, engines_notify);
1097 	return e;
1098 }
1099 
default_engines(struct i915_gem_context * ctx,struct intel_sseu rcs_sseu)1100 static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx,
1101 						struct intel_sseu rcs_sseu)
1102 {
1103 	const unsigned int max = I915_NUM_ENGINES;
1104 	struct intel_engine_cs *engine;
1105 	struct i915_gem_engines *e, *err;
1106 
1107 	e = alloc_engines(max);
1108 	if (!e)
1109 		return ERR_PTR(-ENOMEM);
1110 
1111 	for_each_uabi_engine(engine, ctx->i915) {
1112 		struct intel_context *ce;
1113 		struct intel_sseu sseu = {};
1114 		int ret;
1115 
1116 		if (engine->legacy_idx == INVALID_ENGINE)
1117 			continue;
1118 
1119 		GEM_BUG_ON(engine->legacy_idx >= max);
1120 		GEM_BUG_ON(e->engines[engine->legacy_idx]);
1121 
1122 		ce = intel_context_create(engine);
1123 		if (IS_ERR(ce)) {
1124 			err = ERR_CAST(ce);
1125 			goto free_engines;
1126 		}
1127 
1128 		e->engines[engine->legacy_idx] = ce;
1129 		e->num_engines = max(e->num_engines, engine->legacy_idx + 1);
1130 
1131 		if (engine->class == RENDER_CLASS)
1132 			sseu = rcs_sseu;
1133 
1134 		ret = intel_context_set_gem(ce, ctx, sseu);
1135 		if (ret) {
1136 			err = ERR_PTR(ret);
1137 			goto free_engines;
1138 		}
1139 
1140 	}
1141 
1142 	return e;
1143 
1144 free_engines:
1145 	free_engines(e);
1146 	return err;
1147 }
1148 
perma_pin_contexts(struct intel_context * ce)1149 static int perma_pin_contexts(struct intel_context *ce)
1150 {
1151 	struct intel_context *child;
1152 	int i = 0, j = 0, ret;
1153 
1154 	GEM_BUG_ON(!intel_context_is_parent(ce));
1155 
1156 	ret = intel_context_pin(ce);
1157 	if (unlikely(ret))
1158 		return ret;
1159 
1160 	for_each_child(ce, child) {
1161 		ret = intel_context_pin(child);
1162 		if (unlikely(ret))
1163 			goto unwind;
1164 		++i;
1165 	}
1166 
1167 	set_bit(CONTEXT_PERMA_PIN, &ce->flags);
1168 
1169 	return 0;
1170 
1171 unwind:
1172 	intel_context_unpin(ce);
1173 	for_each_child(ce, child) {
1174 		if (j++ < i)
1175 			intel_context_unpin(child);
1176 		else
1177 			break;
1178 	}
1179 
1180 	return ret;
1181 }
1182 
user_engines(struct i915_gem_context * ctx,unsigned int num_engines,struct i915_gem_proto_engine * pe)1183 static struct i915_gem_engines *user_engines(struct i915_gem_context *ctx,
1184 					     unsigned int num_engines,
1185 					     struct i915_gem_proto_engine *pe)
1186 {
1187 	struct i915_gem_engines *e, *err;
1188 	unsigned int n;
1189 
1190 	e = alloc_engines(num_engines);
1191 	if (!e)
1192 		return ERR_PTR(-ENOMEM);
1193 	e->num_engines = num_engines;
1194 
1195 	for (n = 0; n < num_engines; n++) {
1196 		struct intel_context *ce, *child;
1197 		int ret;
1198 
1199 		switch (pe[n].type) {
1200 		case I915_GEM_ENGINE_TYPE_PHYSICAL:
1201 			ce = intel_context_create(pe[n].engine);
1202 			break;
1203 
1204 		case I915_GEM_ENGINE_TYPE_BALANCED:
1205 			ce = intel_engine_create_virtual(pe[n].siblings,
1206 							 pe[n].num_siblings, 0);
1207 			break;
1208 
1209 		case I915_GEM_ENGINE_TYPE_PARALLEL:
1210 			ce = intel_engine_create_parallel(pe[n].siblings,
1211 							  pe[n].num_siblings,
1212 							  pe[n].width);
1213 			break;
1214 
1215 		case I915_GEM_ENGINE_TYPE_INVALID:
1216 		default:
1217 			GEM_WARN_ON(pe[n].type != I915_GEM_ENGINE_TYPE_INVALID);
1218 			continue;
1219 		}
1220 
1221 		if (IS_ERR(ce)) {
1222 			err = ERR_CAST(ce);
1223 			goto free_engines;
1224 		}
1225 
1226 		e->engines[n] = ce;
1227 
1228 		ret = intel_context_set_gem(ce, ctx, pe->sseu);
1229 		if (ret) {
1230 			err = ERR_PTR(ret);
1231 			goto free_engines;
1232 		}
1233 		for_each_child(ce, child) {
1234 			ret = intel_context_set_gem(child, ctx, pe->sseu);
1235 			if (ret) {
1236 				err = ERR_PTR(ret);
1237 				goto free_engines;
1238 			}
1239 		}
1240 
1241 		/*
1242 		 * XXX: Must be done after calling intel_context_set_gem as that
1243 		 * function changes the ring size. The ring is allocated when
1244 		 * the context is pinned. If the ring size is changed after
1245 		 * allocation we have a mismatch of the ring size and will cause
1246 		 * the context to hang. Presumably with a bit of reordering we
1247 		 * could move the perma-pin step to the backend function
1248 		 * intel_engine_create_parallel.
1249 		 */
1250 		if (pe[n].type == I915_GEM_ENGINE_TYPE_PARALLEL) {
1251 			ret = perma_pin_contexts(ce);
1252 			if (ret) {
1253 				err = ERR_PTR(ret);
1254 				goto free_engines;
1255 			}
1256 		}
1257 	}
1258 
1259 	return e;
1260 
1261 free_engines:
1262 	free_engines(e);
1263 	return err;
1264 }
1265 
i915_gem_context_release_work(struct work_struct * work)1266 static void i915_gem_context_release_work(struct work_struct *work)
1267 {
1268 	struct i915_gem_context *ctx = container_of(work, typeof(*ctx),
1269 						    release_work);
1270 	struct i915_address_space *vm;
1271 
1272 	trace_i915_context_free(ctx);
1273 	GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
1274 
1275 	spin_lock(&ctx->i915->gem.contexts.lock);
1276 	list_del(&ctx->link);
1277 	spin_unlock(&ctx->i915->gem.contexts.lock);
1278 
1279 	if (ctx->syncobj)
1280 		drm_syncobj_put(ctx->syncobj);
1281 
1282 	vm = ctx->vm;
1283 	if (vm)
1284 		i915_vm_put(vm);
1285 
1286 	if (ctx->pxp_wakeref)
1287 		intel_runtime_pm_put(&ctx->i915->runtime_pm, ctx->pxp_wakeref);
1288 
1289 	if (ctx->client)
1290 		i915_drm_client_put(ctx->client);
1291 
1292 	mutex_destroy(&ctx->engines_mutex);
1293 	mutex_destroy(&ctx->lut_mutex);
1294 
1295 	put_pid(ctx->pid);
1296 	mutex_destroy(&ctx->mutex);
1297 
1298 	kfree_rcu(ctx, rcu);
1299 }
1300 
i915_gem_context_release(struct kref * ref)1301 void i915_gem_context_release(struct kref *ref)
1302 {
1303 	struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
1304 
1305 	queue_work(ctx->i915->wq, &ctx->release_work);
1306 }
1307 
1308 static inline struct i915_gem_engines *
__context_engines_static(const struct i915_gem_context * ctx)1309 __context_engines_static(const struct i915_gem_context *ctx)
1310 {
1311 	return rcu_dereference_protected(ctx->engines, true);
1312 }
1313 
__reset_context(struct i915_gem_context * ctx,struct intel_engine_cs * engine)1314 static void __reset_context(struct i915_gem_context *ctx,
1315 			    struct intel_engine_cs *engine)
1316 {
1317 	intel_gt_handle_error(engine->gt, engine->mask, 0,
1318 			      "context closure in %s", ctx->name);
1319 }
1320 
__cancel_engine(struct intel_engine_cs * engine)1321 static bool __cancel_engine(struct intel_engine_cs *engine)
1322 {
1323 	/*
1324 	 * Send a "high priority pulse" down the engine to cause the
1325 	 * current request to be momentarily preempted. (If it fails to
1326 	 * be preempted, it will be reset). As we have marked our context
1327 	 * as banned, any incomplete request, including any running, will
1328 	 * be skipped following the preemption.
1329 	 *
1330 	 * If there is no hangchecking (one of the reasons why we try to
1331 	 * cancel the context) and no forced preemption, there may be no
1332 	 * means by which we reset the GPU and evict the persistent hog.
1333 	 * Ergo if we are unable to inject a preemptive pulse that can
1334 	 * kill the banned context, we fallback to doing a local reset
1335 	 * instead.
1336 	 */
1337 	return intel_engine_pulse(engine) == 0;
1338 }
1339 
active_engine(struct intel_context * ce)1340 static struct intel_engine_cs *active_engine(struct intel_context *ce)
1341 {
1342 	struct intel_engine_cs *engine = NULL;
1343 	struct i915_request *rq;
1344 
1345 	if (intel_context_has_inflight(ce))
1346 		return intel_context_inflight(ce);
1347 
1348 	if (!ce->timeline)
1349 		return NULL;
1350 
1351 	/*
1352 	 * rq->link is only SLAB_TYPESAFE_BY_RCU, we need to hold a reference
1353 	 * to the request to prevent it being transferred to a new timeline
1354 	 * (and onto a new timeline->requests list).
1355 	 */
1356 	rcu_read_lock();
1357 	list_for_each_entry_reverse(rq, &ce->timeline->requests, link) {
1358 		bool found;
1359 
1360 		/* timeline is already completed upto this point? */
1361 		if (!i915_request_get_rcu(rq))
1362 			break;
1363 
1364 		/* Check with the backend if the request is inflight */
1365 		found = true;
1366 		if (likely(rcu_access_pointer(rq->timeline) == ce->timeline))
1367 			found = i915_request_active_engine(rq, &engine);
1368 
1369 		i915_request_put(rq);
1370 		if (found)
1371 			break;
1372 	}
1373 	rcu_read_unlock();
1374 
1375 	return engine;
1376 }
1377 
1378 static void
kill_engines(struct i915_gem_engines * engines,bool exit,bool persistent)1379 kill_engines(struct i915_gem_engines *engines, bool exit, bool persistent)
1380 {
1381 	struct i915_gem_engines_iter it;
1382 	struct intel_context *ce;
1383 
1384 	/*
1385 	 * Map the user's engine back to the actual engines; one virtual
1386 	 * engine will be mapped to multiple engines, and using ctx->engine[]
1387 	 * the same engine may be have multiple instances in the user's map.
1388 	 * However, we only care about pending requests, so only include
1389 	 * engines on which there are incomplete requests.
1390 	 */
1391 	for_each_gem_engine(ce, engines, it) {
1392 		struct intel_engine_cs *engine;
1393 
1394 		if ((exit || !persistent) && intel_context_revoke(ce))
1395 			continue; /* Already marked. */
1396 
1397 		/*
1398 		 * Check the current active state of this context; if we
1399 		 * are currently executing on the GPU we need to evict
1400 		 * ourselves. On the other hand, if we haven't yet been
1401 		 * submitted to the GPU or if everything is complete,
1402 		 * we have nothing to do.
1403 		 */
1404 		engine = active_engine(ce);
1405 
1406 		/* First attempt to gracefully cancel the context */
1407 		if (engine && !__cancel_engine(engine) && (exit || !persistent))
1408 			/*
1409 			 * If we are unable to send a preemptive pulse to bump
1410 			 * the context from the GPU, we have to resort to a full
1411 			 * reset. We hope the collateral damage is worth it.
1412 			 */
1413 			__reset_context(engines->ctx, engine);
1414 	}
1415 }
1416 
kill_context(struct i915_gem_context * ctx)1417 static void kill_context(struct i915_gem_context *ctx)
1418 {
1419 	struct i915_gem_engines *pos, *next;
1420 
1421 	spin_lock_irq(&ctx->stale.lock);
1422 	GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
1423 	list_for_each_entry_safe(pos, next, &ctx->stale.engines, link) {
1424 		if (!i915_sw_fence_await(&pos->fence)) {
1425 			list_del_init(&pos->link);
1426 			continue;
1427 		}
1428 
1429 		spin_unlock_irq(&ctx->stale.lock);
1430 
1431 		kill_engines(pos, !ctx->i915->params.enable_hangcheck,
1432 			     i915_gem_context_is_persistent(ctx));
1433 
1434 		spin_lock_irq(&ctx->stale.lock);
1435 		GEM_BUG_ON(i915_sw_fence_signaled(&pos->fence));
1436 		list_safe_reset_next(pos, next, link);
1437 		list_del_init(&pos->link); /* decouple from FENCE_COMPLETE */
1438 
1439 		i915_sw_fence_complete(&pos->fence);
1440 	}
1441 	spin_unlock_irq(&ctx->stale.lock);
1442 }
1443 
engines_idle_release(struct i915_gem_context * ctx,struct i915_gem_engines * engines)1444 static void engines_idle_release(struct i915_gem_context *ctx,
1445 				 struct i915_gem_engines *engines)
1446 {
1447 	struct i915_gem_engines_iter it;
1448 	struct intel_context *ce;
1449 
1450 	INIT_LIST_HEAD(&engines->link);
1451 
1452 	engines->ctx = i915_gem_context_get(ctx);
1453 
1454 	for_each_gem_engine(ce, engines, it) {
1455 		int err;
1456 
1457 		/* serialises with execbuf */
1458 		intel_context_close(ce);
1459 		if (!intel_context_pin_if_active(ce))
1460 			continue;
1461 
1462 		/* Wait until context is finally scheduled out and retired */
1463 		err = i915_sw_fence_await_active(&engines->fence,
1464 						 &ce->active,
1465 						 I915_ACTIVE_AWAIT_BARRIER);
1466 		intel_context_unpin(ce);
1467 		if (err)
1468 			goto kill;
1469 	}
1470 
1471 	spin_lock_irq(&ctx->stale.lock);
1472 	if (!i915_gem_context_is_closed(ctx))
1473 		list_add_tail(&engines->link, &ctx->stale.engines);
1474 	spin_unlock_irq(&ctx->stale.lock);
1475 
1476 kill:
1477 	if (list_empty(&engines->link)) /* raced, already closed */
1478 		kill_engines(engines, true,
1479 			     i915_gem_context_is_persistent(ctx));
1480 
1481 	i915_sw_fence_commit(&engines->fence);
1482 }
1483 
set_closed_name(struct i915_gem_context * ctx)1484 static void set_closed_name(struct i915_gem_context *ctx)
1485 {
1486 	char *s;
1487 
1488 	/* Replace '[]' with '<>' to indicate closed in debug prints */
1489 
1490 	s = strrchr(ctx->name, '[');
1491 	if (!s)
1492 		return;
1493 
1494 	*s = '<';
1495 
1496 	s = strchr(s + 1, ']');
1497 	if (s)
1498 		*s = '>';
1499 }
1500 
context_close(struct i915_gem_context * ctx)1501 static void context_close(struct i915_gem_context *ctx)
1502 {
1503 	struct i915_drm_client *client;
1504 
1505 	/* Flush any concurrent set_engines() */
1506 	mutex_lock(&ctx->engines_mutex);
1507 	unpin_engines(__context_engines_static(ctx));
1508 	engines_idle_release(ctx, rcu_replace_pointer(ctx->engines, NULL, 1));
1509 	i915_gem_context_set_closed(ctx);
1510 	mutex_unlock(&ctx->engines_mutex);
1511 
1512 	mutex_lock(&ctx->mutex);
1513 
1514 	set_closed_name(ctx);
1515 
1516 	/*
1517 	 * The LUT uses the VMA as a backpointer to unref the object,
1518 	 * so we need to clear the LUT before we close all the VMA (inside
1519 	 * the ppgtt).
1520 	 */
1521 	lut_close(ctx);
1522 
1523 	ctx->file_priv = ERR_PTR(-EBADF);
1524 
1525 	client = ctx->client;
1526 	if (client) {
1527 		spin_lock(&client->ctx_lock);
1528 		list_del_rcu(&ctx->client_link);
1529 		spin_unlock(&client->ctx_lock);
1530 	}
1531 
1532 	mutex_unlock(&ctx->mutex);
1533 
1534 	/*
1535 	 * If the user has disabled hangchecking, we can not be sure that
1536 	 * the batches will ever complete after the context is closed,
1537 	 * keeping the context and all resources pinned forever. So in this
1538 	 * case we opt to forcibly kill off all remaining requests on
1539 	 * context close.
1540 	 */
1541 	kill_context(ctx);
1542 
1543 	i915_gem_context_put(ctx);
1544 }
1545 
__context_set_persistence(struct i915_gem_context * ctx,bool state)1546 static int __context_set_persistence(struct i915_gem_context *ctx, bool state)
1547 {
1548 	if (i915_gem_context_is_persistent(ctx) == state)
1549 		return 0;
1550 
1551 	if (state) {
1552 		/*
1553 		 * Only contexts that are short-lived [that will expire or be
1554 		 * reset] are allowed to survive past termination. We require
1555 		 * hangcheck to ensure that the persistent requests are healthy.
1556 		 */
1557 		if (!ctx->i915->params.enable_hangcheck)
1558 			return -EINVAL;
1559 
1560 		i915_gem_context_set_persistence(ctx);
1561 	} else {
1562 		/* To cancel a context we use "preempt-to-idle" */
1563 		if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
1564 			return -ENODEV;
1565 
1566 		/*
1567 		 * If the cancel fails, we then need to reset, cleanly!
1568 		 *
1569 		 * If the per-engine reset fails, all hope is lost! We resort
1570 		 * to a full GPU reset in that unlikely case, but realistically
1571 		 * if the engine could not reset, the full reset does not fare
1572 		 * much better. The damage has been done.
1573 		 *
1574 		 * However, if we cannot reset an engine by itself, we cannot
1575 		 * cleanup a hanging persistent context without causing
1576 		 * colateral damage, and we should not pretend we can by
1577 		 * exposing the interface.
1578 		 */
1579 		if (!intel_has_reset_engine(to_gt(ctx->i915)))
1580 			return -ENODEV;
1581 
1582 		i915_gem_context_clear_persistence(ctx);
1583 	}
1584 
1585 	return 0;
1586 }
1587 
1588 static struct i915_gem_context *
i915_gem_create_context(struct drm_i915_private * i915,const struct i915_gem_proto_context * pc)1589 i915_gem_create_context(struct drm_i915_private *i915,
1590 			const struct i915_gem_proto_context *pc)
1591 {
1592 	struct i915_gem_context *ctx;
1593 	struct i915_address_space *vm = NULL;
1594 	struct i915_gem_engines *e;
1595 	int err;
1596 	int i;
1597 
1598 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1599 	if (!ctx)
1600 		return ERR_PTR(-ENOMEM);
1601 
1602 	kref_init(&ctx->ref);
1603 	ctx->i915 = i915;
1604 	ctx->sched = pc->sched;
1605 	mutex_init(&ctx->mutex);
1606 	INIT_LIST_HEAD(&ctx->link);
1607 	INIT_WORK(&ctx->release_work, i915_gem_context_release_work);
1608 
1609 	spin_lock_init(&ctx->stale.lock);
1610 	INIT_LIST_HEAD(&ctx->stale.engines);
1611 
1612 	if (pc->vm) {
1613 		vm = i915_vm_get(pc->vm);
1614 	} else if (HAS_FULL_PPGTT(i915)) {
1615 		struct i915_ppgtt *ppgtt;
1616 
1617 		ppgtt = i915_ppgtt_create(to_gt(i915), 0);
1618 		if (IS_ERR(ppgtt)) {
1619 			drm_dbg(&i915->drm, "PPGTT setup failed (%ld)\n",
1620 				PTR_ERR(ppgtt));
1621 			err = PTR_ERR(ppgtt);
1622 			goto err_ctx;
1623 		}
1624 		vm = &ppgtt->vm;
1625 	}
1626 	if (vm)
1627 		ctx->vm = vm;
1628 
1629 	mutex_init(&ctx->engines_mutex);
1630 	if (pc->num_user_engines >= 0) {
1631 		i915_gem_context_set_user_engines(ctx);
1632 		e = user_engines(ctx, pc->num_user_engines, pc->user_engines);
1633 	} else {
1634 		i915_gem_context_clear_user_engines(ctx);
1635 		e = default_engines(ctx, pc->legacy_rcs_sseu);
1636 	}
1637 	if (IS_ERR(e)) {
1638 		err = PTR_ERR(e);
1639 		goto err_vm;
1640 	}
1641 	RCU_INIT_POINTER(ctx->engines, e);
1642 
1643 	INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
1644 	mutex_init(&ctx->lut_mutex);
1645 
1646 	/* NB: Mark all slices as needing a remap so that when the context first
1647 	 * loads it will restore whatever remap state already exists. If there
1648 	 * is no remap info, it will be a NOP. */
1649 	ctx->remap_slice = ALL_L3_SLICES(i915);
1650 
1651 	ctx->user_flags = pc->user_flags;
1652 
1653 	for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
1654 		ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
1655 
1656 	if (pc->single_timeline) {
1657 		err = drm_syncobj_create(&ctx->syncobj,
1658 					 DRM_SYNCOBJ_CREATE_SIGNALED,
1659 					 NULL);
1660 		if (err)
1661 			goto err_engines;
1662 	}
1663 
1664 	if (pc->uses_protected_content) {
1665 		ctx->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
1666 		ctx->uses_protected_content = true;
1667 	}
1668 
1669 	trace_i915_context_create(ctx);
1670 
1671 	return ctx;
1672 
1673 err_engines:
1674 	free_engines(e);
1675 err_vm:
1676 	if (ctx->vm)
1677 		i915_vm_put(ctx->vm);
1678 err_ctx:
1679 	kfree(ctx);
1680 	return ERR_PTR(err);
1681 }
1682 
init_contexts(struct i915_gem_contexts * gc)1683 static void init_contexts(struct i915_gem_contexts *gc)
1684 {
1685 	spin_lock_init(&gc->lock);
1686 	INIT_LIST_HEAD(&gc->list);
1687 }
1688 
i915_gem_init__contexts(struct drm_i915_private * i915)1689 void i915_gem_init__contexts(struct drm_i915_private *i915)
1690 {
1691 	init_contexts(&i915->gem.contexts);
1692 }
1693 
1694 /*
1695  * Note that this implicitly consumes the ctx reference, by placing
1696  * the ctx in the context_xa.
1697  */
gem_context_register(struct i915_gem_context * ctx,struct drm_i915_file_private * fpriv,u32 id)1698 static void gem_context_register(struct i915_gem_context *ctx,
1699 				 struct drm_i915_file_private *fpriv,
1700 				 u32 id)
1701 {
1702 	struct drm_i915_private *i915 = ctx->i915;
1703 	void *old;
1704 
1705 	ctx->file_priv = fpriv;
1706 
1707 	ctx->pid = get_task_pid(current, PIDTYPE_PID);
1708 	ctx->client = i915_drm_client_get(fpriv->client);
1709 
1710 	snprintf(ctx->name, sizeof(ctx->name), "%s[%d]",
1711 		 current->comm, pid_nr(ctx->pid));
1712 
1713 	spin_lock(&ctx->client->ctx_lock);
1714 	list_add_tail_rcu(&ctx->client_link, &ctx->client->ctx_list);
1715 	spin_unlock(&ctx->client->ctx_lock);
1716 
1717 	spin_lock(&i915->gem.contexts.lock);
1718 	list_add_tail(&ctx->link, &i915->gem.contexts.list);
1719 	spin_unlock(&i915->gem.contexts.lock);
1720 
1721 	/* And finally expose ourselves to userspace via the idr */
1722 	old = xa_store(&fpriv->context_xa, id, ctx, GFP_KERNEL);
1723 	WARN_ON(old);
1724 }
1725 
i915_gem_context_open(struct drm_i915_private * i915,struct drm_file * file)1726 int i915_gem_context_open(struct drm_i915_private *i915,
1727 			  struct drm_file *file)
1728 {
1729 	struct drm_i915_file_private *file_priv = file->driver_priv;
1730 	struct i915_gem_proto_context *pc;
1731 	struct i915_gem_context *ctx;
1732 	int err;
1733 
1734 	mutex_init(&file_priv->proto_context_lock);
1735 	xa_init_flags(&file_priv->proto_context_xa, XA_FLAGS_ALLOC);
1736 
1737 	/* 0 reserved for the default context */
1738 	xa_init_flags(&file_priv->context_xa, XA_FLAGS_ALLOC1);
1739 
1740 	/* 0 reserved for invalid/unassigned ppgtt */
1741 	xa_init_flags(&file_priv->vm_xa, XA_FLAGS_ALLOC1);
1742 
1743 	pc = proto_context_create(i915, 0);
1744 	if (IS_ERR(pc)) {
1745 		err = PTR_ERR(pc);
1746 		goto err;
1747 	}
1748 
1749 	ctx = i915_gem_create_context(i915, pc);
1750 	proto_context_close(i915, pc);
1751 	if (IS_ERR(ctx)) {
1752 		err = PTR_ERR(ctx);
1753 		goto err;
1754 	}
1755 
1756 	gem_context_register(ctx, file_priv, 0);
1757 
1758 	return 0;
1759 
1760 err:
1761 	xa_destroy(&file_priv->vm_xa);
1762 	xa_destroy(&file_priv->context_xa);
1763 	xa_destroy(&file_priv->proto_context_xa);
1764 	mutex_destroy(&file_priv->proto_context_lock);
1765 	return err;
1766 }
1767 
i915_gem_context_close(struct drm_file * file)1768 void i915_gem_context_close(struct drm_file *file)
1769 {
1770 	struct drm_i915_file_private *file_priv = file->driver_priv;
1771 	struct i915_gem_proto_context *pc;
1772 	struct i915_address_space *vm;
1773 	struct i915_gem_context *ctx;
1774 	unsigned long idx;
1775 
1776 	xa_for_each(&file_priv->proto_context_xa, idx, pc)
1777 		proto_context_close(file_priv->i915, pc);
1778 	xa_destroy(&file_priv->proto_context_xa);
1779 	mutex_destroy(&file_priv->proto_context_lock);
1780 
1781 	xa_for_each(&file_priv->context_xa, idx, ctx)
1782 		context_close(ctx);
1783 	xa_destroy(&file_priv->context_xa);
1784 
1785 	xa_for_each(&file_priv->vm_xa, idx, vm)
1786 		i915_vm_put(vm);
1787 	xa_destroy(&file_priv->vm_xa);
1788 }
1789 
i915_gem_vm_create_ioctl(struct drm_device * dev,void * data,struct drm_file * file)1790 int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data,
1791 			     struct drm_file *file)
1792 {
1793 	struct drm_i915_private *i915 = to_i915(dev);
1794 	struct drm_i915_gem_vm_control *args = data;
1795 	struct drm_i915_file_private *file_priv = file->driver_priv;
1796 	struct i915_ppgtt *ppgtt;
1797 	u32 id;
1798 	int err;
1799 
1800 	if (!HAS_FULL_PPGTT(i915))
1801 		return -ENODEV;
1802 
1803 	if (args->flags)
1804 		return -EINVAL;
1805 
1806 	ppgtt = i915_ppgtt_create(to_gt(i915), 0);
1807 	if (IS_ERR(ppgtt))
1808 		return PTR_ERR(ppgtt);
1809 
1810 	if (args->extensions) {
1811 		err = i915_user_extensions(u64_to_user_ptr(args->extensions),
1812 					   NULL, 0,
1813 					   ppgtt);
1814 		if (err)
1815 			goto err_put;
1816 	}
1817 
1818 	err = xa_alloc(&file_priv->vm_xa, &id, &ppgtt->vm,
1819 		       xa_limit_32b, GFP_KERNEL);
1820 	if (err)
1821 		goto err_put;
1822 
1823 	GEM_BUG_ON(id == 0); /* reserved for invalid/unassigned ppgtt */
1824 	args->vm_id = id;
1825 	return 0;
1826 
1827 err_put:
1828 	i915_vm_put(&ppgtt->vm);
1829 	return err;
1830 }
1831 
i915_gem_vm_destroy_ioctl(struct drm_device * dev,void * data,struct drm_file * file)1832 int i915_gem_vm_destroy_ioctl(struct drm_device *dev, void *data,
1833 			      struct drm_file *file)
1834 {
1835 	struct drm_i915_file_private *file_priv = file->driver_priv;
1836 	struct drm_i915_gem_vm_control *args = data;
1837 	struct i915_address_space *vm;
1838 
1839 	if (args->flags)
1840 		return -EINVAL;
1841 
1842 	if (args->extensions)
1843 		return -EINVAL;
1844 
1845 	vm = xa_erase(&file_priv->vm_xa, args->vm_id);
1846 	if (!vm)
1847 		return -ENOENT;
1848 
1849 	i915_vm_put(vm);
1850 	return 0;
1851 }
1852 
get_ppgtt(struct drm_i915_file_private * file_priv,struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)1853 static int get_ppgtt(struct drm_i915_file_private *file_priv,
1854 		     struct i915_gem_context *ctx,
1855 		     struct drm_i915_gem_context_param *args)
1856 {
1857 	struct i915_address_space *vm;
1858 	int err;
1859 	u32 id;
1860 
1861 	if (!i915_gem_context_has_full_ppgtt(ctx))
1862 		return -ENODEV;
1863 
1864 	vm = ctx->vm;
1865 	GEM_BUG_ON(!vm);
1866 
1867 	/*
1868 	 * Get a reference for the allocated handle.  Once the handle is
1869 	 * visible in the vm_xa table, userspace could try to close it
1870 	 * from under our feet, so we need to hold the extra reference
1871 	 * first.
1872 	 */
1873 	i915_vm_get(vm);
1874 
1875 	err = xa_alloc(&file_priv->vm_xa, &id, vm, xa_limit_32b, GFP_KERNEL);
1876 	if (err) {
1877 		i915_vm_put(vm);
1878 		return err;
1879 	}
1880 
1881 	GEM_BUG_ON(id == 0); /* reserved for invalid/unassigned ppgtt */
1882 	args->value = id;
1883 	args->size = 0;
1884 
1885 	return err;
1886 }
1887 
1888 int
i915_gem_user_to_context_sseu(struct intel_gt * gt,const struct drm_i915_gem_context_param_sseu * user,struct intel_sseu * context)1889 i915_gem_user_to_context_sseu(struct intel_gt *gt,
1890 			      const struct drm_i915_gem_context_param_sseu *user,
1891 			      struct intel_sseu *context)
1892 {
1893 	const struct sseu_dev_info *device = &gt->info.sseu;
1894 	struct drm_i915_private *i915 = gt->i915;
1895 	unsigned int dev_subslice_mask = intel_sseu_get_hsw_subslices(device, 0);
1896 
1897 	/* No zeros in any field. */
1898 	if (!user->slice_mask || !user->subslice_mask ||
1899 	    !user->min_eus_per_subslice || !user->max_eus_per_subslice)
1900 		return -EINVAL;
1901 
1902 	/* Max > min. */
1903 	if (user->max_eus_per_subslice < user->min_eus_per_subslice)
1904 		return -EINVAL;
1905 
1906 	/*
1907 	 * Some future proofing on the types since the uAPI is wider than the
1908 	 * current internal implementation.
1909 	 */
1910 	if (overflows_type(user->slice_mask, context->slice_mask) ||
1911 	    overflows_type(user->subslice_mask, context->subslice_mask) ||
1912 	    overflows_type(user->min_eus_per_subslice,
1913 			   context->min_eus_per_subslice) ||
1914 	    overflows_type(user->max_eus_per_subslice,
1915 			   context->max_eus_per_subslice))
1916 		return -EINVAL;
1917 
1918 	/* Check validity against hardware. */
1919 	if (user->slice_mask & ~device->slice_mask)
1920 		return -EINVAL;
1921 
1922 	if (user->subslice_mask & ~dev_subslice_mask)
1923 		return -EINVAL;
1924 
1925 	if (user->max_eus_per_subslice > device->max_eus_per_subslice)
1926 		return -EINVAL;
1927 
1928 	context->slice_mask = user->slice_mask;
1929 	context->subslice_mask = user->subslice_mask;
1930 	context->min_eus_per_subslice = user->min_eus_per_subslice;
1931 	context->max_eus_per_subslice = user->max_eus_per_subslice;
1932 
1933 	/* Part specific restrictions. */
1934 	if (GRAPHICS_VER(i915) == 11) {
1935 		unsigned int hw_s = hweight8(device->slice_mask);
1936 		unsigned int hw_ss_per_s = hweight8(dev_subslice_mask);
1937 		unsigned int req_s = hweight8(context->slice_mask);
1938 		unsigned int req_ss = hweight8(context->subslice_mask);
1939 
1940 		/*
1941 		 * Only full subslice enablement is possible if more than one
1942 		 * slice is turned on.
1943 		 */
1944 		if (req_s > 1 && req_ss != hw_ss_per_s)
1945 			return -EINVAL;
1946 
1947 		/*
1948 		 * If more than four (SScount bitfield limit) subslices are
1949 		 * requested then the number has to be even.
1950 		 */
1951 		if (req_ss > 4 && (req_ss & 1))
1952 			return -EINVAL;
1953 
1954 		/*
1955 		 * If only one slice is enabled and subslice count is below the
1956 		 * device full enablement, it must be at most half of the all
1957 		 * available subslices.
1958 		 */
1959 		if (req_s == 1 && req_ss < hw_ss_per_s &&
1960 		    req_ss > (hw_ss_per_s / 2))
1961 			return -EINVAL;
1962 
1963 		/* ABI restriction - VME use case only. */
1964 
1965 		/* All slices or one slice only. */
1966 		if (req_s != 1 && req_s != hw_s)
1967 			return -EINVAL;
1968 
1969 		/*
1970 		 * Half subslices or full enablement only when one slice is
1971 		 * enabled.
1972 		 */
1973 		if (req_s == 1 &&
1974 		    (req_ss != hw_ss_per_s && req_ss != (hw_ss_per_s / 2)))
1975 			return -EINVAL;
1976 
1977 		/* No EU configuration changes. */
1978 		if ((user->min_eus_per_subslice !=
1979 		     device->max_eus_per_subslice) ||
1980 		    (user->max_eus_per_subslice !=
1981 		     device->max_eus_per_subslice))
1982 			return -EINVAL;
1983 	}
1984 
1985 	return 0;
1986 }
1987 
set_sseu(struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)1988 static int set_sseu(struct i915_gem_context *ctx,
1989 		    struct drm_i915_gem_context_param *args)
1990 {
1991 	struct drm_i915_private *i915 = ctx->i915;
1992 	struct drm_i915_gem_context_param_sseu user_sseu;
1993 	struct intel_context *ce;
1994 	struct intel_sseu sseu;
1995 	unsigned long lookup;
1996 	int ret;
1997 
1998 	if (args->size < sizeof(user_sseu))
1999 		return -EINVAL;
2000 
2001 	if (GRAPHICS_VER(i915) != 11)
2002 		return -ENODEV;
2003 
2004 	if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
2005 			   sizeof(user_sseu)))
2006 		return -EFAULT;
2007 
2008 	if (user_sseu.rsvd)
2009 		return -EINVAL;
2010 
2011 	if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
2012 		return -EINVAL;
2013 
2014 	lookup = 0;
2015 	if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
2016 		lookup |= LOOKUP_USER_INDEX;
2017 
2018 	ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
2019 	if (IS_ERR(ce))
2020 		return PTR_ERR(ce);
2021 
2022 	/* Only render engine supports RPCS configuration. */
2023 	if (ce->engine->class != RENDER_CLASS) {
2024 		ret = -ENODEV;
2025 		goto out_ce;
2026 	}
2027 
2028 	ret = i915_gem_user_to_context_sseu(ce->engine->gt, &user_sseu, &sseu);
2029 	if (ret)
2030 		goto out_ce;
2031 
2032 	ret = intel_context_reconfigure_sseu(ce, sseu);
2033 	if (ret)
2034 		goto out_ce;
2035 
2036 	args->size = sizeof(user_sseu);
2037 
2038 out_ce:
2039 	intel_context_put(ce);
2040 	return ret;
2041 }
2042 
2043 static int
set_persistence(struct i915_gem_context * ctx,const struct drm_i915_gem_context_param * args)2044 set_persistence(struct i915_gem_context *ctx,
2045 		const struct drm_i915_gem_context_param *args)
2046 {
2047 	if (args->size)
2048 		return -EINVAL;
2049 
2050 	return __context_set_persistence(ctx, args->value);
2051 }
2052 
set_priority(struct i915_gem_context * ctx,const struct drm_i915_gem_context_param * args)2053 static int set_priority(struct i915_gem_context *ctx,
2054 			const struct drm_i915_gem_context_param *args)
2055 {
2056 	struct i915_gem_engines_iter it;
2057 	struct intel_context *ce;
2058 	int err;
2059 
2060 	err = validate_priority(ctx->i915, args);
2061 	if (err)
2062 		return err;
2063 
2064 	ctx->sched.priority = args->value;
2065 
2066 	for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
2067 		if (!intel_engine_has_timeslices(ce->engine))
2068 			continue;
2069 
2070 		if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
2071 		    intel_engine_has_semaphores(ce->engine))
2072 			intel_context_set_use_semaphores(ce);
2073 		else
2074 			intel_context_clear_use_semaphores(ce);
2075 	}
2076 	i915_gem_context_unlock_engines(ctx);
2077 
2078 	return 0;
2079 }
2080 
get_protected(struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)2081 static int get_protected(struct i915_gem_context *ctx,
2082 			 struct drm_i915_gem_context_param *args)
2083 {
2084 	args->size = 0;
2085 	args->value = i915_gem_context_uses_protected_content(ctx);
2086 
2087 	return 0;
2088 }
2089 
ctx_setparam(struct drm_i915_file_private * fpriv,struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)2090 static int ctx_setparam(struct drm_i915_file_private *fpriv,
2091 			struct i915_gem_context *ctx,
2092 			struct drm_i915_gem_context_param *args)
2093 {
2094 	int ret = 0;
2095 
2096 	switch (args->param) {
2097 	case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
2098 		if (args->size)
2099 			ret = -EINVAL;
2100 		else if (args->value)
2101 			i915_gem_context_set_no_error_capture(ctx);
2102 		else
2103 			i915_gem_context_clear_no_error_capture(ctx);
2104 		break;
2105 
2106 	case I915_CONTEXT_PARAM_BANNABLE:
2107 		if (args->size)
2108 			ret = -EINVAL;
2109 		else if (!capable(CAP_SYS_ADMIN) && !args->value)
2110 			ret = -EPERM;
2111 		else if (args->value)
2112 			i915_gem_context_set_bannable(ctx);
2113 		else if (i915_gem_context_uses_protected_content(ctx))
2114 			ret = -EPERM; /* can't clear this for protected contexts */
2115 		else
2116 			i915_gem_context_clear_bannable(ctx);
2117 		break;
2118 
2119 	case I915_CONTEXT_PARAM_RECOVERABLE:
2120 		if (args->size)
2121 			ret = -EINVAL;
2122 		else if (!args->value)
2123 			i915_gem_context_clear_recoverable(ctx);
2124 		else if (i915_gem_context_uses_protected_content(ctx))
2125 			ret = -EPERM; /* can't set this for protected contexts */
2126 		else
2127 			i915_gem_context_set_recoverable(ctx);
2128 		break;
2129 
2130 	case I915_CONTEXT_PARAM_PRIORITY:
2131 		ret = set_priority(ctx, args);
2132 		break;
2133 
2134 	case I915_CONTEXT_PARAM_SSEU:
2135 		ret = set_sseu(ctx, args);
2136 		break;
2137 
2138 	case I915_CONTEXT_PARAM_PERSISTENCE:
2139 		ret = set_persistence(ctx, args);
2140 		break;
2141 
2142 	case I915_CONTEXT_PARAM_PROTECTED_CONTENT:
2143 	case I915_CONTEXT_PARAM_NO_ZEROMAP:
2144 	case I915_CONTEXT_PARAM_BAN_PERIOD:
2145 	case I915_CONTEXT_PARAM_RINGSIZE:
2146 	case I915_CONTEXT_PARAM_VM:
2147 	case I915_CONTEXT_PARAM_ENGINES:
2148 	default:
2149 		ret = -EINVAL;
2150 		break;
2151 	}
2152 
2153 	return ret;
2154 }
2155 
2156 struct create_ext {
2157 	struct i915_gem_proto_context *pc;
2158 	struct drm_i915_file_private *fpriv;
2159 };
2160 
create_setparam(struct i915_user_extension __user * ext,void * data)2161 static int create_setparam(struct i915_user_extension __user *ext, void *data)
2162 {
2163 	struct drm_i915_gem_context_create_ext_setparam local;
2164 	const struct create_ext *arg = data;
2165 
2166 	if (copy_from_user(&local, ext, sizeof(local)))
2167 		return -EFAULT;
2168 
2169 	if (local.param.ctx_id)
2170 		return -EINVAL;
2171 
2172 	return set_proto_ctx_param(arg->fpriv, arg->pc, &local.param);
2173 }
2174 
invalid_ext(struct i915_user_extension __user * ext,void * data)2175 static int invalid_ext(struct i915_user_extension __user *ext, void *data)
2176 {
2177 	return -EINVAL;
2178 }
2179 
2180 static const i915_user_extension_fn create_extensions[] = {
2181 	[I915_CONTEXT_CREATE_EXT_SETPARAM] = create_setparam,
2182 	[I915_CONTEXT_CREATE_EXT_CLONE] = invalid_ext,
2183 };
2184 
client_is_banned(struct drm_i915_file_private * file_priv)2185 static bool client_is_banned(struct drm_i915_file_private *file_priv)
2186 {
2187 	return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
2188 }
2189 
2190 static inline struct i915_gem_context *
__context_lookup(struct drm_i915_file_private * file_priv,u32 id)2191 __context_lookup(struct drm_i915_file_private *file_priv, u32 id)
2192 {
2193 	struct i915_gem_context *ctx;
2194 
2195 	rcu_read_lock();
2196 	ctx = xa_load(&file_priv->context_xa, id);
2197 	if (ctx && !kref_get_unless_zero(&ctx->ref))
2198 		ctx = NULL;
2199 	rcu_read_unlock();
2200 
2201 	return ctx;
2202 }
2203 
2204 static struct i915_gem_context *
finalize_create_context_locked(struct drm_i915_file_private * file_priv,struct i915_gem_proto_context * pc,u32 id)2205 finalize_create_context_locked(struct drm_i915_file_private *file_priv,
2206 			       struct i915_gem_proto_context *pc, u32 id)
2207 {
2208 	struct i915_gem_context *ctx;
2209 	void *old;
2210 
2211 	lockdep_assert_held(&file_priv->proto_context_lock);
2212 
2213 	ctx = i915_gem_create_context(file_priv->i915, pc);
2214 	if (IS_ERR(ctx))
2215 		return ctx;
2216 
2217 	/*
2218 	 * One for the xarray and one for the caller.  We need to grab
2219 	 * the reference *prior* to making the ctx visble to userspace
2220 	 * in gem_context_register(), as at any point after that
2221 	 * userspace can try to race us with another thread destroying
2222 	 * the context under our feet.
2223 	 */
2224 	i915_gem_context_get(ctx);
2225 
2226 	gem_context_register(ctx, file_priv, id);
2227 
2228 	old = xa_erase(&file_priv->proto_context_xa, id);
2229 	GEM_BUG_ON(old != pc);
2230 	proto_context_close(file_priv->i915, pc);
2231 
2232 	return ctx;
2233 }
2234 
2235 struct i915_gem_context *
i915_gem_context_lookup(struct drm_i915_file_private * file_priv,u32 id)2236 i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
2237 {
2238 	struct i915_gem_proto_context *pc;
2239 	struct i915_gem_context *ctx;
2240 
2241 	ctx = __context_lookup(file_priv, id);
2242 	if (ctx)
2243 		return ctx;
2244 
2245 	mutex_lock(&file_priv->proto_context_lock);
2246 	/* Try one more time under the lock */
2247 	ctx = __context_lookup(file_priv, id);
2248 	if (!ctx) {
2249 		pc = xa_load(&file_priv->proto_context_xa, id);
2250 		if (!pc)
2251 			ctx = ERR_PTR(-ENOENT);
2252 		else
2253 			ctx = finalize_create_context_locked(file_priv, pc, id);
2254 	}
2255 	mutex_unlock(&file_priv->proto_context_lock);
2256 
2257 	return ctx;
2258 }
2259 
i915_gem_context_create_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2260 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
2261 				  struct drm_file *file)
2262 {
2263 	struct drm_i915_private *i915 = to_i915(dev);
2264 	struct drm_i915_gem_context_create_ext *args = data;
2265 	struct create_ext ext_data;
2266 	int ret;
2267 	u32 id;
2268 
2269 	if (!DRIVER_CAPS(i915)->has_logical_contexts)
2270 		return -ENODEV;
2271 
2272 	if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
2273 		return -EINVAL;
2274 
2275 	ret = intel_gt_terminally_wedged(to_gt(i915));
2276 	if (ret)
2277 		return ret;
2278 
2279 	ext_data.fpriv = file->driver_priv;
2280 	if (client_is_banned(ext_data.fpriv)) {
2281 		drm_dbg(&i915->drm,
2282 			"client %s[%d] banned from creating ctx\n",
2283 			current->comm, task_pid_nr(current));
2284 		return -EIO;
2285 	}
2286 
2287 	ext_data.pc = proto_context_create(i915, args->flags);
2288 	if (IS_ERR(ext_data.pc))
2289 		return PTR_ERR(ext_data.pc);
2290 
2291 	if (args->flags & I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS) {
2292 		ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
2293 					   create_extensions,
2294 					   ARRAY_SIZE(create_extensions),
2295 					   &ext_data);
2296 		if (ret)
2297 			goto err_pc;
2298 	}
2299 
2300 	if (GRAPHICS_VER(i915) > 12) {
2301 		struct i915_gem_context *ctx;
2302 
2303 		/* Get ourselves a context ID */
2304 		ret = xa_alloc(&ext_data.fpriv->context_xa, &id, NULL,
2305 			       xa_limit_32b, GFP_KERNEL);
2306 		if (ret)
2307 			goto err_pc;
2308 
2309 		ctx = i915_gem_create_context(i915, ext_data.pc);
2310 		if (IS_ERR(ctx)) {
2311 			ret = PTR_ERR(ctx);
2312 			goto err_pc;
2313 		}
2314 
2315 		proto_context_close(i915, ext_data.pc);
2316 		gem_context_register(ctx, ext_data.fpriv, id);
2317 	} else {
2318 		ret = proto_context_register(ext_data.fpriv, ext_data.pc, &id);
2319 		if (ret < 0)
2320 			goto err_pc;
2321 	}
2322 
2323 	args->ctx_id = id;
2324 
2325 	return 0;
2326 
2327 err_pc:
2328 	proto_context_close(i915, ext_data.pc);
2329 	return ret;
2330 }
2331 
i915_gem_context_destroy_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2332 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
2333 				   struct drm_file *file)
2334 {
2335 	struct drm_i915_gem_context_destroy *args = data;
2336 	struct drm_i915_file_private *file_priv = file->driver_priv;
2337 	struct i915_gem_proto_context *pc;
2338 	struct i915_gem_context *ctx;
2339 
2340 	if (args->pad != 0)
2341 		return -EINVAL;
2342 
2343 	if (!args->ctx_id)
2344 		return -ENOENT;
2345 
2346 	/* We need to hold the proto-context lock here to prevent races
2347 	 * with finalize_create_context_locked().
2348 	 */
2349 	mutex_lock(&file_priv->proto_context_lock);
2350 	ctx = xa_erase(&file_priv->context_xa, args->ctx_id);
2351 	pc = xa_erase(&file_priv->proto_context_xa, args->ctx_id);
2352 	mutex_unlock(&file_priv->proto_context_lock);
2353 
2354 	if (!ctx && !pc)
2355 		return -ENOENT;
2356 	GEM_WARN_ON(ctx && pc);
2357 
2358 	if (pc)
2359 		proto_context_close(file_priv->i915, pc);
2360 
2361 	if (ctx)
2362 		context_close(ctx);
2363 
2364 	return 0;
2365 }
2366 
get_sseu(struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)2367 static int get_sseu(struct i915_gem_context *ctx,
2368 		    struct drm_i915_gem_context_param *args)
2369 {
2370 	struct drm_i915_gem_context_param_sseu user_sseu;
2371 	struct intel_context *ce;
2372 	unsigned long lookup;
2373 	int err;
2374 
2375 	if (args->size == 0)
2376 		goto out;
2377 	else if (args->size < sizeof(user_sseu))
2378 		return -EINVAL;
2379 
2380 	if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
2381 			   sizeof(user_sseu)))
2382 		return -EFAULT;
2383 
2384 	if (user_sseu.rsvd)
2385 		return -EINVAL;
2386 
2387 	if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
2388 		return -EINVAL;
2389 
2390 	lookup = 0;
2391 	if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
2392 		lookup |= LOOKUP_USER_INDEX;
2393 
2394 	ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
2395 	if (IS_ERR(ce))
2396 		return PTR_ERR(ce);
2397 
2398 	err = intel_context_lock_pinned(ce); /* serialises with set_sseu */
2399 	if (err) {
2400 		intel_context_put(ce);
2401 		return err;
2402 	}
2403 
2404 	user_sseu.slice_mask = ce->sseu.slice_mask;
2405 	user_sseu.subslice_mask = ce->sseu.subslice_mask;
2406 	user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice;
2407 	user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice;
2408 
2409 	intel_context_unlock_pinned(ce);
2410 	intel_context_put(ce);
2411 
2412 	if (copy_to_user(u64_to_user_ptr(args->value), &user_sseu,
2413 			 sizeof(user_sseu)))
2414 		return -EFAULT;
2415 
2416 out:
2417 	args->size = sizeof(user_sseu);
2418 
2419 	return 0;
2420 }
2421 
i915_gem_context_getparam_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2422 int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
2423 				    struct drm_file *file)
2424 {
2425 	struct drm_i915_file_private *file_priv = file->driver_priv;
2426 	struct drm_i915_gem_context_param *args = data;
2427 	struct i915_gem_context *ctx;
2428 	struct i915_address_space *vm;
2429 	int ret = 0;
2430 
2431 	ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
2432 	if (IS_ERR(ctx))
2433 		return PTR_ERR(ctx);
2434 
2435 	switch (args->param) {
2436 	case I915_CONTEXT_PARAM_GTT_SIZE:
2437 		args->size = 0;
2438 		vm = i915_gem_context_get_eb_vm(ctx);
2439 		args->value = vm->total;
2440 		i915_vm_put(vm);
2441 
2442 		break;
2443 
2444 	case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
2445 		args->size = 0;
2446 		args->value = i915_gem_context_no_error_capture(ctx);
2447 		break;
2448 
2449 	case I915_CONTEXT_PARAM_BANNABLE:
2450 		args->size = 0;
2451 		args->value = i915_gem_context_is_bannable(ctx);
2452 		break;
2453 
2454 	case I915_CONTEXT_PARAM_RECOVERABLE:
2455 		args->size = 0;
2456 		args->value = i915_gem_context_is_recoverable(ctx);
2457 		break;
2458 
2459 	case I915_CONTEXT_PARAM_PRIORITY:
2460 		args->size = 0;
2461 		args->value = ctx->sched.priority;
2462 		break;
2463 
2464 	case I915_CONTEXT_PARAM_SSEU:
2465 		ret = get_sseu(ctx, args);
2466 		break;
2467 
2468 	case I915_CONTEXT_PARAM_VM:
2469 		ret = get_ppgtt(file_priv, ctx, args);
2470 		break;
2471 
2472 	case I915_CONTEXT_PARAM_PERSISTENCE:
2473 		args->size = 0;
2474 		args->value = i915_gem_context_is_persistent(ctx);
2475 		break;
2476 
2477 	case I915_CONTEXT_PARAM_PROTECTED_CONTENT:
2478 		ret = get_protected(ctx, args);
2479 		break;
2480 
2481 	case I915_CONTEXT_PARAM_NO_ZEROMAP:
2482 	case I915_CONTEXT_PARAM_BAN_PERIOD:
2483 	case I915_CONTEXT_PARAM_ENGINES:
2484 	case I915_CONTEXT_PARAM_RINGSIZE:
2485 	default:
2486 		ret = -EINVAL;
2487 		break;
2488 	}
2489 
2490 	i915_gem_context_put(ctx);
2491 	return ret;
2492 }
2493 
i915_gem_context_setparam_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2494 int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
2495 				    struct drm_file *file)
2496 {
2497 	struct drm_i915_file_private *file_priv = file->driver_priv;
2498 	struct drm_i915_gem_context_param *args = data;
2499 	struct i915_gem_proto_context *pc;
2500 	struct i915_gem_context *ctx;
2501 	int ret = 0;
2502 
2503 	mutex_lock(&file_priv->proto_context_lock);
2504 	ctx = __context_lookup(file_priv, args->ctx_id);
2505 	if (!ctx) {
2506 		pc = xa_load(&file_priv->proto_context_xa, args->ctx_id);
2507 		if (pc) {
2508 			/* Contexts should be finalized inside
2509 			 * GEM_CONTEXT_CREATE starting with graphics
2510 			 * version 13.
2511 			 */
2512 			WARN_ON(GRAPHICS_VER(file_priv->i915) > 12);
2513 			ret = set_proto_ctx_param(file_priv, pc, args);
2514 		} else {
2515 			ret = -ENOENT;
2516 		}
2517 	}
2518 	mutex_unlock(&file_priv->proto_context_lock);
2519 
2520 	if (ctx) {
2521 		ret = ctx_setparam(file_priv, ctx, args);
2522 		i915_gem_context_put(ctx);
2523 	}
2524 
2525 	return ret;
2526 }
2527 
i915_gem_context_reset_stats_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2528 int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
2529 				       void *data, struct drm_file *file)
2530 {
2531 	struct drm_i915_private *i915 = to_i915(dev);
2532 	struct drm_i915_reset_stats *args = data;
2533 	struct i915_gem_context *ctx;
2534 
2535 	if (args->flags || args->pad)
2536 		return -EINVAL;
2537 
2538 	ctx = i915_gem_context_lookup(file->driver_priv, args->ctx_id);
2539 	if (IS_ERR(ctx))
2540 		return PTR_ERR(ctx);
2541 
2542 	/*
2543 	 * We opt for unserialised reads here. This may result in tearing
2544 	 * in the extremely unlikely event of a GPU hang on this context
2545 	 * as we are querying them. If we need that extra layer of protection,
2546 	 * we should wrap the hangstats with a seqlock.
2547 	 */
2548 
2549 	if (capable(CAP_SYS_ADMIN))
2550 		args->reset_count = i915_reset_count(&i915->gpu_error);
2551 	else
2552 		args->reset_count = 0;
2553 
2554 	args->batch_active = atomic_read(&ctx->guilty_count);
2555 	args->batch_pending = atomic_read(&ctx->active_count);
2556 
2557 	i915_gem_context_put(ctx);
2558 	return 0;
2559 }
2560 
2561 /* GEM context-engines iterator: for_each_gem_engine() */
2562 struct intel_context *
i915_gem_engines_iter_next(struct i915_gem_engines_iter * it)2563 i915_gem_engines_iter_next(struct i915_gem_engines_iter *it)
2564 {
2565 	const struct i915_gem_engines *e = it->engines;
2566 	struct intel_context *ctx;
2567 
2568 	if (unlikely(!e))
2569 		return NULL;
2570 
2571 	do {
2572 		if (it->idx >= e->num_engines)
2573 			return NULL;
2574 
2575 		ctx = e->engines[it->idx++];
2576 	} while (!ctx);
2577 
2578 	return ctx;
2579 }
2580 
2581 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
2582 #include "selftests/mock_context.c"
2583 #include "selftests/i915_gem_context.c"
2584 #endif
2585 
i915_gem_context_module_exit(void)2586 void i915_gem_context_module_exit(void)
2587 {
2588 	kmem_cache_destroy(slab_luts);
2589 }
2590 
i915_gem_context_module_init(void)2591 int __init i915_gem_context_module_init(void)
2592 {
2593 	slab_luts = KMEM_CACHE(i915_lut_handle, 0);
2594 	if (!slab_luts)
2595 		return -ENOMEM;
2596 
2597 	return 0;
2598 }
2599