1 /* 2 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 15 #ifndef __DPU_RM_H__ 16 #define __DPU_RM_H__ 17 18 #include <linux/list.h> 19 20 #include "msm_kms.h" 21 #include "dpu_hw_top.h" 22 23 /** 24 * enum dpu_rm_topology_name - HW resource use case in use by connector 25 * @DPU_RM_TOPOLOGY_NONE: No topology in use currently 26 * @DPU_RM_TOPOLOGY_SINGLEPIPE: 1 LM, 1 PP, 1 INTF/WB 27 * @DPU_RM_TOPOLOGY_DUALPIPE: 2 LM, 2 PP, 2 INTF/WB 28 * @DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE: 2 LM, 2 PP, 3DMux, 1 INTF/WB 29 */ 30 enum dpu_rm_topology_name { 31 DPU_RM_TOPOLOGY_NONE = 0, 32 DPU_RM_TOPOLOGY_SINGLEPIPE, 33 DPU_RM_TOPOLOGY_DUALPIPE, 34 DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE, 35 DPU_RM_TOPOLOGY_MAX, 36 }; 37 38 /** 39 * enum dpu_rm_topology_control - HW resource use case in use by connector 40 * @DPU_RM_TOPCTL_RESERVE_LOCK: If set, in AtomicTest phase, after a successful 41 * test, reserve the resources for this display. 42 * Normal behavior would not impact the reservation 43 * list during the AtomicTest phase. 44 * @DPU_RM_TOPCTL_RESERVE_CLEAR: If set, in AtomicTest phase, before testing, 45 * release any reservation held by this display. 46 * Normal behavior would not impact the 47 * reservation list during the AtomicTest phase. 48 * @DPU_RM_TOPCTL_DS : Require layer mixers with DS capabilities 49 */ 50 enum dpu_rm_topology_control { 51 DPU_RM_TOPCTL_RESERVE_LOCK, 52 DPU_RM_TOPCTL_RESERVE_CLEAR, 53 DPU_RM_TOPCTL_DS, 54 }; 55 56 /** 57 * struct dpu_rm - DPU dynamic hardware resource manager 58 * @dev: device handle for event logging purposes 59 * @rsvps: list of hardware reservations by each crtc->encoder->connector 60 * @hw_blks: array of lists of hardware resources present in the system, one 61 * list per type of hardware block 62 * @hw_mdp: hardware object for mdp_top 63 * @lm_max_width: cached layer mixer maximum width 64 * @rsvp_next_seq: sequence number for next reservation for debugging purposes 65 * @rm_lock: resource manager mutex 66 */ 67 struct dpu_rm { 68 struct drm_device *dev; 69 struct list_head rsvps; 70 struct list_head hw_blks[DPU_HW_BLK_MAX]; 71 struct dpu_hw_mdp *hw_mdp; 72 uint32_t lm_max_width; 73 uint32_t rsvp_next_seq; 74 struct mutex rm_lock; 75 }; 76 77 /** 78 * struct dpu_rm_hw_blk - resource manager internal structure 79 * forward declaration for single iterator definition without void pointer 80 */ 81 struct dpu_rm_hw_blk; 82 83 /** 84 * struct dpu_rm_hw_iter - iterator for use with dpu_rm 85 * @hw: dpu_hw object requested, or NULL on failure 86 * @blk: dpu_rm internal block representation. Clients ignore. Used as iterator. 87 * @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder 88 * @type: Hardware Block Type client wishes to search for. 89 */ 90 struct dpu_rm_hw_iter { 91 void *hw; 92 struct dpu_rm_hw_blk *blk; 93 uint32_t enc_id; 94 enum dpu_hw_blk_type type; 95 }; 96 97 /** 98 * dpu_rm_init - Read hardware catalog and create reservation tracking objects 99 * for all HW blocks. 100 * @rm: DPU Resource Manager handle 101 * @cat: Pointer to hardware catalog 102 * @mmio: mapped register io address of MDP 103 * @dev: device handle for event logging purposes 104 * @Return: 0 on Success otherwise -ERROR 105 */ 106 int dpu_rm_init(struct dpu_rm *rm, 107 struct dpu_mdss_cfg *cat, 108 void __iomem *mmio, 109 struct drm_device *dev); 110 111 /** 112 * dpu_rm_destroy - Free all memory allocated by dpu_rm_init 113 * @rm: DPU Resource Manager handle 114 * @Return: 0 on Success otherwise -ERROR 115 */ 116 int dpu_rm_destroy(struct dpu_rm *rm); 117 118 /** 119 * dpu_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze 120 * the use connections and user requirements, specified through related 121 * topology control properties, and reserve hardware blocks to that 122 * display chain. 123 * HW blocks can then be accessed through dpu_rm_get_* functions. 124 * HW Reservations should be released via dpu_rm_release_hw. 125 * @rm: DPU Resource Manager handle 126 * @drm_enc: DRM Encoder handle 127 * @crtc_state: Proposed Atomic DRM CRTC State handle 128 * @conn_state: Proposed Atomic DRM Connector State handle 129 * @topology: Pointer to topology info for the display 130 * @test_only: Atomic-Test phase, discard results (unless property overrides) 131 * @Return: 0 on Success otherwise -ERROR 132 */ 133 int dpu_rm_reserve(struct dpu_rm *rm, 134 struct drm_encoder *drm_enc, 135 struct drm_crtc_state *crtc_state, 136 struct drm_connector_state *conn_state, 137 struct msm_display_topology topology, 138 bool test_only); 139 140 /** 141 * dpu_rm_reserve - Given the encoder for the display chain, release any 142 * HW blocks previously reserved for that use case. 143 * @rm: DPU Resource Manager handle 144 * @enc: DRM Encoder handle 145 * @Return: 0 on Success otherwise -ERROR 146 */ 147 void dpu_rm_release(struct dpu_rm *rm, struct drm_encoder *enc); 148 149 /** 150 * dpu_rm_get_mdp - Retrieve HW block for MDP TOP. 151 * This is never reserved, and is usable by any display. 152 * @rm: DPU Resource Manager handle 153 * @Return: Pointer to hw block or NULL 154 */ 155 struct dpu_hw_mdp *dpu_rm_get_mdp(struct dpu_rm *rm); 156 157 /** 158 * dpu_rm_init_hw_iter - setup given iterator for new iteration over hw list 159 * using dpu_rm_get_hw 160 * @iter: iter object to initialize 161 * @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder 162 * @type: Hardware Block Type client wishes to search for. 163 */ 164 void dpu_rm_init_hw_iter( 165 struct dpu_rm_hw_iter *iter, 166 uint32_t enc_id, 167 enum dpu_hw_blk_type type); 168 /** 169 * dpu_rm_get_hw - retrieve reserved hw object given encoder and hw type 170 * Meant to do a single pass through the hardware list to iteratively 171 * retrieve hardware blocks of a given type for a given encoder. 172 * Initialize an iterator object. 173 * Set hw block type of interest. Set encoder id of interest, 0 for any. 174 * Function returns first hw of type for that encoder. 175 * Subsequent calls will return the next reserved hw of that type in-order. 176 * Iterator HW pointer will be null on failure to find hw. 177 * @rm: DPU Resource Manager handle 178 * @iter: iterator object 179 * @Return: true on match found, false on no match found 180 */ 181 bool dpu_rm_get_hw(struct dpu_rm *rm, struct dpu_rm_hw_iter *iter); 182 183 /** 184 * dpu_rm_check_property_topctl - validate property bitmask before it is set 185 * @val: user's proposed topology control bitmask 186 * @Return: 0 on success or error 187 */ 188 int dpu_rm_check_property_topctl(uint64_t val); 189 190 /** 191 * dpu_rm_get_topology_name - returns the name of the the given topology 192 * definition 193 * @topology: topology definition 194 * @Return: name of the topology 195 */ 196 enum dpu_rm_topology_name 197 dpu_rm_get_topology_name(struct msm_display_topology topology); 198 199 #endif /* __DPU_RM_H__ */ 200
