1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Hisilicon Hibmc SoC drm driver
3 *
4 * Based on the bochs drm driver.
5 *
6 * Copyright (c) 2016 Huawei Limited.
7 *
8 * Author:
9 * Rongrong Zou <zourongrong@huawei.com>
10 * Rongrong Zou <zourongrong@gmail.com>
11 * Jianhua Li <lijianhua@huawei.com>
12 */
13
14 #include <linux/console.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_gem_vram_helper.h>
21 #include <drm/drm_irq.h>
22 #include <drm/drm_print.h>
23 #include <drm/drm_probe_helper.h>
24 #include <drm/drm_vblank.h>
25 #include <drm/drm_vram_mm_helper.h>
26
27 #include "hibmc_drm_drv.h"
28 #include "hibmc_drm_regs.h"
29
30 static const struct file_operations hibmc_fops = {
31 .owner = THIS_MODULE,
32 DRM_VRAM_MM_FILE_OPERATIONS
33 };
34
hibmc_drm_interrupt(int irq,void * arg)35 static irqreturn_t hibmc_drm_interrupt(int irq, void *arg)
36 {
37 struct drm_device *dev = (struct drm_device *)arg;
38 struct hibmc_drm_private *priv =
39 (struct hibmc_drm_private *)dev->dev_private;
40 u32 status;
41
42 status = readl(priv->mmio + HIBMC_RAW_INTERRUPT);
43
44 if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) {
45 writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
46 priv->mmio + HIBMC_RAW_INTERRUPT);
47 drm_handle_vblank(dev, 0);
48 }
49
50 return IRQ_HANDLED;
51 }
52
53 static struct drm_driver hibmc_driver = {
54 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
55 .fops = &hibmc_fops,
56 .name = "hibmc",
57 .date = "20160828",
58 .desc = "hibmc drm driver",
59 .major = 1,
60 .minor = 0,
61 .dumb_create = hibmc_dumb_create,
62 .dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset,
63 .gem_prime_mmap = drm_gem_prime_mmap,
64 .irq_handler = hibmc_drm_interrupt,
65 };
66
hibmc_pm_suspend(struct device * dev)67 static int __maybe_unused hibmc_pm_suspend(struct device *dev)
68 {
69 struct drm_device *drm_dev = dev_get_drvdata(dev);
70
71 return drm_mode_config_helper_suspend(drm_dev);
72 }
73
hibmc_pm_resume(struct device * dev)74 static int __maybe_unused hibmc_pm_resume(struct device *dev)
75 {
76 struct drm_device *drm_dev = dev_get_drvdata(dev);
77
78 return drm_mode_config_helper_resume(drm_dev);
79 }
80
81 static const struct dev_pm_ops hibmc_pm_ops = {
82 SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend,
83 hibmc_pm_resume)
84 };
85
hibmc_kms_init(struct hibmc_drm_private * priv)86 static int hibmc_kms_init(struct hibmc_drm_private *priv)
87 {
88 int ret;
89
90 drm_mode_config_init(priv->dev);
91 priv->mode_config_initialized = true;
92
93 priv->dev->mode_config.min_width = 0;
94 priv->dev->mode_config.min_height = 0;
95 priv->dev->mode_config.max_width = 1920;
96 priv->dev->mode_config.max_height = 1440;
97
98 priv->dev->mode_config.fb_base = priv->fb_base;
99 priv->dev->mode_config.preferred_depth = 24;
100 priv->dev->mode_config.prefer_shadow = 0;
101
102 priv->dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
103
104 ret = hibmc_de_init(priv);
105 if (ret) {
106 DRM_ERROR("failed to init de: %d\n", ret);
107 return ret;
108 }
109
110 ret = hibmc_vdac_init(priv);
111 if (ret) {
112 DRM_ERROR("failed to init vdac: %d\n", ret);
113 return ret;
114 }
115
116 return 0;
117 }
118
hibmc_kms_fini(struct hibmc_drm_private * priv)119 static void hibmc_kms_fini(struct hibmc_drm_private *priv)
120 {
121 if (priv->mode_config_initialized) {
122 drm_mode_config_cleanup(priv->dev);
123 priv->mode_config_initialized = false;
124 }
125 }
126
127 /*
128 * It can operate in one of three modes: 0, 1 or Sleep.
129 */
hibmc_set_power_mode(struct hibmc_drm_private * priv,unsigned int power_mode)130 void hibmc_set_power_mode(struct hibmc_drm_private *priv,
131 unsigned int power_mode)
132 {
133 unsigned int control_value = 0;
134 void __iomem *mmio = priv->mmio;
135 unsigned int input = 1;
136
137 if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP)
138 return;
139
140 if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP)
141 input = 0;
142
143 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
144 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK |
145 HIBMC_PW_MODE_CTL_OSC_INPUT_MASK);
146 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode);
147 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input);
148 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
149 }
150
hibmc_set_current_gate(struct hibmc_drm_private * priv,unsigned int gate)151 void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
152 {
153 unsigned int gate_reg;
154 unsigned int mode;
155 void __iomem *mmio = priv->mmio;
156
157 /* Get current power mode. */
158 mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
159 HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT;
160
161 switch (mode) {
162 case HIBMC_PW_MODE_CTL_MODE_MODE0:
163 gate_reg = HIBMC_MODE0_GATE;
164 break;
165
166 case HIBMC_PW_MODE_CTL_MODE_MODE1:
167 gate_reg = HIBMC_MODE1_GATE;
168 break;
169
170 default:
171 gate_reg = HIBMC_MODE0_GATE;
172 break;
173 }
174 writel(gate, mmio + gate_reg);
175 }
176
hibmc_hw_config(struct hibmc_drm_private * priv)177 static void hibmc_hw_config(struct hibmc_drm_private *priv)
178 {
179 unsigned int reg;
180
181 /* On hardware reset, power mode 0 is default. */
182 hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0);
183
184 /* Enable display power gate & LOCALMEM power gate*/
185 reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
186 reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
187 reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
188 reg |= HIBMC_CURR_GATE_DISPLAY(1);
189 reg |= HIBMC_CURR_GATE_LOCALMEM(1);
190
191 hibmc_set_current_gate(priv, reg);
192
193 /*
194 * Reset the memory controller. If the memory controller
195 * is not reset in chip,the system might hang when sw accesses
196 * the memory.The memory should be resetted after
197 * changing the MXCLK.
198 */
199 reg = readl(priv->mmio + HIBMC_MISC_CTRL);
200 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
201 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0);
202 writel(reg, priv->mmio + HIBMC_MISC_CTRL);
203
204 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
205 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
206
207 writel(reg, priv->mmio + HIBMC_MISC_CTRL);
208 }
209
hibmc_hw_map(struct hibmc_drm_private * priv)210 static int hibmc_hw_map(struct hibmc_drm_private *priv)
211 {
212 struct drm_device *dev = priv->dev;
213 struct pci_dev *pdev = dev->pdev;
214 resource_size_t addr, size, ioaddr, iosize;
215
216 ioaddr = pci_resource_start(pdev, 1);
217 iosize = pci_resource_len(pdev, 1);
218 priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize);
219 if (!priv->mmio) {
220 DRM_ERROR("Cannot map mmio region\n");
221 return -ENOMEM;
222 }
223
224 addr = pci_resource_start(pdev, 0);
225 size = pci_resource_len(pdev, 0);
226 priv->fb_map = devm_ioremap(dev->dev, addr, size);
227 if (!priv->fb_map) {
228 DRM_ERROR("Cannot map framebuffer\n");
229 return -ENOMEM;
230 }
231 priv->fb_base = addr;
232 priv->fb_size = size;
233
234 return 0;
235 }
236
hibmc_hw_init(struct hibmc_drm_private * priv)237 static int hibmc_hw_init(struct hibmc_drm_private *priv)
238 {
239 int ret;
240
241 ret = hibmc_hw_map(priv);
242 if (ret)
243 return ret;
244
245 hibmc_hw_config(priv);
246
247 return 0;
248 }
249
hibmc_unload(struct drm_device * dev)250 static int hibmc_unload(struct drm_device *dev)
251 {
252 struct hibmc_drm_private *priv = dev->dev_private;
253
254 hibmc_fbdev_fini(priv);
255
256 drm_atomic_helper_shutdown(dev);
257
258 if (dev->irq_enabled)
259 drm_irq_uninstall(dev);
260 if (priv->msi_enabled)
261 pci_disable_msi(dev->pdev);
262
263 hibmc_kms_fini(priv);
264 hibmc_mm_fini(priv);
265 dev->dev_private = NULL;
266 return 0;
267 }
268
hibmc_load(struct drm_device * dev)269 static int hibmc_load(struct drm_device *dev)
270 {
271 struct hibmc_drm_private *priv;
272 int ret;
273
274 priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
275 if (!priv) {
276 DRM_ERROR("no memory to allocate for hibmc_drm_private\n");
277 return -ENOMEM;
278 }
279 dev->dev_private = priv;
280 priv->dev = dev;
281
282 ret = hibmc_hw_init(priv);
283 if (ret)
284 goto err;
285
286 ret = hibmc_mm_init(priv);
287 if (ret)
288 goto err;
289
290 ret = hibmc_kms_init(priv);
291 if (ret)
292 goto err;
293
294 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
295 if (ret) {
296 DRM_ERROR("failed to initialize vblank: %d\n", ret);
297 goto err;
298 }
299
300 priv->msi_enabled = 0;
301 ret = pci_enable_msi(dev->pdev);
302 if (ret) {
303 DRM_WARN("enabling MSI failed: %d\n", ret);
304 } else {
305 priv->msi_enabled = 1;
306 ret = drm_irq_install(dev, dev->pdev->irq);
307 if (ret)
308 DRM_WARN("install irq failed: %d\n", ret);
309 }
310
311 /* reset all the states of crtc/plane/encoder/connector */
312 drm_mode_config_reset(dev);
313
314 ret = hibmc_fbdev_init(priv);
315 if (ret) {
316 DRM_ERROR("failed to initialize fbdev: %d\n", ret);
317 goto err;
318 }
319
320 return 0;
321
322 err:
323 hibmc_unload(dev);
324 DRM_ERROR("failed to initialize drm driver: %d\n", ret);
325 return ret;
326 }
327
hibmc_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)328 static int hibmc_pci_probe(struct pci_dev *pdev,
329 const struct pci_device_id *ent)
330 {
331 struct drm_device *dev;
332 int ret;
333
334 dev = drm_dev_alloc(&hibmc_driver, &pdev->dev);
335 if (IS_ERR(dev)) {
336 DRM_ERROR("failed to allocate drm_device\n");
337 return PTR_ERR(dev);
338 }
339
340 dev->pdev = pdev;
341 pci_set_drvdata(pdev, dev);
342
343 ret = pci_enable_device(pdev);
344 if (ret) {
345 DRM_ERROR("failed to enable pci device: %d\n", ret);
346 goto err_free;
347 }
348
349 ret = hibmc_load(dev);
350 if (ret) {
351 DRM_ERROR("failed to load hibmc: %d\n", ret);
352 goto err_disable;
353 }
354
355 ret = drm_dev_register(dev, 0);
356 if (ret) {
357 DRM_ERROR("failed to register drv for userspace access: %d\n",
358 ret);
359 goto err_unload;
360 }
361 return 0;
362
363 err_unload:
364 hibmc_unload(dev);
365 err_disable:
366 pci_disable_device(pdev);
367 err_free:
368 drm_dev_put(dev);
369
370 return ret;
371 }
372
hibmc_pci_remove(struct pci_dev * pdev)373 static void hibmc_pci_remove(struct pci_dev *pdev)
374 {
375 struct drm_device *dev = pci_get_drvdata(pdev);
376
377 drm_dev_unregister(dev);
378 hibmc_unload(dev);
379 drm_dev_put(dev);
380 }
381
382 static struct pci_device_id hibmc_pci_table[] = {
383 { PCI_VDEVICE(HUAWEI, 0x1711) },
384 {0,}
385 };
386
387 static struct pci_driver hibmc_pci_driver = {
388 .name = "hibmc-drm",
389 .id_table = hibmc_pci_table,
390 .probe = hibmc_pci_probe,
391 .remove = hibmc_pci_remove,
392 .driver.pm = &hibmc_pm_ops,
393 };
394
395 module_pci_driver(hibmc_pci_driver);
396
397 MODULE_DEVICE_TABLE(pci, hibmc_pci_table);
398 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
399 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
400 MODULE_LICENSE("GPL v2");
401
