1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3 *
4 * Copyright(c) 2016 Realtek Corporation.
5 *
6 * Contact Information:
7 * wlanfae <wlanfae@realtek.com>
8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
9 * Hsinchu 300, Taiwan.
10 *
11 * Larry Finger <Larry.Finger@lwfinger.net>
12 *
13 *****************************************************************************/
14 #include "halmac_8822b_cfg.h"
15 #include "halmac_func_8822b.h"
16
17 /*SDIO RQPN Mapping*/
18 static struct halmac_rqpn_ HALMAC_RQPN_SDIO_8822B[] = {
19 /* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
20 {HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
21 HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
22 {HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
23 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
24 {HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
25 HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
26 {HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
27 HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
28 {HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
29 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
30 {HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
31 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
32 };
33
34 /*PCIE RQPN Mapping*/
35 static struct halmac_rqpn_ HALMAC_RQPN_PCIE_8822B[] = {
36 /* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
37 {HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
38 HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
39 {HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
40 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
41 {HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
42 HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
43 {HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
44 HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
45 {HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
46 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
47 {HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
48 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
49 };
50
51 /*USB 2 Bulkout RQPN Mapping*/
52 static struct halmac_rqpn_ HALMAC_RQPN_2BULKOUT_8822B[] = {
53 /* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
54 {HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
55 HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
56 {HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
57 HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
58 {HALMAC_TRX_MODE_WMM, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
59 HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
60 {HALMAC_TRX_MODE_P2P, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ,
61 HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
62 {HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ,
63 HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
64 {HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ,
65 HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
66 };
67
68 /*USB 3 Bulkout RQPN Mapping*/
69 static struct halmac_rqpn_ HALMAC_RQPN_3BULKOUT_8822B[] = {
70 /* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
71 {HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
72 HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
73 {HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
74 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
75 {HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
76 HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
77 {HALMAC_TRX_MODE_P2P, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ,
78 HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
79 {HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ,
80 HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
81 {HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ,
82 HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
83 };
84
85 /*USB 4 Bulkout RQPN Mapping*/
86 static struct halmac_rqpn_ HALMAC_RQPN_4BULKOUT_8822B[] = {
87 /* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
88 {HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
89 HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
90 {HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
91 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
92 {HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
93 HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
94 {HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ,
95 HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
96 {HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
97 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
98 {HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ,
99 HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
100 };
101
102 /*SDIO Page Number*/
103 static struct halmac_pg_num_ HALMAC_PG_NUM_SDIO_8822B[] = {
104 /* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
105 {HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
106 {HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 32, 1},
107 {HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
108 {HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
109 {HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
110 {HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
111 };
112
113 /*PCIE Page Number*/
114 static struct halmac_pg_num_ HALMAC_PG_NUM_PCIE_8822B[] = {
115 /* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
116 {HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
117 {HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
118 {HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
119 {HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
120 {HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
121 {HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
122 };
123
124 /*USB 2 Bulkout Page Number*/
125 static struct halmac_pg_num_ HALMAC_PG_NUM_2BULKOUT_8822B[] = {
126 /* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
127 {HALMAC_TRX_MODE_NORMAL, 64, 64, 0, 0, 1},
128 {HALMAC_TRX_MODE_TRXSHARE, 64, 64, 0, 0, 1},
129 {HALMAC_TRX_MODE_WMM, 64, 64, 0, 0, 1},
130 {HALMAC_TRX_MODE_P2P, 64, 64, 0, 0, 1},
131 {HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1024},
132 {HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1024},
133 };
134
135 /*USB 3 Bulkout Page Number*/
136 static struct halmac_pg_num_ HALMAC_PG_NUM_3BULKOUT_8822B[] = {
137 /* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
138 {HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
139 {HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 0, 1},
140 {HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
141 {HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
142 {HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1024},
143 {HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1024},
144 };
145
146 /*USB 4 Bulkout Page Number*/
147 static struct halmac_pg_num_ HALMAC_PG_NUM_4BULKOUT_8822B[] = {
148 /* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
149 {HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
150 {HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
151 {HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
152 {HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
153 {HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
154 {HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
155 };
156
157 enum halmac_ret_status
halmac_txdma_queue_mapping_8822b(struct halmac_adapter * halmac_adapter,enum halmac_trx_mode halmac_trx_mode)158 halmac_txdma_queue_mapping_8822b(struct halmac_adapter *halmac_adapter,
159 enum halmac_trx_mode halmac_trx_mode)
160 {
161 u16 value16;
162 void *driver_adapter = NULL;
163 struct halmac_rqpn_ *curr_rqpn_sel = NULL;
164 enum halmac_ret_status status;
165 struct halmac_api *halmac_api;
166
167 driver_adapter = halmac_adapter->driver_adapter;
168 halmac_api = (struct halmac_api *)halmac_adapter->halmac_api;
169
170 if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
171 curr_rqpn_sel = HALMAC_RQPN_SDIO_8822B;
172 } else if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_PCIE) {
173 curr_rqpn_sel = HALMAC_RQPN_PCIE_8822B;
174 } else if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
175 if (halmac_adapter->halmac_bulkout_num == 2) {
176 curr_rqpn_sel = HALMAC_RQPN_2BULKOUT_8822B;
177 } else if (halmac_adapter->halmac_bulkout_num == 3) {
178 curr_rqpn_sel = HALMAC_RQPN_3BULKOUT_8822B;
179 } else if (halmac_adapter->halmac_bulkout_num == 4) {
180 curr_rqpn_sel = HALMAC_RQPN_4BULKOUT_8822B;
181 } else {
182 pr_err("[ERR]interface not support\n");
183 return HALMAC_RET_NOT_SUPPORT;
184 }
185 } else {
186 return HALMAC_RET_NOT_SUPPORT;
187 }
188
189 status = halmac_rqpn_parser_88xx(halmac_adapter, halmac_trx_mode,
190 curr_rqpn_sel);
191 if (status != HALMAC_RET_SUCCESS)
192 return status;
193
194 value16 = 0;
195 value16 |= BIT_TXDMA_HIQ_MAP(
196 halmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_HI]);
197 value16 |= BIT_TXDMA_MGQ_MAP(
198 halmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_MG]);
199 value16 |= BIT_TXDMA_BKQ_MAP(
200 halmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_BK]);
201 value16 |= BIT_TXDMA_BEQ_MAP(
202 halmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_BE]);
203 value16 |= BIT_TXDMA_VIQ_MAP(
204 halmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VI]);
205 value16 |= BIT_TXDMA_VOQ_MAP(
206 halmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VO]);
207 HALMAC_REG_WRITE_16(halmac_adapter, REG_TXDMA_PQ_MAP, value16);
208
209 return HALMAC_RET_SUCCESS;
210 }
211
212 enum halmac_ret_status
halmac_priority_queue_config_8822b(struct halmac_adapter * halmac_adapter,enum halmac_trx_mode halmac_trx_mode)213 halmac_priority_queue_config_8822b(struct halmac_adapter *halmac_adapter,
214 enum halmac_trx_mode halmac_trx_mode)
215 {
216 u8 transfer_mode = 0;
217 u8 value8;
218 u32 counter;
219 enum halmac_ret_status status;
220 struct halmac_pg_num_ *curr_pg_num = NULL;
221 void *driver_adapter = NULL;
222 struct halmac_api *halmac_api;
223
224 driver_adapter = halmac_adapter->driver_adapter;
225 halmac_api = (struct halmac_api *)halmac_adapter->halmac_api;
226
227 if (halmac_adapter->txff_allocation.la_mode == HALMAC_LA_MODE_DISABLE) {
228 if (halmac_adapter->txff_allocation.rx_fifo_expanding_mode ==
229 HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE) {
230 halmac_adapter->txff_allocation.tx_fifo_pg_num =
231 HALMAC_TX_FIFO_SIZE_8822B >>
232 HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
233 } else if (halmac_adapter->txff_allocation
234 .rx_fifo_expanding_mode ==
235 HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK) {
236 halmac_adapter->txff_allocation.tx_fifo_pg_num =
237 HALMAC_TX_FIFO_SIZE_EX_1_BLK_8822B >>
238 HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
239 halmac_adapter->hw_config_info.tx_fifo_size =
240 HALMAC_TX_FIFO_SIZE_EX_1_BLK_8822B;
241 if (HALMAC_RX_FIFO_SIZE_EX_1_BLK_8822B <=
242 HALMAC_RX_FIFO_SIZE_EX_1_BLK_MAX_8822B)
243 halmac_adapter->hw_config_info.rx_fifo_size =
244 HALMAC_RX_FIFO_SIZE_EX_1_BLK_8822B;
245 else
246 halmac_adapter->hw_config_info.rx_fifo_size =
247 HALMAC_RX_FIFO_SIZE_EX_1_BLK_MAX_8822B;
248 } else {
249 halmac_adapter->txff_allocation.tx_fifo_pg_num =
250 HALMAC_TX_FIFO_SIZE_8822B >>
251 HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
252 pr_err("[ERR]rx_fifo_expanding_mode = %d not support\n",
253 halmac_adapter->txff_allocation
254 .rx_fifo_expanding_mode);
255 }
256 } else {
257 halmac_adapter->txff_allocation.tx_fifo_pg_num =
258 HALMAC_TX_FIFO_SIZE_LA_8822B >>
259 HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
260 }
261 halmac_adapter->txff_allocation.rsvd_pg_num =
262 (halmac_adapter->txff_allocation.rsvd_drv_pg_num +
263 HALMAC_RSVD_H2C_EXTRAINFO_PGNUM_8822B +
264 HALMAC_RSVD_H2C_QUEUE_PGNUM_8822B +
265 HALMAC_RSVD_CPU_INSTRUCTION_PGNUM_8822B +
266 HALMAC_RSVD_FW_TXBUFF_PGNUM_8822B);
267 if (halmac_adapter->txff_allocation.rsvd_pg_num >
268 halmac_adapter->txff_allocation.tx_fifo_pg_num)
269 return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
270
271 halmac_adapter->txff_allocation.ac_q_pg_num =
272 halmac_adapter->txff_allocation.tx_fifo_pg_num -
273 halmac_adapter->txff_allocation.rsvd_pg_num;
274 halmac_adapter->txff_allocation.rsvd_pg_bndy =
275 halmac_adapter->txff_allocation.tx_fifo_pg_num -
276 halmac_adapter->txff_allocation.rsvd_pg_num;
277 halmac_adapter->txff_allocation.rsvd_fw_txbuff_pg_bndy =
278 halmac_adapter->txff_allocation.tx_fifo_pg_num -
279 HALMAC_RSVD_FW_TXBUFF_PGNUM_8822B;
280 halmac_adapter->txff_allocation.rsvd_cpu_instr_pg_bndy =
281 halmac_adapter->txff_allocation.rsvd_fw_txbuff_pg_bndy -
282 HALMAC_RSVD_CPU_INSTRUCTION_PGNUM_8822B;
283 halmac_adapter->txff_allocation.rsvd_h2c_queue_pg_bndy =
284 halmac_adapter->txff_allocation.rsvd_cpu_instr_pg_bndy -
285 HALMAC_RSVD_H2C_QUEUE_PGNUM_8822B;
286 halmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy =
287 halmac_adapter->txff_allocation.rsvd_h2c_queue_pg_bndy -
288 HALMAC_RSVD_H2C_EXTRAINFO_PGNUM_8822B;
289 halmac_adapter->txff_allocation.rsvd_drv_pg_bndy =
290 halmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy -
291 halmac_adapter->txff_allocation.rsvd_drv_pg_num;
292
293 if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
294 curr_pg_num = HALMAC_PG_NUM_SDIO_8822B;
295 } else if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_PCIE) {
296 curr_pg_num = HALMAC_PG_NUM_PCIE_8822B;
297 } else if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
298 if (halmac_adapter->halmac_bulkout_num == 2) {
299 curr_pg_num = HALMAC_PG_NUM_2BULKOUT_8822B;
300 } else if (halmac_adapter->halmac_bulkout_num == 3) {
301 curr_pg_num = HALMAC_PG_NUM_3BULKOUT_8822B;
302 } else if (halmac_adapter->halmac_bulkout_num == 4) {
303 curr_pg_num = HALMAC_PG_NUM_4BULKOUT_8822B;
304 } else {
305 pr_err("[ERR]interface not support\n");
306 return HALMAC_RET_NOT_SUPPORT;
307 }
308 } else {
309 return HALMAC_RET_NOT_SUPPORT;
310 }
311
312 status = halmac_pg_num_parser_88xx(halmac_adapter, halmac_trx_mode,
313 curr_pg_num);
314 if (status != HALMAC_RET_SUCCESS)
315 return status;
316
317 HALMAC_REG_WRITE_16(halmac_adapter, REG_FIFOPAGE_INFO_1,
318 halmac_adapter->txff_allocation.high_queue_pg_num);
319 HALMAC_REG_WRITE_16(halmac_adapter, REG_FIFOPAGE_INFO_2,
320 halmac_adapter->txff_allocation.low_queue_pg_num);
321 HALMAC_REG_WRITE_16(
322 halmac_adapter, REG_FIFOPAGE_INFO_3,
323 halmac_adapter->txff_allocation.normal_queue_pg_num);
324 HALMAC_REG_WRITE_16(halmac_adapter, REG_FIFOPAGE_INFO_4,
325 halmac_adapter->txff_allocation.extra_queue_pg_num);
326 HALMAC_REG_WRITE_16(halmac_adapter, REG_FIFOPAGE_INFO_5,
327 halmac_adapter->txff_allocation.pub_queue_pg_num);
328
329 halmac_adapter->sdio_free_space.high_queue_number =
330 halmac_adapter->txff_allocation.high_queue_pg_num;
331 halmac_adapter->sdio_free_space.normal_queue_number =
332 halmac_adapter->txff_allocation.normal_queue_pg_num;
333 halmac_adapter->sdio_free_space.low_queue_number =
334 halmac_adapter->txff_allocation.low_queue_pg_num;
335 halmac_adapter->sdio_free_space.public_queue_number =
336 halmac_adapter->txff_allocation.pub_queue_pg_num;
337 halmac_adapter->sdio_free_space.extra_queue_number =
338 halmac_adapter->txff_allocation.extra_queue_pg_num;
339
340 HALMAC_REG_WRITE_32(
341 halmac_adapter, REG_RQPN_CTRL_2,
342 HALMAC_REG_READ_32(halmac_adapter, REG_RQPN_CTRL_2) | BIT(31));
343
344 HALMAC_REG_WRITE_16(halmac_adapter, REG_FIFOPAGE_CTRL_2,
345 (u16)(halmac_adapter->txff_allocation.rsvd_pg_bndy &
346 BIT_MASK_BCN_HEAD_1_V1));
347 HALMAC_REG_WRITE_16(halmac_adapter, REG_BCNQ_BDNY_V1,
348 (u16)(halmac_adapter->txff_allocation.rsvd_pg_bndy &
349 BIT_MASK_BCNQ_PGBNDY_V1));
350 HALMAC_REG_WRITE_16(halmac_adapter, REG_FIFOPAGE_CTRL_2 + 2,
351 (u16)(halmac_adapter->txff_allocation.rsvd_pg_bndy &
352 BIT_MASK_BCN_HEAD_1_V1));
353 HALMAC_REG_WRITE_16(halmac_adapter, REG_BCNQ1_BDNY_V1,
354 (u16)(halmac_adapter->txff_allocation.rsvd_pg_bndy &
355 BIT_MASK_BCNQ_PGBNDY_V1));
356
357 HALMAC_REG_WRITE_32(halmac_adapter, REG_RXFF_BNDY,
358 halmac_adapter->hw_config_info.rx_fifo_size -
359 HALMAC_C2H_PKT_BUF_8822B - 1);
360
361 if (halmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
362 value8 = (u8)(
363 HALMAC_REG_READ_8(halmac_adapter, REG_AUTO_LLT_V1) &
364 ~(BIT_MASK_BLK_DESC_NUM << BIT_SHIFT_BLK_DESC_NUM));
365 value8 = (u8)(value8 | (HALMAC_BLK_DESC_NUM_8822B
366 << BIT_SHIFT_BLK_DESC_NUM));
367 HALMAC_REG_WRITE_8(halmac_adapter, REG_AUTO_LLT_V1, value8);
368
369 HALMAC_REG_WRITE_8(halmac_adapter, REG_AUTO_LLT_V1 + 3,
370 HALMAC_BLK_DESC_NUM_8822B);
371 HALMAC_REG_WRITE_8(halmac_adapter, REG_TXDMA_OFFSET_CHK + 1,
372 HALMAC_REG_READ_8(halmac_adapter,
373 REG_TXDMA_OFFSET_CHK + 1) |
374 BIT(1));
375 }
376
377 HALMAC_REG_WRITE_8(
378 halmac_adapter, REG_AUTO_LLT_V1,
379 (u8)(HALMAC_REG_READ_8(halmac_adapter, REG_AUTO_LLT_V1) |
380 BIT_AUTO_INIT_LLT_V1));
381 counter = 1000;
382 while (HALMAC_REG_READ_8(halmac_adapter, REG_AUTO_LLT_V1) &
383 BIT_AUTO_INIT_LLT_V1) {
384 counter--;
385 if (counter == 0)
386 return HALMAC_RET_INIT_LLT_FAIL;
387 }
388
389 if (halmac_trx_mode == HALMAC_TRX_MODE_DELAY_LOOPBACK) {
390 transfer_mode = HALMAC_TRNSFER_LOOPBACK_DELAY;
391 HALMAC_REG_WRITE_16(
392 halmac_adapter, REG_WMAC_LBK_BUF_HD_V1,
393 (u16)halmac_adapter->txff_allocation.rsvd_pg_bndy);
394 } else if (halmac_trx_mode == HALMAC_TRX_MODE_LOOPBACK) {
395 transfer_mode = HALMAC_TRNSFER_LOOPBACK_DIRECT;
396 } else {
397 transfer_mode = HALMAC_TRNSFER_NORMAL;
398 }
399
400 HALMAC_REG_WRITE_8(halmac_adapter, REG_CR + 3, (u8)transfer_mode);
401
402 return HALMAC_RET_SUCCESS;
403 }
404
