1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "ior.h"
23 
24 #include <subdev/timer.h>
25 
26 void
gv100_sor_dp_watermark(struct nvkm_ior * sor,int head,u8 watermark)27 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark)
28 {
29 	struct nvkm_device *device = sor->disp->engine.subdev.device;
30 	const u32 hoff = head * 0x800;
31 	nvkm_mask(device, 0x616550 + hoff, 0x0c00003f, 0x08000000 | watermark);
32 }
33 
34 void
gv100_sor_dp_audio_sym(struct nvkm_ior * sor,int head,u16 h,u32 v)35 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v)
36 {
37 	struct nvkm_device *device = sor->disp->engine.subdev.device;
38 	const u32 hoff = head * 0x800;
39 	nvkm_mask(device, 0x616568 + hoff, 0x0000ffff, h);
40 	nvkm_mask(device, 0x61656c + hoff, 0x00ffffff, v);
41 }
42 
43 void
gv100_sor_dp_audio(struct nvkm_ior * sor,int head,bool enable)44 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
45 {
46 	struct nvkm_device *device = sor->disp->engine.subdev.device;
47 	const u32 hoff = 0x800 * head;
48 	const u32 data = 0x80000000 | (0x00000001 * enable);
49 	const u32 mask = 0x8000000d;
50 	nvkm_mask(device, 0x616560 + hoff, mask, data);
51 	nvkm_msec(device, 2000,
52 		if (!(nvkm_rd32(device, 0x616560 + hoff) & 0x80000000))
53 			break;
54 	);
55 }
56 
57 void
gv100_sor_state(struct nvkm_ior * sor,struct nvkm_ior_state * state)58 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state)
59 {
60 	struct nvkm_device *device = sor->disp->engine.subdev.device;
61 	const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20;
62 	u32 ctrl = nvkm_rd32(device, 0x680300 + coff);
63 
64 	state->proto_evo = (ctrl & 0x00000f00) >> 8;
65 	switch (state->proto_evo) {
66 	case 0: state->proto = LVDS; state->link = 1; break;
67 	case 1: state->proto = TMDS; state->link = 1; break;
68 	case 2: state->proto = TMDS; state->link = 2; break;
69 	case 5: state->proto = TMDS; state->link = 3; break;
70 	case 8: state->proto =   DP; state->link = 1; break;
71 	case 9: state->proto =   DP; state->link = 2; break;
72 	default:
73 		state->proto = UNKNOWN;
74 		break;
75 	}
76 
77 	state->head = ctrl & 0x000000ff;
78 }
79 
80 static const struct nvkm_ior_func
81 gv100_sor = {
82 	.route = {
83 		.get = gm200_sor_route_get,
84 		.set = gm200_sor_route_set,
85 	},
86 	.state = gv100_sor_state,
87 	.power = nv50_sor_power,
88 	.clock = gf119_sor_clock,
89 	.hdmi = {
90 		.ctrl = gv100_hdmi_ctrl,
91 		.scdc = gm200_hdmi_scdc,
92 	},
93 	.dp = {
94 		.lanes = { 0, 1, 2, 3 },
95 		.links = gf119_sor_dp_links,
96 		.power = g94_sor_dp_power,
97 		.pattern = gm107_sor_dp_pattern,
98 		.drive = gm200_sor_dp_drive,
99 		.audio = gv100_sor_dp_audio,
100 		.audio_sym = gv100_sor_dp_audio_sym,
101 		.watermark = gv100_sor_dp_watermark,
102 	},
103 	.hda = {
104 		.hpd = gf119_hda_hpd,
105 		.eld = gf119_hda_eld,
106 	},
107 };
108 
109 int
gv100_sor_new(struct nvkm_disp * disp,int id)110 gv100_sor_new(struct nvkm_disp *disp, int id)
111 {
112 	return nvkm_ior_new_(&gv100_sor, disp, SOR, id);
113 }
114 
115 int
gv100_sor_cnt(struct nvkm_disp * disp,unsigned long * pmask)116 gv100_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
117 {
118 	struct nvkm_device *device = disp->engine.subdev.device;
119 	*pmask = (nvkm_rd32(device, 0x610060) & 0x0000ff00) >> 8;
120 	return (nvkm_rd32(device, 0x610074) & 0x00000f00) >> 8;
121 }
122