1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/device.h>
18 #include <linux/string.h>
19 #include <linux/slab.h>
20 #include <linux/fs.h>
21 #include <linux/platform_device.h>
22 #include <linux/of.h>
23 #include <linux/delay.h>
24 #include <linux/io.h>
25 #include <linux/firmware.h>
26 #include <asm/unaligned.h>
27
28 #include "gs_fpgaboot.h"
29 #include "io.h"
30
31 #define DEVICE_NAME "device"
32 #define CLASS_NAME "fpgaboot"
33
34 static u8 bits_magic[] = {
35 0x0, 0x9, 0xf, 0xf0, 0xf, 0xf0,
36 0xf, 0xf0, 0xf, 0xf0, 0x0, 0x0, 0x1};
37
38 /* fake device for request_firmware */
39 static struct platform_device *firmware_pdev;
40
41 static char *file = "xlinx_fpga_firmware.bit";
42 module_param(file, charp, 0444);
43 MODULE_PARM_DESC(file, "Xilinx FPGA firmware file.");
44
read_bitstream(u8 * bitdata,u8 * buf,int * offset,int rdsize)45 static void read_bitstream(u8 *bitdata, u8 *buf, int *offset, int rdsize)
46 {
47 memcpy(buf, bitdata + *offset, rdsize);
48 *offset += rdsize;
49 }
50
readinfo_bitstream(u8 * bitdata,u8 * buf,int size,int * offset)51 static int readinfo_bitstream(u8 *bitdata, u8 *buf, int size, int *offset)
52 {
53 u8 tbuf[2];
54 u16 len;
55
56 /* read section char */
57 read_bitstream(bitdata, tbuf, offset, 1);
58
59 /* read length */
60 read_bitstream(bitdata, tbuf, offset, 2);
61
62 len = get_unaligned_be16(tbuf);
63 if (len >= size) {
64 pr_err("error: readinfo buffer too small\n");
65 return -EINVAL;
66 }
67
68 read_bitstream(bitdata, buf, offset, len);
69 buf[len] = '\0';
70
71 return 0;
72 }
73
74 /*
75 * read bitdata length
76 */
readlength_bitstream(u8 * bitdata,int * lendata,int * offset)77 static int readlength_bitstream(u8 *bitdata, int *lendata, int *offset)
78 {
79 u8 tbuf[4];
80
81 /* read section char */
82 read_bitstream(bitdata, tbuf, offset, 1);
83
84 /* make sure it is section 'e' */
85 if (tbuf[0] != 'e') {
86 pr_err("error: length section is not 'e', but %c\n", tbuf[0]);
87 return -EINVAL;
88 }
89
90 /* read 4bytes length */
91 read_bitstream(bitdata, tbuf, offset, 4);
92
93 *lendata = get_unaligned_be32(tbuf);
94
95 return 0;
96 }
97
98 /*
99 * read first 13 bytes to check bitstream magic number
100 */
readmagic_bitstream(u8 * bitdata,int * offset)101 static int readmagic_bitstream(u8 *bitdata, int *offset)
102 {
103 u8 buf[13];
104 int r;
105
106 read_bitstream(bitdata, buf, offset, 13);
107 r = memcmp(buf, bits_magic, 13);
108 if (r) {
109 pr_err("error: corrupted header\n");
110 return -EINVAL;
111 }
112 pr_info("bitstream file magic number Ok\n");
113
114 *offset = 13; /* magic length */
115
116 return 0;
117 }
118
119 /*
120 * NOTE: supports only bitstream format
121 */
get_imageformat(void)122 static enum fmt_image get_imageformat(void)
123 {
124 return f_bit;
125 }
126
gs_print_header(struct fpgaimage * fimage)127 static void gs_print_header(struct fpgaimage *fimage)
128 {
129 pr_info("file: %s\n", fimage->filename);
130 pr_info("part: %s\n", fimage->part);
131 pr_info("date: %s\n", fimage->date);
132 pr_info("time: %s\n", fimage->time);
133 pr_info("lendata: %d\n", fimage->lendata);
134 }
135
gs_read_bitstream(struct fpgaimage * fimage)136 static int gs_read_bitstream(struct fpgaimage *fimage)
137 {
138 u8 *bitdata;
139 int offset;
140 int err;
141
142 offset = 0;
143 bitdata = (u8 *)fimage->fw_entry->data;
144
145 err = readmagic_bitstream(bitdata, &offset);
146 if (err)
147 return err;
148
149 err = readinfo_bitstream(bitdata, fimage->filename, MAX_STR, &offset);
150 if (err)
151 return err;
152 err = readinfo_bitstream(bitdata, fimage->part, MAX_STR, &offset);
153 if (err)
154 return err;
155 err = readinfo_bitstream(bitdata, fimage->date, MAX_STR, &offset);
156 if (err)
157 return err;
158 err = readinfo_bitstream(bitdata, fimage->time, MAX_STR, &offset);
159 if (err)
160 return err;
161
162 err = readlength_bitstream(bitdata, &fimage->lendata, &offset);
163 if (err)
164 return err;
165
166 fimage->fpgadata = bitdata + offset;
167
168 return 0;
169 }
170
gs_read_image(struct fpgaimage * fimage)171 static int gs_read_image(struct fpgaimage *fimage)
172 {
173 int img_fmt;
174 int err;
175
176 img_fmt = get_imageformat();
177
178 switch (img_fmt) {
179 case f_bit:
180 pr_info("image is bitstream format\n");
181 err = gs_read_bitstream(fimage);
182 if (err)
183 return err;
184 break;
185 default:
186 pr_err("unsupported fpga image format\n");
187 return -EINVAL;
188 }
189
190 gs_print_header(fimage);
191
192 return 0;
193 }
194
gs_load_image(struct fpgaimage * fimage,char * fw_file)195 static int gs_load_image(struct fpgaimage *fimage, char *fw_file)
196 {
197 int err;
198
199 pr_info("load fpgaimage %s\n", fw_file);
200
201 err = request_firmware(&fimage->fw_entry, fw_file, &firmware_pdev->dev);
202 if (err != 0) {
203 pr_err("firmware %s is missing, cannot continue.\n", fw_file);
204 return err;
205 }
206
207 return 0;
208 }
209
gs_download_image(struct fpgaimage * fimage,enum wbus bus_bytes)210 static int gs_download_image(struct fpgaimage *fimage, enum wbus bus_bytes)
211 {
212 u8 *bitdata;
213 int size, i, cnt;
214
215 cnt = 0;
216 bitdata = (u8 *)fimage->fpgadata;
217 size = fimage->lendata;
218
219 #ifdef DEBUG_FPGA
220 print_hex_dump_bytes("bitfile sample: ", DUMP_PREFIX_OFFSET,
221 bitdata, 0x100);
222 #endif /* DEBUG_FPGA */
223 if (!xl_supported_prog_bus_width(bus_bytes)) {
224 pr_err("unsupported program bus width %d\n",
225 bus_bytes);
226 return -EINVAL;
227 }
228
229 /* Bring csi_b, rdwr_b Low and program_b High */
230 xl_program_b(1);
231 xl_rdwr_b(0);
232 xl_csi_b(0);
233
234 /* Configuration reset */
235 xl_program_b(0);
236 msleep(20);
237 xl_program_b(1);
238
239 /* Wait for Device Initialization */
240 while (xl_get_init_b() == 0)
241 ;
242
243 pr_info("device init done\n");
244
245 for (i = 0; i < size; i += bus_bytes)
246 xl_shift_bytes_out(bus_bytes, bitdata + i);
247
248 pr_info("program done\n");
249
250 /* Check INIT_B */
251 if (xl_get_init_b() == 0) {
252 pr_err("init_b 0\n");
253 return -EIO;
254 }
255
256 while (xl_get_done_b() == 0) {
257 if (cnt++ > MAX_WAIT_DONE) {
258 pr_err("init_B %d\n", xl_get_init_b());
259 break;
260 }
261 }
262
263 if (cnt > MAX_WAIT_DONE) {
264 pr_err("fpga download fail\n");
265 return -EIO;
266 }
267
268 pr_info("download fpgaimage\n");
269
270 /* Compensate for Special Startup Conditions */
271 xl_shift_cclk(8);
272
273 return 0;
274 }
275
gs_release_image(struct fpgaimage * fimage)276 static int gs_release_image(struct fpgaimage *fimage)
277 {
278 release_firmware(fimage->fw_entry);
279 pr_info("release fpgaimage\n");
280
281 return 0;
282 }
283
284 /*
285 * NOTE: supports systemmap parallel programming
286 */
gs_set_download_method(struct fpgaimage * fimage)287 static int gs_set_download_method(struct fpgaimage *fimage)
288 {
289 pr_info("set program method\n");
290
291 fimage->dmethod = m_systemmap;
292
293 pr_info("systemmap program method\n");
294
295 return 0;
296 }
297
init_driver(void)298 static int init_driver(void)
299 {
300 firmware_pdev = platform_device_register_simple("fpgaboot", -1,
301 NULL, 0);
302 return PTR_ERR_OR_ZERO(firmware_pdev);
303 }
304
gs_fpgaboot(void)305 static int gs_fpgaboot(void)
306 {
307 int err;
308 struct fpgaimage *fimage;
309
310 fimage = kmalloc(sizeof(*fimage), GFP_KERNEL);
311 if (!fimage)
312 return -ENOMEM;
313
314 err = gs_load_image(fimage, file);
315 if (err) {
316 pr_err("gs_load_image error\n");
317 goto err_out1;
318 }
319
320 err = gs_read_image(fimage);
321 if (err) {
322 pr_err("gs_read_image error\n");
323 goto err_out2;
324 }
325
326 err = gs_set_download_method(fimage);
327 if (err) {
328 pr_err("gs_set_download_method error\n");
329 goto err_out2;
330 }
331
332 err = gs_download_image(fimage, bus_2byte);
333 if (err) {
334 pr_err("gs_download_image error\n");
335 goto err_out2;
336 }
337
338 err = gs_release_image(fimage);
339 if (err) {
340 pr_err("gs_release_image error\n");
341 goto err_out1;
342 }
343
344 kfree(fimage);
345 return 0;
346
347 err_out2:
348 err = gs_release_image(fimage);
349 if (err)
350 pr_err("gs_release_image error\n");
351 err_out1:
352 kfree(fimage);
353
354 return err;
355 }
356
gs_fpgaboot_init(void)357 static int __init gs_fpgaboot_init(void)
358 {
359 int err;
360
361 pr_info("FPGA DOWNLOAD --->\n");
362
363 pr_info("FPGA image file name: %s\n", file);
364
365 err = init_driver();
366 if (err) {
367 pr_err("FPGA DRIVER INIT FAIL!!\n");
368 return err;
369 }
370
371 err = xl_init_io();
372 if (err) {
373 pr_err("GPIO INIT FAIL!!\n");
374 goto errout;
375 }
376
377 err = gs_fpgaboot();
378 if (err) {
379 pr_err("FPGA DOWNLOAD FAIL!!\n");
380 goto errout;
381 }
382
383 pr_info("FPGA DOWNLOAD DONE <---\n");
384
385 return 0;
386
387 errout:
388 platform_device_unregister(firmware_pdev);
389
390 return err;
391 }
392
gs_fpgaboot_exit(void)393 static void __exit gs_fpgaboot_exit(void)
394 {
395 platform_device_unregister(firmware_pdev);
396 pr_info("FPGA image download module removed\n");
397 }
398
399 module_init(gs_fpgaboot_init);
400 module_exit(gs_fpgaboot_exit);
401
402 MODULE_AUTHOR("Insop Song");
403 MODULE_DESCRIPTION("Xlinix FPGA firmware download");
404 MODULE_LICENSE("GPL");
405
