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/Linux-v5.4/drivers/gpu/drm/msm/
Dmsm_gpu.c27 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_target() local
48 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_get_dev_status() local
67 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_get_cur_freq() local
84 static void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
109 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
133 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
142 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
154 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
172 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
179 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
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Dmsm_debugfs.c29 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show() local
49 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release() local
68 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open() local
118 struct msm_gpu *gpu = priv->gpu; in msm_gem_show() local
Dmsm_gpu.h144 static inline bool msm_gpu_active(struct msm_gpu *gpu) in msm_gpu_active()
214 static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) in gpu_write()
219 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read()
224 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or) in gpu_rmw()
232 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 lo, u32 hi) in gpu_read64()
256 static inline void gpu_write64(struct msm_gpu *gpu, u32 lo, u32 hi, u64 val) in gpu_write64()
294 static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu) in msm_gpu_crashstate_get()
310 static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu) in msm_gpu_crashstate_put()
Dmsm_gpummu.c13 struct msm_gpu *gpu; member
97 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu) in msm_gpummu_new()
/Linux-v5.4/drivers/gpu/drm/etnaviv/
Detnaviv_gpu.c43 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) in etnaviv_gpu_get_param()
168 #define etnaviv_is_model_rev(gpu, mod, rev) \ argument
174 static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) in etnaviv_hw_specs()
324 static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) in etnaviv_hw_identify()
442 static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock) in etnaviv_gpu_load_clock()
449 static void etnaviv_gpu_update_clock(struct etnaviv_gpu *gpu) in etnaviv_gpu_update_clock()
467 static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) in etnaviv_hw_reset()
551 static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) in etnaviv_gpu_enable_mlcg()
598 void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch) in etnaviv_gpu_start_fe()
612 static void etnaviv_gpu_start_fe_idleloop(struct etnaviv_gpu *gpu) in etnaviv_gpu_start_fe_idleloop()
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Detnaviv_buffer.c88 static void etnaviv_cmd_select_pipe(struct etnaviv_gpu *gpu, in etnaviv_cmd_select_pipe()
114 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, in etnaviv_buffer_dump()
150 static u32 etnaviv_buffer_reserve(struct etnaviv_gpu *gpu, in etnaviv_buffer_reserve()
161 u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu) in etnaviv_buffer_init()
178 u16 etnaviv_buffer_config_mmuv2(struct etnaviv_gpu *gpu, u32 mtlb_addr, u32 safe_addr) in etnaviv_buffer_config_mmuv2()
213 u16 etnaviv_buffer_config_pta(struct etnaviv_gpu *gpu, unsigned short id) in etnaviv_buffer_config_pta()
231 void etnaviv_buffer_end(struct etnaviv_gpu *gpu) in etnaviv_buffer_end()
275 void etnaviv_sync_point_queue(struct etnaviv_gpu *gpu, unsigned int event) in etnaviv_sync_point_queue()
314 void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state, in etnaviv_buffer_queue()
Detnaviv_perfmon.c39 static u32 perf_reg_read(struct etnaviv_gpu *gpu, in perf_reg_read()
48 static u32 pipe_reg_read(struct etnaviv_gpu *gpu, in pipe_reg_read()
72 static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu, in hi_total_cycle_read()
86 static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu, in hi_total_idle_cycle_read()
426 int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu, in etnaviv_pm_query_dom()
448 int etnaviv_pm_query_sig(struct etnaviv_gpu *gpu, in etnaviv_pm_query_sig()
492 void etnaviv_perfmon_process(struct etnaviv_gpu *gpu, in etnaviv_perfmon_process()
Detnaviv_drv.c67 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_open() local
93 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_postclose() local
129 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_mmu_show()
159 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_buffer_dump()
180 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_ring_show()
206 struct etnaviv_gpu *gpu; in show_each_gpu() local
260 struct etnaviv_gpu *gpu; in etnaviv_ioctl_get_param() local
358 struct etnaviv_gpu *gpu; in etnaviv_ioctl_wait_fence() local
408 struct etnaviv_gpu *gpu; in etnaviv_ioctl_gem_wait() local
440 struct etnaviv_gpu *gpu; in etnaviv_ioctl_pm_query_dom() local
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Detnaviv_sched.c88 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_timedout_job() local
181 int etnaviv_sched_init(struct etnaviv_gpu *gpu) in etnaviv_sched_init()
194 void etnaviv_sched_fini(struct etnaviv_gpu *gpu) in etnaviv_sched_fini()
Detnaviv_iommu_v2.c165 static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_nonsec()
185 static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_sec()
236 static void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore()
Detnaviv_dump.c82 struct etnaviv_gpu *gpu) in etnaviv_core_dump_registers()
115 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_core_dump() local
Detnaviv_cmd_parser.c16 struct etnaviv_gpu *gpu; member
147 bool etnaviv_cmd_validate_one(struct etnaviv_gpu *gpu, u32 *stream, in etnaviv_cmd_validate_one()
/Linux-v5.4/drivers/gpu/drm/msm/adreno/
Da5xx_gpu.c21 static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a5xx_flush()
46 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a5xx_submit_in_rb()
106 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a5xx_submit()
312 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
330 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
368 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
411 static int a5xx_ucode_init(struct msm_gpu *gpu) in a5xx_ucode_init()
459 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
471 static int a5xx_zap_shader_init(struct msm_gpu *gpu) in a5xx_zap_shader_init()
502 static int a5xx_hw_init(struct msm_gpu *gpu) in a5xx_hw_init()
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Da6xx_gpu.c15 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
33 bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
52 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
82 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a6xx_submit()
265 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
292 static int a6xx_cp_init(struct msm_gpu *gpu) in a6xx_cp_init()
321 static int a6xx_ucode_init(struct msm_gpu *gpu) in a6xx_ucode_init()
349 static int a6xx_zap_shader_init(struct msm_gpu *gpu) in a6xx_zap_shader_init()
375 static int a6xx_hw_init(struct msm_gpu *gpu) in a6xx_hw_init()
561 static void a6xx_dump(struct msm_gpu *gpu) in a6xx_dump()
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Da4xx_gpu.c32 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
109 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
136 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
291 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
312 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
329 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
346 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
449 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu) in a4xx_gpu_state_get()
474 static void a4xx_dump(struct msm_gpu *gpu) in a4xx_dump()
481 static int a4xx_pm_resume(struct msm_gpu *gpu) { in a4xx_pm_resume()
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Da3xx_gpu.c35 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
62 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
291 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
312 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
329 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
347 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
402 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
409 static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) in a3xx_gpu_state_get()
465 struct msm_gpu *gpu; in a3xx_gpu_init() local
Da2xx_gpu.c13 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
60 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
201 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
222 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
234 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
252 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
383 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
390 static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu) in a2xx_gpu_state_get()
443 struct msm_gpu *gpu; in a2xx_gpu_init() local
Da5xx_preempt.c25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
79 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer() local
91 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
159 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
196 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
227 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring() local
257 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
267 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
Dadreno_gpu.c23 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt()
133 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
159 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) in adreno_get_param()
313 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, in adreno_fw_create_bo()
332 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
391 struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu) in adreno_active_ring()
396 void adreno_recover(struct msm_gpu *gpu) in adreno_recover()
414 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in adreno_submit()
486 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in adreno_flush()
507 bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in adreno_idle()
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Dadreno_gpu.h148 static inline bool adreno_is_a2xx(struct adreno_gpu *gpu) in adreno_is_a2xx()
153 static inline bool adreno_is_a20x(struct adreno_gpu *gpu) in adreno_is_a20x()
158 static inline bool adreno_is_a225(struct adreno_gpu *gpu) in adreno_is_a225()
163 static inline bool adreno_is_a3xx(struct adreno_gpu *gpu) in adreno_is_a3xx()
168 static inline bool adreno_is_a305(struct adreno_gpu *gpu) in adreno_is_a305()
173 static inline bool adreno_is_a306(struct adreno_gpu *gpu) in adreno_is_a306()
179 static inline bool adreno_is_a320(struct adreno_gpu *gpu) in adreno_is_a320()
184 static inline bool adreno_is_a330(struct adreno_gpu *gpu) in adreno_is_a330()
189 static inline bool adreno_is_a330v2(struct adreno_gpu *gpu) in adreno_is_a330v2()
194 static inline bool adreno_is_a4xx(struct adreno_gpu *gpu) in adreno_is_a4xx()
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Da5xx_debugfs.c14 static int pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
29 static int me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
44 static int meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
59 static int roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
104 struct msm_gpu *gpu = priv->gpu; in reset_set() local
151 int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
Da5xx_power.c103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup()
175 static void a540_lm_setup(struct msm_gpu *gpu) in a540_lm_setup()
211 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
220 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
278 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
295 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
320 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
Da6xx_gpu_state.c112 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
125 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
156 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
204 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
228 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
282 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
318 static void a6xx_get_debugbus(struct msm_gpu *gpu, in a6xx_get_debugbus()
427 static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu, in a6xx_get_dbgahb_cluster()
473 static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu, in a6xx_get_dbgahb_clusters()
495 static void a6xx_get_cluster(struct msm_gpu *gpu, in a6xx_get_cluster()
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Dadreno_device.c212 struct msm_gpu *gpu = NULL; in adreno_load_gpu() local
322 struct msm_gpu *gpu; in adreno_bind() local
360 struct msm_gpu *gpu = dev_get_drvdata(dev); in adreno_unbind() local
426 struct msm_gpu *gpu = platform_get_drvdata(pdev); in adreno_resume() local
434 struct msm_gpu *gpu = platform_get_drvdata(pdev); in adreno_suspend() local
Da6xx_gmu.c17 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault() local
107 struct msm_gpu *gpu = &adreno_gpu->base; in __a6xx_gmu_set_freq() local
138 void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq) in a6xx_gmu_set_freq()
155 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu) in a6xx_gmu_get_freq()
696 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_resume() local
786 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_shutdown() local
846 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_gmu_stop() local
1095 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init() local
1145 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_pwrlevels_probe() local

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