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Searched defs:gmu (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/msm/adreno/
Da6xx_gmu.c14 struct a6xx_gmu *gmu = data; in a6xx_gmu_irq() local
39 struct a6xx_gmu *gmu = data; in a6xx_hfi_irq() local
59 static bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu) in a6xx_gmu_gx_is_on()
68 static int a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index) in a6xx_gmu_set_freq()
88 static bool a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu) in a6xx_gmu_check_idle_level()
111 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_wait_for_idle() local
116 static int a6xx_gmu_start(struct a6xx_gmu *gmu) in a6xx_gmu_start()
133 static int a6xx_gmu_hfi_start(struct a6xx_gmu *gmu) in a6xx_gmu_hfi_start()
152 int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) in a6xx_gmu_set_oob()
199 void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) in a6xx_gmu_clear_oob()
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Da6xx_hfi.c54 static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu, in a6xx_hfi_queue_write()
99 static void a6xx_hfi_handle_ack(struct a6xx_gmu *gmu, in a6xx_hfi_handle_ack()
126 static void a6xx_hfi_handle_error(struct a6xx_gmu *gmu, in a6xx_hfi_handle_error()
136 struct a6xx_gmu *gmu = (struct a6xx_gmu *) data; in a6xx_hfi_task() local
162 static int a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id, in a6xx_hfi_send_msg()
225 static int a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state) in a6xx_hfi_send_gmu_init()
237 static int a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version) in a6xx_hfi_get_fw_version()
248 static int a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu) in a6xx_hfi_send_perf_table()
270 static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu) in a6xx_hfi_send_bw_table()
317 static int a6xx_hfi_send_test(struct a6xx_gmu *gmu) in a6xx_hfi_send_test()
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Da6xx_gmu.h82 static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset) in gmu_read()
87 static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value) in gmu_write()
92 static inline void pdc_write(struct a6xx_gmu *gmu, u32 offset, u32 value) in pdc_write()
97 static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or) in gmu_rmw()
106 #define gmu_poll_timeout(gmu, addr, val, cond, interval, timeout) \ argument
Da6xx_gpu.h23 struct a6xx_gmu gmu; member
Da6xx_gpu.c231 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_set_hwcg() local