1 /*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "priv.h"
24 #include "gk20a.h"
25
26 #include <core/tegra.h>
27
28 static const struct cvb_coef gm20b_cvb_coef[] = {
29 /* KHz, c0, c1, c2 */
30 /* 76800 */ { 1786666, -85625, 1632 },
31 /* 153600 */ { 1846729, -87525, 1632 },
32 /* 230400 */ { 1910480, -89425, 1632 },
33 /* 307200 */ { 1977920, -91325, 1632 },
34 /* 384000 */ { 2049049, -93215, 1632 },
35 /* 460800 */ { 2122872, -95095, 1632 },
36 /* 537600 */ { 2201331, -96985, 1632 },
37 /* 614400 */ { 2283479, -98885, 1632 },
38 /* 691200 */ { 2369315, -100785, 1632 },
39 /* 768000 */ { 2458841, -102685, 1632 },
40 /* 844800 */ { 2550821, -104555, 1632 },
41 /* 921600 */ { 2647676, -106455, 1632 },
42 };
43
44 static const struct cvb_coef gm20b_na_cvb_coef[] = {
45 /* KHz, c0, c1, c2, c3, c4, c5 */
46 /* 76800 */ { 814294, 8144, -940, 808, -21583, 226 },
47 /* 153600 */ { 856185, 8144, -940, 808, -21583, 226 },
48 /* 230400 */ { 898077, 8144, -940, 808, -21583, 226 },
49 /* 307200 */ { 939968, 8144, -940, 808, -21583, 226 },
50 /* 384000 */ { 981860, 8144, -940, 808, -21583, 226 },
51 /* 460800 */ { 1023751, 8144, -940, 808, -21583, 226 },
52 /* 537600 */ { 1065642, 8144, -940, 808, -21583, 226 },
53 /* 614400 */ { 1107534, 8144, -940, 808, -21583, 226 },
54 /* 691200 */ { 1149425, 8144, -940, 808, -21583, 226 },
55 /* 768000 */ { 1191317, 8144, -940, 808, -21583, 226 },
56 /* 844800 */ { 1233208, 8144, -940, 808, -21583, 226 },
57 /* 921600 */ { 1275100, 8144, -940, 808, -21583, 226 },
58 /* 998400 */ { 1316991, 8144, -940, 808, -21583, 226 },
59 };
60
61 static const u32 speedo_to_vmin[] = {
62 /* 0, 1, 2, 3, 4, */
63 950000, 840000, 818750, 840000, 810000,
64 };
65
66 int
gm20b_volt_new(struct nvkm_device * device,int index,struct nvkm_volt ** pvolt)67 gm20b_volt_new(struct nvkm_device *device, int index, struct nvkm_volt **pvolt)
68 {
69 struct nvkm_device_tegra *tdev = device->func->tegra(device);
70 struct gk20a_volt *volt;
71 u32 vmin;
72
73 if (tdev->gpu_speedo_id >= ARRAY_SIZE(speedo_to_vmin)) {
74 nvdev_error(device, "unsupported speedo %d\n",
75 tdev->gpu_speedo_id);
76 return -EINVAL;
77 }
78
79 volt = kzalloc(sizeof(*volt), GFP_KERNEL);
80 if (!volt)
81 return -ENOMEM;
82 *pvolt = &volt->base;
83
84 vmin = speedo_to_vmin[tdev->gpu_speedo_id];
85
86 if (tdev->gpu_speedo_id >= 1)
87 return gk20a_volt_ctor(device, index, gm20b_na_cvb_coef,
88 ARRAY_SIZE(gm20b_na_cvb_coef), vmin, volt);
89 else
90 return gk20a_volt_ctor(device, index, gm20b_cvb_coef,
91 ARRAY_SIZE(gm20b_cvb_coef), vmin, volt);
92 }
93
