1 /*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24 #include "gf100.h"
25 #include "ctxgf100.h"
26
27 #include <nvif/class.h>
28
29 /*******************************************************************************
30 * PGRAPH register lists
31 ******************************************************************************/
32
33 const struct gf100_gr_init
34 gf104_gr_init_ds_0[] = {
35 { 0x405844, 1, 0x04, 0x00ffffff },
36 { 0x405850, 1, 0x04, 0x00000000 },
37 { 0x405900, 1, 0x04, 0x00002834 },
38 { 0x405908, 1, 0x04, 0x00000000 },
39 {}
40 };
41
42 const struct gf100_gr_init
43 gf104_gr_init_tex_0[] = {
44 { 0x419ab0, 1, 0x04, 0x00000000 },
45 { 0x419ac8, 1, 0x04, 0x00000000 },
46 { 0x419ab8, 1, 0x04, 0x000000e7 },
47 { 0x419abc, 2, 0x04, 0x00000000 },
48 {}
49 };
50
51 static const struct gf100_gr_init
52 gf104_gr_init_pe_0[] = {
53 { 0x41980c, 3, 0x04, 0x00000000 },
54 { 0x419844, 1, 0x04, 0x00000000 },
55 { 0x41984c, 1, 0x04, 0x00005bc5 },
56 { 0x419850, 4, 0x04, 0x00000000 },
57 { 0x419880, 1, 0x04, 0x00000002 },
58 {}
59 };
60
61 const struct gf100_gr_init
62 gf104_gr_init_sm_0[] = {
63 { 0x419e00, 1, 0x04, 0x00000000 },
64 { 0x419ea0, 1, 0x04, 0x00000000 },
65 { 0x419ea4, 1, 0x04, 0x00000100 },
66 { 0x419ea8, 1, 0x04, 0x00001100 },
67 { 0x419eac, 1, 0x04, 0x11100702 },
68 { 0x419eb0, 1, 0x04, 0x00000003 },
69 { 0x419eb4, 4, 0x04, 0x00000000 },
70 { 0x419ec8, 1, 0x04, 0x0e063818 },
71 { 0x419ecc, 1, 0x04, 0x0e060e06 },
72 { 0x419ed0, 1, 0x04, 0x00003818 },
73 { 0x419ed4, 1, 0x04, 0x011104f1 },
74 { 0x419edc, 1, 0x04, 0x00000000 },
75 { 0x419f00, 1, 0x04, 0x00000000 },
76 { 0x419f2c, 1, 0x04, 0x00000000 },
77 {}
78 };
79
80 static const struct gf100_gr_pack
81 gf104_gr_pack_mmio[] = {
82 { gf100_gr_init_main_0 },
83 { gf100_gr_init_fe_0 },
84 { gf100_gr_init_pri_0 },
85 { gf100_gr_init_rstr2d_0 },
86 { gf100_gr_init_pd_0 },
87 { gf104_gr_init_ds_0 },
88 { gf100_gr_init_scc_0 },
89 { gf100_gr_init_prop_0 },
90 { gf100_gr_init_gpc_unk_0 },
91 { gf100_gr_init_setup_0 },
92 { gf100_gr_init_crstr_0 },
93 { gf100_gr_init_setup_1 },
94 { gf100_gr_init_zcull_0 },
95 { gf100_gr_init_gpm_0 },
96 { gf100_gr_init_gpc_unk_1 },
97 { gf100_gr_init_gcc_0 },
98 { gf100_gr_init_tpccs_0 },
99 { gf104_gr_init_tex_0 },
100 { gf104_gr_init_pe_0 },
101 { gf100_gr_init_l1c_0 },
102 { gf100_gr_init_wwdx_0 },
103 { gf100_gr_init_tpccs_1 },
104 { gf100_gr_init_mpc_0 },
105 { gf104_gr_init_sm_0 },
106 { gf100_gr_init_be_0 },
107 { gf100_gr_init_fe_1 },
108 {}
109 };
110
111 /*******************************************************************************
112 * PGRAPH engine/subdev functions
113 ******************************************************************************/
114
115 static const struct gf100_gr_func
116 gf104_gr = {
117 .oneinit_tiles = gf100_gr_oneinit_tiles,
118 .oneinit_sm_id = gf100_gr_oneinit_sm_id,
119 .init = gf100_gr_init,
120 .init_gpc_mmu = gf100_gr_init_gpc_mmu,
121 .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
122 .init_zcull = gf100_gr_init_zcull,
123 .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
124 .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
125 .init_40601c = gf100_gr_init_40601c,
126 .init_419cc0 = gf100_gr_init_419cc0,
127 .init_419eb4 = gf100_gr_init_419eb4,
128 .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
129 .init_shader_exceptions = gf100_gr_init_shader_exceptions,
130 .init_rop_exceptions = gf100_gr_init_rop_exceptions,
131 .init_exception2 = gf100_gr_init_exception2,
132 .init_400054 = gf100_gr_init_400054,
133 .trap_mp = gf100_gr_trap_mp,
134 .mmio = gf104_gr_pack_mmio,
135 .fecs.ucode = &gf100_gr_fecs_ucode,
136 .fecs.reset = gf100_gr_fecs_reset,
137 .gpccs.ucode = &gf100_gr_gpccs_ucode,
138 .rops = gf100_gr_rops,
139 .grctx = &gf104_grctx,
140 .zbc = &gf100_gr_zbc,
141 .sclass = {
142 { -1, -1, FERMI_TWOD_A },
143 { -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A },
144 { -1, -1, FERMI_A, &gf100_fermi },
145 { -1, -1, FERMI_COMPUTE_A },
146 {}
147 }
148 };
149
150 static const struct gf100_gr_fwif
151 gf104_gr_fwif[] = {
152 { -1, gf100_gr_load, &gf104_gr },
153 { -1, gf100_gr_nofw, &gf104_gr },
154 {}
155 };
156
157 int
gf104_gr_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_gr ** pgr)158 gf104_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
159 {
160 return gf100_gr_new_(gf104_gr_fwif, device, type, inst, pgr);
161 }
162
