1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __QCOM_GDSC_H__ 7 #define __QCOM_GDSC_H__ 8 9 #include <linux/err.h> 10 #include <linux/pm_domain.h> 11 12 struct regmap; 13 struct regulator; 14 struct reset_controller_dev; 15 16 /** 17 * struct gdsc - Globally Distributed Switch Controller 18 * @pd: generic power domain 19 * @regmap: regmap for MMIO accesses 20 * @gdscr: gsdc control register 21 * @gds_hw_ctrl: gds_hw_ctrl register 22 * @cxcs: offsets of branch registers to toggle mem/periph bits in 23 * @cxc_count: number of @cxcs 24 * @pwrsts: Possible powerdomain power states 25 * @resets: ids of resets associated with this gdsc 26 * @reset_count: number of @resets 27 * @rcdev: reset controller 28 */ 29 struct gdsc { 30 struct generic_pm_domain pd; 31 struct generic_pm_domain *parent; 32 struct regmap *regmap; 33 unsigned int gdscr; 34 unsigned int gds_hw_ctrl; 35 unsigned int clamp_io_ctrl; 36 unsigned int *cxcs; 37 unsigned int cxc_count; 38 const u8 pwrsts; 39 /* Powerdomain allowable state bitfields */ 40 #define PWRSTS_OFF BIT(0) 41 #define PWRSTS_RET BIT(1) 42 #define PWRSTS_ON BIT(2) 43 #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON) 44 #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON) 45 const u8 flags; 46 #define VOTABLE BIT(0) 47 #define CLAMP_IO BIT(1) 48 #define HW_CTRL BIT(2) 49 #define SW_RESET BIT(3) 50 #define AON_RESET BIT(4) 51 #define POLL_CFG_GDSCR BIT(5) 52 #define ALWAYS_ON BIT(6) 53 #define RETAIN_FF_ENABLE BIT(7) 54 struct reset_controller_dev *rcdev; 55 unsigned int *resets; 56 unsigned int reset_count; 57 58 const char *supply; 59 struct regulator *rsupply; 60 }; 61 62 struct gdsc_desc { 63 struct device *dev; 64 struct gdsc **scs; 65 size_t num; 66 }; 67 68 #ifdef CONFIG_QCOM_GDSC 69 int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *, 70 struct regmap *); 71 void gdsc_unregister(struct gdsc_desc *desc); 72 int gdsc_gx_do_nothing_enable(struct generic_pm_domain *domain); 73 #else gdsc_register(struct gdsc_desc * desc,struct reset_controller_dev * rcdev,struct regmap * r)74static inline int gdsc_register(struct gdsc_desc *desc, 75 struct reset_controller_dev *rcdev, 76 struct regmap *r) 77 { 78 return -ENOSYS; 79 } 80 gdsc_unregister(struct gdsc_desc * desc)81static inline void gdsc_unregister(struct gdsc_desc *desc) {}; 82 #endif /* CONFIG_QCOM_GDSC */ 83 #endif /* __QCOM_GDSC_H__ */ 84
