1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * 64-bit pSeries and RS/6000 setup code.
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 * Adapted from 'alpha' version by Gary Thomas
7 * Modified by Cort Dougan (cort@cs.nmt.edu)
8 * Modified by PPC64 Team, IBM Corp
9 */
10
11 /*
12 * bootup setup stuff..
13 */
14
15 #include <linux/cpu.h>
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/user.h>
23 #include <linux/tty.h>
24 #include <linux/major.h>
25 #include <linux/interrupt.h>
26 #include <linux/reboot.h>
27 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/console.h>
30 #include <linux/pci.h>
31 #include <linux/utsname.h>
32 #include <linux/adb.h>
33 #include <linux/export.h>
34 #include <linux/delay.h>
35 #include <linux/irq.h>
36 #include <linux/seq_file.h>
37 #include <linux/root_dev.h>
38 #include <linux/of.h>
39 #include <linux/of_pci.h>
40 #include <linux/memblock.h>
41 #include <linux/swiotlb.h>
42
43 #include <asm/mmu.h>
44 #include <asm/processor.h>
45 #include <asm/io.h>
46 #include <asm/prom.h>
47 #include <asm/rtas.h>
48 #include <asm/pci-bridge.h>
49 #include <asm/iommu.h>
50 #include <asm/dma.h>
51 #include <asm/machdep.h>
52 #include <asm/irq.h>
53 #include <asm/time.h>
54 #include <asm/nvram.h>
55 #include <asm/pmc.h>
56 #include <asm/xics.h>
57 #include <asm/xive.h>
58 #include <asm/ppc-pci.h>
59 #include <asm/i8259.h>
60 #include <asm/udbg.h>
61 #include <asm/smp.h>
62 #include <asm/firmware.h>
63 #include <asm/eeh.h>
64 #include <asm/reg.h>
65 #include <asm/plpar_wrappers.h>
66 #include <asm/kexec.h>
67 #include <asm/isa-bridge.h>
68 #include <asm/security_features.h>
69 #include <asm/asm-const.h>
70 #include <asm/idle.h>
71 #include <asm/swiotlb.h>
72 #include <asm/svm.h>
73 #include <asm/dtl.h>
74
75 #include "pseries.h"
76 #include "../../../../drivers/pci/pci.h"
77
78 DEFINE_STATIC_KEY_FALSE(shared_processor);
79 EXPORT_SYMBOL_GPL(shared_processor);
80
81 int CMO_PrPSP = -1;
82 int CMO_SecPSP = -1;
83 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
84 EXPORT_SYMBOL(CMO_PageSize);
85
86 int fwnmi_active; /* TRUE if an FWNMI handler is present */
87 int ibm_nmi_interlock_token;
88
pSeries_show_cpuinfo(struct seq_file * m)89 static void pSeries_show_cpuinfo(struct seq_file *m)
90 {
91 struct device_node *root;
92 const char *model = "";
93
94 root = of_find_node_by_path("/");
95 if (root)
96 model = of_get_property(root, "model", NULL);
97 seq_printf(m, "machine\t\t: CHRP %s\n", model);
98 of_node_put(root);
99 if (radix_enabled())
100 seq_printf(m, "MMU\t\t: Radix\n");
101 else
102 seq_printf(m, "MMU\t\t: Hash\n");
103 }
104
105 /* Initialize firmware assisted non-maskable interrupts if
106 * the firmware supports this feature.
107 */
fwnmi_init(void)108 static void __init fwnmi_init(void)
109 {
110 unsigned long system_reset_addr, machine_check_addr;
111 u8 *mce_data_buf;
112 unsigned int i;
113 int nr_cpus = num_possible_cpus();
114 #ifdef CONFIG_PPC_BOOK3S_64
115 struct slb_entry *slb_ptr;
116 size_t size;
117 #endif
118 int ibm_nmi_register_token;
119
120 ibm_nmi_register_token = rtas_token("ibm,nmi-register");
121 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE)
122 return;
123
124 ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock");
125 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE))
126 return;
127
128 /* If the kernel's not linked at zero we point the firmware at low
129 * addresses anyway, and use a trampoline to get to the real code. */
130 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
131 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
132
133 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL,
134 system_reset_addr, machine_check_addr))
135 fwnmi_active = 1;
136
137 /*
138 * Allocate a chunk for per cpu buffer to hold rtas errorlog.
139 * It will be used in real mode mce handler, hence it needs to be
140 * below RMA.
141 */
142 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus,
143 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT,
144 ppc64_rma_size, NUMA_NO_NODE);
145 if (!mce_data_buf)
146 panic("Failed to allocate %d bytes below %pa for MCE buffer\n",
147 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size);
148
149 for_each_possible_cpu(i) {
150 paca_ptrs[i]->mce_data_buf = mce_data_buf +
151 (RTAS_ERROR_LOG_MAX * i);
152 }
153
154 #ifdef CONFIG_PPC_BOOK3S_64
155 if (!radix_enabled()) {
156 /* Allocate per cpu area to save old slb contents during MCE */
157 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus;
158 slb_ptr = memblock_alloc_try_nid_raw(size,
159 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT,
160 ppc64_rma_size, NUMA_NO_NODE);
161 if (!slb_ptr)
162 panic("Failed to allocate %zu bytes below %pa for slb area\n",
163 size, &ppc64_rma_size);
164
165 for_each_possible_cpu(i)
166 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i);
167 }
168 #endif
169 }
170
pseries_8259_cascade(struct irq_desc * desc)171 static void pseries_8259_cascade(struct irq_desc *desc)
172 {
173 struct irq_chip *chip = irq_desc_get_chip(desc);
174 unsigned int cascade_irq = i8259_irq();
175
176 if (cascade_irq)
177 generic_handle_irq(cascade_irq);
178
179 chip->irq_eoi(&desc->irq_data);
180 }
181
pseries_setup_i8259_cascade(void)182 static void __init pseries_setup_i8259_cascade(void)
183 {
184 struct device_node *np, *old, *found = NULL;
185 unsigned int cascade;
186 const u32 *addrp;
187 unsigned long intack = 0;
188 int naddr;
189
190 for_each_node_by_type(np, "interrupt-controller") {
191 if (of_device_is_compatible(np, "chrp,iic")) {
192 found = np;
193 break;
194 }
195 }
196
197 if (found == NULL) {
198 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
199 return;
200 }
201
202 cascade = irq_of_parse_and_map(found, 0);
203 if (!cascade) {
204 printk(KERN_ERR "pic: failed to map cascade interrupt");
205 return;
206 }
207 pr_debug("pic: cascade mapped to irq %d\n", cascade);
208
209 for (old = of_node_get(found); old != NULL ; old = np) {
210 np = of_get_parent(old);
211 of_node_put(old);
212 if (np == NULL)
213 break;
214 if (!of_node_name_eq(np, "pci"))
215 continue;
216 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
217 if (addrp == NULL)
218 continue;
219 naddr = of_n_addr_cells(np);
220 intack = addrp[naddr-1];
221 if (naddr > 1)
222 intack |= ((unsigned long)addrp[naddr-2]) << 32;
223 }
224 if (intack)
225 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
226 i8259_init(found, intack);
227 of_node_put(found);
228 irq_set_chained_handler(cascade, pseries_8259_cascade);
229 }
230
pseries_init_irq(void)231 static void __init pseries_init_irq(void)
232 {
233 /* Try using a XIVE if available, otherwise use a XICS */
234 if (!xive_spapr_init()) {
235 xics_init();
236 pseries_setup_i8259_cascade();
237 }
238 }
239
pseries_lpar_enable_pmcs(void)240 static void pseries_lpar_enable_pmcs(void)
241 {
242 unsigned long set, reset;
243
244 set = 1UL << 63;
245 reset = 0;
246 plpar_hcall_norets(H_PERFMON, set, reset);
247 }
248
pci_dn_reconfig_notifier(struct notifier_block * nb,unsigned long action,void * data)249 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
250 {
251 struct of_reconfig_data *rd = data;
252 struct device_node *parent, *np = rd->dn;
253 struct pci_dn *pdn;
254 int err = NOTIFY_OK;
255
256 switch (action) {
257 case OF_RECONFIG_ATTACH_NODE:
258 parent = of_get_parent(np);
259 pdn = parent ? PCI_DN(parent) : NULL;
260 if (pdn)
261 pci_add_device_node_info(pdn->phb, np);
262
263 of_node_put(parent);
264 break;
265 case OF_RECONFIG_DETACH_NODE:
266 pdn = PCI_DN(np);
267 if (pdn)
268 list_del(&pdn->list);
269 break;
270 default:
271 err = NOTIFY_DONE;
272 break;
273 }
274 return err;
275 }
276
277 static struct notifier_block pci_dn_reconfig_nb = {
278 .notifier_call = pci_dn_reconfig_notifier,
279 };
280
281 struct kmem_cache *dtl_cache;
282
283 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
284 /*
285 * Allocate space for the dispatch trace log for all possible cpus
286 * and register the buffers with the hypervisor. This is used for
287 * computing time stolen by the hypervisor.
288 */
alloc_dispatch_logs(void)289 static int alloc_dispatch_logs(void)
290 {
291 if (!firmware_has_feature(FW_FEATURE_SPLPAR))
292 return 0;
293
294 if (!dtl_cache)
295 return 0;
296
297 alloc_dtl_buffers(0);
298
299 /* Register the DTL for the current (boot) cpu */
300 register_dtl_buffer(smp_processor_id());
301
302 return 0;
303 }
304 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
alloc_dispatch_logs(void)305 static inline int alloc_dispatch_logs(void)
306 {
307 return 0;
308 }
309 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
310
alloc_dispatch_log_kmem_cache(void)311 static int alloc_dispatch_log_kmem_cache(void)
312 {
313 void (*ctor)(void *) = get_dtl_cache_ctor();
314
315 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
316 DISPATCH_LOG_BYTES, 0, ctor);
317 if (!dtl_cache) {
318 pr_warn("Failed to create dispatch trace log buffer cache\n");
319 pr_warn("Stolen time statistics will be unreliable\n");
320 return 0;
321 }
322
323 return alloc_dispatch_logs();
324 }
325 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
326
327 DEFINE_PER_CPU(u64, idle_spurr_cycles);
328 DEFINE_PER_CPU(u64, idle_entry_purr_snap);
329 DEFINE_PER_CPU(u64, idle_entry_spurr_snap);
pseries_lpar_idle(void)330 static void pseries_lpar_idle(void)
331 {
332 /*
333 * Default handler to go into low thread priority and possibly
334 * low power mode by ceding processor to hypervisor
335 */
336
337 if (!prep_irq_for_idle())
338 return;
339
340 /* Indicate to hypervisor that we are idle. */
341 pseries_idle_prolog();
342
343 /*
344 * Yield the processor to the hypervisor. We return if
345 * an external interrupt occurs (which are driven prior
346 * to returning here) or if a prod occurs from another
347 * processor. When returning here, external interrupts
348 * are enabled.
349 */
350 cede_processor();
351
352 pseries_idle_epilog();
353 }
354
355 /*
356 * Enable relocation on during exceptions. This has partition wide scope and
357 * may take a while to complete, if it takes longer than one second we will
358 * just give up rather than wasting any more time on this - if that turns out
359 * to ever be a problem in practice we can move this into a kernel thread to
360 * finish off the process later in boot.
361 */
pseries_enable_reloc_on_exc(void)362 bool pseries_enable_reloc_on_exc(void)
363 {
364 long rc;
365 unsigned int delay, total_delay = 0;
366
367 while (1) {
368 rc = enable_reloc_on_exceptions();
369 if (!H_IS_LONG_BUSY(rc)) {
370 if (rc == H_P2) {
371 pr_info("Relocation on exceptions not"
372 " supported\n");
373 return false;
374 } else if (rc != H_SUCCESS) {
375 pr_warn("Unable to enable relocation"
376 " on exceptions: %ld\n", rc);
377 return false;
378 }
379 return true;
380 }
381
382 delay = get_longbusy_msecs(rc);
383 total_delay += delay;
384 if (total_delay > 1000) {
385 pr_warn("Warning: Giving up waiting to enable "
386 "relocation on exceptions (%u msec)!\n",
387 total_delay);
388 return false;
389 }
390
391 mdelay(delay);
392 }
393 }
394 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
395
pseries_disable_reloc_on_exc(void)396 void pseries_disable_reloc_on_exc(void)
397 {
398 long rc;
399
400 while (1) {
401 rc = disable_reloc_on_exceptions();
402 if (!H_IS_LONG_BUSY(rc))
403 break;
404 mdelay(get_longbusy_msecs(rc));
405 }
406 if (rc != H_SUCCESS)
407 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
408 rc);
409 }
410 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
411
412 #ifdef CONFIG_KEXEC_CORE
pSeries_machine_kexec(struct kimage * image)413 static void pSeries_machine_kexec(struct kimage *image)
414 {
415 if (firmware_has_feature(FW_FEATURE_SET_MODE))
416 pseries_disable_reloc_on_exc();
417
418 default_machine_kexec(image);
419 }
420 #endif
421
422 #ifdef __LITTLE_ENDIAN__
pseries_big_endian_exceptions(void)423 void pseries_big_endian_exceptions(void)
424 {
425 long rc;
426
427 while (1) {
428 rc = enable_big_endian_exceptions();
429 if (!H_IS_LONG_BUSY(rc))
430 break;
431 mdelay(get_longbusy_msecs(rc));
432 }
433
434 /*
435 * At this point it is unlikely panic() will get anything
436 * out to the user, since this is called very late in kexec
437 * but at least this will stop us from continuing on further
438 * and creating an even more difficult to debug situation.
439 *
440 * There is a known problem when kdump'ing, if cpus are offline
441 * the above call will fail. Rather than panicking again, keep
442 * going and hope the kdump kernel is also little endian, which
443 * it usually is.
444 */
445 if (rc && !kdump_in_progress())
446 panic("Could not enable big endian exceptions");
447 }
448
pseries_little_endian_exceptions(void)449 void pseries_little_endian_exceptions(void)
450 {
451 long rc;
452
453 while (1) {
454 rc = enable_little_endian_exceptions();
455 if (!H_IS_LONG_BUSY(rc))
456 break;
457 mdelay(get_longbusy_msecs(rc));
458 }
459 if (rc) {
460 ppc_md.progress("H_SET_MODE LE exception fail", 0);
461 panic("Could not enable little endian exceptions");
462 }
463 }
464 #endif
465
find_and_init_phbs(void)466 static void __init find_and_init_phbs(void)
467 {
468 struct device_node *node;
469 struct pci_controller *phb;
470 struct device_node *root = of_find_node_by_path("/");
471
472 for_each_child_of_node(root, node) {
473 if (!of_node_is_type(node, "pci") &&
474 !of_node_is_type(node, "pciex"))
475 continue;
476
477 phb = pcibios_alloc_controller(node);
478 if (!phb)
479 continue;
480 rtas_setup_phb(phb);
481 pci_process_bridge_OF_ranges(phb, node, 0);
482 isa_bridge_find_early(phb);
483 phb->controller_ops = pseries_pci_controller_ops;
484 }
485
486 of_node_put(root);
487
488 /*
489 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
490 * in chosen.
491 */
492 of_pci_check_probe_only();
493 }
494
init_cpu_char_feature_flags(struct h_cpu_char_result * result)495 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
496 {
497 /*
498 * The features below are disabled by default, so we instead look to see
499 * if firmware has *enabled* them, and set them if so.
500 */
501 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
502 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
503
504 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
505 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
506
507 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
508 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
509
510 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
511 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
512
513 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
514 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
515
516 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
517 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
518
519 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
520 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
521
522 if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST)
523 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST);
524
525 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
526 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
527
528 if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK)
529 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
530
531 /*
532 * The features below are enabled by default, so we instead look to see
533 * if firmware has *disabled* them, and clear them if so.
534 */
535 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
536 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
537
538 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
539 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
540
541 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
542 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
543 }
544
pseries_setup_security_mitigations(void)545 void pseries_setup_security_mitigations(void)
546 {
547 struct h_cpu_char_result result;
548 enum l1d_flush_type types;
549 bool enable;
550 long rc;
551
552 /*
553 * Set features to the defaults assumed by init_cpu_char_feature_flags()
554 * so it can set/clear again any features that might have changed after
555 * migration, and in case the hypercall fails and it is not even called.
556 */
557 powerpc_security_features = SEC_FTR_DEFAULT;
558
559 rc = plpar_get_cpu_characteristics(&result);
560 if (rc == H_SUCCESS)
561 init_cpu_char_feature_flags(&result);
562
563 /*
564 * We're the guest so this doesn't apply to us, clear it to simplify
565 * handling of it elsewhere.
566 */
567 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
568
569 types = L1D_FLUSH_FALLBACK;
570
571 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
572 types |= L1D_FLUSH_MTTRIG;
573
574 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
575 types |= L1D_FLUSH_ORI;
576
577 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
578 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
579
580 setup_rfi_flush(types, enable);
581 setup_count_cache_flush();
582
583 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
584 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
585 setup_entry_flush(enable);
586
587 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
588 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
589 setup_uaccess_flush(enable);
590
591 setup_stf_barrier();
592 }
593
594 #ifdef CONFIG_PCI_IOV
595 enum rtas_iov_fw_value_map {
596 NUM_RES_PROPERTY = 0, /* Number of Resources */
597 LOW_INT = 1, /* Lowest 32 bits of Address */
598 START_OF_ENTRIES = 2, /* Always start of entry */
599 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */
600 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
601 NEXT_ENTRY = 7 /* Go to next entry on array */
602 };
603
604 enum get_iov_fw_value_index {
605 BAR_ADDRS = 1, /* Get Bar Address */
606 APERTURE_SIZE = 2, /* Get Aperture Size */
607 WDW_SIZE = 3 /* Get Window Size */
608 };
609
pseries_get_iov_fw_value(struct pci_dev * dev,int resno,enum get_iov_fw_value_index value)610 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
611 enum get_iov_fw_value_index value)
612 {
613 const int *indexes;
614 struct device_node *dn = pci_device_to_OF_node(dev);
615 int i, num_res, ret = 0;
616
617 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
618 if (!indexes)
619 return 0;
620
621 /*
622 * First element in the array is the number of Bars
623 * returned. Search through the list to find the matching
624 * bar
625 */
626 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
627 if (resno >= num_res)
628 return 0; /* or an errror */
629
630 i = START_OF_ENTRIES + NEXT_ENTRY * resno;
631 switch (value) {
632 case BAR_ADDRS:
633 ret = of_read_number(&indexes[i], 2);
634 break;
635 case APERTURE_SIZE:
636 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
637 break;
638 case WDW_SIZE:
639 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
640 break;
641 }
642
643 return ret;
644 }
645
of_pci_set_vf_bar_size(struct pci_dev * dev,const int * indexes)646 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
647 {
648 struct resource *res;
649 resource_size_t base, size;
650 int i, r, num_res;
651
652 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
653 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
654 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
655 i += NEXT_ENTRY, r++) {
656 res = &dev->resource[r + PCI_IOV_RESOURCES];
657 base = of_read_number(&indexes[i], 2);
658 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
659 res->flags = pci_parse_of_flags(of_read_number
660 (&indexes[i + LOW_INT], 1), 0);
661 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
662 res->name = pci_name(dev);
663 res->start = base;
664 res->end = base + size - 1;
665 }
666 }
667
of_pci_parse_iov_addrs(struct pci_dev * dev,const int * indexes)668 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
669 {
670 struct resource *res, *root, *conflict;
671 resource_size_t base, size;
672 int i, r, num_res;
673
674 /*
675 * First element in the array is the number of Bars
676 * returned. Search through the list to find the matching
677 * bars assign them from firmware into resources structure.
678 */
679 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
680 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
681 i += NEXT_ENTRY, r++) {
682 res = &dev->resource[r + PCI_IOV_RESOURCES];
683 base = of_read_number(&indexes[i], 2);
684 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
685 res->name = pci_name(dev);
686 res->start = base;
687 res->end = base + size - 1;
688 root = &iomem_resource;
689 dev_dbg(&dev->dev,
690 "pSeries IOV BAR %d: trying firmware assignment %pR\n",
691 r + PCI_IOV_RESOURCES, res);
692 conflict = request_resource_conflict(root, res);
693 if (conflict) {
694 dev_info(&dev->dev,
695 "BAR %d: %pR conflicts with %s %pR\n",
696 r + PCI_IOV_RESOURCES, res,
697 conflict->name, conflict);
698 res->flags |= IORESOURCE_UNSET;
699 }
700 }
701 }
702
pseries_disable_sriov_resources(struct pci_dev * pdev)703 static void pseries_disable_sriov_resources(struct pci_dev *pdev)
704 {
705 int i;
706
707 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
708 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
709 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
710 }
711
pseries_pci_fixup_resources(struct pci_dev * pdev)712 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
713 {
714 const int *indexes;
715 struct device_node *dn = pci_device_to_OF_node(pdev);
716
717 /*Firmware must support open sriov otherwise dont configure*/
718 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
719 if (indexes)
720 of_pci_set_vf_bar_size(pdev, indexes);
721 else
722 pseries_disable_sriov_resources(pdev);
723 }
724
pseries_pci_fixup_iov_resources(struct pci_dev * pdev)725 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
726 {
727 const int *indexes;
728 struct device_node *dn = pci_device_to_OF_node(pdev);
729
730 if (!pdev->is_physfn || pci_dev_is_added(pdev))
731 return;
732 /*Firmware must support open sriov otherwise dont configure*/
733 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
734 if (indexes)
735 of_pci_parse_iov_addrs(pdev, indexes);
736 else
737 pseries_disable_sriov_resources(pdev);
738 }
739
pseries_pci_iov_resource_alignment(struct pci_dev * pdev,int resno)740 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
741 int resno)
742 {
743 const __be32 *reg;
744 struct device_node *dn = pci_device_to_OF_node(pdev);
745
746 /*Firmware must support open sriov otherwise report regular alignment*/
747 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
748 if (!reg)
749 return pci_iov_resource_size(pdev, resno);
750
751 if (!pdev->is_physfn)
752 return 0;
753 return pseries_get_iov_fw_value(pdev,
754 resno - PCI_IOV_RESOURCES,
755 APERTURE_SIZE);
756 }
757 #endif
758
pSeries_setup_arch(void)759 static void __init pSeries_setup_arch(void)
760 {
761 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
762
763 /* Discover PIC type and setup ppc_md accordingly */
764 smp_init_pseries();
765
766
767 if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE))
768 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE))
769 panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n");
770
771
772 /* openpic global configuration register (64-bit format). */
773 /* openpic Interrupt Source Unit pointer (64-bit format). */
774 /* python0 facility area (mmio) (64-bit format) REAL address. */
775
776 /* init to some ~sane value until calibrate_delay() runs */
777 loops_per_jiffy = 50000000;
778
779 fwnmi_init();
780
781 pseries_setup_security_mitigations();
782 pseries_lpar_read_hblkrm_characteristics();
783
784 /* By default, only probe PCI (can be overridden by rtas_pci) */
785 pci_add_flags(PCI_PROBE_ONLY);
786
787 /* Find and initialize PCI host bridges */
788 init_pci_config_tokens();
789 find_and_init_phbs();
790 of_reconfig_notifier_register(&pci_dn_reconfig_nb);
791
792 pSeries_nvram_init();
793
794 if (firmware_has_feature(FW_FEATURE_LPAR)) {
795 vpa_init(boot_cpuid);
796
797 if (lppaca_shared_proc(get_lppaca())) {
798 static_branch_enable(&shared_processor);
799 pv_spinlocks_init();
800 }
801
802 ppc_md.power_save = pseries_lpar_idle;
803 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
804 #ifdef CONFIG_PCI_IOV
805 ppc_md.pcibios_fixup_resources =
806 pseries_pci_fixup_resources;
807 ppc_md.pcibios_fixup_sriov =
808 pseries_pci_fixup_iov_resources;
809 ppc_md.pcibios_iov_resource_alignment =
810 pseries_pci_iov_resource_alignment;
811 #endif
812 } else {
813 /* No special idle routine */
814 ppc_md.enable_pmcs = power4_enable_pmcs;
815 }
816
817 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
818
819 if (swiotlb_force == SWIOTLB_FORCE)
820 ppc_swiotlb_enable = 1;
821 }
822
pseries_panic(char * str)823 static void pseries_panic(char *str)
824 {
825 panic_flush_kmsg_end();
826 rtas_os_term(str);
827 }
828
pSeries_init_panel(void)829 static int __init pSeries_init_panel(void)
830 {
831 /* Manually leave the kernel version on the panel. */
832 #ifdef __BIG_ENDIAN__
833 ppc_md.progress("Linux ppc64\n", 0);
834 #else
835 ppc_md.progress("Linux ppc64le\n", 0);
836 #endif
837 ppc_md.progress(init_utsname()->version, 0);
838
839 return 0;
840 }
841 machine_arch_initcall(pseries, pSeries_init_panel);
842
pseries_set_dabr(unsigned long dabr,unsigned long dabrx)843 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
844 {
845 return plpar_hcall_norets(H_SET_DABR, dabr);
846 }
847
pseries_set_xdabr(unsigned long dabr,unsigned long dabrx)848 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
849 {
850 /* Have to set at least one bit in the DABRX according to PAPR */
851 if (dabrx == 0 && dabr == 0)
852 dabrx = DABRX_USER;
853 /* PAPR says we can only set kernel and user bits */
854 dabrx &= DABRX_KERNEL | DABRX_USER;
855
856 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
857 }
858
pseries_set_dawr(int nr,unsigned long dawr,unsigned long dawrx)859 static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx)
860 {
861 /* PAPR says we can't set HYP */
862 dawrx &= ~DAWRX_HYP;
863
864 if (nr == 0)
865 return plpar_set_watchpoint0(dawr, dawrx);
866 else
867 return plpar_set_watchpoint1(dawr, dawrx);
868 }
869
870 #define CMO_CHARACTERISTICS_TOKEN 44
871 #define CMO_MAXLENGTH 1026
872
pSeries_coalesce_init(void)873 void pSeries_coalesce_init(void)
874 {
875 struct hvcall_mpp_x_data mpp_x_data;
876
877 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
878 powerpc_firmware_features |= FW_FEATURE_XCMO;
879 else
880 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
881 }
882
883 /**
884 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
885 * handle that here. (Stolen from parse_system_parameter_string)
886 */
pSeries_cmo_feature_init(void)887 static void pSeries_cmo_feature_init(void)
888 {
889 char *ptr, *key, *value, *end;
890 int call_status;
891 int page_order = IOMMU_PAGE_SHIFT_4K;
892
893 pr_debug(" -> fw_cmo_feature_init()\n");
894 spin_lock(&rtas_data_buf_lock);
895 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
896 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
897 NULL,
898 CMO_CHARACTERISTICS_TOKEN,
899 __pa(rtas_data_buf),
900 RTAS_DATA_BUF_SIZE);
901
902 if (call_status != 0) {
903 spin_unlock(&rtas_data_buf_lock);
904 pr_debug("CMO not available\n");
905 pr_debug(" <- fw_cmo_feature_init()\n");
906 return;
907 }
908
909 end = rtas_data_buf + CMO_MAXLENGTH - 2;
910 ptr = rtas_data_buf + 2; /* step over strlen value */
911 key = value = ptr;
912
913 while (*ptr && (ptr <= end)) {
914 /* Separate the key and value by replacing '=' with '\0' and
915 * point the value at the string after the '='
916 */
917 if (ptr[0] == '=') {
918 ptr[0] = '\0';
919 value = ptr + 1;
920 } else if (ptr[0] == '\0' || ptr[0] == ',') {
921 /* Terminate the string containing the key/value pair */
922 ptr[0] = '\0';
923
924 if (key == value) {
925 pr_debug("Malformed key/value pair\n");
926 /* Never found a '=', end processing */
927 break;
928 }
929
930 if (0 == strcmp(key, "CMOPageSize"))
931 page_order = simple_strtol(value, NULL, 10);
932 else if (0 == strcmp(key, "PrPSP"))
933 CMO_PrPSP = simple_strtol(value, NULL, 10);
934 else if (0 == strcmp(key, "SecPSP"))
935 CMO_SecPSP = simple_strtol(value, NULL, 10);
936 value = key = ptr + 1;
937 }
938 ptr++;
939 }
940
941 /* Page size is returned as the power of 2 of the page size,
942 * convert to the page size in bytes before returning
943 */
944 CMO_PageSize = 1 << page_order;
945 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
946
947 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
948 pr_info("CMO enabled\n");
949 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
950 CMO_SecPSP);
951 powerpc_firmware_features |= FW_FEATURE_CMO;
952 pSeries_coalesce_init();
953 } else
954 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
955 CMO_SecPSP);
956 spin_unlock(&rtas_data_buf_lock);
957 pr_debug(" <- fw_cmo_feature_init()\n");
958 }
959
960 /*
961 * Early initialization. Relocation is on but do not reference unbolted pages
962 */
pseries_init(void)963 static void __init pseries_init(void)
964 {
965 pr_debug(" -> pseries_init()\n");
966
967 #ifdef CONFIG_HVC_CONSOLE
968 if (firmware_has_feature(FW_FEATURE_LPAR))
969 hvc_vio_init_early();
970 #endif
971 if (firmware_has_feature(FW_FEATURE_XDABR))
972 ppc_md.set_dabr = pseries_set_xdabr;
973 else if (firmware_has_feature(FW_FEATURE_DABR))
974 ppc_md.set_dabr = pseries_set_dabr;
975
976 if (firmware_has_feature(FW_FEATURE_SET_MODE))
977 ppc_md.set_dawr = pseries_set_dawr;
978
979 pSeries_cmo_feature_init();
980 iommu_init_early_pSeries();
981
982 pr_debug(" <- pseries_init()\n");
983 }
984
985 /**
986 * pseries_power_off - tell firmware about how to power off the system.
987 *
988 * This function calls either the power-off rtas token in normal cases
989 * or the ibm,power-off-ups token (if present & requested) in case of
990 * a power failure. If power-off token is used, power on will only be
991 * possible with power button press. If ibm,power-off-ups token is used
992 * it will allow auto poweron after power is restored.
993 */
pseries_power_off(void)994 static void pseries_power_off(void)
995 {
996 int rc;
997 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
998
999 if (rtas_flash_term_hook)
1000 rtas_flash_term_hook(SYS_POWER_OFF);
1001
1002 if (rtas_poweron_auto == 0 ||
1003 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
1004 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
1005 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
1006 } else {
1007 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
1008 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
1009 }
1010 for (;;);
1011 }
1012
pSeries_probe(void)1013 static int __init pSeries_probe(void)
1014 {
1015 if (!of_node_is_type(of_root, "chrp"))
1016 return 0;
1017
1018 /* Cell blades firmware claims to be chrp while it's not. Until this
1019 * is fixed, we need to avoid those here.
1020 */
1021 if (of_machine_is_compatible("IBM,CPBW-1.0") ||
1022 of_machine_is_compatible("IBM,CBEA"))
1023 return 0;
1024
1025 pm_power_off = pseries_power_off;
1026
1027 pr_debug("Machine is%s LPAR !\n",
1028 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1029
1030 pseries_init();
1031
1032 return 1;
1033 }
1034
pSeries_pci_probe_mode(struct pci_bus * bus)1035 static int pSeries_pci_probe_mode(struct pci_bus *bus)
1036 {
1037 if (firmware_has_feature(FW_FEATURE_LPAR))
1038 return PCI_PROBE_DEVTREE;
1039 return PCI_PROBE_NORMAL;
1040 }
1041
1042 struct pci_controller_ops pseries_pci_controller_ops = {
1043 .probe_mode = pSeries_pci_probe_mode,
1044 };
1045
define_machine(pseries)1046 define_machine(pseries) {
1047 .name = "pSeries",
1048 .probe = pSeries_probe,
1049 .setup_arch = pSeries_setup_arch,
1050 .init_IRQ = pseries_init_irq,
1051 .show_cpuinfo = pSeries_show_cpuinfo,
1052 .log_error = pSeries_log_error,
1053 .pcibios_fixup = pSeries_final_fixup,
1054 .restart = rtas_restart,
1055 .halt = rtas_halt,
1056 .panic = pseries_panic,
1057 .get_boot_time = rtas_get_boot_time,
1058 .get_rtc_time = rtas_get_rtc_time,
1059 .set_rtc_time = rtas_set_rtc_time,
1060 .calibrate_decr = generic_calibrate_decr,
1061 .progress = rtas_progress,
1062 .system_reset_exception = pSeries_system_reset_exception,
1063 .machine_check_early = pseries_machine_check_realmode,
1064 .machine_check_exception = pSeries_machine_check_exception,
1065 #ifdef CONFIG_KEXEC_CORE
1066 .machine_kexec = pSeries_machine_kexec,
1067 .kexec_cpu_down = pseries_kexec_cpu_down,
1068 #endif
1069 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
1070 .memory_block_size = pseries_memory_block_size,
1071 #endif
1072 };
1073
