1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * x86 FPU boot time init code:
4 */
5 #include <asm/fpu/internal.h>
6 #include <asm/tlbflush.h>
7 #include <asm/setup.h>
8
9 #include <linux/sched.h>
10 #include <linux/sched/task.h>
11 #include <linux/init.h>
12
13 /*
14 * Initialize the registers found in all CPUs, CR0 and CR4:
15 */
fpu__init_cpu_generic(void)16 static void fpu__init_cpu_generic(void)
17 {
18 unsigned long cr0;
19 unsigned long cr4_mask = 0;
20
21 if (boot_cpu_has(X86_FEATURE_FXSR))
22 cr4_mask |= X86_CR4_OSFXSR;
23 if (boot_cpu_has(X86_FEATURE_XMM))
24 cr4_mask |= X86_CR4_OSXMMEXCPT;
25 if (cr4_mask)
26 cr4_set_bits(cr4_mask);
27
28 cr0 = read_cr0();
29 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
30 if (!boot_cpu_has(X86_FEATURE_FPU))
31 cr0 |= X86_CR0_EM;
32 write_cr0(cr0);
33
34 /* Flush out any pending x87 state: */
35 #ifdef CONFIG_MATH_EMULATION
36 if (!boot_cpu_has(X86_FEATURE_FPU))
37 fpstate_init_soft(¤t->thread.fpu.state.soft);
38 else
39 #endif
40 asm volatile ("fninit");
41 }
42
43 /*
44 * Enable all supported FPU features. Called when a CPU is brought online:
45 */
fpu__init_cpu(void)46 void fpu__init_cpu(void)
47 {
48 fpu__init_cpu_generic();
49 fpu__init_cpu_xstate();
50 }
51
fpu__probe_without_cpuid(void)52 static bool fpu__probe_without_cpuid(void)
53 {
54 unsigned long cr0;
55 u16 fsw, fcw;
56
57 fsw = fcw = 0xffff;
58
59 cr0 = read_cr0();
60 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
61 write_cr0(cr0);
62
63 asm volatile("fninit ; fnstsw %0 ; fnstcw %1" : "+m" (fsw), "+m" (fcw));
64
65 pr_info("x86/fpu: Probing for FPU: FSW=0x%04hx FCW=0x%04hx\n", fsw, fcw);
66
67 return fsw == 0 && (fcw & 0x103f) == 0x003f;
68 }
69
fpu__init_system_early_generic(struct cpuinfo_x86 * c)70 static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
71 {
72 if (!boot_cpu_has(X86_FEATURE_CPUID) &&
73 !test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
74 if (fpu__probe_without_cpuid())
75 setup_force_cpu_cap(X86_FEATURE_FPU);
76 else
77 setup_clear_cpu_cap(X86_FEATURE_FPU);
78 }
79
80 #ifndef CONFIG_MATH_EMULATION
81 if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_FPU)) {
82 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
83 for (;;)
84 asm volatile("hlt");
85 }
86 #endif
87 }
88
89 /*
90 * Boot time FPU feature detection code:
91 */
92 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
93 EXPORT_SYMBOL_GPL(mxcsr_feature_mask);
94
fpu__init_system_mxcsr(void)95 static void __init fpu__init_system_mxcsr(void)
96 {
97 unsigned int mask = 0;
98
99 if (boot_cpu_has(X86_FEATURE_FXSR)) {
100 /* Static because GCC does not get 16-byte stack alignment right: */
101 static struct fxregs_state fxregs __initdata;
102
103 asm volatile("fxsave %0" : "+m" (fxregs));
104
105 mask = fxregs.mxcsr_mask;
106
107 /*
108 * If zero then use the default features mask,
109 * which has all features set, except the
110 * denormals-are-zero feature bit:
111 */
112 if (mask == 0)
113 mask = 0x0000ffbf;
114 }
115 mxcsr_feature_mask &= mask;
116 }
117
118 /*
119 * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
120 */
fpu__init_system_generic(void)121 static void __init fpu__init_system_generic(void)
122 {
123 /*
124 * Set up the legacy init FPU context. (xstate init might overwrite this
125 * with a more modern format, if the CPU supports it.)
126 */
127 fpstate_init(&init_fpstate);
128
129 fpu__init_system_mxcsr();
130 }
131
132 /*
133 * Size of the FPU context state. All tasks in the system use the
134 * same context size, regardless of what portion they use.
135 * This is inherent to the XSAVE architecture which puts all state
136 * components into a single, continuous memory block:
137 */
138 unsigned int fpu_kernel_xstate_size;
139 EXPORT_SYMBOL_GPL(fpu_kernel_xstate_size);
140
141 /* Get alignment of the TYPE. */
142 #define TYPE_ALIGN(TYPE) offsetof(struct { char x; TYPE test; }, test)
143
144 /*
145 * Enforce that 'MEMBER' is the last field of 'TYPE'.
146 *
147 * Align the computed size with alignment of the TYPE,
148 * because that's how C aligns structs.
149 */
150 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
151 BUILD_BUG_ON(sizeof(TYPE) != ALIGN(offsetofend(TYPE, MEMBER), \
152 TYPE_ALIGN(TYPE)))
153
154 /*
155 * We append the 'struct fpu' to the task_struct:
156 */
fpu__init_task_struct_size(void)157 static void __init fpu__init_task_struct_size(void)
158 {
159 int task_size = sizeof(struct task_struct);
160
161 /*
162 * Subtract off the static size of the register state.
163 * It potentially has a bunch of padding.
164 */
165 task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state);
166
167 /*
168 * Add back the dynamically-calculated register state
169 * size.
170 */
171 task_size += fpu_kernel_xstate_size;
172
173 /*
174 * We dynamically size 'struct fpu', so we require that
175 * it be at the end of 'thread_struct' and that
176 * 'thread_struct' be at the end of 'task_struct'. If
177 * you hit a compile error here, check the structure to
178 * see if something got added to the end.
179 */
180 CHECK_MEMBER_AT_END_OF(struct fpu, state);
181 CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);
182 CHECK_MEMBER_AT_END_OF(struct task_struct, thread);
183
184 arch_task_struct_size = task_size;
185 }
186
187 /*
188 * Set up the user and kernel xstate sizes based on the legacy FPU context size.
189 *
190 * We set this up first, and later it will be overwritten by
191 * fpu__init_system_xstate() if the CPU knows about xstates.
192 */
fpu__init_system_xstate_size_legacy(void)193 static void __init fpu__init_system_xstate_size_legacy(void)
194 {
195 static int on_boot_cpu __initdata = 1;
196
197 WARN_ON_FPU(!on_boot_cpu);
198 on_boot_cpu = 0;
199
200 /*
201 * Note that xstate sizes might be overwritten later during
202 * fpu__init_system_xstate().
203 */
204
205 if (!boot_cpu_has(X86_FEATURE_FPU)) {
206 fpu_kernel_xstate_size = sizeof(struct swregs_state);
207 } else {
208 if (boot_cpu_has(X86_FEATURE_FXSR))
209 fpu_kernel_xstate_size =
210 sizeof(struct fxregs_state);
211 else
212 fpu_kernel_xstate_size =
213 sizeof(struct fregs_state);
214 }
215
216 fpu_user_xstate_size = fpu_kernel_xstate_size;
217 }
218
219 /*
220 * Find supported xfeatures based on cpu features and command-line input.
221 * This must be called after fpu__init_parse_early_param() is called and
222 * xfeatures_mask is enumerated.
223 */
fpu__get_supported_xfeatures_mask(void)224 u64 __init fpu__get_supported_xfeatures_mask(void)
225 {
226 return XFEATURE_MASK_USER_SUPPORTED |
227 XFEATURE_MASK_SUPERVISOR_SUPPORTED;
228 }
229
230 /* Legacy code to initialize eager fpu mode. */
fpu__init_system_ctx_switch(void)231 static void __init fpu__init_system_ctx_switch(void)
232 {
233 static bool on_boot_cpu __initdata = 1;
234
235 WARN_ON_FPU(!on_boot_cpu);
236 on_boot_cpu = 0;
237 }
238
239 /*
240 * Called on the boot CPU once per system bootup, to set up the initial
241 * FPU state that is later cloned into all processes:
242 */
fpu__init_system(struct cpuinfo_x86 * c)243 void __init fpu__init_system(struct cpuinfo_x86 *c)
244 {
245 fpu__init_system_early_generic(c);
246
247 /*
248 * The FPU has to be operational for some of the
249 * later FPU init activities:
250 */
251 fpu__init_cpu();
252
253 fpu__init_system_generic();
254 fpu__init_system_xstate_size_legacy();
255 fpu__init_system_xstate();
256 fpu__init_task_struct_size();
257
258 fpu__init_system_ctx_switch();
259 }
260
