1 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13 #ifndef _DPU_CORE_PERF_H_ 14 #define _DPU_CORE_PERF_H_ 15 16 #include <linux/types.h> 17 #include <linux/dcache.h> 18 #include <linux/mutex.h> 19 #include <drm/drm_crtc.h> 20 21 #include "dpu_hw_catalog.h" 22 #include "dpu_power_handle.h" 23 24 #define DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE 412500000 25 26 /** 27 * struct dpu_core_perf_params - definition of performance parameters 28 * @max_per_pipe_ib: maximum instantaneous bandwidth request 29 * @bw_ctl: arbitrated bandwidth request 30 * @core_clk_rate: core clock rate request 31 */ 32 struct dpu_core_perf_params { 33 u64 max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_MAX]; 34 u64 bw_ctl[DPU_POWER_HANDLE_DBUS_ID_MAX]; 35 u64 core_clk_rate; 36 }; 37 38 /** 39 * struct dpu_core_perf_tune - definition of performance tuning control 40 * @mode: performance mode 41 * @min_core_clk: minimum core clock 42 * @min_bus_vote: minimum bus vote 43 */ 44 struct dpu_core_perf_tune { 45 u32 mode; 46 u64 min_core_clk; 47 u64 min_bus_vote; 48 }; 49 50 /** 51 * struct dpu_core_perf - definition of core performance context 52 * @dev: Pointer to drm device 53 * @debugfs_root: top level debug folder 54 * @catalog: Pointer to catalog configuration 55 * @phandle: Pointer to power handler 56 * @core_clk: Pointer to core clock structure 57 * @core_clk_rate: current core clock rate 58 * @max_core_clk_rate: maximum allowable core clock rate 59 * @perf_tune: debug control for performance tuning 60 * @enable_bw_release: debug control for bandwidth release 61 * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2 62 * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2 63 * @fix_core_ab_vote: fixed core ab vote in bps used in mode 2 64 */ 65 struct dpu_core_perf { 66 struct drm_device *dev; 67 struct dentry *debugfs_root; 68 struct dpu_mdss_cfg *catalog; 69 struct dpu_power_handle *phandle; 70 struct dss_clk *core_clk; 71 u64 core_clk_rate; 72 u64 max_core_clk_rate; 73 struct dpu_core_perf_tune perf_tune; 74 u32 enable_bw_release; 75 u64 fix_core_clk_rate; 76 u64 fix_core_ib_vote; 77 u64 fix_core_ab_vote; 78 }; 79 80 /** 81 * dpu_core_perf_crtc_check - validate performance of the given crtc state 82 * @crtc: Pointer to crtc 83 * @state: Pointer to new crtc state 84 * return: zero if success, or error code otherwise 85 */ 86 int dpu_core_perf_crtc_check(struct drm_crtc *crtc, 87 struct drm_crtc_state *state); 88 89 /** 90 * dpu_core_perf_crtc_update - update performance of the given crtc 91 * @crtc: Pointer to crtc 92 * @params_changed: true if crtc parameters are modified 93 * @stop_req: true if this is a stop request 94 * return: zero if success, or error code otherwise 95 */ 96 int dpu_core_perf_crtc_update(struct drm_crtc *crtc, 97 int params_changed, bool stop_req); 98 99 /** 100 * dpu_core_perf_crtc_release_bw - release bandwidth of the given crtc 101 * @crtc: Pointer to crtc 102 */ 103 void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc); 104 105 /** 106 * dpu_core_perf_destroy - destroy the given core performance context 107 * @perf: Pointer to core performance context 108 */ 109 void dpu_core_perf_destroy(struct dpu_core_perf *perf); 110 111 /** 112 * dpu_core_perf_init - initialize the given core performance context 113 * @perf: Pointer to core performance context 114 * @dev: Pointer to drm device 115 * @catalog: Pointer to catalog 116 * @phandle: Pointer to power handle 117 * @core_clk: pointer to core clock 118 */ 119 int dpu_core_perf_init(struct dpu_core_perf *perf, 120 struct drm_device *dev, 121 struct dpu_mdss_cfg *catalog, 122 struct dpu_power_handle *phandle, 123 struct dss_clk *core_clk); 124 125 /** 126 * dpu_core_perf_debugfs_init - initialize debugfs for core performance context 127 * @perf: Pointer to core performance context 128 * @debugfs_parent: Pointer to parent debugfs 129 */ 130 int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf, 131 struct dentry *parent); 132 133 #endif /* _DPU_CORE_PERF_H_ */ 134
