1 /*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sys_soc.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/gpio/machine.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
37 #include <linux/irqchip/arm-vic.h>
38 #include <linux/reboot.h>
39 #include <linux/usb/ohci_pdriver.h>
40 #include <linux/random.h>
41
42 #include <mach/hardware.h>
43 #include <linux/platform_data/video-ep93xx.h>
44 #include <linux/platform_data/keypad-ep93xx.h>
45 #include <linux/platform_data/spi-ep93xx.h>
46 #include <mach/gpio-ep93xx.h>
47
48 #include <asm/mach/arch.h>
49 #include <asm/mach/map.h>
50
51 #include "soc.h"
52
53 /*************************************************************************
54 * Static I/O mappings that are needed for all EP93xx platforms
55 *************************************************************************/
56 static struct map_desc ep93xx_io_desc[] __initdata = {
57 {
58 .virtual = EP93XX_AHB_VIRT_BASE,
59 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
60 .length = EP93XX_AHB_SIZE,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = EP93XX_APB_VIRT_BASE,
64 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
65 .length = EP93XX_APB_SIZE,
66 .type = MT_DEVICE,
67 },
68 };
69
ep93xx_map_io(void)70 void __init ep93xx_map_io(void)
71 {
72 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
73 }
74
75 /*************************************************************************
76 * EP93xx IRQ handling
77 *************************************************************************/
ep93xx_init_irq(void)78 void __init ep93xx_init_irq(void)
79 {
80 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
81 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
82 }
83
84
85 /*************************************************************************
86 * EP93xx System Controller Software Locked register handling
87 *************************************************************************/
88
89 /*
90 * syscon_swlock prevents anything else from writing to the syscon
91 * block while a software locked register is being written.
92 */
93 static DEFINE_SPINLOCK(syscon_swlock);
94
ep93xx_syscon_swlocked_write(unsigned int val,void __iomem * reg)95 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
96 {
97 unsigned long flags;
98
99 spin_lock_irqsave(&syscon_swlock, flags);
100
101 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
102 __raw_writel(val, reg);
103
104 spin_unlock_irqrestore(&syscon_swlock, flags);
105 }
106
ep93xx_devcfg_set_clear(unsigned int set_bits,unsigned int clear_bits)107 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
108 {
109 unsigned long flags;
110 unsigned int val;
111
112 spin_lock_irqsave(&syscon_swlock, flags);
113
114 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
115 val &= ~clear_bits;
116 val |= set_bits;
117 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
118 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
119
120 spin_unlock_irqrestore(&syscon_swlock, flags);
121 }
122
123 /**
124 * ep93xx_chip_revision() - returns the EP93xx chip revision
125 *
126 * See <mach/platform.h> for more information.
127 */
ep93xx_chip_revision(void)128 unsigned int ep93xx_chip_revision(void)
129 {
130 unsigned int v;
131
132 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
133 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
134 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
135 return v;
136 }
137 EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
138
139 /*************************************************************************
140 * EP93xx GPIO
141 *************************************************************************/
142 static struct resource ep93xx_gpio_resource[] = {
143 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
144 };
145
146 static struct platform_device ep93xx_gpio_device = {
147 .name = "gpio-ep93xx",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
150 .resource = ep93xx_gpio_resource,
151 };
152
153 /*************************************************************************
154 * EP93xx peripheral handling
155 *************************************************************************/
156 #define EP93XX_UART_MCR_OFFSET (0x0100)
157
ep93xx_uart_set_mctrl(struct amba_device * dev,void __iomem * base,unsigned int mctrl)158 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
159 void __iomem *base, unsigned int mctrl)
160 {
161 unsigned int mcr;
162
163 mcr = 0;
164 if (mctrl & TIOCM_RTS)
165 mcr |= 2;
166 if (mctrl & TIOCM_DTR)
167 mcr |= 1;
168
169 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
170 }
171
172 static struct amba_pl010_data ep93xx_uart_data = {
173 .set_mctrl = ep93xx_uart_set_mctrl,
174 };
175
176 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
177 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
178
179 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
180 { IRQ_EP93XX_UART2 }, NULL);
181
182 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
183 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
184
185 static struct resource ep93xx_rtc_resource[] = {
186 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
187 };
188
189 static struct platform_device ep93xx_rtc_device = {
190 .name = "ep93xx-rtc",
191 .id = -1,
192 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
193 .resource = ep93xx_rtc_resource,
194 };
195
196 /*************************************************************************
197 * EP93xx OHCI USB Host
198 *************************************************************************/
199
200 static struct clk *ep93xx_ohci_host_clock;
201
ep93xx_ohci_power_on(struct platform_device * pdev)202 static int ep93xx_ohci_power_on(struct platform_device *pdev)
203 {
204 if (!ep93xx_ohci_host_clock) {
205 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
206 if (IS_ERR(ep93xx_ohci_host_clock))
207 return PTR_ERR(ep93xx_ohci_host_clock);
208 }
209
210 return clk_enable(ep93xx_ohci_host_clock);
211 }
212
ep93xx_ohci_power_off(struct platform_device * pdev)213 static void ep93xx_ohci_power_off(struct platform_device *pdev)
214 {
215 clk_disable(ep93xx_ohci_host_clock);
216 }
217
218 static struct usb_ohci_pdata ep93xx_ohci_pdata = {
219 .power_on = ep93xx_ohci_power_on,
220 .power_off = ep93xx_ohci_power_off,
221 .power_suspend = ep93xx_ohci_power_off,
222 };
223
224 static struct resource ep93xx_ohci_resources[] = {
225 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
226 DEFINE_RES_IRQ(IRQ_EP93XX_USB),
227 };
228
229 static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
230
231 static struct platform_device ep93xx_ohci_device = {
232 .name = "ohci-platform",
233 .id = -1,
234 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
235 .resource = ep93xx_ohci_resources,
236 .dev = {
237 .dma_mask = &ep93xx_ohci_dma_mask,
238 .coherent_dma_mask = DMA_BIT_MASK(32),
239 .platform_data = &ep93xx_ohci_pdata,
240 },
241 };
242
243 /*************************************************************************
244 * EP93xx physmap'ed flash
245 *************************************************************************/
246 static struct physmap_flash_data ep93xx_flash_data;
247
248 static struct resource ep93xx_flash_resource = {
249 .flags = IORESOURCE_MEM,
250 };
251
252 static struct platform_device ep93xx_flash = {
253 .name = "physmap-flash",
254 .id = 0,
255 .dev = {
256 .platform_data = &ep93xx_flash_data,
257 },
258 .num_resources = 1,
259 .resource = &ep93xx_flash_resource,
260 };
261
262 /**
263 * ep93xx_register_flash() - Register the external flash device.
264 * @width: bank width in octets
265 * @start: resource start address
266 * @size: resource size
267 */
ep93xx_register_flash(unsigned int width,resource_size_t start,resource_size_t size)268 void __init ep93xx_register_flash(unsigned int width,
269 resource_size_t start, resource_size_t size)
270 {
271 ep93xx_flash_data.width = width;
272
273 ep93xx_flash_resource.start = start;
274 ep93xx_flash_resource.end = start + size - 1;
275
276 platform_device_register(&ep93xx_flash);
277 }
278
279
280 /*************************************************************************
281 * EP93xx ethernet peripheral handling
282 *************************************************************************/
283 static struct ep93xx_eth_data ep93xx_eth_data;
284
285 static struct resource ep93xx_eth_resource[] = {
286 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
287 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
288 };
289
290 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
291
292 static struct platform_device ep93xx_eth_device = {
293 .name = "ep93xx-eth",
294 .id = -1,
295 .dev = {
296 .platform_data = &ep93xx_eth_data,
297 .coherent_dma_mask = DMA_BIT_MASK(32),
298 .dma_mask = &ep93xx_eth_dma_mask,
299 },
300 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
301 .resource = ep93xx_eth_resource,
302 };
303
304 /**
305 * ep93xx_register_eth - Register the built-in ethernet platform device.
306 * @data: platform specific ethernet configuration (__initdata)
307 * @copy_addr: flag indicating that the MAC address should be copied
308 * from the IndAd registers (as programmed by the bootloader)
309 */
ep93xx_register_eth(struct ep93xx_eth_data * data,int copy_addr)310 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
311 {
312 if (copy_addr)
313 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
314
315 ep93xx_eth_data = *data;
316 platform_device_register(&ep93xx_eth_device);
317 }
318
319
320 /*************************************************************************
321 * EP93xx i2c peripheral handling
322 *************************************************************************/
323
324 /* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
325 static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
326 .dev_id = "i2c-gpio.0",
327 .table = {
328 /* Use local offsets on gpiochip/port "G" */
329 GPIO_LOOKUP_IDX("G", 1, NULL, 0,
330 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
331 GPIO_LOOKUP_IDX("G", 0, NULL, 1,
332 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
333 },
334 };
335
336 static struct platform_device ep93xx_i2c_device = {
337 .name = "i2c-gpio",
338 .id = 0,
339 .dev = {
340 .platform_data = NULL,
341 },
342 };
343
344 /**
345 * ep93xx_register_i2c - Register the i2c platform device.
346 * @devices: platform specific i2c bus device information (__initdata)
347 * @num: the number of devices on the i2c bus
348 */
ep93xx_register_i2c(struct i2c_board_info * devices,int num)349 void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
350 {
351 /*
352 * FIXME: this just sets the two pins as non-opendrain, as no
353 * platforms tries to do that anyway. Flag the applicable lines
354 * as open drain in the GPIO_LOOKUP above and the driver or
355 * gpiolib will handle open drain/open drain emulation as need
356 * be. Right now i2c-gpio emulates open drain which is not
357 * optimal.
358 */
359 __raw_writel((0 << 1) | (0 << 0),
360 EP93XX_GPIO_EEDRIVE);
361
362 i2c_register_board_info(0, devices, num);
363 gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
364 platform_device_register(&ep93xx_i2c_device);
365 }
366
367 /*************************************************************************
368 * EP93xx SPI peripheral handling
369 *************************************************************************/
370 static struct ep93xx_spi_info ep93xx_spi_master_data;
371
372 static struct resource ep93xx_spi_resources[] = {
373 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
374 DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
375 };
376
377 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
378
379 static struct platform_device ep93xx_spi_device = {
380 .name = "ep93xx-spi",
381 .id = 0,
382 .dev = {
383 .platform_data = &ep93xx_spi_master_data,
384 .coherent_dma_mask = DMA_BIT_MASK(32),
385 .dma_mask = &ep93xx_spi_dma_mask,
386 },
387 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
388 .resource = ep93xx_spi_resources,
389 };
390
391 /**
392 * ep93xx_register_spi() - registers spi platform device
393 * @info: ep93xx board specific spi master info (__initdata)
394 * @devices: SPI devices to register (__initdata)
395 * @num: number of SPI devices to register
396 *
397 * This function registers platform device for the EP93xx SPI controller and
398 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
399 */
ep93xx_register_spi(struct ep93xx_spi_info * info,struct spi_board_info * devices,int num)400 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
401 struct spi_board_info *devices, int num)
402 {
403 /*
404 * When SPI is used, we need to make sure that I2S is muxed off from
405 * SPI pins.
406 */
407 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
408
409 ep93xx_spi_master_data = *info;
410 spi_register_board_info(devices, num);
411 platform_device_register(&ep93xx_spi_device);
412 }
413
414 /*************************************************************************
415 * EP93xx LEDs
416 *************************************************************************/
417 static const struct gpio_led ep93xx_led_pins[] __initconst = {
418 {
419 .name = "platform:grled",
420 .gpio = EP93XX_GPIO_LINE_GRLED,
421 }, {
422 .name = "platform:rdled",
423 .gpio = EP93XX_GPIO_LINE_RDLED,
424 },
425 };
426
427 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
428 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
429 .leds = ep93xx_led_pins,
430 };
431
432 /*************************************************************************
433 * EP93xx pwm peripheral handling
434 *************************************************************************/
435 static struct resource ep93xx_pwm0_resource[] = {
436 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
437 };
438
439 static struct platform_device ep93xx_pwm0_device = {
440 .name = "ep93xx-pwm",
441 .id = 0,
442 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
443 .resource = ep93xx_pwm0_resource,
444 };
445
446 static struct resource ep93xx_pwm1_resource[] = {
447 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
448 };
449
450 static struct platform_device ep93xx_pwm1_device = {
451 .name = "ep93xx-pwm",
452 .id = 1,
453 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
454 .resource = ep93xx_pwm1_resource,
455 };
456
ep93xx_register_pwm(int pwm0,int pwm1)457 void __init ep93xx_register_pwm(int pwm0, int pwm1)
458 {
459 if (pwm0)
460 platform_device_register(&ep93xx_pwm0_device);
461
462 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
463 if (pwm1)
464 platform_device_register(&ep93xx_pwm1_device);
465 }
466
ep93xx_pwm_acquire_gpio(struct platform_device * pdev)467 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
468 {
469 int err;
470
471 if (pdev->id == 0) {
472 err = 0;
473 } else if (pdev->id == 1) {
474 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
475 dev_name(&pdev->dev));
476 if (err)
477 return err;
478 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
479 if (err)
480 goto fail;
481
482 /* PWM 1 output on EGPIO[14] */
483 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
484 } else {
485 err = -ENODEV;
486 }
487
488 return err;
489
490 fail:
491 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
492 return err;
493 }
494 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
495
ep93xx_pwm_release_gpio(struct platform_device * pdev)496 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
497 {
498 if (pdev->id == 1) {
499 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
500 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
501
502 /* EGPIO[14] used for GPIO */
503 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
504 }
505 }
506 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
507
508
509 /*************************************************************************
510 * EP93xx video peripheral handling
511 *************************************************************************/
512 static struct ep93xxfb_mach_info ep93xxfb_data;
513
514 static struct resource ep93xx_fb_resource[] = {
515 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
516 };
517
518 static struct platform_device ep93xx_fb_device = {
519 .name = "ep93xx-fb",
520 .id = -1,
521 .dev = {
522 .platform_data = &ep93xxfb_data,
523 .coherent_dma_mask = DMA_BIT_MASK(32),
524 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
525 },
526 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
527 .resource = ep93xx_fb_resource,
528 };
529
530 /* The backlight use a single register in the framebuffer's register space */
531 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
532
533 static struct resource ep93xx_bl_resources[] = {
534 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
535 EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
536 };
537
538 static struct platform_device ep93xx_bl_device = {
539 .name = "ep93xx-bl",
540 .id = -1,
541 .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
542 .resource = ep93xx_bl_resources,
543 };
544
545 /**
546 * ep93xx_register_fb - Register the framebuffer platform device.
547 * @data: platform specific framebuffer configuration (__initdata)
548 */
ep93xx_register_fb(struct ep93xxfb_mach_info * data)549 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
550 {
551 ep93xxfb_data = *data;
552 platform_device_register(&ep93xx_fb_device);
553 platform_device_register(&ep93xx_bl_device);
554 }
555
556
557 /*************************************************************************
558 * EP93xx matrix keypad peripheral handling
559 *************************************************************************/
560 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
561
562 static struct resource ep93xx_keypad_resource[] = {
563 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
564 DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
565 };
566
567 static struct platform_device ep93xx_keypad_device = {
568 .name = "ep93xx-keypad",
569 .id = -1,
570 .dev = {
571 .platform_data = &ep93xx_keypad_data,
572 },
573 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
574 .resource = ep93xx_keypad_resource,
575 };
576
577 /**
578 * ep93xx_register_keypad - Register the keypad platform device.
579 * @data: platform specific keypad configuration (__initdata)
580 */
ep93xx_register_keypad(struct ep93xx_keypad_platform_data * data)581 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
582 {
583 ep93xx_keypad_data = *data;
584 platform_device_register(&ep93xx_keypad_device);
585 }
586
ep93xx_keypad_acquire_gpio(struct platform_device * pdev)587 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
588 {
589 int err;
590 int i;
591
592 for (i = 0; i < 8; i++) {
593 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
594 if (err)
595 goto fail_gpio_c;
596 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
597 if (err)
598 goto fail_gpio_d;
599 }
600
601 /* Enable the keypad controller; GPIO ports C and D used for keypad */
602 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
603 EP93XX_SYSCON_DEVCFG_GONK);
604
605 return 0;
606
607 fail_gpio_d:
608 gpio_free(EP93XX_GPIO_LINE_C(i));
609 fail_gpio_c:
610 for (--i; i >= 0; --i) {
611 gpio_free(EP93XX_GPIO_LINE_C(i));
612 gpio_free(EP93XX_GPIO_LINE_D(i));
613 }
614 return err;
615 }
616 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
617
ep93xx_keypad_release_gpio(struct platform_device * pdev)618 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
619 {
620 int i;
621
622 for (i = 0; i < 8; i++) {
623 gpio_free(EP93XX_GPIO_LINE_C(i));
624 gpio_free(EP93XX_GPIO_LINE_D(i));
625 }
626
627 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
628 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
629 EP93XX_SYSCON_DEVCFG_GONK);
630 }
631 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
632
633 /*************************************************************************
634 * EP93xx I2S audio peripheral handling
635 *************************************************************************/
636 static struct resource ep93xx_i2s_resource[] = {
637 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
638 DEFINE_RES_IRQ(IRQ_EP93XX_SAI),
639 };
640
641 static struct platform_device ep93xx_i2s_device = {
642 .name = "ep93xx-i2s",
643 .id = -1,
644 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
645 .resource = ep93xx_i2s_resource,
646 };
647
648 static struct platform_device ep93xx_pcm_device = {
649 .name = "ep93xx-pcm-audio",
650 .id = -1,
651 };
652
ep93xx_register_i2s(void)653 void __init ep93xx_register_i2s(void)
654 {
655 platform_device_register(&ep93xx_i2s_device);
656 platform_device_register(&ep93xx_pcm_device);
657 }
658
659 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
660 EP93XX_SYSCON_DEVCFG_I2SONAC97)
661
662 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
663 EP93XX_SYSCON_I2SCLKDIV_SPOL)
664
ep93xx_i2s_acquire(void)665 int ep93xx_i2s_acquire(void)
666 {
667 unsigned val;
668
669 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
670 EP93XX_SYSCON_DEVCFG_I2S_MASK);
671
672 /*
673 * This is potentially racy with the clock api for i2s_mclk, sclk and
674 * lrclk. Since the i2s driver is the only user of those clocks we
675 * rely on it to prevent parallel use of this function and the
676 * clock api for the i2s clocks.
677 */
678 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
679 val &= ~EP93XX_I2SCLKDIV_MASK;
680 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
681 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
682
683 return 0;
684 }
685 EXPORT_SYMBOL(ep93xx_i2s_acquire);
686
ep93xx_i2s_release(void)687 void ep93xx_i2s_release(void)
688 {
689 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
690 }
691 EXPORT_SYMBOL(ep93xx_i2s_release);
692
693 /*************************************************************************
694 * EP93xx AC97 audio peripheral handling
695 *************************************************************************/
696 static struct resource ep93xx_ac97_resources[] = {
697 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
698 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
699 };
700
701 static struct platform_device ep93xx_ac97_device = {
702 .name = "ep93xx-ac97",
703 .id = -1,
704 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
705 .resource = ep93xx_ac97_resources,
706 };
707
ep93xx_register_ac97(void)708 void __init ep93xx_register_ac97(void)
709 {
710 /*
711 * Make sure that the AC97 pins are not used by I2S.
712 */
713 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
714
715 platform_device_register(&ep93xx_ac97_device);
716 platform_device_register(&ep93xx_pcm_device);
717 }
718
719 /*************************************************************************
720 * EP93xx Watchdog
721 *************************************************************************/
722 static struct resource ep93xx_wdt_resources[] = {
723 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
724 };
725
726 static struct platform_device ep93xx_wdt_device = {
727 .name = "ep93xx-wdt",
728 .id = -1,
729 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
730 .resource = ep93xx_wdt_resources,
731 };
732
733 /*************************************************************************
734 * EP93xx IDE
735 *************************************************************************/
736 static struct resource ep93xx_ide_resources[] = {
737 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
738 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
739 };
740
741 static struct platform_device ep93xx_ide_device = {
742 .name = "ep93xx-ide",
743 .id = -1,
744 .dev = {
745 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
746 .coherent_dma_mask = DMA_BIT_MASK(32),
747 },
748 .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
749 .resource = ep93xx_ide_resources,
750 };
751
ep93xx_register_ide(void)752 void __init ep93xx_register_ide(void)
753 {
754 platform_device_register(&ep93xx_ide_device);
755 }
756
ep93xx_ide_acquire_gpio(struct platform_device * pdev)757 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
758 {
759 int err;
760 int i;
761
762 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
763 if (err)
764 return err;
765 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
766 if (err)
767 goto fail_egpio15;
768 for (i = 2; i < 8; i++) {
769 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
770 if (err)
771 goto fail_gpio_e;
772 }
773 for (i = 4; i < 8; i++) {
774 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
775 if (err)
776 goto fail_gpio_g;
777 }
778 for (i = 0; i < 8; i++) {
779 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
780 if (err)
781 goto fail_gpio_h;
782 }
783
784 /* GPIO ports E[7:2], G[7:4] and H used by IDE */
785 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
786 EP93XX_SYSCON_DEVCFG_GONIDE |
787 EP93XX_SYSCON_DEVCFG_HONIDE);
788 return 0;
789
790 fail_gpio_h:
791 for (--i; i >= 0; --i)
792 gpio_free(EP93XX_GPIO_LINE_H(i));
793 i = 8;
794 fail_gpio_g:
795 for (--i; i >= 4; --i)
796 gpio_free(EP93XX_GPIO_LINE_G(i));
797 i = 8;
798 fail_gpio_e:
799 for (--i; i >= 2; --i)
800 gpio_free(EP93XX_GPIO_LINE_E(i));
801 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
802 fail_egpio15:
803 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
804 return err;
805 }
806 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
807
ep93xx_ide_release_gpio(struct platform_device * pdev)808 void ep93xx_ide_release_gpio(struct platform_device *pdev)
809 {
810 int i;
811
812 for (i = 2; i < 8; i++)
813 gpio_free(EP93XX_GPIO_LINE_E(i));
814 for (i = 4; i < 8; i++)
815 gpio_free(EP93XX_GPIO_LINE_G(i));
816 for (i = 0; i < 8; i++)
817 gpio_free(EP93XX_GPIO_LINE_H(i));
818 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
819 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
820
821
822 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
823 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
824 EP93XX_SYSCON_DEVCFG_GONIDE |
825 EP93XX_SYSCON_DEVCFG_HONIDE);
826 }
827 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
828
829 /*************************************************************************
830 * EP93xx ADC
831 *************************************************************************/
832 static struct resource ep93xx_adc_resources[] = {
833 DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
834 DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
835 };
836
837 static struct platform_device ep93xx_adc_device = {
838 .name = "ep93xx-adc",
839 .id = -1,
840 .num_resources = ARRAY_SIZE(ep93xx_adc_resources),
841 .resource = ep93xx_adc_resources,
842 };
843
ep93xx_register_adc(void)844 void __init ep93xx_register_adc(void)
845 {
846 /* Power up ADC, deactivate Touch Screen Controller */
847 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
848 EP93XX_SYSCON_DEVCFG_ADCPD);
849
850 platform_device_register(&ep93xx_adc_device);
851 }
852
853 /*************************************************************************
854 * EP93xx Security peripheral
855 *************************************************************************/
856
857 /*
858 * The Maverick Key is 256 bits of micro fuses blown at the factory during
859 * manufacturing to uniquely identify a part.
860 *
861 * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
862 */
863 #define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
864 #define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400)
865 #define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410)
866 #define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
867 #define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450)
868 #define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460)
869 #define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500)
870 #define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504)
871 #define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520)
872 #define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524)
873 #define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700)
874 #define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704)
875 #define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708)
876 #define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c)
877
878 static char ep93xx_soc_id[33];
879
ep93xx_get_soc_id(void)880 static const char __init *ep93xx_get_soc_id(void)
881 {
882 unsigned int id, id2, id3, id4, id5;
883
884 if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
885 return "bad Hamming code";
886
887 id = __raw_readl(EP93XX_SECURITY_UNIQID);
888 id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
889 id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
890 id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
891 id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
892
893 if (id != id2)
894 return "invalid";
895
896 /* Toss the unique ID into the entropy pool */
897 add_device_randomness(&id2, 4);
898 add_device_randomness(&id3, 4);
899 add_device_randomness(&id4, 4);
900 add_device_randomness(&id5, 4);
901
902 snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
903 "%08x%08x%08x%08x", id2, id3, id4, id5);
904
905 return ep93xx_soc_id;
906 }
907
ep93xx_get_soc_rev(void)908 static const char __init *ep93xx_get_soc_rev(void)
909 {
910 int rev = ep93xx_chip_revision();
911
912 switch (rev) {
913 case EP93XX_CHIP_REV_D0:
914 return "D0";
915 case EP93XX_CHIP_REV_D1:
916 return "D1";
917 case EP93XX_CHIP_REV_E0:
918 return "E0";
919 case EP93XX_CHIP_REV_E1:
920 return "E1";
921 case EP93XX_CHIP_REV_E2:
922 return "E2";
923 default:
924 return "unknown";
925 }
926 }
927
ep93xx_get_machine_name(void)928 static const char __init *ep93xx_get_machine_name(void)
929 {
930 return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
931 }
932
ep93xx_init_soc(void)933 static struct device __init *ep93xx_init_soc(void)
934 {
935 struct soc_device_attribute *soc_dev_attr;
936 struct soc_device *soc_dev;
937
938 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
939 if (!soc_dev_attr)
940 return NULL;
941
942 soc_dev_attr->machine = ep93xx_get_machine_name();
943 soc_dev_attr->family = "Cirrus Logic EP93xx";
944 soc_dev_attr->revision = ep93xx_get_soc_rev();
945 soc_dev_attr->soc_id = ep93xx_get_soc_id();
946
947 soc_dev = soc_device_register(soc_dev_attr);
948 if (IS_ERR(soc_dev)) {
949 kfree(soc_dev_attr->machine);
950 kfree(soc_dev_attr);
951 return NULL;
952 }
953
954 return soc_device_to_device(soc_dev);
955 }
956
ep93xx_init_devices(void)957 struct device __init *ep93xx_init_devices(void)
958 {
959 struct device *parent;
960
961 /* Disallow access to MaverickCrunch initially */
962 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
963
964 /* Default all ports to GPIO */
965 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
966 EP93XX_SYSCON_DEVCFG_GONK |
967 EP93XX_SYSCON_DEVCFG_EONIDE |
968 EP93XX_SYSCON_DEVCFG_GONIDE |
969 EP93XX_SYSCON_DEVCFG_HONIDE);
970
971 parent = ep93xx_init_soc();
972
973 /* Get the GPIO working early, other devices need it */
974 platform_device_register(&ep93xx_gpio_device);
975
976 amba_device_register(&uart1_device, &iomem_resource);
977 amba_device_register(&uart2_device, &iomem_resource);
978 amba_device_register(&uart3_device, &iomem_resource);
979
980 platform_device_register(&ep93xx_rtc_device);
981 platform_device_register(&ep93xx_ohci_device);
982 platform_device_register(&ep93xx_wdt_device);
983
984 gpio_led_register_device(-1, &ep93xx_led_data);
985
986 return parent;
987 }
988
ep93xx_restart(enum reboot_mode mode,const char * cmd)989 void ep93xx_restart(enum reboot_mode mode, const char *cmd)
990 {
991 /*
992 * Set then clear the SWRST bit to initiate a software reset
993 */
994 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
995 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
996
997 while (1)
998 ;
999 }
1000
ep93xx_init_late(void)1001 void __init ep93xx_init_late(void)
1002 {
1003 crunch_init();
1004 }
1005
