1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * This control block defines the PACA which defines the processor
4 * specific data for each logical processor on the system.
5 * There are some pointers defined that are utilized by PLIC.
6 *
7 * C 2001 PPC 64 Team, IBM Corp
8 */
9 #ifndef _ASM_POWERPC_PACA_H
10 #define _ASM_POWERPC_PACA_H
11 #ifdef __KERNEL__
12
13 #ifdef CONFIG_PPC64
14
15 #include <linux/string.h>
16 #include <asm/types.h>
17 #include <asm/lppaca.h>
18 #include <asm/mmu.h>
19 #include <asm/page.h>
20 #ifdef CONFIG_PPC_BOOK3E
21 #include <asm/exception-64e.h>
22 #else
23 #include <asm/exception-64s.h>
24 #endif
25 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
26 #include <asm/kvm_book3s_asm.h>
27 #endif
28 #include <asm/accounting.h>
29 #include <asm/hmi.h>
30 #include <asm/cpuidle.h>
31 #include <asm/atomic.h>
32
33 #include <asm-generic/mmiowb_types.h>
34
35 register struct paca_struct *local_paca asm("r13");
36
37 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
38 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
39 /*
40 * Add standard checks that preemption cannot occur when using get_paca():
41 * otherwise the paca_struct it points to may be the wrong one just after.
42 */
43 #define get_paca() ((void) debug_smp_processor_id(), local_paca)
44 #else
45 #define get_paca() local_paca
46 #endif
47
48 #ifdef CONFIG_PPC_PSERIES
49 #define get_lppaca() (get_paca()->lppaca_ptr)
50 #endif
51
52 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
53
54 struct task_struct;
55 struct rtas_args;
56
57 /*
58 * Defines the layout of the paca.
59 *
60 * This structure is not directly accessed by firmware or the service
61 * processor.
62 */
63 struct paca_struct {
64 #ifdef CONFIG_PPC_PSERIES
65 /*
66 * Because hw_cpu_id, unlike other paca fields, is accessed
67 * routinely from other CPUs (from the IRQ code), we stick to
68 * read-only (after boot) fields in the first cacheline to
69 * avoid cacheline bouncing.
70 */
71
72 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
73 #endif /* CONFIG_PPC_PSERIES */
74
75 /*
76 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
77 * load lock_token and paca_index with a single lwz
78 * instruction. They must travel together and be properly
79 * aligned.
80 */
81 #ifdef __BIG_ENDIAN__
82 u16 lock_token; /* Constant 0x8000, used in locks */
83 u16 paca_index; /* Logical processor number */
84 #else
85 u16 paca_index; /* Logical processor number */
86 u16 lock_token; /* Constant 0x8000, used in locks */
87 #endif
88
89 u64 kernel_toc; /* Kernel TOC address */
90 u64 kernelbase; /* Base address of kernel */
91 u64 kernel_msr; /* MSR while running in kernel */
92 void *emergency_sp; /* pointer to emergency stack */
93 u64 data_offset; /* per cpu data offset */
94 s16 hw_cpu_id; /* Physical processor number */
95 u8 cpu_start; /* At startup, processor spins until */
96 /* this becomes non-zero. */
97 u8 kexec_state; /* set when kexec down has irqs off */
98 #ifdef CONFIG_PPC_BOOK3S_64
99 struct slb_shadow *slb_shadow_ptr;
100 struct dtl_entry *dispatch_log;
101 struct dtl_entry *dispatch_log_end;
102 #endif
103 u64 dscr_default; /* per-CPU default DSCR */
104
105 #ifdef CONFIG_PPC_BOOK3S_64
106 /*
107 * Now, starting in cacheline 2, the exception save areas
108 */
109 /* used for most interrupts/exceptions */
110 u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
111 u64 exslb[EX_SIZE]; /* used for SLB/segment table misses
112 * on the linear mapping */
113 /* SLB related definitions */
114 u16 vmalloc_sllp;
115 u8 slb_cache_ptr;
116 u8 stab_rr; /* stab/slb round-robin counter */
117 #ifdef CONFIG_DEBUG_VM
118 u8 in_kernel_slb_handler;
119 #endif
120 u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */
121 u32 slb_kern_bitmap;
122 u32 slb_cache[SLB_CACHE_ENTRIES];
123 #endif /* CONFIG_PPC_BOOK3S_64 */
124
125 #ifdef CONFIG_PPC_BOOK3E
126 u64 exgen[8] __aligned(0x40);
127 /* Keep pgd in the same cacheline as the start of extlb */
128 pgd_t *pgd __aligned(0x40); /* Current PGD */
129 pgd_t *kernel_pgd; /* Kernel PGD */
130
131 /* Shared by all threads of a core -- points to tcd of first thread */
132 struct tlb_core_data *tcd_ptr;
133
134 /*
135 * We can have up to 3 levels of reentrancy in the TLB miss handler,
136 * in each of four exception levels (normal, crit, mcheck, debug).
137 */
138 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
139 u64 exmc[8]; /* used for machine checks */
140 u64 excrit[8]; /* used for crit interrupts */
141 u64 exdbg[8]; /* used for debug interrupts */
142
143 /* Kernel stack pointers for use by special exceptions */
144 void *mc_kstack;
145 void *crit_kstack;
146 void *dbg_kstack;
147
148 struct tlb_core_data tcd;
149 #endif /* CONFIG_PPC_BOOK3E */
150
151 #ifdef CONFIG_PPC_BOOK3S
152 mm_context_id_t mm_ctx_id;
153 #ifdef CONFIG_PPC_MM_SLICES
154 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
155 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
156 unsigned long mm_ctx_slb_addr_limit;
157 #else
158 u16 mm_ctx_user_psize;
159 u16 mm_ctx_sllp;
160 #endif
161 #endif
162
163 /*
164 * then miscellaneous read-write fields
165 */
166 struct task_struct *__current; /* Pointer to current */
167 u64 kstack; /* Saved Kernel stack addr */
168 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
169 u64 saved_msr; /* MSR saved here by enter_rtas */
170 #ifdef CONFIG_PPC_BOOK3E
171 u16 trap_save; /* Used when bad stack is encountered */
172 #endif
173 u8 irq_soft_mask; /* mask for irq soft masking */
174 u8 irq_happened; /* irq happened while soft-disabled */
175 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
176 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
177 u8 pmcregs_in_use; /* pseries puts this in lppaca */
178 #endif
179 u64 sprg_vdso; /* Saved user-visible sprg */
180 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
181 u64 tm_scratch; /* TM scratch area for reclaim */
182 #endif
183
184 #ifdef CONFIG_PPC_POWERNV
185 /* PowerNV idle fields */
186 /* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */
187 unsigned long idle_state;
188 union {
189 /* P7/P8 specific fields */
190 struct {
191 /* PNV_THREAD_RUNNING/NAP/SLEEP */
192 u8 thread_idle_state;
193 /* Mask to denote subcore sibling threads */
194 u8 subcore_sibling_mask;
195 };
196
197 /* P9 specific fields */
198 struct {
199 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
200 /* The PSSCR value that the kernel requested before going to stop */
201 u64 requested_psscr;
202 /* Flag to request this thread not to stop */
203 atomic_t dont_stop;
204 #endif
205 };
206 };
207 #endif
208
209 #ifdef CONFIG_PPC_BOOK3S_64
210 /* Non-maskable exceptions that are not performance critical */
211 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */
212 u64 exmc[EX_SIZE]; /* used for machine checks */
213 #endif
214 #ifdef CONFIG_PPC_BOOK3S_64
215 /* Exclusive stacks for system reset and machine check exception. */
216 void *nmi_emergency_sp;
217 void *mc_emergency_sp;
218
219 u16 in_nmi; /* In nmi handler */
220
221 /*
222 * Flag to check whether we are in machine check early handler
223 * and already using emergency stack.
224 */
225 u16 in_mce;
226 u8 hmi_event_available; /* HMI event is available */
227 u8 hmi_p9_special_emu; /* HMI P9 special emulation */
228 u32 hmi_irqs; /* HMI irq stat */
229 #endif
230 u8 ftrace_enabled; /* Hard disable ftrace */
231
232 /* Stuff for accurate time accounting */
233 struct cpu_accounting_data accounting;
234 u64 dtl_ridx; /* read index in dispatch log */
235 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
236
237 #ifdef CONFIG_KVM_BOOK3S_HANDLER
238 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
239 /* We use this to store guest state in */
240 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
241 #endif
242 struct kvmppc_host_state kvm_hstate;
243 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
244 /*
245 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
246 * more details
247 */
248 struct sibling_subcore_state *sibling_subcore_state;
249 #endif
250 #endif
251 #ifdef CONFIG_PPC_BOOK3S_64
252 /*
253 * rfi fallback flush must be in its own cacheline to prevent
254 * other paca data leaking into the L1d
255 */
256 u64 exrfi[EX_SIZE] __aligned(0x80);
257 void *rfi_flush_fallback_area;
258 u64 l1d_flush_size;
259 #endif
260 #ifdef CONFIG_PPC_PSERIES
261 struct rtas_args *rtas_args_reentrant;
262 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */
263 #endif /* CONFIG_PPC_PSERIES */
264
265 #ifdef CONFIG_PPC_BOOK3S_64
266 /* Capture SLB related old contents in MCE handler. */
267 struct slb_entry *mce_faulty_slbs;
268 u16 slb_save_cache_ptr;
269 #endif /* CONFIG_PPC_BOOK3S_64 */
270 #ifdef CONFIG_STACKPROTECTOR
271 unsigned long canary;
272 #endif
273 #ifdef CONFIG_MMIOWB
274 struct mmiowb_state mmiowb_state;
275 #endif
276 } ____cacheline_aligned;
277
278 extern void copy_mm_to_paca(struct mm_struct *mm);
279 extern struct paca_struct **paca_ptrs;
280 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
281 extern void setup_paca(struct paca_struct *new_paca);
282 extern void allocate_paca_ptrs(void);
283 extern void allocate_paca(int cpu);
284 extern void free_unused_pacas(void);
285
286 #else /* CONFIG_PPC64 */
287
allocate_paca_ptrs(void)288 static inline void allocate_paca_ptrs(void) { };
allocate_paca(int cpu)289 static inline void allocate_paca(int cpu) { };
free_unused_pacas(void)290 static inline void free_unused_pacas(void) { };
291
292 #endif /* CONFIG_PPC64 */
293
294 #endif /* __KERNEL__ */
295 #endif /* _ASM_POWERPC_PACA_H */
296
