1 #if defined(CONFIG_DRM_AMD_DC_DSC_SUPPORT)
2 /*
3 * Copyright 2012-17 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26 #include "os_types.h"
27 #include <drm/drm_dsc.h>
28 #include "dscc_types.h"
29 #include "rc_calc.h"
30
31 double dsc_ceil(double num);
32
copy_pps_fields(struct drm_dsc_config * to,const struct drm_dsc_config * from)33 static void copy_pps_fields(struct drm_dsc_config *to, const struct drm_dsc_config *from)
34 {
35 to->line_buf_depth = from->line_buf_depth;
36 to->bits_per_component = from->bits_per_component;
37 to->convert_rgb = from->convert_rgb;
38 to->slice_width = from->slice_width;
39 to->slice_height = from->slice_height;
40 to->simple_422 = from->simple_422;
41 to->native_422 = from->native_422;
42 to->native_420 = from->native_420;
43 to->pic_width = from->pic_width;
44 to->pic_height = from->pic_height;
45 to->rc_tgt_offset_high = from->rc_tgt_offset_high;
46 to->rc_tgt_offset_low = from->rc_tgt_offset_low;
47 to->bits_per_pixel = from->bits_per_pixel;
48 to->rc_edge_factor = from->rc_edge_factor;
49 to->rc_quant_incr_limit1 = from->rc_quant_incr_limit1;
50 to->rc_quant_incr_limit0 = from->rc_quant_incr_limit0;
51 to->initial_xmit_delay = from->initial_xmit_delay;
52 to->initial_dec_delay = from->initial_dec_delay;
53 to->block_pred_enable = from->block_pred_enable;
54 to->first_line_bpg_offset = from->first_line_bpg_offset;
55 to->second_line_bpg_offset = from->second_line_bpg_offset;
56 to->initial_offset = from->initial_offset;
57 memcpy(&to->rc_buf_thresh, &from->rc_buf_thresh, sizeof(from->rc_buf_thresh));
58 memcpy(&to->rc_range_params, &from->rc_range_params, sizeof(from->rc_range_params));
59 to->rc_model_size = from->rc_model_size;
60 to->flatness_min_qp = from->flatness_min_qp;
61 to->flatness_max_qp = from->flatness_max_qp;
62 to->initial_scale_value = from->initial_scale_value;
63 to->scale_decrement_interval = from->scale_decrement_interval;
64 to->scale_increment_interval = from->scale_increment_interval;
65 to->nfl_bpg_offset = from->nfl_bpg_offset;
66 to->nsl_bpg_offset = from->nsl_bpg_offset;
67 to->slice_bpg_offset = from->slice_bpg_offset;
68 to->final_offset = from->final_offset;
69 to->vbr_enable = from->vbr_enable;
70 to->slice_chunk_size = from->slice_chunk_size;
71 to->second_line_offset_adj = from->second_line_offset_adj;
72 to->dsc_version_minor = from->dsc_version_minor;
73 }
74
copy_rc_to_cfg(struct drm_dsc_config * dsc_cfg,const struct rc_params * rc)75 static void copy_rc_to_cfg(struct drm_dsc_config *dsc_cfg, const struct rc_params *rc)
76 {
77 int i;
78
79 dsc_cfg->rc_quant_incr_limit0 = rc->rc_quant_incr_limit0;
80 dsc_cfg->rc_quant_incr_limit1 = rc->rc_quant_incr_limit1;
81 dsc_cfg->initial_offset = rc->initial_fullness_offset;
82 dsc_cfg->initial_xmit_delay = rc->initial_xmit_delay;
83 dsc_cfg->first_line_bpg_offset = rc->first_line_bpg_offset;
84 dsc_cfg->second_line_bpg_offset = rc->second_line_bpg_offset;
85 dsc_cfg->flatness_min_qp = rc->flatness_min_qp;
86 dsc_cfg->flatness_max_qp = rc->flatness_max_qp;
87 for (i = 0; i < QP_SET_SIZE; ++i) {
88 dsc_cfg->rc_range_params[i].range_min_qp = rc->qp_min[i];
89 dsc_cfg->rc_range_params[i].range_max_qp = rc->qp_max[i];
90 /* Truncate 8-bit signed value to 6-bit signed value */
91 dsc_cfg->rc_range_params[i].range_bpg_offset = 0x3f & rc->ofs[i];
92 }
93 dsc_cfg->rc_model_size = rc->rc_model_size;
94 dsc_cfg->rc_edge_factor = rc->rc_edge_factor;
95 dsc_cfg->rc_tgt_offset_high = rc->rc_tgt_offset_hi;
96 dsc_cfg->rc_tgt_offset_low = rc->rc_tgt_offset_lo;
97
98 for (i = 0; i < QP_SET_SIZE - 1; ++i)
99 dsc_cfg->rc_buf_thresh[i] = rc->rc_buf_thresh[i];
100 }
101
dscc_compute_dsc_parameters(const struct drm_dsc_config * pps,struct dsc_parameters * dsc_params)102 int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, struct dsc_parameters *dsc_params)
103 {
104 enum colour_mode mode = pps->convert_rgb ? CM_RGB :
105 (pps->simple_422 ? CM_444 :
106 (pps->native_422 ? CM_422 :
107 pps->native_420 ? CM_420 : CM_444));
108 enum bits_per_comp bpc = (pps->bits_per_component == 8) ? BPC_8 :
109 (pps->bits_per_component == 10) ? BPC_10 : BPC_12;
110 float bpp = ((float) pps->bits_per_pixel / 16.0);
111 int slice_width = pps->slice_width;
112 int slice_height = pps->slice_height;
113 int ret;
114 struct rc_params rc;
115 struct drm_dsc_config dsc_cfg;
116
117 double d_bytes_per_pixel = dsc_ceil(bpp * slice_width / 8.0) / slice_width;
118
119 // TODO: Make sure the formula for calculating this is precise (ceiling vs. floor, and at what point they should be applied)
120 if (pps->native_422 || pps->native_420)
121 d_bytes_per_pixel /= 2;
122
123 dsc_params->bytes_per_pixel = (uint32_t)dsc_ceil(d_bytes_per_pixel * 0x10000000);
124
125 /* in native_422 or native_420 modes, the bits_per_pixel is double the target bpp
126 * (the latter is what calc_rc_params expects)
127 */
128 if (pps->native_422 || pps->native_420)
129 bpp /= 2.0;
130
131 calc_rc_params(&rc, mode, bpc, bpp, slice_width, slice_height, pps->dsc_version_minor);
132 dsc_params->pps = *pps;
133 dsc_params->pps.initial_scale_value = 8 * rc.rc_model_size / (rc.rc_model_size - rc.initial_fullness_offset);
134
135 copy_pps_fields(&dsc_cfg, &dsc_params->pps);
136 copy_rc_to_cfg(&dsc_cfg, &rc);
137
138 dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64;
139
140 ret = drm_dsc_compute_rc_parameters(&dsc_cfg);
141
142 copy_pps_fields(&dsc_params->pps, &dsc_cfg);
143 dsc_params->rc_buffer_model_size = dsc_cfg.rc_bits;
144 return ret;
145 }
146
147 #endif
148
