1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * DPAA2 Ethernet Switch declarations 4 * 5 * Copyright 2014-2016 Freescale Semiconductor Inc. 6 * Copyright 2017-2018 NXP 7 * 8 */ 9 10 #ifndef __ETHSW_H 11 #define __ETHSW_H 12 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/if_vlan.h> 17 #include <uapi/linux/if_bridge.h> 18 #include <net/switchdev.h> 19 #include <linux/if_bridge.h> 20 21 #include "dpsw.h" 22 23 /* Number of IRQs supported */ 24 #define DPSW_IRQ_NUM 2 25 26 /* Port is member of VLAN */ 27 #define ETHSW_VLAN_MEMBER 1 28 /* VLAN to be treated as untagged on egress */ 29 #define ETHSW_VLAN_UNTAGGED 2 30 /* Untagged frames will be assigned to this VLAN */ 31 #define ETHSW_VLAN_PVID 4 32 /* VLAN configured on the switch */ 33 #define ETHSW_VLAN_GLOBAL 8 34 35 /* Maximum Frame Length supported by HW (currently 10k) */ 36 #define DPAA2_MFL (10 * 1024) 37 #define ETHSW_MAX_FRAME_LENGTH (DPAA2_MFL - VLAN_ETH_HLEN - ETH_FCS_LEN) 38 #define ETHSW_L2_MAX_FRM(mtu) ((mtu) + VLAN_ETH_HLEN + ETH_FCS_LEN) 39 40 #define ETHSW_FEATURE_MAC_ADDR BIT(0) 41 42 extern const struct ethtool_ops dpaa2_switch_port_ethtool_ops; 43 44 struct ethsw_core; 45 46 /* Per port private data */ 47 struct ethsw_port_priv { 48 struct net_device *netdev; 49 u16 idx; 50 struct ethsw_core *ethsw_data; 51 u8 link_state; 52 u8 stp_state; 53 bool flood; 54 55 u8 vlans[VLAN_VID_MASK + 1]; 56 u16 pvid; 57 struct net_device *bridge_dev; 58 }; 59 60 /* Switch data */ 61 struct ethsw_core { 62 struct device *dev; 63 struct fsl_mc_io *mc_io; 64 u16 dpsw_handle; 65 struct dpsw_attr sw_attr; 66 u16 major, minor; 67 unsigned long features; 68 int dev_id; 69 struct ethsw_port_priv **ports; 70 71 u8 vlans[VLAN_VID_MASK + 1]; 72 bool learning; 73 74 struct notifier_block port_nb; 75 struct notifier_block port_switchdev_nb; 76 struct notifier_block port_switchdevb_nb; 77 struct workqueue_struct *workqueue; 78 }; 79 80 #endif /* __ETHSW_H */ 81
