1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/unicore32/kernel/fpu-ucf64.c
4 *
5 * Code specific to PKUnity SoC and UniCore ISA
6 *
7 * Copyright (C) 2001-2010 GUAN Xue-tao
8 */
9 #include <linux/module.h>
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/signal.h>
13 #include <linux/sched/signal.h>
14 #include <linux/init.h>
15
16 #include <asm/fpu-ucf64.h>
17
18 /*
19 * A special flag to tell the normalisation code not to normalise.
20 */
21 #define F64_NAN_FLAG 0x100
22
23 /*
24 * A bit pattern used to indicate the initial (unset) value of the
25 * exception mask, in case nothing handles an instruction. This
26 * doesn't include the NAN flag, which get masked out before
27 * we check for an error.
28 */
29 #define F64_EXCEPTION_ERROR ((u32)-1 & ~F64_NAN_FLAG)
30
31 /*
32 * Since we aren't building with -mfpu=f64, we need to code
33 * these instructions using their MRC/MCR equivalents.
34 */
35 #define f64reg(_f64_) #_f64_
36
37 #define cff(_f64_) ({ \
38 u32 __v; \
39 asm("cff %0, " f64reg(_f64_) "@ fmrx %0, " #_f64_ \
40 : "=r" (__v) : : "cc"); \
41 __v; \
42 })
43
44 #define ctf(_f64_, _var_) \
45 asm("ctf %0, " f64reg(_f64_) "@ fmxr " #_f64_ ", %0" \
46 : : "r" (_var_) : "cc")
47
48 /*
49 * Raise a SIGFPE for the current process.
50 * sicode describes the signal being raised.
51 */
ucf64_raise_sigfpe(struct pt_regs * regs)52 void ucf64_raise_sigfpe(struct pt_regs *regs)
53 {
54 /*
55 * This is the same as NWFPE, because it's not clear what
56 * this is used for
57 */
58 current->thread.error_code = 0;
59 current->thread.trap_no = 6;
60
61 send_sig_fault(SIGFPE, FPE_FLTUNK,
62 (void __user *)(instruction_pointer(regs) - 4),
63 current);
64 }
65
66 /*
67 * Handle exceptions of UniCore-F64.
68 */
ucf64_exchandler(u32 inst,u32 fpexc,struct pt_regs * regs)69 void ucf64_exchandler(u32 inst, u32 fpexc, struct pt_regs *regs)
70 {
71 u32 tmp = fpexc;
72 u32 exc = F64_EXCEPTION_ERROR & fpexc;
73
74 pr_debug("UniCore-F64: instruction %08x fpscr %08x\n",
75 inst, fpexc);
76
77 if (exc & FPSCR_CMPINSTR_BIT) {
78 if (exc & FPSCR_CON)
79 tmp |= FPSCR_CON;
80 else
81 tmp &= ~(FPSCR_CON);
82 exc &= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON);
83 } else {
84 pr_debug("UniCore-F64 Error: unhandled exceptions\n");
85 pr_debug("UniCore-F64 FPSCR 0x%08x INST 0x%08x\n",
86 cff(FPSCR), inst);
87
88 ucf64_raise_sigfpe(regs);
89 return;
90 }
91
92 /*
93 * Update the FPSCR with the additional exception flags.
94 * Comparison instructions always return at least one of
95 * these flags set.
96 */
97 tmp &= ~(FPSCR_TRAP | FPSCR_IOS | FPSCR_OFS | FPSCR_UFS |
98 FPSCR_IXS | FPSCR_HIS | FPSCR_IOC | FPSCR_OFC |
99 FPSCR_UFC | FPSCR_IXC | FPSCR_HIC);
100
101 tmp |= exc;
102 ctf(FPSCR, tmp);
103 }
104
105 /*
106 * F64 support code initialisation.
107 */
ucf64_init(void)108 static int __init ucf64_init(void)
109 {
110 ctf(FPSCR, 0x0); /* FPSCR_UFE | FPSCR_NDE perhaps better */
111
112 printk(KERN_INFO "Enable UniCore-F64 support.\n");
113
114 return 0;
115 }
116
117 late_initcall(ucf64_init);
118
