1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Regular cardbus driver ("yenta_socket")
4 *
5 * (C) Copyright 1999, 2000 Linus Torvalds
6 *
7 * Changelog:
8 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
9 * Dynamically adjust the size of the bridge resource
10 *
11 * May 2003: Dominik Brodowski <linux@brodo.de>
12 * Merge pci_socket.c and yenta.c into one file
13 */
14 #include <linux/init.h>
15 #include <linux/pci.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20 #include <linux/io.h>
21 #include <linux/slab.h>
22
23 #include <pcmcia/ss.h>
24
25 #include "yenta_socket.h"
26 #include "i82365.h"
27
28 static bool disable_clkrun;
29 module_param(disable_clkrun, bool, 0444);
30 MODULE_PARM_DESC(disable_clkrun,
31 "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)");
32
33 static bool isa_probe = 1;
34 module_param(isa_probe, bool, 0444);
35 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
36
37 static bool pwr_irqs_off;
38 module_param(pwr_irqs_off, bool, 0644);
39 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
40
41 static char o2_speedup[] = "default";
42 module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
43 MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
44 "or 'default' (uses recommended behaviour for the detected bridge)");
45
46 /*
47 * Only probe "regular" interrupts, don't
48 * touch dangerous spots like the mouse irq,
49 * because there are mice that apparently
50 * get really confused if they get fondled
51 * too intimately.
52 *
53 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
54 */
55 static u32 isa_interrupts = 0x0ef8;
56
57
58 #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
59
60 /* Don't ask.. */
61 #define to_cycles(ns) ((ns)/120)
62 #define to_ns(cycles) ((cycles)*120)
63
64 /*
65 * yenta PCI irq probing.
66 * currently only used in the TI/EnE initialization code
67 */
68 #ifdef CONFIG_YENTA_TI
69 static int yenta_probe_cb_irq(struct yenta_socket *socket);
70 static unsigned int yenta_probe_irq(struct yenta_socket *socket,
71 u32 isa_irq_mask);
72 #endif
73
74
75 static unsigned int override_bios;
76 module_param(override_bios, uint, 0000);
77 MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
78
79 /*
80 * Generate easy-to-use ways of reading a cardbus sockets
81 * regular memory space ("cb_xxx"), configuration space
82 * ("config_xxx") and compatibility space ("exca_xxxx")
83 */
cb_readl(struct yenta_socket * socket,unsigned reg)84 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
85 {
86 u32 val = readl(socket->base + reg);
87 debug("%04x %08x\n", socket, reg, val);
88 return val;
89 }
90
cb_writel(struct yenta_socket * socket,unsigned reg,u32 val)91 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
92 {
93 debug("%04x %08x\n", socket, reg, val);
94 writel(val, socket->base + reg);
95 readl(socket->base + reg); /* avoid problems with PCI write posting */
96 }
97
config_readb(struct yenta_socket * socket,unsigned offset)98 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
99 {
100 u8 val;
101 pci_read_config_byte(socket->dev, offset, &val);
102 debug("%04x %02x\n", socket, offset, val);
103 return val;
104 }
105
config_readw(struct yenta_socket * socket,unsigned offset)106 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
107 {
108 u16 val;
109 pci_read_config_word(socket->dev, offset, &val);
110 debug("%04x %04x\n", socket, offset, val);
111 return val;
112 }
113
config_readl(struct yenta_socket * socket,unsigned offset)114 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
115 {
116 u32 val;
117 pci_read_config_dword(socket->dev, offset, &val);
118 debug("%04x %08x\n", socket, offset, val);
119 return val;
120 }
121
config_writeb(struct yenta_socket * socket,unsigned offset,u8 val)122 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
123 {
124 debug("%04x %02x\n", socket, offset, val);
125 pci_write_config_byte(socket->dev, offset, val);
126 }
127
config_writew(struct yenta_socket * socket,unsigned offset,u16 val)128 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
129 {
130 debug("%04x %04x\n", socket, offset, val);
131 pci_write_config_word(socket->dev, offset, val);
132 }
133
config_writel(struct yenta_socket * socket,unsigned offset,u32 val)134 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
135 {
136 debug("%04x %08x\n", socket, offset, val);
137 pci_write_config_dword(socket->dev, offset, val);
138 }
139
exca_readb(struct yenta_socket * socket,unsigned reg)140 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
141 {
142 u8 val = readb(socket->base + 0x800 + reg);
143 debug("%04x %02x\n", socket, reg, val);
144 return val;
145 }
146
exca_readw(struct yenta_socket * socket,unsigned reg)147 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
148 {
149 u16 val;
150 val = readb(socket->base + 0x800 + reg);
151 val |= readb(socket->base + 0x800 + reg + 1) << 8;
152 debug("%04x %04x\n", socket, reg, val);
153 return val;
154 }
155
exca_writeb(struct yenta_socket * socket,unsigned reg,u8 val)156 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
157 {
158 debug("%04x %02x\n", socket, reg, val);
159 writeb(val, socket->base + 0x800 + reg);
160 readb(socket->base + 0x800 + reg); /* PCI write posting... */
161 }
162
exca_writew(struct yenta_socket * socket,unsigned reg,u16 val)163 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
164 {
165 debug("%04x %04x\n", socket, reg, val);
166 writeb(val, socket->base + 0x800 + reg);
167 writeb(val >> 8, socket->base + 0x800 + reg + 1);
168
169 /* PCI write posting... */
170 readb(socket->base + 0x800 + reg);
171 readb(socket->base + 0x800 + reg + 1);
172 }
173
show_yenta_registers(struct device * yentadev,struct device_attribute * attr,char * buf)174 static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
175 {
176 struct yenta_socket *socket = dev_get_drvdata(yentadev);
177 int offset = 0, i;
178
179 offset = snprintf(buf, PAGE_SIZE, "CB registers:");
180 for (i = 0; i < 0x24; i += 4) {
181 unsigned val;
182 if (!(i & 15))
183 offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
184 val = cb_readl(socket, i);
185 offset += scnprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
186 }
187
188 offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
189 for (i = 0; i < 0x45; i++) {
190 unsigned char val;
191 if (!(i & 7)) {
192 if (i & 8) {
193 memcpy(buf + offset, " -", 2);
194 offset += 2;
195 } else
196 offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
197 }
198 val = exca_readb(socket, i);
199 offset += scnprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
200 }
201 buf[offset++] = '\n';
202 return offset;
203 }
204
205 static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
206
207 /*
208 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
209 * on what kind of card is inserted..
210 */
yenta_get_status(struct pcmcia_socket * sock,unsigned int * value)211 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
212 {
213 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
214 unsigned int val;
215 u32 state = cb_readl(socket, CB_SOCKET_STATE);
216
217 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
218 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
219 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
220 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
221
222
223 if (state & CB_CBCARD) {
224 val |= SS_CARDBUS;
225 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
226 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
227 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
228 } else if (state & CB_16BITCARD) {
229 u8 status = exca_readb(socket, I365_STATUS);
230 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
231 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
232 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
233 } else {
234 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
235 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
236 }
237 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
238 val |= (status & I365_CS_READY) ? SS_READY : 0;
239 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
240 }
241
242 *value = val;
243 return 0;
244 }
245
yenta_set_power(struct yenta_socket * socket,socket_state_t * state)246 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
247 {
248 /* some birdges require to use the ExCA registers to power 16bit cards */
249 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
250 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
251 u8 reg, old;
252 reg = old = exca_readb(socket, I365_POWER);
253 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
254
255 /* i82365SL-DF style */
256 if (socket->flags & YENTA_16BIT_POWER_DF) {
257 switch (state->Vcc) {
258 case 33:
259 reg |= I365_VCC_3V;
260 break;
261 case 50:
262 reg |= I365_VCC_5V;
263 break;
264 default:
265 reg = 0;
266 break;
267 }
268 switch (state->Vpp) {
269 case 33:
270 case 50:
271 reg |= I365_VPP1_5V;
272 break;
273 case 120:
274 reg |= I365_VPP1_12V;
275 break;
276 }
277 } else {
278 /* i82365SL-B style */
279 switch (state->Vcc) {
280 case 50:
281 reg |= I365_VCC_5V;
282 break;
283 default:
284 reg = 0;
285 break;
286 }
287 switch (state->Vpp) {
288 case 50:
289 reg |= I365_VPP1_5V | I365_VPP2_5V;
290 break;
291 case 120:
292 reg |= I365_VPP1_12V | I365_VPP2_12V;
293 break;
294 }
295 }
296
297 if (reg != old)
298 exca_writeb(socket, I365_POWER, reg);
299 } else {
300 u32 reg = 0; /* CB_SC_STPCLK? */
301 switch (state->Vcc) {
302 case 33:
303 reg = CB_SC_VCC_3V;
304 break;
305 case 50:
306 reg = CB_SC_VCC_5V;
307 break;
308 default:
309 reg = 0;
310 break;
311 }
312 switch (state->Vpp) {
313 case 33:
314 reg |= CB_SC_VPP_3V;
315 break;
316 case 50:
317 reg |= CB_SC_VPP_5V;
318 break;
319 case 120:
320 reg |= CB_SC_VPP_12V;
321 break;
322 }
323 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
324 cb_writel(socket, CB_SOCKET_CONTROL, reg);
325 }
326 }
327
yenta_set_socket(struct pcmcia_socket * sock,socket_state_t * state)328 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
329 {
330 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
331 u16 bridge;
332
333 /* if powering down: do it immediately */
334 if (state->Vcc == 0)
335 yenta_set_power(socket, state);
336
337 socket->io_irq = state->io_irq;
338 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
339 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
340 u8 intr;
341 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
342
343 /* ISA interrupt control? */
344 intr = exca_readb(socket, I365_INTCTL);
345 intr = (intr & ~0xf);
346 if (!socket->dev->irq) {
347 intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
348 bridge |= CB_BRIDGE_INTR;
349 }
350 exca_writeb(socket, I365_INTCTL, intr);
351 } else {
352 u8 reg;
353
354 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
355 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
356 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
357 if (state->io_irq != socket->dev->irq) {
358 reg |= state->io_irq;
359 bridge |= CB_BRIDGE_INTR;
360 }
361 exca_writeb(socket, I365_INTCTL, reg);
362
363 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
364 reg |= I365_PWR_NORESET;
365 if (state->flags & SS_PWR_AUTO)
366 reg |= I365_PWR_AUTO;
367 if (state->flags & SS_OUTPUT_ENA)
368 reg |= I365_PWR_OUT;
369 if (exca_readb(socket, I365_POWER) != reg)
370 exca_writeb(socket, I365_POWER, reg);
371
372 /* CSC interrupt: no ISA irq for CSC */
373 reg = exca_readb(socket, I365_CSCINT);
374 reg &= I365_CSC_IRQ_MASK;
375 reg |= I365_CSC_DETECT;
376 if (state->flags & SS_IOCARD) {
377 if (state->csc_mask & SS_STSCHG)
378 reg |= I365_CSC_STSCHG;
379 } else {
380 if (state->csc_mask & SS_BATDEAD)
381 reg |= I365_CSC_BVD1;
382 if (state->csc_mask & SS_BATWARN)
383 reg |= I365_CSC_BVD2;
384 if (state->csc_mask & SS_READY)
385 reg |= I365_CSC_READY;
386 }
387 exca_writeb(socket, I365_CSCINT, reg);
388 exca_readb(socket, I365_CSC);
389 if (sock->zoom_video)
390 sock->zoom_video(sock, state->flags & SS_ZVCARD);
391 }
392 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
393 /* Socket event mask: get card insert/remove events.. */
394 cb_writel(socket, CB_SOCKET_EVENT, -1);
395 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
396
397 /* if powering up: do it as the last step when the socket is configured */
398 if (state->Vcc != 0)
399 yenta_set_power(socket, state);
400 return 0;
401 }
402
yenta_set_io_map(struct pcmcia_socket * sock,struct pccard_io_map * io)403 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
404 {
405 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
406 int map;
407 unsigned char ioctl, addr, enable;
408
409 map = io->map;
410
411 if (map > 1)
412 return -EINVAL;
413
414 enable = I365_ENA_IO(map);
415 addr = exca_readb(socket, I365_ADDRWIN);
416
417 /* Disable the window before changing it.. */
418 if (addr & enable) {
419 addr &= ~enable;
420 exca_writeb(socket, I365_ADDRWIN, addr);
421 }
422
423 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
424 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
425
426 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
427 if (io->flags & MAP_0WS)
428 ioctl |= I365_IOCTL_0WS(map);
429 if (io->flags & MAP_16BIT)
430 ioctl |= I365_IOCTL_16BIT(map);
431 if (io->flags & MAP_AUTOSZ)
432 ioctl |= I365_IOCTL_IOCS16(map);
433 exca_writeb(socket, I365_IOCTL, ioctl);
434
435 if (io->flags & MAP_ACTIVE)
436 exca_writeb(socket, I365_ADDRWIN, addr | enable);
437 return 0;
438 }
439
yenta_set_mem_map(struct pcmcia_socket * sock,struct pccard_mem_map * mem)440 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
441 {
442 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
443 struct pci_bus_region region;
444 int map;
445 unsigned char addr, enable;
446 unsigned int start, stop, card_start;
447 unsigned short word;
448
449 pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res);
450
451 map = mem->map;
452 start = region.start;
453 stop = region.end;
454 card_start = mem->card_start;
455
456 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
457 (card_start >> 26) || mem->speed > 1000)
458 return -EINVAL;
459
460 enable = I365_ENA_MEM(map);
461 addr = exca_readb(socket, I365_ADDRWIN);
462 if (addr & enable) {
463 addr &= ~enable;
464 exca_writeb(socket, I365_ADDRWIN, addr);
465 }
466
467 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
468
469 word = (start >> 12) & 0x0fff;
470 if (mem->flags & MAP_16BIT)
471 word |= I365_MEM_16BIT;
472 if (mem->flags & MAP_0WS)
473 word |= I365_MEM_0WS;
474 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
475
476 word = (stop >> 12) & 0x0fff;
477 switch (to_cycles(mem->speed)) {
478 case 0:
479 break;
480 case 1:
481 word |= I365_MEM_WS0;
482 break;
483 case 2:
484 word |= I365_MEM_WS1;
485 break;
486 default:
487 word |= I365_MEM_WS1 | I365_MEM_WS0;
488 break;
489 }
490 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
491
492 word = ((card_start - start) >> 12) & 0x3fff;
493 if (mem->flags & MAP_WRPROT)
494 word |= I365_MEM_WRPROT;
495 if (mem->flags & MAP_ATTRIB)
496 word |= I365_MEM_REG;
497 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
498
499 if (mem->flags & MAP_ACTIVE)
500 exca_writeb(socket, I365_ADDRWIN, addr | enable);
501 return 0;
502 }
503
504
505
yenta_interrupt(int irq,void * dev_id)506 static irqreturn_t yenta_interrupt(int irq, void *dev_id)
507 {
508 unsigned int events;
509 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
510 u8 csc;
511 u32 cb_event;
512
513 /* Clear interrupt status for the event */
514 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
515 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
516
517 csc = exca_readb(socket, I365_CSC);
518
519 if (!(cb_event || csc))
520 return IRQ_NONE;
521
522 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
523 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
524 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
525 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
526 } else {
527 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
528 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
529 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
530 }
531
532 if (events)
533 pcmcia_parse_events(&socket->socket, events);
534
535 return IRQ_HANDLED;
536 }
537
yenta_interrupt_wrapper(struct timer_list * t)538 static void yenta_interrupt_wrapper(struct timer_list *t)
539 {
540 struct yenta_socket *socket = from_timer(socket, t, poll_timer);
541
542 yenta_interrupt(0, (void *)socket);
543 socket->poll_timer.expires = jiffies + HZ;
544 add_timer(&socket->poll_timer);
545 }
546
yenta_clear_maps(struct yenta_socket * socket)547 static void yenta_clear_maps(struct yenta_socket *socket)
548 {
549 int i;
550 struct resource res = { .start = 0, .end = 0x0fff };
551 pccard_io_map io = { 0, 0, 0, 0, 1 };
552 pccard_mem_map mem = { .res = &res, };
553
554 yenta_set_socket(&socket->socket, &dead_socket);
555 for (i = 0; i < 2; i++) {
556 io.map = i;
557 yenta_set_io_map(&socket->socket, &io);
558 }
559 for (i = 0; i < 5; i++) {
560 mem.map = i;
561 yenta_set_mem_map(&socket->socket, &mem);
562 }
563 }
564
565 /* redoes voltage interrogation if required */
yenta_interrogate(struct yenta_socket * socket)566 static void yenta_interrogate(struct yenta_socket *socket)
567 {
568 u32 state;
569
570 state = cb_readl(socket, CB_SOCKET_STATE);
571 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
572 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
573 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
574 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
575 }
576
577 /* Called at resume and initialization events */
yenta_sock_init(struct pcmcia_socket * sock)578 static int yenta_sock_init(struct pcmcia_socket *sock)
579 {
580 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
581
582 exca_writeb(socket, I365_GBLCTL, 0x00);
583 exca_writeb(socket, I365_GENCTL, 0x00);
584
585 /* Redo card voltage interrogation */
586 yenta_interrogate(socket);
587
588 yenta_clear_maps(socket);
589
590 if (socket->type && socket->type->sock_init)
591 socket->type->sock_init(socket);
592
593 /* Re-enable CSC interrupts */
594 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
595
596 return 0;
597 }
598
yenta_sock_suspend(struct pcmcia_socket * sock)599 static int yenta_sock_suspend(struct pcmcia_socket *sock)
600 {
601 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
602
603 /* Disable CSC interrupts */
604 cb_writel(socket, CB_SOCKET_MASK, 0x0);
605
606 return 0;
607 }
608
609 /*
610 * Use an adaptive allocation for the memory resource,
611 * sometimes the memory behind pci bridges is limited:
612 * 1/8 of the size of the io window of the parent.
613 * max 4 MB, min 16 kB. We try very hard to not get below
614 * the "ACC" values, though.
615 */
616 #define BRIDGE_MEM_MAX (4*1024*1024)
617 #define BRIDGE_MEM_ACC (128*1024)
618 #define BRIDGE_MEM_MIN (16*1024)
619
620 #define BRIDGE_IO_MAX 512
621 #define BRIDGE_IO_ACC 256
622 #define BRIDGE_IO_MIN 32
623
624 #ifndef PCIBIOS_MIN_CARDBUS_IO
625 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
626 #endif
627
yenta_search_one_res(struct resource * root,struct resource * res,u32 min)628 static int yenta_search_one_res(struct resource *root, struct resource *res,
629 u32 min)
630 {
631 u32 align, size, start, end;
632
633 if (res->flags & IORESOURCE_IO) {
634 align = 1024;
635 size = BRIDGE_IO_MAX;
636 start = PCIBIOS_MIN_CARDBUS_IO;
637 end = ~0U;
638 } else {
639 unsigned long avail = root->end - root->start;
640 int i;
641 size = BRIDGE_MEM_MAX;
642 if (size > avail/8) {
643 size = (avail+1)/8;
644 /* round size down to next power of 2 */
645 i = 0;
646 while ((size /= 2) != 0)
647 i++;
648 size = 1 << i;
649 }
650 if (size < min)
651 size = min;
652 align = size;
653 start = PCIBIOS_MIN_MEM;
654 end = ~0U;
655 }
656
657 do {
658 if (allocate_resource(root, res, size, start, end, align,
659 NULL, NULL) == 0) {
660 return 1;
661 }
662 size = size/2;
663 align = size;
664 } while (size >= min);
665
666 return 0;
667 }
668
669
yenta_search_res(struct yenta_socket * socket,struct resource * res,u32 min)670 static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
671 u32 min)
672 {
673 struct resource *root;
674 int i;
675
676 pci_bus_for_each_resource(socket->dev->bus, root, i) {
677 if (!root)
678 continue;
679
680 if ((res->flags ^ root->flags) &
681 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
682 continue; /* Wrong type */
683
684 if (yenta_search_one_res(root, res, min))
685 return 1;
686 }
687 return 0;
688 }
689
yenta_allocate_res(struct yenta_socket * socket,int nr,unsigned type,int addr_start,int addr_end)690 static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
691 {
692 struct pci_dev *dev = socket->dev;
693 struct resource *res;
694 struct pci_bus_region region;
695 unsigned mask;
696
697 res = &dev->resource[nr];
698 /* Already allocated? */
699 if (res->parent)
700 return 0;
701
702 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
703 mask = ~0xfff;
704 if (type & IORESOURCE_IO)
705 mask = ~3;
706
707 res->name = dev->subordinate->name;
708 res->flags = type;
709
710 region.start = config_readl(socket, addr_start) & mask;
711 region.end = config_readl(socket, addr_end) | ~mask;
712 if (region.start && region.end > region.start && !override_bios) {
713 pcibios_bus_to_resource(dev->bus, res, ®ion);
714 if (pci_claim_resource(dev, nr) == 0)
715 return 0;
716 dev_info(&dev->dev,
717 "Preassigned resource %d busy or not available, reconfiguring...\n",
718 nr);
719 }
720
721 if (type & IORESOURCE_IO) {
722 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
723 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
724 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
725 return 1;
726 } else {
727 if (type & IORESOURCE_PREFETCH) {
728 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
729 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
730 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
731 return 1;
732 /* Approximating prefetchable by non-prefetchable */
733 res->flags = IORESOURCE_MEM;
734 }
735 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
736 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
737 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
738 return 1;
739 }
740
741 dev_info(&dev->dev,
742 "no resource of type %x available, trying to continue...\n",
743 type);
744 res->start = res->end = res->flags = 0;
745 return 0;
746 }
747
yenta_free_res(struct yenta_socket * socket,int nr)748 static void yenta_free_res(struct yenta_socket *socket, int nr)
749 {
750 struct pci_dev *dev = socket->dev;
751 struct resource *res;
752
753 res = &dev->resource[nr];
754 if (res->start != 0 && res->end != 0)
755 release_resource(res);
756
757 res->start = res->end = res->flags = 0;
758 }
759
760 /*
761 * Allocate the bridge mappings for the device..
762 */
yenta_allocate_resources(struct yenta_socket * socket)763 static void yenta_allocate_resources(struct yenta_socket *socket)
764 {
765 int program = 0;
766 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
767 IORESOURCE_IO,
768 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
769 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
770 IORESOURCE_IO,
771 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
772 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
773 IORESOURCE_MEM | IORESOURCE_PREFETCH,
774 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
775 program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
776 IORESOURCE_MEM,
777 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
778 if (program)
779 pci_setup_cardbus(socket->dev->subordinate);
780 }
781
782
783 /*
784 * Free the bridge mappings for the device..
785 */
yenta_free_resources(struct yenta_socket * socket)786 static void yenta_free_resources(struct yenta_socket *socket)
787 {
788 yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
789 yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
790 yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
791 yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
792 }
793
794
795 /*
796 * Close it down - release our resources and go home..
797 */
yenta_close(struct pci_dev * dev)798 static void yenta_close(struct pci_dev *dev)
799 {
800 struct yenta_socket *sock = pci_get_drvdata(dev);
801
802 /* Remove the register attributes */
803 device_remove_file(&dev->dev, &dev_attr_yenta_registers);
804
805 /* we don't want a dying socket registered */
806 pcmcia_unregister_socket(&sock->socket);
807
808 /* Disable all events so we don't die in an IRQ storm */
809 cb_writel(sock, CB_SOCKET_MASK, 0x0);
810 exca_writeb(sock, I365_CSCINT, 0);
811
812 if (sock->cb_irq)
813 free_irq(sock->cb_irq, sock);
814 else
815 del_timer_sync(&sock->poll_timer);
816
817 iounmap(sock->base);
818 yenta_free_resources(sock);
819
820 pci_release_regions(dev);
821 pci_disable_device(dev);
822 pci_set_drvdata(dev, NULL);
823 kfree(sock);
824 }
825
826
827 static struct pccard_operations yenta_socket_operations = {
828 .init = yenta_sock_init,
829 .suspend = yenta_sock_suspend,
830 .get_status = yenta_get_status,
831 .set_socket = yenta_set_socket,
832 .set_io_map = yenta_set_io_map,
833 .set_mem_map = yenta_set_mem_map,
834 };
835
836
837 #ifdef CONFIG_YENTA_TI
838 #include "ti113x.h"
839 #endif
840 #ifdef CONFIG_YENTA_RICOH
841 #include "ricoh.h"
842 #endif
843 #ifdef CONFIG_YENTA_TOSHIBA
844 #include "topic.h"
845 #endif
846 #ifdef CONFIG_YENTA_O2
847 #include "o2micro.h"
848 #endif
849
850 enum {
851 CARDBUS_TYPE_DEFAULT = -1,
852 CARDBUS_TYPE_TI,
853 CARDBUS_TYPE_TI113X,
854 CARDBUS_TYPE_TI12XX,
855 CARDBUS_TYPE_TI1250,
856 CARDBUS_TYPE_RICOH,
857 CARDBUS_TYPE_TOPIC95,
858 CARDBUS_TYPE_TOPIC97,
859 CARDBUS_TYPE_O2MICRO,
860 CARDBUS_TYPE_ENE,
861 };
862
863 /*
864 * Different cardbus controllers have slightly different
865 * initialization sequences etc details. List them here..
866 */
867 static struct cardbus_type cardbus_type[] = {
868 #ifdef CONFIG_YENTA_TI
869 [CARDBUS_TYPE_TI] = {
870 .override = ti_override,
871 .save_state = ti_save_state,
872 .restore_state = ti_restore_state,
873 .sock_init = ti_init,
874 },
875 [CARDBUS_TYPE_TI113X] = {
876 .override = ti113x_override,
877 .save_state = ti_save_state,
878 .restore_state = ti_restore_state,
879 .sock_init = ti_init,
880 },
881 [CARDBUS_TYPE_TI12XX] = {
882 .override = ti12xx_override,
883 .save_state = ti_save_state,
884 .restore_state = ti_restore_state,
885 .sock_init = ti_init,
886 },
887 [CARDBUS_TYPE_TI1250] = {
888 .override = ti1250_override,
889 .save_state = ti_save_state,
890 .restore_state = ti_restore_state,
891 .sock_init = ti_init,
892 },
893 [CARDBUS_TYPE_ENE] = {
894 .override = ene_override,
895 .save_state = ti_save_state,
896 .restore_state = ti_restore_state,
897 .sock_init = ti_init,
898 },
899 #endif
900 #ifdef CONFIG_YENTA_RICOH
901 [CARDBUS_TYPE_RICOH] = {
902 .override = ricoh_override,
903 .save_state = ricoh_save_state,
904 .restore_state = ricoh_restore_state,
905 },
906 #endif
907 #ifdef CONFIG_YENTA_TOSHIBA
908 [CARDBUS_TYPE_TOPIC95] = {
909 .override = topic95_override,
910 },
911 [CARDBUS_TYPE_TOPIC97] = {
912 .override = topic97_override,
913 },
914 #endif
915 #ifdef CONFIG_YENTA_O2
916 [CARDBUS_TYPE_O2MICRO] = {
917 .override = o2micro_override,
918 .restore_state = o2micro_restore_state,
919 },
920 #endif
921 };
922
923
yenta_probe_irq(struct yenta_socket * socket,u32 isa_irq_mask)924 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
925 {
926 int i;
927 unsigned long val;
928 u32 mask;
929 u8 reg;
930
931 /*
932 * Probe for usable interrupts using the force
933 * register to generate bogus card status events.
934 */
935 cb_writel(socket, CB_SOCKET_EVENT, -1);
936 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
937 reg = exca_readb(socket, I365_CSCINT);
938 exca_writeb(socket, I365_CSCINT, 0);
939 val = probe_irq_on() & isa_irq_mask;
940 for (i = 1; i < 16; i++) {
941 if (!((val >> i) & 1))
942 continue;
943 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
944 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
945 udelay(100);
946 cb_writel(socket, CB_SOCKET_EVENT, -1);
947 }
948 cb_writel(socket, CB_SOCKET_MASK, 0);
949 exca_writeb(socket, I365_CSCINT, reg);
950
951 mask = probe_irq_mask(val) & 0xffff;
952
953 return mask;
954 }
955
956
957 /*
958 * yenta PCI irq probing.
959 * currently only used in the TI/EnE initialization code
960 */
961 #ifdef CONFIG_YENTA_TI
962
963 /* interrupt handler, only used during probing */
yenta_probe_handler(int irq,void * dev_id)964 static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
965 {
966 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
967 u8 csc;
968 u32 cb_event;
969
970 /* Clear interrupt status for the event */
971 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
972 cb_writel(socket, CB_SOCKET_EVENT, -1);
973 csc = exca_readb(socket, I365_CSC);
974
975 if (cb_event || csc) {
976 socket->probe_status = 1;
977 return IRQ_HANDLED;
978 }
979
980 return IRQ_NONE;
981 }
982
983 /* probes the PCI interrupt, use only on override functions */
yenta_probe_cb_irq(struct yenta_socket * socket)984 static int yenta_probe_cb_irq(struct yenta_socket *socket)
985 {
986 u8 reg = 0;
987
988 if (!socket->cb_irq)
989 return -1;
990
991 socket->probe_status = 0;
992
993 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
994 dev_warn(&socket->dev->dev,
995 "request_irq() in yenta_probe_cb_irq() failed!\n");
996 return -1;
997 }
998
999 /* generate interrupt, wait */
1000 if (!socket->dev->irq)
1001 reg = exca_readb(socket, I365_CSCINT);
1002 exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
1003 cb_writel(socket, CB_SOCKET_EVENT, -1);
1004 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
1005 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
1006
1007 msleep(100);
1008
1009 /* disable interrupts */
1010 cb_writel(socket, CB_SOCKET_MASK, 0);
1011 exca_writeb(socket, I365_CSCINT, reg);
1012 cb_writel(socket, CB_SOCKET_EVENT, -1);
1013 exca_readb(socket, I365_CSC);
1014
1015 free_irq(socket->cb_irq, socket);
1016
1017 return (int) socket->probe_status;
1018 }
1019
1020 #endif /* CONFIG_YENTA_TI */
1021
1022
1023 /*
1024 * Set static data that doesn't need re-initializing..
1025 */
yenta_get_socket_capabilities(struct yenta_socket * socket,u32 isa_irq_mask)1026 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1027 {
1028 socket->socket.pci_irq = socket->cb_irq;
1029 if (isa_probe)
1030 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1031 else
1032 socket->socket.irq_mask = 0;
1033
1034 dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
1035 socket->socket.irq_mask, socket->cb_irq);
1036 }
1037
1038 /*
1039 * Initialize the standard cardbus registers
1040 */
yenta_config_init(struct yenta_socket * socket)1041 static void yenta_config_init(struct yenta_socket *socket)
1042 {
1043 u16 bridge;
1044 struct pci_dev *dev = socket->dev;
1045 struct pci_bus_region region;
1046
1047 pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]);
1048
1049 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1050 config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1051 config_writew(socket, PCI_COMMAND,
1052 PCI_COMMAND_IO |
1053 PCI_COMMAND_MEMORY |
1054 PCI_COMMAND_MASTER |
1055 PCI_COMMAND_WAIT);
1056
1057 /* MAGIC NUMBERS! Fixme */
1058 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1059 config_writeb(socket, PCI_LATENCY_TIMER, 168);
1060 config_writel(socket, PCI_PRIMARY_BUS,
1061 (176 << 24) | /* sec. latency timer */
1062 ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */
1063 ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */
1064 dev->subordinate->primary); /* primary bus */
1065
1066 /*
1067 * Set up the bridging state:
1068 * - enable write posting.
1069 * - memory window 0 prefetchable, window 1 non-prefetchable
1070 * - PCI interrupts enabled if a PCI interrupt exists..
1071 */
1072 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1073 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1074 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1075 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1076 }
1077
1078 /**
1079 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
1080 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1081 *
1082 * Checks if devices on the bus which the CardBus bridge bridges to would be
1083 * invisible during PCI scans because of a misconfigured subordinate number
1084 * of the parent brige - some BIOSes seem to be too lazy to set it right.
1085 * Does the fixup carefully by checking how far it can go without conflicts.
1086 * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
1087 */
yenta_fixup_parent_bridge(struct pci_bus * cardbus_bridge)1088 static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1089 {
1090 struct pci_bus *sibling;
1091 unsigned char upper_limit;
1092 /*
1093 * We only check and fix the parent bridge: All systems which need
1094 * this fixup that have been reviewed are laptops and the only bridge
1095 * which needed fixing was the parent bridge of the CardBus bridge:
1096 */
1097 struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1098
1099 /* Check bus numbers are already set up correctly: */
1100 if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
1101 return; /* The subordinate number is ok, nothing to do */
1102
1103 if (!bridge_to_fix->parent)
1104 return; /* Root bridges are ok */
1105
1106 /* stay within the limits of the bus range of the parent: */
1107 upper_limit = bridge_to_fix->parent->busn_res.end;
1108
1109 /* check the bus ranges of all sibling bridges to prevent overlap */
1110 list_for_each_entry(sibling, &bridge_to_fix->parent->children,
1111 node) {
1112 /*
1113 * If the sibling has a higher secondary bus number
1114 * and it's secondary is equal or smaller than our
1115 * current upper limit, set the new upper limit to
1116 * the bus number below the sibling's range:
1117 */
1118 if (sibling->busn_res.start > bridge_to_fix->busn_res.end
1119 && sibling->busn_res.start <= upper_limit)
1120 upper_limit = sibling->busn_res.start - 1;
1121 }
1122
1123 /* Show that the wanted subordinate number is not possible: */
1124 if (cardbus_bridge->busn_res.end > upper_limit)
1125 dev_warn(&cardbus_bridge->dev,
1126 "Upper limit for fixing this bridge's parent bridge: #%02x\n",
1127 upper_limit);
1128
1129 /* If we have room to increase the bridge's subordinate number, */
1130 if (bridge_to_fix->busn_res.end < upper_limit) {
1131
1132 /* use the highest number of the hidden bus, within limits */
1133 unsigned char subordinate_to_assign =
1134 min_t(int, cardbus_bridge->busn_res.end, upper_limit);
1135
1136 dev_info(&bridge_to_fix->dev,
1137 "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
1138 bridge_to_fix->number,
1139 (int)bridge_to_fix->busn_res.end,
1140 subordinate_to_assign);
1141
1142 /* Save the new subordinate in the bus struct of the bridge */
1143 bridge_to_fix->busn_res.end = subordinate_to_assign;
1144
1145 /* and update the PCI config space with the new subordinate */
1146 pci_write_config_byte(bridge_to_fix->self,
1147 PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
1148 }
1149 }
1150
1151 /*
1152 * Initialize a cardbus controller. Make sure we have a usable
1153 * interrupt, and that we can map the cardbus area. Fill in the
1154 * socket information structure..
1155 */
yenta_probe(struct pci_dev * dev,const struct pci_device_id * id)1156 static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1157 {
1158 struct yenta_socket *socket;
1159 int ret;
1160
1161 /*
1162 * If we failed to assign proper bus numbers for this cardbus
1163 * controller during PCI probe, its subordinate pci_bus is NULL.
1164 * Bail out if so.
1165 */
1166 if (!dev->subordinate) {
1167 dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
1168 return -ENODEV;
1169 }
1170
1171 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1172 if (!socket)
1173 return -ENOMEM;
1174
1175 /* prepare pcmcia_socket */
1176 socket->socket.ops = ¥ta_socket_operations;
1177 socket->socket.resource_ops = &pccard_nonstatic_ops;
1178 socket->socket.dev.parent = &dev->dev;
1179 socket->socket.driver_data = socket;
1180 socket->socket.owner = THIS_MODULE;
1181 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1182 socket->socket.map_size = 0x1000;
1183 socket->socket.cb_dev = dev;
1184
1185 /* prepare struct yenta_socket */
1186 socket->dev = dev;
1187 pci_set_drvdata(dev, socket);
1188
1189 /*
1190 * Do some basic sanity checking..
1191 */
1192 if (pci_enable_device(dev)) {
1193 ret = -EBUSY;
1194 goto free;
1195 }
1196
1197 ret = pci_request_regions(dev, "yenta_socket");
1198 if (ret)
1199 goto disable;
1200
1201 if (!pci_resource_start(dev, 0)) {
1202 dev_err(&dev->dev, "No cardbus resource!\n");
1203 ret = -ENODEV;
1204 goto release;
1205 }
1206
1207 /*
1208 * Ok, start setup.. Map the cardbus registers,
1209 * and request the IRQ.
1210 */
1211 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1212 if (!socket->base) {
1213 ret = -ENOMEM;
1214 goto release;
1215 }
1216
1217 /*
1218 * report the subsystem vendor and device for help debugging
1219 * the irq stuff...
1220 */
1221 dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
1222 dev->subsystem_vendor, dev->subsystem_device);
1223
1224 yenta_config_init(socket);
1225
1226 /* Disable all events */
1227 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1228
1229 /* Set up the bridge regions.. */
1230 yenta_allocate_resources(socket);
1231
1232 socket->cb_irq = dev->irq;
1233
1234 /* Do we have special options for the device? */
1235 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1236 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1237 socket->type = &cardbus_type[id->driver_data];
1238
1239 ret = socket->type->override(socket);
1240 if (ret < 0)
1241 goto unmap;
1242 }
1243
1244 /* We must finish initialization here */
1245
1246 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1247 /* No IRQ or request_irq failed. Poll */
1248 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1249 timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
1250 mod_timer(&socket->poll_timer, jiffies + HZ);
1251 dev_info(&dev->dev,
1252 "no PCI IRQ, CardBus support disabled for this socket.\n");
1253 dev_info(&dev->dev,
1254 "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1255 } else {
1256 socket->socket.features |= SS_CAP_CARDBUS;
1257 }
1258
1259 /* Figure out what the dang thing can do for the PCMCIA layer... */
1260 yenta_interrogate(socket);
1261 yenta_get_socket_capabilities(socket, isa_interrupts);
1262 dev_info(&dev->dev, "Socket status: %08x\n",
1263 cb_readl(socket, CB_SOCKET_STATE));
1264
1265 yenta_fixup_parent_bridge(dev->subordinate);
1266
1267 /* Register it with the pcmcia layer.. */
1268 ret = pcmcia_register_socket(&socket->socket);
1269 if (ret)
1270 goto free_irq;
1271
1272 /* Add the yenta register attributes */
1273 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1274 if (ret)
1275 goto unregister_socket;
1276
1277 return ret;
1278
1279 /* error path... */
1280 unregister_socket:
1281 pcmcia_unregister_socket(&socket->socket);
1282 free_irq:
1283 if (socket->cb_irq)
1284 free_irq(socket->cb_irq, socket);
1285 else
1286 del_timer_sync(&socket->poll_timer);
1287 unmap:
1288 iounmap(socket->base);
1289 yenta_free_resources(socket);
1290 release:
1291 pci_release_regions(dev);
1292 disable:
1293 pci_disable_device(dev);
1294 free:
1295 pci_set_drvdata(dev, NULL);
1296 kfree(socket);
1297 return ret;
1298 }
1299
1300 #ifdef CONFIG_PM
yenta_dev_suspend_noirq(struct device * dev)1301 static int yenta_dev_suspend_noirq(struct device *dev)
1302 {
1303 struct pci_dev *pdev = to_pci_dev(dev);
1304 struct yenta_socket *socket = pci_get_drvdata(pdev);
1305
1306 if (!socket)
1307 return 0;
1308
1309 if (socket->type && socket->type->save_state)
1310 socket->type->save_state(socket);
1311
1312 pci_save_state(pdev);
1313 pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1314 pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1315 pci_disable_device(pdev);
1316
1317 return 0;
1318 }
1319
yenta_dev_resume_noirq(struct device * dev)1320 static int yenta_dev_resume_noirq(struct device *dev)
1321 {
1322 struct pci_dev *pdev = to_pci_dev(dev);
1323 struct yenta_socket *socket = pci_get_drvdata(pdev);
1324 int ret;
1325
1326 if (!socket)
1327 return 0;
1328
1329 pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1330 pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1331
1332 ret = pci_enable_device(pdev);
1333 if (ret)
1334 return ret;
1335
1336 pci_set_master(pdev);
1337
1338 if (socket->type && socket->type->restore_state)
1339 socket->type->restore_state(socket);
1340
1341 return 0;
1342 }
1343
1344 static const struct dev_pm_ops yenta_pm_ops = {
1345 .suspend_noirq = yenta_dev_suspend_noirq,
1346 .resume_noirq = yenta_dev_resume_noirq,
1347 .freeze_noirq = yenta_dev_suspend_noirq,
1348 .thaw_noirq = yenta_dev_resume_noirq,
1349 .poweroff_noirq = yenta_dev_suspend_noirq,
1350 .restore_noirq = yenta_dev_resume_noirq,
1351 };
1352
1353 #define YENTA_PM_OPS (¥ta_pm_ops)
1354 #else
1355 #define YENTA_PM_OPS NULL
1356 #endif
1357
1358 #define CB_ID(vend, dev, type) \
1359 { \
1360 .vendor = vend, \
1361 .device = dev, \
1362 .subvendor = PCI_ANY_ID, \
1363 .subdevice = PCI_ANY_ID, \
1364 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1365 .class_mask = ~0, \
1366 .driver_data = CARDBUS_TYPE_##type, \
1367 }
1368
1369 static const struct pci_device_id yenta_table[] = {
1370 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1371
1372 /*
1373 * TBD: Check if these TI variants can use more
1374 * advanced overrides instead. (I can't get the
1375 * data sheets for these devices. --rmk)
1376 */
1377 #ifdef CONFIG_YENTA_TI
1378 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1379
1380 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1381 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1382
1383 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1384 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1385 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1386 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1387 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1388 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1389 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1390 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1391 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1392 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1393 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1394 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1395 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1396 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1397 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1398 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1399 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1400
1401 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1402 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1403
1404 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1405 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1406 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1407 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1408 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1409 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1410 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1411 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1412
1413 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1414 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1415 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1416 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1417 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1418 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1419 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1420 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1421 #endif /* CONFIG_YENTA_TI */
1422
1423 #ifdef CONFIG_YENTA_RICOH
1424 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1425 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1426 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1427 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1428 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1429 #endif
1430
1431 #ifdef CONFIG_YENTA_TOSHIBA
1432 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1433 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1434 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1435 #endif
1436
1437 #ifdef CONFIG_YENTA_O2
1438 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1439 #endif
1440
1441 /* match any cardbus bridge */
1442 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1443 { /* all zeroes */ }
1444 };
1445 MODULE_DEVICE_TABLE(pci, yenta_table);
1446
1447
1448 static struct pci_driver yenta_cardbus_driver = {
1449 .name = "yenta_cardbus",
1450 .id_table = yenta_table,
1451 .probe = yenta_probe,
1452 .remove = yenta_close,
1453 .driver.pm = YENTA_PM_OPS,
1454 };
1455
1456 module_pci_driver(yenta_cardbus_driver);
1457
1458 MODULE_LICENSE("GPL");
1459
