1 /*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot <aurelien.jacquiot@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * DMA uncached mapping support.
12 *
13 * Using code pulled from ARM
14 * Copyright (C) 2000-2004 Russell King
15 *
16 */
17 #include <linux/slab.h>
18 #include <linux/bitmap.h>
19 #include <linux/bitops.h>
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/dma-noncoherent.h>
23 #include <linux/memblock.h>
24
25 #include <asm/cacheflush.h>
26 #include <asm/page.h>
27 #include <asm/setup.h>
28
29 /*
30 * DMA coherent memory management, can be redefined using the memdma=
31 * kernel command line
32 */
33
34 /* none by default */
35 static phys_addr_t dma_base;
36 static u32 dma_size;
37 static u32 dma_pages;
38
39 static unsigned long *dma_bitmap;
40
41 /* bitmap lock */
42 static DEFINE_SPINLOCK(dma_lock);
43
44 /*
45 * Return a DMA coherent and contiguous memory chunk from the DMA memory
46 */
__alloc_dma_pages(int order)47 static inline u32 __alloc_dma_pages(int order)
48 {
49 unsigned long flags;
50 u32 pos;
51
52 spin_lock_irqsave(&dma_lock, flags);
53 pos = bitmap_find_free_region(dma_bitmap, dma_pages, order);
54 spin_unlock_irqrestore(&dma_lock, flags);
55
56 return dma_base + (pos << PAGE_SHIFT);
57 }
58
__free_dma_pages(u32 addr,int order)59 static void __free_dma_pages(u32 addr, int order)
60 {
61 unsigned long flags;
62 u32 pos = (addr - dma_base) >> PAGE_SHIFT;
63
64 if (addr < dma_base || (pos + (1 << order)) >= dma_pages) {
65 printk(KERN_ERR "%s: freeing outside range.\n", __func__);
66 BUG();
67 }
68
69 spin_lock_irqsave(&dma_lock, flags);
70 bitmap_release_region(dma_bitmap, pos, order);
71 spin_unlock_irqrestore(&dma_lock, flags);
72 }
73
74 /*
75 * Allocate DMA coherent memory space and return both the kernel
76 * virtual and DMA address for that space.
77 */
arch_dma_alloc(struct device * dev,size_t size,dma_addr_t * handle,gfp_t gfp,unsigned long attrs)78 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
79 gfp_t gfp, unsigned long attrs)
80 {
81 u32 paddr;
82 int order;
83
84 if (!dma_size || !size)
85 return NULL;
86
87 order = get_count_order(((size - 1) >> PAGE_SHIFT) + 1);
88
89 paddr = __alloc_dma_pages(order);
90
91 if (handle)
92 *handle = paddr;
93
94 if (!paddr)
95 return NULL;
96
97 return phys_to_virt(paddr);
98 }
99
100 /*
101 * Free DMA coherent memory as defined by the above mapping.
102 */
arch_dma_free(struct device * dev,size_t size,void * vaddr,dma_addr_t dma_handle,unsigned long attrs)103 void arch_dma_free(struct device *dev, size_t size, void *vaddr,
104 dma_addr_t dma_handle, unsigned long attrs)
105 {
106 int order;
107
108 if (!dma_size || !size)
109 return;
110
111 order = get_count_order(((size - 1) >> PAGE_SHIFT) + 1);
112
113 __free_dma_pages(virt_to_phys(vaddr), order);
114 }
115
116 /*
117 * Initialise the coherent DMA memory allocator using the given uncached region.
118 */
coherent_mem_init(phys_addr_t start,u32 size)119 void __init coherent_mem_init(phys_addr_t start, u32 size)
120 {
121 phys_addr_t bitmap_phys;
122
123 if (!size)
124 return;
125
126 printk(KERN_INFO
127 "Coherent memory (DMA) region start=0x%x size=0x%x\n",
128 start, size);
129
130 dma_base = start;
131 dma_size = size;
132
133 /* allocate bitmap */
134 dma_pages = dma_size >> PAGE_SHIFT;
135 if (dma_size & (PAGE_SIZE - 1))
136 ++dma_pages;
137
138 bitmap_phys = memblock_alloc(BITS_TO_LONGS(dma_pages) * sizeof(long),
139 sizeof(long));
140
141 dma_bitmap = phys_to_virt(bitmap_phys);
142 memset(dma_bitmap, 0, dma_pages * PAGE_SIZE);
143 }
144
c6x_dma_sync(struct device * dev,phys_addr_t paddr,size_t size,enum dma_data_direction dir)145 static void c6x_dma_sync(struct device *dev, phys_addr_t paddr, size_t size,
146 enum dma_data_direction dir)
147 {
148 BUG_ON(!valid_dma_direction(dir));
149
150 switch (dir) {
151 case DMA_FROM_DEVICE:
152 L2_cache_block_invalidate(paddr, paddr + size);
153 break;
154 case DMA_TO_DEVICE:
155 L2_cache_block_writeback(paddr, paddr + size);
156 break;
157 case DMA_BIDIRECTIONAL:
158 L2_cache_block_writeback_invalidate(paddr, paddr + size);
159 break;
160 default:
161 break;
162 }
163 }
164
arch_sync_dma_for_device(struct device * dev,phys_addr_t paddr,size_t size,enum dma_data_direction dir)165 void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
166 size_t size, enum dma_data_direction dir)
167 {
168 return c6x_dma_sync(dev, paddr, size, dir);
169 }
170
arch_sync_dma_for_cpu(struct device * dev,phys_addr_t paddr,size_t size,enum dma_data_direction dir)171 void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
172 size_t size, enum dma_data_direction dir)
173 {
174 return c6x_dma_sync(dev, paddr, size, dir);
175 }
176
