1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "zpci"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/compat.h>
13 #include <linux/kernel.h>
14 #include <linux/miscdevice.h>
15 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/pci.h>
19 #include <linux/uaccess.h>
20 #include <asm/pci_debug.h>
21 #include <asm/pci_clp.h>
22 #include <asm/clp.h>
23 #include <uapi/asm/clp.h>
24
25 bool zpci_unique_uid;
26
update_uid_checking(bool new)27 static void update_uid_checking(bool new)
28 {
29 if (zpci_unique_uid != new)
30 zpci_dbg(1, "uid checking:%d\n", new);
31
32 zpci_unique_uid = new;
33 }
34
zpci_err_clp(unsigned int rsp,int rc)35 static inline void zpci_err_clp(unsigned int rsp, int rc)
36 {
37 struct {
38 unsigned int rsp;
39 int rc;
40 } __packed data = {rsp, rc};
41
42 zpci_err_hex(&data, sizeof(data));
43 }
44
45 /*
46 * Call Logical Processor with c=1, lps=0 and command 1
47 * to get the bit mask of installed logical processors
48 */
clp_get_ilp(unsigned long * ilp)49 static inline int clp_get_ilp(unsigned long *ilp)
50 {
51 unsigned long mask;
52 int cc = 3;
53
54 asm volatile (
55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
56 "0: ipm %[cc]\n"
57 " srl %[cc],28\n"
58 "1:\n"
59 EX_TABLE(0b, 1b)
60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
61 : "cc");
62 *ilp = mask;
63 return cc;
64 }
65
66 /*
67 * Call Logical Processor with c=0, the give constant lps and an lpcb request.
68 */
clp_req(void * data,unsigned int lps)69 static inline int clp_req(void *data, unsigned int lps)
70 {
71 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
72 u64 ignored;
73 int cc = 3;
74
75 asm volatile (
76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
77 "0: ipm %[cc]\n"
78 " srl %[cc],28\n"
79 "1:\n"
80 EX_TABLE(0b, 1b)
81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
82 : [req] "a" (req), [lps] "i" (lps)
83 : "cc");
84 return cc;
85 }
86
clp_alloc_block(gfp_t gfp_mask)87 static void *clp_alloc_block(gfp_t gfp_mask)
88 {
89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
90 }
91
clp_free_block(void * ptr)92 static void clp_free_block(void *ptr)
93 {
94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
95 }
96
clp_store_query_pci_fngrp(struct zpci_dev * zdev,struct clp_rsp_query_pci_grp * response)97 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
98 struct clp_rsp_query_pci_grp *response)
99 {
100 zdev->tlb_refresh = response->refresh;
101 zdev->dma_mask = response->dasm;
102 zdev->msi_addr = response->msia;
103 zdev->max_msi = response->noi;
104 zdev->fmb_update = response->mui;
105
106 switch (response->version) {
107 case 1:
108 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
109 break;
110 default:
111 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
112 break;
113 }
114 }
115
clp_query_pci_fngrp(struct zpci_dev * zdev,u8 pfgid)116 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
117 {
118 struct clp_req_rsp_query_pci_grp *rrb;
119 int rc;
120
121 rrb = clp_alloc_block(GFP_KERNEL);
122 if (!rrb)
123 return -ENOMEM;
124
125 memset(rrb, 0, sizeof(*rrb));
126 rrb->request.hdr.len = sizeof(rrb->request);
127 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
128 rrb->response.hdr.len = sizeof(rrb->response);
129 rrb->request.pfgid = pfgid;
130
131 rc = clp_req(rrb, CLP_LPS_PCI);
132 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
133 clp_store_query_pci_fngrp(zdev, &rrb->response);
134 else {
135 zpci_err("Q PCI FGRP:\n");
136 zpci_err_clp(rrb->response.hdr.rsp, rc);
137 rc = -EIO;
138 }
139 clp_free_block(rrb);
140 return rc;
141 }
142
clp_store_query_pci_fn(struct zpci_dev * zdev,struct clp_rsp_query_pci * response)143 static int clp_store_query_pci_fn(struct zpci_dev *zdev,
144 struct clp_rsp_query_pci *response)
145 {
146 int i;
147
148 for (i = 0; i < PCI_BAR_COUNT; i++) {
149 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
150 zdev->bars[i].size = response->bar_size[i];
151 }
152 zdev->start_dma = response->sdma;
153 zdev->end_dma = response->edma;
154 zdev->pchid = response->pchid;
155 zdev->pfgid = response->pfgid;
156 zdev->pft = response->pft;
157 zdev->vfn = response->vfn;
158 zdev->uid = response->uid;
159 zdev->fmb_length = sizeof(u32) * response->fmb_len;
160
161 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
162 if (response->util_str_avail) {
163 memcpy(zdev->util_str, response->util_str,
164 sizeof(zdev->util_str));
165 }
166
167 return 0;
168 }
169
clp_query_pci_fn(struct zpci_dev * zdev,u32 fh)170 static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
171 {
172 struct clp_req_rsp_query_pci *rrb;
173 int rc;
174
175 rrb = clp_alloc_block(GFP_KERNEL);
176 if (!rrb)
177 return -ENOMEM;
178
179 memset(rrb, 0, sizeof(*rrb));
180 rrb->request.hdr.len = sizeof(rrb->request);
181 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
182 rrb->response.hdr.len = sizeof(rrb->response);
183 rrb->request.fh = fh;
184
185 rc = clp_req(rrb, CLP_LPS_PCI);
186 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
187 rc = clp_store_query_pci_fn(zdev, &rrb->response);
188 if (rc)
189 goto out;
190 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
191 } else {
192 zpci_err("Q PCI FN:\n");
193 zpci_err_clp(rrb->response.hdr.rsp, rc);
194 rc = -EIO;
195 }
196 out:
197 clp_free_block(rrb);
198 return rc;
199 }
200
clp_add_pci_device(u32 fid,u32 fh,int configured)201 int clp_add_pci_device(u32 fid, u32 fh, int configured)
202 {
203 struct zpci_dev *zdev;
204 int rc = -ENOMEM;
205
206 zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
207 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
208 if (!zdev)
209 goto error;
210
211 zdev->fh = fh;
212 zdev->fid = fid;
213
214 /* Query function properties and update zdev */
215 rc = clp_query_pci_fn(zdev, fh);
216 if (rc)
217 goto error;
218
219 if (configured)
220 zdev->state = ZPCI_FN_STATE_CONFIGURED;
221 else
222 zdev->state = ZPCI_FN_STATE_STANDBY;
223
224 rc = zpci_create_device(zdev);
225 if (rc)
226 goto error;
227 return 0;
228
229 error:
230 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
231 kfree(zdev);
232 return rc;
233 }
234
235 /*
236 * Enable/Disable a given PCI function defined by its function handle.
237 */
clp_set_pci_fn(u32 * fh,u8 nr_dma_as,u8 command)238 static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
239 {
240 struct clp_req_rsp_set_pci *rrb;
241 int rc, retries = 100;
242
243 rrb = clp_alloc_block(GFP_KERNEL);
244 if (!rrb)
245 return -ENOMEM;
246
247 do {
248 memset(rrb, 0, sizeof(*rrb));
249 rrb->request.hdr.len = sizeof(rrb->request);
250 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
251 rrb->response.hdr.len = sizeof(rrb->response);
252 rrb->request.fh = *fh;
253 rrb->request.oc = command;
254 rrb->request.ndas = nr_dma_as;
255
256 rc = clp_req(rrb, CLP_LPS_PCI);
257 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
258 retries--;
259 if (retries < 0)
260 break;
261 msleep(20);
262 }
263 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
264
265 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
266 *fh = rrb->response.fh;
267 else {
268 zpci_err("Set PCI FN:\n");
269 zpci_err_clp(rrb->response.hdr.rsp, rc);
270 rc = -EIO;
271 }
272 clp_free_block(rrb);
273 return rc;
274 }
275
clp_enable_fh(struct zpci_dev * zdev,u8 nr_dma_as)276 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
277 {
278 u32 fh = zdev->fh;
279 int rc;
280
281 rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
282 if (!rc)
283 /* Success -> store enabled handle in zdev */
284 zdev->fh = fh;
285
286 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
287 return rc;
288 }
289
clp_disable_fh(struct zpci_dev * zdev)290 int clp_disable_fh(struct zpci_dev *zdev)
291 {
292 u32 fh = zdev->fh;
293 int rc;
294
295 if (!zdev_enabled(zdev))
296 return 0;
297
298 rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
299 if (!rc)
300 /* Success -> store disabled handle in zdev */
301 zdev->fh = fh;
302
303 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
304 return rc;
305 }
306
clp_list_pci(struct clp_req_rsp_list_pci * rrb,void * data,void (* cb)(struct clp_fh_list_entry *,void *))307 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
308 void (*cb)(struct clp_fh_list_entry *, void *))
309 {
310 u64 resume_token = 0;
311 int entries, i, rc;
312
313 do {
314 memset(rrb, 0, sizeof(*rrb));
315 rrb->request.hdr.len = sizeof(rrb->request);
316 rrb->request.hdr.cmd = CLP_LIST_PCI;
317 /* store as many entries as possible */
318 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
319 rrb->request.resume_token = resume_token;
320
321 /* Get PCI function handle list */
322 rc = clp_req(rrb, CLP_LPS_PCI);
323 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
324 zpci_err("List PCI FN:\n");
325 zpci_err_clp(rrb->response.hdr.rsp, rc);
326 rc = -EIO;
327 goto out;
328 }
329
330 update_uid_checking(rrb->response.uid_checking);
331 WARN_ON_ONCE(rrb->response.entry_size !=
332 sizeof(struct clp_fh_list_entry));
333
334 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
335 rrb->response.entry_size;
336
337 resume_token = rrb->response.resume_token;
338 for (i = 0; i < entries; i++)
339 cb(&rrb->response.fh_list[i], data);
340 } while (resume_token);
341 out:
342 return rc;
343 }
344
__clp_add(struct clp_fh_list_entry * entry,void * data)345 static void __clp_add(struct clp_fh_list_entry *entry, void *data)
346 {
347 struct zpci_dev *zdev;
348
349 if (!entry->vendor_id)
350 return;
351
352 zdev = get_zdev_by_fid(entry->fid);
353 if (!zdev)
354 clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
355 }
356
__clp_update(struct clp_fh_list_entry * entry,void * data)357 static void __clp_update(struct clp_fh_list_entry *entry, void *data)
358 {
359 struct zpci_dev *zdev;
360
361 if (!entry->vendor_id)
362 return;
363
364 zdev = get_zdev_by_fid(entry->fid);
365 if (!zdev)
366 return;
367
368 zdev->fh = entry->fh;
369 }
370
clp_scan_pci_devices(void)371 int clp_scan_pci_devices(void)
372 {
373 struct clp_req_rsp_list_pci *rrb;
374 int rc;
375
376 rrb = clp_alloc_block(GFP_KERNEL);
377 if (!rrb)
378 return -ENOMEM;
379
380 rc = clp_list_pci(rrb, NULL, __clp_add);
381
382 clp_free_block(rrb);
383 return rc;
384 }
385
clp_rescan_pci_devices(void)386 int clp_rescan_pci_devices(void)
387 {
388 struct clp_req_rsp_list_pci *rrb;
389 int rc;
390
391 zpci_remove_reserved_devices();
392
393 rrb = clp_alloc_block(GFP_KERNEL);
394 if (!rrb)
395 return -ENOMEM;
396
397 rc = clp_list_pci(rrb, NULL, __clp_add);
398
399 clp_free_block(rrb);
400 return rc;
401 }
402
clp_rescan_pci_devices_simple(void)403 int clp_rescan_pci_devices_simple(void)
404 {
405 struct clp_req_rsp_list_pci *rrb;
406 int rc;
407
408 rrb = clp_alloc_block(GFP_NOWAIT);
409 if (!rrb)
410 return -ENOMEM;
411
412 rc = clp_list_pci(rrb, NULL, __clp_update);
413
414 clp_free_block(rrb);
415 return rc;
416 }
417
418 struct clp_state_data {
419 u32 fid;
420 enum zpci_state state;
421 };
422
__clp_get_state(struct clp_fh_list_entry * entry,void * data)423 static void __clp_get_state(struct clp_fh_list_entry *entry, void *data)
424 {
425 struct clp_state_data *sd = data;
426
427 if (entry->fid != sd->fid)
428 return;
429
430 sd->state = entry->config_state;
431 }
432
clp_get_state(u32 fid,enum zpci_state * state)433 int clp_get_state(u32 fid, enum zpci_state *state)
434 {
435 struct clp_req_rsp_list_pci *rrb;
436 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED};
437 int rc;
438
439 rrb = clp_alloc_block(GFP_KERNEL);
440 if (!rrb)
441 return -ENOMEM;
442
443 rc = clp_list_pci(rrb, &sd, __clp_get_state);
444 if (!rc)
445 *state = sd.state;
446
447 clp_free_block(rrb);
448 return rc;
449 }
450
clp_base_slpc(struct clp_req * req,struct clp_req_rsp_slpc * lpcb)451 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
452 {
453 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
454
455 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
456 lpcb->response.hdr.len > limit)
457 return -EINVAL;
458 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
459 }
460
clp_base_command(struct clp_req * req,struct clp_req_hdr * lpcb)461 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
462 {
463 switch (lpcb->cmd) {
464 case 0x0001: /* store logical-processor characteristics */
465 return clp_base_slpc(req, (void *) lpcb);
466 default:
467 return -EINVAL;
468 }
469 }
470
clp_pci_slpc(struct clp_req * req,struct clp_req_rsp_slpc * lpcb)471 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
472 {
473 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
474
475 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
476 lpcb->response.hdr.len > limit)
477 return -EINVAL;
478 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
479 }
480
clp_pci_list(struct clp_req * req,struct clp_req_rsp_list_pci * lpcb)481 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
482 {
483 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
484
485 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
486 lpcb->response.hdr.len > limit)
487 return -EINVAL;
488 if (lpcb->request.reserved2 != 0)
489 return -EINVAL;
490 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
491 }
492
clp_pci_query(struct clp_req * req,struct clp_req_rsp_query_pci * lpcb)493 static int clp_pci_query(struct clp_req *req,
494 struct clp_req_rsp_query_pci *lpcb)
495 {
496 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
497
498 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
499 lpcb->response.hdr.len > limit)
500 return -EINVAL;
501 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
502 return -EINVAL;
503 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
504 }
505
clp_pci_query_grp(struct clp_req * req,struct clp_req_rsp_query_pci_grp * lpcb)506 static int clp_pci_query_grp(struct clp_req *req,
507 struct clp_req_rsp_query_pci_grp *lpcb)
508 {
509 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
510
511 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
512 lpcb->response.hdr.len > limit)
513 return -EINVAL;
514 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
515 lpcb->request.reserved4 != 0)
516 return -EINVAL;
517 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
518 }
519
clp_pci_command(struct clp_req * req,struct clp_req_hdr * lpcb)520 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
521 {
522 switch (lpcb->cmd) {
523 case 0x0001: /* store logical-processor characteristics */
524 return clp_pci_slpc(req, (void *) lpcb);
525 case 0x0002: /* list PCI functions */
526 return clp_pci_list(req, (void *) lpcb);
527 case 0x0003: /* query PCI function */
528 return clp_pci_query(req, (void *) lpcb);
529 case 0x0004: /* query PCI function group */
530 return clp_pci_query_grp(req, (void *) lpcb);
531 default:
532 return -EINVAL;
533 }
534 }
535
clp_normal_command(struct clp_req * req)536 static int clp_normal_command(struct clp_req *req)
537 {
538 struct clp_req_hdr *lpcb;
539 void __user *uptr;
540 int rc;
541
542 rc = -EINVAL;
543 if (req->lps != 0 && req->lps != 2)
544 goto out;
545
546 rc = -ENOMEM;
547 lpcb = clp_alloc_block(GFP_KERNEL);
548 if (!lpcb)
549 goto out;
550
551 rc = -EFAULT;
552 uptr = (void __force __user *)(unsigned long) req->data_p;
553 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
554 goto out_free;
555
556 rc = -EINVAL;
557 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
558 goto out_free;
559
560 switch (req->lps) {
561 case 0:
562 rc = clp_base_command(req, lpcb);
563 break;
564 case 2:
565 rc = clp_pci_command(req, lpcb);
566 break;
567 }
568 if (rc)
569 goto out_free;
570
571 rc = -EFAULT;
572 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
573 goto out_free;
574
575 rc = 0;
576
577 out_free:
578 clp_free_block(lpcb);
579 out:
580 return rc;
581 }
582
clp_immediate_command(struct clp_req * req)583 static int clp_immediate_command(struct clp_req *req)
584 {
585 void __user *uptr;
586 unsigned long ilp;
587 int exists;
588
589 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
590 return -EINVAL;
591
592 uptr = (void __force __user *)(unsigned long) req->data_p;
593 if (req->cmd == 0) {
594 /* Command code 0: test for a specific processor */
595 exists = test_bit_inv(req->lps, &ilp);
596 return put_user(exists, (int __user *) uptr);
597 }
598 /* Command code 1: return bit mask of installed processors */
599 return put_user(ilp, (unsigned long __user *) uptr);
600 }
601
clp_misc_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)602 static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
603 unsigned long arg)
604 {
605 struct clp_req req;
606 void __user *argp;
607
608 if (cmd != CLP_SYNC)
609 return -EINVAL;
610
611 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
612 if (copy_from_user(&req, argp, sizeof(req)))
613 return -EFAULT;
614 if (req.r != 0)
615 return -EINVAL;
616 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
617 }
618
clp_misc_release(struct inode * inode,struct file * filp)619 static int clp_misc_release(struct inode *inode, struct file *filp)
620 {
621 return 0;
622 }
623
624 static const struct file_operations clp_misc_fops = {
625 .owner = THIS_MODULE,
626 .open = nonseekable_open,
627 .release = clp_misc_release,
628 .unlocked_ioctl = clp_misc_ioctl,
629 .compat_ioctl = clp_misc_ioctl,
630 .llseek = no_llseek,
631 };
632
633 static struct miscdevice clp_misc_device = {
634 .minor = MISC_DYNAMIC_MINOR,
635 .name = "clp",
636 .fops = &clp_misc_fops,
637 };
638
clp_misc_init(void)639 static int __init clp_misc_init(void)
640 {
641 return misc_register(&clp_misc_device);
642 }
643
644 device_initcall(clp_misc_init);
645
