1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <scsi/scsi_host.h>
25 #include <linux/ktime.h>
26 #include <linux/workqueue.h>
27
28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
29 #define CONFIG_SCSI_LPFC_DEBUG_FS
30 #endif
31
32 struct lpfc_sli2_slim;
33
34 #define ELX_MODEL_NAME_SIZE 80
35
36 #define LPFC_PCI_DEV_LP 0x1
37 #define LPFC_PCI_DEV_OC 0x2
38
39 #define LPFC_SLI_REV2 2
40 #define LPFC_SLI_REV3 3
41 #define LPFC_SLI_REV4 4
42
43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
45 requests */
46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
47 the NameServer before giving up. */
48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
51 cmnd for menlo needs nearly twice as for firmware
52 downloads using bsg */
53
54 #define LPFC_DEFAULT_XPSGL_SIZE 256
55 #define LPFC_MAX_SG_TABLESIZE 0xffff
56 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
57 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */
58 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
59 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
60 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */
61 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
62 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
63 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
64
65 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
66 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
67 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
68 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
69 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
70 #define LPFC_MIN_TGT_QDEPTH 10
71 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
72
73 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
74 collection. */
75 /*
76 * Following time intervals are used of adjusting SCSI device
77 * queue depths when there are driver resource error or Firmware
78 * resource error.
79 */
80 /* 1 Second */
81 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
82
83 /* Number of exchanges reserved for discovery to complete */
84 #define LPFC_DISC_IOCB_BUFF_COUNT 20
85
86 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
87 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
88
89 /* Error Attention event polling interval */
90 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
91
92 /* Define macros for 64 bit support */
93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
95 #define getPaddr(high, low) ((dma_addr_t)( \
96 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
97 /* Provide maximum configuration definitions. */
98 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
99 #define FC_MAX_ADPTMSG 64
100
101 #define MAX_HBAEVT 32
102 #define MAX_HBAS_NO_RESET 16
103
104 /* Number of MSI-X vectors the driver uses */
105 #define LPFC_MSIX_VECTORS 2
106
107 /* lpfc wait event data ready flag */
108 #define LPFC_DATA_READY 0 /* bit 0 */
109
110 /* queue dump line buffer size */
111 #define LPFC_LBUF_SZ 128
112
113 /* mailbox system shutdown options */
114 #define LPFC_MBX_NO_WAIT 0
115 #define LPFC_MBX_WAIT 1
116
117 enum lpfc_polling_flags {
118 ENABLE_FCP_RING_POLLING = 0x1,
119 DISABLE_FCP_RING_INT = 0x2
120 };
121
122 struct perf_prof {
123 uint16_t cmd_cpu[40];
124 uint16_t rsp_cpu[40];
125 uint16_t qh_cpu[40];
126 uint16_t wqidx[40];
127 };
128
129 /*
130 * Provide for FC4 TYPE x28 - NVME. The
131 * bit mask for FCP and NVME is 0x8 identically
132 * because they are 32 bit positions distance.
133 */
134 #define LPFC_FC4_TYPE_BITMASK 0x00000100
135
136 /* Provide DMA memory definitions the driver uses per port instance. */
137 struct lpfc_dmabuf {
138 struct list_head list;
139 void *virt; /* virtual address ptr */
140 dma_addr_t phys; /* mapped address */
141 uint32_t buffer_tag; /* used for tagged queue ring */
142 };
143
144 struct lpfc_nvmet_ctxbuf {
145 struct list_head list;
146 struct lpfc_async_xchg_ctx *context;
147 struct lpfc_iocbq *iocbq;
148 struct lpfc_sglq *sglq;
149 struct work_struct defer_work;
150 };
151
152 struct lpfc_dma_pool {
153 struct lpfc_dmabuf *elements;
154 uint32_t max_count;
155 uint32_t current_count;
156 };
157
158 struct hbq_dmabuf {
159 struct lpfc_dmabuf hbuf;
160 struct lpfc_dmabuf dbuf;
161 uint16_t total_size;
162 uint16_t bytes_recv;
163 uint32_t tag;
164 struct lpfc_cq_event cq_event;
165 unsigned long time_stamp;
166 void *context;
167 };
168
169 struct rqb_dmabuf {
170 struct lpfc_dmabuf hbuf;
171 struct lpfc_dmabuf dbuf;
172 uint16_t total_size;
173 uint16_t bytes_recv;
174 uint16_t idx;
175 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
176 struct lpfc_queue *drq; /* ptr to associated Data RQ */
177 };
178
179 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
180 #define MEM_PRI 0x100
181
182
183 /****************************************************************************/
184 /* Device VPD save area */
185 /****************************************************************************/
186 typedef struct lpfc_vpd {
187 uint32_t status; /* vpd status value */
188 uint32_t length; /* number of bytes actually returned */
189 struct {
190 uint32_t rsvd1; /* Revision numbers */
191 uint32_t biuRev;
192 uint32_t smRev;
193 uint32_t smFwRev;
194 uint32_t endecRev;
195 uint16_t rBit;
196 uint8_t fcphHigh;
197 uint8_t fcphLow;
198 uint8_t feaLevelHigh;
199 uint8_t feaLevelLow;
200 uint32_t postKernRev;
201 uint32_t opFwRev;
202 uint8_t opFwName[16];
203 uint32_t sli1FwRev;
204 uint8_t sli1FwName[16];
205 uint32_t sli2FwRev;
206 uint8_t sli2FwName[16];
207 } rev;
208 struct {
209 #ifdef __BIG_ENDIAN_BITFIELD
210 uint32_t rsvd3 :20; /* Reserved */
211 uint32_t rsvd2 : 3; /* Reserved */
212 uint32_t cbg : 1; /* Configure BlockGuard */
213 uint32_t cmv : 1; /* Configure Max VPIs */
214 uint32_t ccrp : 1; /* Config Command Ring Polling */
215 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
216 uint32_t chbs : 1; /* Cofigure Host Backing store */
217 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
218 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
219 uint32_t cmx : 1; /* Configure Max XRIs */
220 uint32_t cmr : 1; /* Configure Max RPIs */
221 #else /* __LITTLE_ENDIAN */
222 uint32_t cmr : 1; /* Configure Max RPIs */
223 uint32_t cmx : 1; /* Configure Max XRIs */
224 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
225 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
226 uint32_t chbs : 1; /* Cofigure Host Backing store */
227 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
228 uint32_t ccrp : 1; /* Config Command Ring Polling */
229 uint32_t cmv : 1; /* Configure Max VPIs */
230 uint32_t cbg : 1; /* Configure BlockGuard */
231 uint32_t rsvd2 : 3; /* Reserved */
232 uint32_t rsvd3 :20; /* Reserved */
233 #endif
234 } sli3Feat;
235 } lpfc_vpd_t;
236
237
238 /*
239 * lpfc stat counters
240 */
241 struct lpfc_stats {
242 /* Statistics for ELS commands */
243 uint32_t elsLogiCol;
244 uint32_t elsRetryExceeded;
245 uint32_t elsXmitRetry;
246 uint32_t elsDelayRetry;
247 uint32_t elsRcvDrop;
248 uint32_t elsRcvFrame;
249 uint32_t elsRcvRSCN;
250 uint32_t elsRcvRNID;
251 uint32_t elsRcvFARP;
252 uint32_t elsRcvFARPR;
253 uint32_t elsRcvFLOGI;
254 uint32_t elsRcvPLOGI;
255 uint32_t elsRcvADISC;
256 uint32_t elsRcvPDISC;
257 uint32_t elsRcvFAN;
258 uint32_t elsRcvLOGO;
259 uint32_t elsRcvPRLO;
260 uint32_t elsRcvPRLI;
261 uint32_t elsRcvLIRR;
262 uint32_t elsRcvRLS;
263 uint32_t elsRcvRPL;
264 uint32_t elsRcvRRQ;
265 uint32_t elsRcvRTV;
266 uint32_t elsRcvECHO;
267 uint32_t elsRcvLCB;
268 uint32_t elsRcvRDP;
269 uint32_t elsXmitFLOGI;
270 uint32_t elsXmitFDISC;
271 uint32_t elsXmitPLOGI;
272 uint32_t elsXmitPRLI;
273 uint32_t elsXmitADISC;
274 uint32_t elsXmitLOGO;
275 uint32_t elsXmitSCR;
276 uint32_t elsXmitRSCN;
277 uint32_t elsXmitRNID;
278 uint32_t elsXmitFARP;
279 uint32_t elsXmitFARPR;
280 uint32_t elsXmitACC;
281 uint32_t elsXmitLSRJT;
282
283 uint32_t frameRcvBcast;
284 uint32_t frameRcvMulti;
285 uint32_t strayXmitCmpl;
286 uint32_t frameXmitDelay;
287 uint32_t xriCmdCmpl;
288 uint32_t xriStatErr;
289 uint32_t LinkUp;
290 uint32_t LinkDown;
291 uint32_t LinkMultiEvent;
292 uint32_t NoRcvBuf;
293 uint32_t fcpCmd;
294 uint32_t fcpCmpl;
295 uint32_t fcpRspErr;
296 uint32_t fcpRemoteStop;
297 uint32_t fcpPortRjt;
298 uint32_t fcpPortBusy;
299 uint32_t fcpError;
300 uint32_t fcpLocalErr;
301 };
302
303 struct lpfc_hba;
304
305
306 enum discovery_state {
307 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
308 LPFC_VPORT_FAILED = 1, /* vport has failed */
309 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
310 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
311 LPFC_FDISC = 8, /* FDISC sent for vport */
312 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
313 * configured */
314 LPFC_NS_REG = 10, /* Register with NameServer */
315 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
316 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
317 * device authentication / discovery */
318 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
319 LPFC_VPORT_READY = 32,
320 };
321
322 enum hba_state {
323 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
324 LPFC_WARM_START = 1, /* HBA state after selective reset */
325 LPFC_INIT_START = 2, /* Initial state after board reset */
326 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
327 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
328 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
329 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
330 * CLEAR_LA */
331 LPFC_HBA_READY = 32,
332 LPFC_HBA_ERROR = -1
333 };
334
335 struct lpfc_trunk_link_state {
336 enum hba_state state;
337 uint8_t fault;
338 };
339
340 struct lpfc_trunk_link {
341 struct lpfc_trunk_link_state link0,
342 link1,
343 link2,
344 link3;
345 };
346
347 struct lpfc_vport {
348 struct lpfc_hba *phba;
349 struct list_head listentry;
350 uint8_t port_type;
351 #define LPFC_PHYSICAL_PORT 1
352 #define LPFC_NPIV_PORT 2
353 #define LPFC_FABRIC_PORT 3
354 enum discovery_state port_state;
355
356 uint16_t vpi;
357 uint16_t vfi;
358 uint8_t vpi_state;
359 #define LPFC_VPI_REGISTERED 0x1
360
361 uint32_t fc_flag; /* FC flags */
362 /* Several of these flags are HBA centric and should be moved to
363 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
364 */
365 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
366 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
367 #define FC_DISC_TMO 0x4 /* Discovery timer running */
368 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
369 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
370 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
371 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
372 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
373 #define FC_FABRIC 0x100 /* We are fabric attached */
374 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
375 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
376 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
377 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
378 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
379 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
380 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
381 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
382 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
383 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
384 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
385 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
386 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
387 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
388
389 uint32_t ct_flags;
390 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
391 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
392 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
393 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
394 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
395
396 struct list_head fc_nodes;
397
398 /* Keep counters for the number of entries in each list. */
399 uint16_t fc_plogi_cnt;
400 uint16_t fc_adisc_cnt;
401 uint16_t fc_reglogin_cnt;
402 uint16_t fc_prli_cnt;
403 uint16_t fc_unmap_cnt;
404 uint16_t fc_map_cnt;
405 uint16_t fc_npr_cnt;
406 uint16_t fc_unused_cnt;
407 struct serv_parm fc_sparam; /* buffer for our service parameters */
408
409 uint32_t fc_myDID; /* fibre channel S_ID */
410 uint32_t fc_prevDID; /* previous fibre channel S_ID */
411 struct lpfc_name fabric_portname;
412 struct lpfc_name fabric_nodename;
413
414 int32_t stopped; /* HBA has not been restarted since last ERATT */
415 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
416
417 uint32_t num_disc_nodes; /* in addition to hba_state */
418 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
419
420 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
421 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
422 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
423 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
424 struct lpfc_name fc_nodename; /* fc nodename */
425 struct lpfc_name fc_portname; /* fc portname */
426
427 struct lpfc_work_evt disc_timeout_evt;
428
429 struct timer_list fc_disctmo; /* Discovery rescue timer */
430 uint8_t fc_ns_retry; /* retries for fabric nameserver */
431 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
432
433 spinlock_t work_port_lock;
434 uint32_t work_port_events; /* Timeout to be handled */
435 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
436 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
437 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
438
439 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
440 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
441 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
442 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
443 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
444 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
445
446 struct timer_list els_tmofunc;
447 struct timer_list delayed_disc_tmo;
448
449 int unreg_vpi_cmpl;
450
451 uint8_t load_flag;
452 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
453 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
454 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
455 /* Vport Config Parameters */
456 uint32_t cfg_scan_down;
457 uint32_t cfg_lun_queue_depth;
458 uint32_t cfg_nodev_tmo;
459 uint32_t cfg_devloss_tmo;
460 uint32_t cfg_restrict_login;
461 uint32_t cfg_peer_port_login;
462 uint32_t cfg_fcp_class;
463 uint32_t cfg_use_adisc;
464 uint32_t cfg_discovery_threads;
465 uint32_t cfg_log_verbose;
466 uint32_t cfg_enable_fc4_type;
467 uint32_t cfg_max_luns;
468 uint32_t cfg_enable_da_id;
469 uint32_t cfg_max_scsicmpl_time;
470 uint32_t cfg_tgt_queue_depth;
471 uint32_t cfg_first_burst_size;
472 uint32_t dev_loss_tmo_changed;
473
474 struct fc_vport *fc_vport;
475
476 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
477 struct dentry *debug_disc_trc;
478 struct dentry *debug_nodelist;
479 struct dentry *debug_nvmestat;
480 struct dentry *debug_scsistat;
481 struct dentry *debug_ioktime;
482 struct dentry *debug_hdwqstat;
483 struct dentry *vport_debugfs_root;
484 struct lpfc_debugfs_trc *disc_trc;
485 atomic_t disc_trc_cnt;
486 #endif
487 uint8_t stat_data_enabled;
488 uint8_t stat_data_blocked;
489 struct list_head rcv_buffer_list;
490 unsigned long rcv_buffer_time_stamp;
491 uint32_t vport_flag;
492 #define STATIC_VPORT 1
493 #define FAWWPN_SET 2
494 #define FAWWPN_PARAM_CHG 4
495
496 uint16_t fdmi_num_disc;
497 uint32_t fdmi_hba_mask;
498 uint32_t fdmi_port_mask;
499
500 /* There is a single nvme instance per vport. */
501 struct nvme_fc_local_port *localport;
502 uint8_t nvmei_support; /* driver supports NVME Initiator */
503 uint32_t last_fcp_wqidx;
504 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */
505 };
506
507 struct hbq_s {
508 uint16_t entry_count; /* Current number of HBQ slots */
509 uint16_t buffer_count; /* Current number of buffers posted */
510 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
511 uint32_t hbqPutIdx; /* HBQ slot to use */
512 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
513 void *hbq_virt; /* Virtual ptr to this hbq */
514 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
515 /* Callback for HBQ buffer allocation */
516 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
517 /* Callback for HBQ buffer free */
518 void (*hbq_free_buffer) (struct lpfc_hba *,
519 struct hbq_dmabuf *);
520 };
521
522 /* this matches the position in the lpfc_hbq_defs array */
523 #define LPFC_ELS_HBQ 0
524 #define LPFC_MAX_HBQS 1
525
526 enum hba_temp_state {
527 HBA_NORMAL_TEMP,
528 HBA_OVER_TEMP
529 };
530
531 enum intr_type_t {
532 NONE = 0,
533 INTx,
534 MSI,
535 MSIX,
536 };
537
538 #define LPFC_CT_CTX_MAX 64
539 struct unsol_rcv_ct_ctx {
540 uint32_t ctxt_id;
541 uint32_t SID;
542 uint32_t valid;
543 #define UNSOL_INVALID 0
544 #define UNSOL_VALID 1
545 uint16_t oxid;
546 uint16_t rxid;
547 };
548
549 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
550 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
551 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
552 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
553 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
554 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
555 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
556 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
557 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */
558 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G
559
560 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64"
561
562 enum nemb_type {
563 nemb_mse = 1,
564 nemb_hbd
565 };
566
567 enum mbox_type {
568 mbox_rd = 1,
569 mbox_wr
570 };
571
572 enum dma_type {
573 dma_mbox = 1,
574 dma_ebuf
575 };
576
577 enum sta_type {
578 sta_pre_addr = 1,
579 sta_pos_addr
580 };
581
582 struct lpfc_mbox_ext_buf_ctx {
583 uint32_t state;
584 #define LPFC_BSG_MBOX_IDLE 0
585 #define LPFC_BSG_MBOX_HOST 1
586 #define LPFC_BSG_MBOX_PORT 2
587 #define LPFC_BSG_MBOX_DONE 3
588 #define LPFC_BSG_MBOX_ABTS 4
589 enum nemb_type nembType;
590 enum mbox_type mboxType;
591 uint32_t numBuf;
592 uint32_t mbxTag;
593 uint32_t seqNum;
594 struct lpfc_dmabuf *mbx_dmabuf;
595 struct list_head ext_dmabuf_list;
596 };
597
598 struct lpfc_epd_pool {
599 /* Expedite pool */
600 struct list_head list;
601 u32 count;
602 spinlock_t lock; /* lock for expedite pool */
603 };
604
605 enum ras_state {
606 INACTIVE,
607 REG_INPROGRESS,
608 ACTIVE
609 };
610
611 struct lpfc_ras_fwlog {
612 uint8_t *fwlog_buff;
613 uint32_t fw_buffcount; /* Buffer size posted to FW */
614 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */
615 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024)
616 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024)
617 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024)
618 uint32_t fw_loglevel; /* Log level set */
619 struct lpfc_dmabuf lwpd;
620 struct list_head fwlog_buff_list;
621
622 /* RAS support status on adapter */
623 bool ras_hwsupport; /* RAS Support available on HW or not */
624 bool ras_enabled; /* Ras Enabled for the function */
625 #define LPFC_RAS_DISABLE_LOGGING 0x00
626 #define LPFC_RAS_ENABLE_LOGGING 0x01
627 enum ras_state state; /* RAS logging running state */
628 };
629
630 #define DBG_LOG_STR_SZ 256
631 #define DBG_LOG_SZ 256
632
633 struct dbg_log_ent {
634 char log[DBG_LOG_STR_SZ];
635 u64 t_ns;
636 };
637
638 enum lpfc_irq_chann_mode {
639 /* Assign IRQs to all possible cpus that have hardware queues */
640 NORMAL_MODE,
641
642 /* Assign IRQs only to cpus on the same numa node as HBA */
643 NUMA_MODE,
644
645 /* Assign IRQs only on non-hyperthreaded CPUs. This is the
646 * same as normal_mode, but assign IRQS only on physical CPUs.
647 */
648 NHT_MODE,
649 };
650
651 struct lpfc_hba {
652 /* SCSI interface function jump table entries */
653 struct lpfc_io_buf * (*lpfc_get_scsi_buf)
654 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
655 struct scsi_cmnd *cmnd);
656 int (*lpfc_scsi_prep_dma_buf)
657 (struct lpfc_hba *, struct lpfc_io_buf *);
658 void (*lpfc_scsi_unprep_dma_buf)
659 (struct lpfc_hba *, struct lpfc_io_buf *);
660 void (*lpfc_release_scsi_buf)
661 (struct lpfc_hba *, struct lpfc_io_buf *);
662 void (*lpfc_rampdown_queue_depth)
663 (struct lpfc_hba *);
664 void (*lpfc_scsi_prep_cmnd)
665 (struct lpfc_vport *, struct lpfc_io_buf *,
666 struct lpfc_nodelist *);
667
668 /* IOCB interface function jump table entries */
669 int (*__lpfc_sli_issue_iocb)
670 (struct lpfc_hba *, uint32_t,
671 struct lpfc_iocbq *, uint32_t);
672 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
673 struct lpfc_iocbq *);
674 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
675 IOCB_t * (*lpfc_get_iocb_from_iocbq)
676 (struct lpfc_iocbq *);
677 void (*lpfc_scsi_cmd_iocb_cmpl)
678 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
679
680 /* MBOX interface function jump table entries */
681 int (*lpfc_sli_issue_mbox)
682 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
683
684 /* Slow-path IOCB process function jump table entries */
685 void (*lpfc_sli_handle_slow_ring_event)
686 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
687 uint32_t mask);
688
689 /* INIT device interface function jump table entries */
690 int (*lpfc_sli_hbq_to_firmware)
691 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
692 int (*lpfc_sli_brdrestart)
693 (struct lpfc_hba *);
694 int (*lpfc_sli_brdready)
695 (struct lpfc_hba *, uint32_t);
696 void (*lpfc_handle_eratt)
697 (struct lpfc_hba *);
698 void (*lpfc_stop_port)
699 (struct lpfc_hba *);
700 int (*lpfc_hba_init_link)
701 (struct lpfc_hba *, uint32_t);
702 int (*lpfc_hba_down_link)
703 (struct lpfc_hba *, uint32_t);
704 int (*lpfc_selective_reset)
705 (struct lpfc_hba *);
706
707 int (*lpfc_bg_scsi_prep_dma_buf)
708 (struct lpfc_hba *, struct lpfc_io_buf *);
709 /* Add new entries here */
710
711 /* expedite pool */
712 struct lpfc_epd_pool epd_pool;
713
714 /* SLI4 specific HBA data structure */
715 struct lpfc_sli4_hba sli4_hba;
716
717 struct workqueue_struct *wq;
718 struct delayed_work eq_delay_work;
719
720 #define LPFC_IDLE_STAT_DELAY 1000
721 struct delayed_work idle_stat_delay_work;
722
723 struct lpfc_sli sli;
724 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
725 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
726 uint32_t sli3_options; /* Mask of enabled SLI3 options */
727 #define LPFC_SLI3_HBQ_ENABLED 0x01
728 #define LPFC_SLI3_NPIV_ENABLED 0x02
729 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
730 #define LPFC_SLI3_CRP_ENABLED 0x08
731 #define LPFC_SLI3_BG_ENABLED 0x20
732 #define LPFC_SLI3_DSS_ENABLED 0x40
733 #define LPFC_SLI4_PERFH_ENABLED 0x80
734 #define LPFC_SLI4_PHWQ_ENABLED 0x100
735 uint32_t iocb_cmd_size;
736 uint32_t iocb_rsp_size;
737
738 struct lpfc_trunk_link trunk_link;
739 enum hba_state link_state;
740 uint32_t link_flag; /* link state flags */
741 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
742 /* This flag is set while issuing */
743 /* INIT_LINK mailbox command */
744 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
745 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
746 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
747 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */
748
749 uint32_t hba_flag; /* hba generic flags */
750 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
751 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
752 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
753 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
754 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
755 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */
756 #define ELS_XRI_ABORT_EVENT 0x40
757 #define ASYNC_EVENT 0x80
758 #define LINK_DISABLED 0x100 /* Link disabled by user */
759 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
760 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
761 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
762 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
763 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
764 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
765 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */
766 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
767 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
768 #define HBA_FORCED_LINK_SPEED 0x40000 /*
769 * Firmware supports Forced Link Speed
770 * capability
771 */
772 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */
773 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */
774
775 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
776 struct lpfc_dmabuf slim2p;
777
778 MAILBOX_t *mbox;
779 uint32_t *mbox_ext;
780 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
781 uint32_t ha_copy;
782 struct _PCB *pcb;
783 struct _IOCB *IOCBs;
784
785 struct lpfc_dmabuf hbqslimp;
786
787 uint16_t pci_cfg_value;
788
789 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
790
791 uint32_t fc_eventTag; /* event tag for link attention */
792 uint32_t link_events;
793
794 /* These fields used to be binfo */
795 uint32_t fc_pref_DID; /* preferred D_ID */
796 uint8_t fc_pref_ALPA; /* preferred AL_PA */
797 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
798 uint32_t fc_edtov; /* E_D_TOV timer value */
799 uint32_t fc_arbtov; /* ARB_TOV timer value */
800 uint32_t fc_ratov; /* R_A_TOV timer value */
801 uint32_t fc_rttov; /* R_T_TOV timer value */
802 uint32_t fc_altov; /* AL_TOV timer value */
803 uint32_t fc_crtov; /* C_R_TOV timer value */
804
805 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
806 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
807
808 uint32_t lmt;
809
810 uint32_t fc_topology; /* link topology, from LINK INIT */
811 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
812
813 struct lpfc_stats fc_stat;
814
815 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
816 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
817
818 uint8_t wwnn[8];
819 uint8_t wwpn[8];
820 uint32_t RandomData[7];
821 uint8_t fcp_embed_io;
822 uint8_t nvme_support; /* Firmware supports NVME */
823 uint8_t nvmet_support; /* driver supports NVMET */
824 #define LPFC_NVMET_MAX_PORTS 32
825 uint8_t mds_diags_support;
826 uint8_t bbcredit_support;
827 uint8_t enab_exp_wqcq_pages;
828 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */
829
830 /* HBA Config Parameters */
831 uint32_t cfg_ack0;
832 uint32_t cfg_xri_rebalancing;
833 uint32_t cfg_xpsgl;
834 uint32_t cfg_enable_npiv;
835 uint32_t cfg_enable_rrq;
836 uint32_t cfg_topology;
837 uint32_t cfg_link_speed;
838 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
839 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
840 uint32_t cfg_fcf_failover_policy;
841 uint32_t cfg_fcp_io_sched;
842 uint32_t cfg_ns_query;
843 uint32_t cfg_fcp2_no_tgt_reset;
844 uint32_t cfg_cr_delay;
845 uint32_t cfg_cr_count;
846 uint32_t cfg_multi_ring_support;
847 uint32_t cfg_multi_ring_rctl;
848 uint32_t cfg_multi_ring_type;
849 uint32_t cfg_poll;
850 uint32_t cfg_poll_tmo;
851 uint32_t cfg_task_mgmt_tmo;
852 uint32_t cfg_use_msi;
853 uint32_t cfg_auto_imax;
854 uint32_t cfg_fcp_imax;
855 uint32_t cfg_force_rscn;
856 uint32_t cfg_cq_poll_threshold;
857 uint32_t cfg_cq_max_proc_limit;
858 uint32_t cfg_fcp_cpu_map;
859 uint32_t cfg_fcp_mq_threshold;
860 uint32_t cfg_hdw_queue;
861 uint32_t cfg_irq_chann;
862 uint32_t cfg_suppress_rsp;
863 uint32_t cfg_nvme_oas;
864 uint32_t cfg_nvme_embed_cmd;
865 uint32_t cfg_nvmet_mrq_post;
866 uint32_t cfg_nvmet_mrq;
867 uint32_t cfg_enable_nvmet;
868 uint32_t cfg_nvme_enable_fb;
869 uint32_t cfg_nvmet_fb_size;
870 uint32_t cfg_total_seg_cnt;
871 uint32_t cfg_sg_seg_cnt;
872 uint32_t cfg_nvme_seg_cnt;
873 uint32_t cfg_scsi_seg_cnt;
874 uint32_t cfg_sg_dma_buf_size;
875 uint64_t cfg_soft_wwnn;
876 uint64_t cfg_soft_wwpn;
877 uint32_t cfg_hba_queue_depth;
878 uint32_t cfg_enable_hba_reset;
879 uint32_t cfg_enable_hba_heartbeat;
880 uint32_t cfg_fof;
881 uint32_t cfg_EnableXLane;
882 uint8_t cfg_oas_tgt_wwpn[8];
883 uint8_t cfg_oas_vpt_wwpn[8];
884 uint32_t cfg_oas_lun_state;
885 #define OAS_LUN_ENABLE 1
886 #define OAS_LUN_DISABLE 0
887 uint32_t cfg_oas_lun_status;
888 #define OAS_LUN_STATUS_EXISTS 0x01
889 uint32_t cfg_oas_flags;
890 #define OAS_FIND_ANY_VPORT 0x01
891 #define OAS_FIND_ANY_TARGET 0x02
892 #define OAS_LUN_VALID 0x04
893 uint32_t cfg_oas_priority;
894 uint32_t cfg_XLanePriority;
895 uint32_t cfg_enable_bg;
896 uint32_t cfg_prot_mask;
897 uint32_t cfg_prot_guard;
898 uint32_t cfg_hostmem_hgp;
899 uint32_t cfg_log_verbose;
900 uint32_t cfg_enable_fc4_type;
901 uint32_t cfg_aer_support;
902 uint32_t cfg_sriov_nr_virtfn;
903 uint32_t cfg_request_firmware_upgrade;
904 uint32_t cfg_suppress_link_up;
905 uint32_t cfg_rrq_xri_bitmap_sz;
906 uint32_t cfg_delay_discovery;
907 uint32_t cfg_sli_mode;
908 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
909 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
910 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
911 uint32_t cfg_fdmi_on;
912 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
913 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
914 uint32_t cfg_enable_SmartSAN;
915 uint32_t cfg_enable_mds_diags;
916 uint32_t cfg_ras_fwlog_level;
917 uint32_t cfg_ras_fwlog_buffsize;
918 uint32_t cfg_ras_fwlog_func;
919 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */
920 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */
921 #define LPFC_ENABLE_FCP 1
922 #define LPFC_ENABLE_NVME 2
923 #define LPFC_ENABLE_BOTH 3
924 uint32_t cfg_enable_pbde;
925 struct nvmet_fc_target_port *targetport;
926 lpfc_vpd_t vpd; /* vital product data */
927
928 struct pci_dev *pcidev;
929 struct list_head work_list;
930 uint32_t work_ha; /* Host Attention Bits for WT */
931 uint32_t work_ha_mask; /* HA Bits owned by WT */
932 uint32_t work_hs; /* HS stored in case of ERRAT */
933 uint32_t work_status[2]; /* Extra status from SLIM */
934
935 wait_queue_head_t work_waitq;
936 struct task_struct *worker_thread;
937 unsigned long data_flags;
938 uint32_t border_sge_num;
939
940 uint32_t hbq_in_use; /* HBQs in use flag */
941 uint32_t hbq_count; /* Count of configured HBQs */
942 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
943
944 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
945 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
946
947 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
948 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
949 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
950 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
951 PCI BAR0 */
952 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
953 PCI BAR2 */
954
955 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
956 PCI BAR0 with dual-ULP support */
957 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
958 PCI BAR2 with dual-ULP support */
959 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
960 PCI BAR4 with dual-ULP support */
961 #define PCI_64BIT_BAR0 0
962 #define PCI_64BIT_BAR2 2
963 #define PCI_64BIT_BAR4 4
964 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
965 void __iomem *HAregaddr; /* virtual address for host attn reg */
966 void __iomem *CAregaddr; /* virtual address for chip attn reg */
967 void __iomem *HSregaddr; /* virtual address for host status
968 reg */
969 void __iomem *HCregaddr; /* virtual address for host ctl reg */
970
971 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
972 struct lpfc_pgp *port_gp;
973 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
974 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
975
976 int brd_no; /* FC board number */
977 char SerialNumber[32]; /* adapter Serial Number */
978 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
979 char BIOSVersion[16]; /* Boot BIOS version */
980 char ModelDesc[256]; /* Model Description */
981 char ModelName[80]; /* Model Name */
982 char ProgramType[256]; /* Program Type */
983 char Port[20]; /* Port No */
984 uint8_t vpd_flag; /* VPD data flag */
985
986 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
987 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
988 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
989 #define VPD_PORT 0x8 /* valid vpd port data */
990 #define VPD_MASK 0xf /* mask for any vpd data */
991
992 uint8_t soft_wwn_enable;
993
994 struct timer_list fcp_poll_timer;
995 struct timer_list eratt_poll;
996 uint32_t eratt_poll_interval;
997
998 uint64_t bg_guard_err_cnt;
999 uint64_t bg_apptag_err_cnt;
1000 uint64_t bg_reftag_err_cnt;
1001
1002 /* fastpath list. */
1003 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
1004 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
1005 struct list_head lpfc_scsi_buf_list_get;
1006 struct list_head lpfc_scsi_buf_list_put;
1007 uint32_t total_scsi_bufs;
1008 struct list_head lpfc_iocb_list;
1009 uint32_t total_iocbq_bufs;
1010 struct list_head active_rrq_list;
1011 spinlock_t hbalock;
1012
1013 /* dma_mem_pools */
1014 struct dma_pool *lpfc_sg_dma_buf_pool;
1015 struct dma_pool *lpfc_mbuf_pool;
1016 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
1017 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
1018 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
1019 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
1020 struct dma_pool *lpfc_cmd_rsp_buf_pool;
1021 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
1022
1023 mempool_t *mbox_mem_pool;
1024 mempool_t *nlp_mem_pool;
1025 mempool_t *rrq_pool;
1026 mempool_t *active_rrq_pool;
1027
1028 struct fc_host_statistics link_stats;
1029 enum lpfc_irq_chann_mode irq_chann_mode;
1030 enum intr_type_t intr_type;
1031 uint32_t intr_mode;
1032 #define LPFC_INTR_ERROR 0xFFFFFFFF
1033 struct list_head port_list;
1034 spinlock_t port_list_lock; /* lock for port_list mutations */
1035 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
1036 uint16_t max_vpi; /* Maximum virtual nports */
1037 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */
1038 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */
1039 uint16_t max_vports; /*
1040 * For IOV HBAs max_vpi can change
1041 * after a reset. max_vports is max
1042 * number of vports present. This can
1043 * be greater than max_vpi.
1044 */
1045 uint16_t vpi_base;
1046 uint16_t vfi_base;
1047 unsigned long *vpi_bmask; /* vpi allocation table */
1048 uint16_t *vpi_ids;
1049 uint16_t vpi_count;
1050 struct list_head lpfc_vpi_blk_list;
1051
1052 /* Data structure used by fabric iocb scheduler */
1053 struct list_head fabric_iocb_list;
1054 atomic_t fabric_iocb_count;
1055 struct timer_list fabric_block_timer;
1056 unsigned long bit_flags;
1057 #define FABRIC_COMANDS_BLOCKED 0
1058 atomic_t num_rsrc_err;
1059 atomic_t num_cmd_success;
1060 unsigned long last_rsrc_error_time;
1061 unsigned long last_ramp_down_time;
1062 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1063 struct dentry *hba_debugfs_root;
1064 atomic_t debugfs_vport_count;
1065 struct dentry *debug_multixri_pools;
1066 struct dentry *debug_hbqinfo;
1067 struct dentry *debug_dumpHostSlim;
1068 struct dentry *debug_dumpHBASlim;
1069 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
1070 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1071 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
1072 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1073 struct dentry *debug_writeApp; /* inject write app_tag errors */
1074 struct dentry *debug_writeRef; /* inject write ref_tag errors */
1075 struct dentry *debug_readGuard; /* inject read guard_tag errors */
1076 struct dentry *debug_readApp; /* inject read app_tag errors */
1077 struct dentry *debug_readRef; /* inject read ref_tag errors */
1078
1079 struct dentry *debug_nvmeio_trc;
1080 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1081 struct dentry *debug_hdwqinfo;
1082 #ifdef LPFC_HDWQ_LOCK_STAT
1083 struct dentry *debug_lockstat;
1084 #endif
1085 struct dentry *debug_ras_log;
1086 atomic_t nvmeio_trc_cnt;
1087 uint32_t nvmeio_trc_size;
1088 uint32_t nvmeio_trc_output_idx;
1089
1090 /* T10 DIF error injection */
1091 uint32_t lpfc_injerr_wgrd_cnt;
1092 uint32_t lpfc_injerr_wapp_cnt;
1093 uint32_t lpfc_injerr_wref_cnt;
1094 uint32_t lpfc_injerr_rgrd_cnt;
1095 uint32_t lpfc_injerr_rapp_cnt;
1096 uint32_t lpfc_injerr_rref_cnt;
1097 uint32_t lpfc_injerr_nportid;
1098 struct lpfc_name lpfc_injerr_wwpn;
1099 sector_t lpfc_injerr_lba;
1100 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1101
1102 struct dentry *debug_slow_ring_trc;
1103 struct lpfc_debugfs_trc *slow_ring_trc;
1104 atomic_t slow_ring_trc_cnt;
1105 /* iDiag debugfs sub-directory */
1106 struct dentry *idiag_root;
1107 struct dentry *idiag_pci_cfg;
1108 struct dentry *idiag_bar_acc;
1109 struct dentry *idiag_que_info;
1110 struct dentry *idiag_que_acc;
1111 struct dentry *idiag_drb_acc;
1112 struct dentry *idiag_ctl_acc;
1113 struct dentry *idiag_mbx_acc;
1114 struct dentry *idiag_ext_acc;
1115 uint8_t lpfc_idiag_last_eq;
1116 #endif
1117 uint16_t nvmeio_trc_on;
1118
1119 /* Used for deferred freeing of ELS data buffers */
1120 struct list_head elsbuf;
1121 int elsbuf_cnt;
1122 int elsbuf_prev_cnt;
1123
1124 uint8_t temp_sensor_support;
1125 /* Fields used for heart beat. */
1126 unsigned long last_completion_time;
1127 unsigned long skipped_hb;
1128 struct timer_list hb_tmofunc;
1129 uint8_t hb_outstanding;
1130 struct timer_list rrq_tmr;
1131 enum hba_temp_state over_temp_state;
1132 /* ndlp reference management */
1133 spinlock_t ndlp_lock;
1134 /*
1135 * Following bit will be set for all buffer tags which are not
1136 * associated with any HBQ.
1137 */
1138 #define QUE_BUFTAG_BIT (1<<31)
1139 uint32_t buffer_tag_count;
1140 int wait_4_mlo_maint_flg;
1141 wait_queue_head_t wait_4_mlo_m_q;
1142 /* data structure used for latency data collection */
1143 #define LPFC_NO_BUCKET 0
1144 #define LPFC_LINEAR_BUCKET 1
1145 #define LPFC_POWER2_BUCKET 2
1146 uint8_t bucket_type;
1147 uint32_t bucket_base;
1148 uint32_t bucket_step;
1149
1150 /* Maximum number of events that can be outstanding at any time*/
1151 #define LPFC_MAX_EVT_COUNT 512
1152 atomic_t fast_event_count;
1153 uint32_t fcoe_eventtag;
1154 uint32_t fcoe_eventtag_at_fcf_scan;
1155 uint32_t fcoe_cvl_eventtag;
1156 uint32_t fcoe_cvl_eventtag_attn;
1157 struct lpfc_fcf fcf;
1158 uint8_t fc_map[3];
1159 uint8_t valid_vlan;
1160 uint16_t vlan_id;
1161 struct list_head fcf_conn_rec_list;
1162
1163 bool defer_flogi_acc_flag;
1164 uint16_t defer_flogi_acc_rx_id;
1165 uint16_t defer_flogi_acc_ox_id;
1166
1167 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1168 struct list_head ct_ev_waiters;
1169 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1170 uint32_t ctx_idx;
1171
1172 /* RAS Support */
1173 struct lpfc_ras_fwlog ras_fwlog;
1174
1175 uint8_t menlo_flag; /* menlo generic flags */
1176 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
1177 uint32_t iocb_cnt;
1178 uint32_t iocb_max;
1179 atomic_t sdev_cnt;
1180 spinlock_t devicelock; /* lock for luns list */
1181 mempool_t *device_data_mem_pool;
1182 struct list_head luns;
1183 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1184 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1185 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1186 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1187 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1188 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1189 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1190 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1191 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1192 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1193 uint16_t sfp_alarm;
1194 uint16_t sfp_warning;
1195
1196 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1197 uint16_t hdwqstat_on;
1198 #define LPFC_CHECK_OFF 0
1199 #define LPFC_CHECK_NVME_IO 1
1200 #define LPFC_CHECK_NVMET_IO 2
1201 #define LPFC_CHECK_SCSI_IO 4
1202 uint16_t ktime_on;
1203 uint64_t ktime_data_samples;
1204 uint64_t ktime_status_samples;
1205 uint64_t ktime_last_cmd;
1206 uint64_t ktime_seg1_total;
1207 uint64_t ktime_seg1_min;
1208 uint64_t ktime_seg1_max;
1209 uint64_t ktime_seg2_total;
1210 uint64_t ktime_seg2_min;
1211 uint64_t ktime_seg2_max;
1212 uint64_t ktime_seg3_total;
1213 uint64_t ktime_seg3_min;
1214 uint64_t ktime_seg3_max;
1215 uint64_t ktime_seg4_total;
1216 uint64_t ktime_seg4_min;
1217 uint64_t ktime_seg4_max;
1218 uint64_t ktime_seg5_total;
1219 uint64_t ktime_seg5_min;
1220 uint64_t ktime_seg5_max;
1221 uint64_t ktime_seg6_total;
1222 uint64_t ktime_seg6_min;
1223 uint64_t ktime_seg6_max;
1224 uint64_t ktime_seg7_total;
1225 uint64_t ktime_seg7_min;
1226 uint64_t ktime_seg7_max;
1227 uint64_t ktime_seg8_total;
1228 uint64_t ktime_seg8_min;
1229 uint64_t ktime_seg8_max;
1230 uint64_t ktime_seg9_total;
1231 uint64_t ktime_seg9_min;
1232 uint64_t ktime_seg9_max;
1233 uint64_t ktime_seg10_total;
1234 uint64_t ktime_seg10_min;
1235 uint64_t ktime_seg10_max;
1236 #endif
1237
1238 struct hlist_node cpuhp; /* used for cpuhp per hba callback */
1239 struct timer_list cpuhp_poll_timer;
1240 struct list_head poll_list; /* slowpath eq polling list */
1241 #define LPFC_POLL_HB 1 /* slowpath heartbeat */
1242 #define LPFC_POLL_FASTPATH 0 /* called from fastpath */
1243 #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */
1244
1245 char os_host_name[MAXHOSTNAMELEN];
1246
1247 /* SCSI host template information - for physical port */
1248 struct scsi_host_template port_template;
1249 /* SCSI host template information - for all vports */
1250 struct scsi_host_template vport_template;
1251 atomic_t dbg_log_idx;
1252 atomic_t dbg_log_cnt;
1253 atomic_t dbg_log_dmping;
1254 struct dbg_log_ent dbg_log[DBG_LOG_SZ];
1255 };
1256
1257 static inline struct Scsi_Host *
lpfc_shost_from_vport(struct lpfc_vport * vport)1258 lpfc_shost_from_vport(struct lpfc_vport *vport)
1259 {
1260 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1261 }
1262
1263 static inline void
lpfc_set_loopback_flag(struct lpfc_hba * phba)1264 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1265 {
1266 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1267 phba->link_flag |= LS_LOOPBACK_MODE;
1268 else
1269 phba->link_flag &= ~LS_LOOPBACK_MODE;
1270 }
1271
1272 static inline int
lpfc_is_link_up(struct lpfc_hba * phba)1273 lpfc_is_link_up(struct lpfc_hba *phba)
1274 {
1275 return phba->link_state == LPFC_LINK_UP ||
1276 phba->link_state == LPFC_CLEAR_LA ||
1277 phba->link_state == LPFC_HBA_READY;
1278 }
1279
1280 static inline void
lpfc_worker_wake_up(struct lpfc_hba * phba)1281 lpfc_worker_wake_up(struct lpfc_hba *phba)
1282 {
1283 /* Set the lpfc data pending flag */
1284 set_bit(LPFC_DATA_READY, &phba->data_flags);
1285
1286 /* Wake up worker thread */
1287 wake_up(&phba->work_waitq);
1288 return;
1289 }
1290
1291 static inline int
lpfc_readl(void __iomem * addr,uint32_t * data)1292 lpfc_readl(void __iomem *addr, uint32_t *data)
1293 {
1294 uint32_t temp;
1295 temp = readl(addr);
1296 if (temp == 0xffffffff)
1297 return -EIO;
1298 *data = temp;
1299 return 0;
1300 }
1301
1302 static inline int
lpfc_sli_read_hs(struct lpfc_hba * phba)1303 lpfc_sli_read_hs(struct lpfc_hba *phba)
1304 {
1305 /*
1306 * There was a link/board error. Read the status register to retrieve
1307 * the error event and process it.
1308 */
1309 phba->sli.slistat.err_attn_event++;
1310
1311 /* Save status info and check for unplug error */
1312 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1313 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1314 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1315 return -EIO;
1316 }
1317
1318 /* Clear chip Host Attention error bit */
1319 writel(HA_ERATT, phba->HAregaddr);
1320 readl(phba->HAregaddr); /* flush */
1321 phba->pport->stopped = 1;
1322
1323 return 0;
1324 }
1325
1326 static inline struct lpfc_sli_ring *
lpfc_phba_elsring(struct lpfc_hba * phba)1327 lpfc_phba_elsring(struct lpfc_hba *phba)
1328 {
1329 /* Return NULL if sli_rev has become invalid due to bad fw */
1330 if (phba->sli_rev != LPFC_SLI_REV4 &&
1331 phba->sli_rev != LPFC_SLI_REV3 &&
1332 phba->sli_rev != LPFC_SLI_REV2)
1333 return NULL;
1334
1335 if (phba->sli_rev == LPFC_SLI_REV4) {
1336 if (phba->sli4_hba.els_wq)
1337 return phba->sli4_hba.els_wq->pring;
1338 else
1339 return NULL;
1340 }
1341 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1342 }
1343
1344 /**
1345 * lpfc_next_online_cpu - Finds next online CPU on cpumask
1346 * @mask: Pointer to phba's cpumask member.
1347 * @start: starting cpu index
1348 *
1349 * Note: If no valid cpu found, then nr_cpu_ids is returned.
1350 *
1351 **/
1352 static inline unsigned int
lpfc_next_online_cpu(const struct cpumask * mask,unsigned int start)1353 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start)
1354 {
1355 unsigned int cpu_it;
1356
1357 for_each_cpu_wrap(cpu_it, mask, start) {
1358 if (cpu_online(cpu_it))
1359 break;
1360 }
1361
1362 return cpu_it;
1363 }
1364 /**
1365 * lpfc_sli4_mod_hba_eq_delay - update EQ delay
1366 * @phba: Pointer to HBA context object.
1367 * @q: The Event Queue to update.
1368 * @delay: The delay value (in us) to be written.
1369 *
1370 **/
1371 static inline void
lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba * phba,struct lpfc_queue * eq,u32 delay)1372 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
1373 u32 delay)
1374 {
1375 struct lpfc_register reg_data;
1376
1377 reg_data.word0 = 0;
1378 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id);
1379 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay);
1380 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
1381 eq->q_mode = delay;
1382 }
1383
1384
1385 /*
1386 * Macro that declares tables and a routine to perform enum type to
1387 * ascii string lookup.
1388 *
1389 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for
1390 * the enum to populate the table. Macro defines a routine (named
1391 * by caller) that will search all elements of the table for the key
1392 * and return the name string if found or "Unrecognized" if not found.
1393 */
1394 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \
1395 static struct { \
1396 enum enum_name value; \
1397 char *name; \
1398 } fc_##enum_name##_e2str_names[] = enum_init; \
1399 static const char *routine(enum enum_name table_key) \
1400 { \
1401 int i; \
1402 char *name = "Unrecognized"; \
1403 \
1404 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\
1405 if (fc_##enum_name##_e2str_names[i].value == table_key) {\
1406 name = fc_##enum_name##_e2str_names[i].name; \
1407 break; \
1408 } \
1409 } \
1410 return name; \
1411 }
1412
