1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * s3c24xx/s3c64xx SoC series Camera Interface (CAMIF) driver
4 *
5 * Copyright (C) 2012 Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
6 * Copyright (C) 2012 Tomasz Figa <tomasz.figa@gmail.com>
7 */
8
9 #ifndef CAMIF_CORE_H_
10 #define CAMIF_CORE_H_
11
12 #include <linux/io.h>
13 #include <linux/irq.h>
14 #include <linux/platform_device.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/types.h>
18 #include <linux/videodev2.h>
19
20 #include <media/media-entity.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-dev.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-mediabus.h>
25 #include <media/videobuf2-v4l2.h>
26 #include <media/drv-intf/s3c_camif.h>
27
28 #define S3C_CAMIF_DRIVER_NAME "s3c-camif"
29 #define CAMIF_REQ_BUFS_MIN 3
30 #define CAMIF_MAX_OUT_BUFS 4
31 #define CAMIF_MAX_PIX_WIDTH 4096
32 #define CAMIF_MAX_PIX_HEIGHT 4096
33 #define SCALER_MAX_RATIO 64
34 #define CAMIF_DEF_WIDTH 640
35 #define CAMIF_DEF_HEIGHT 480
36 #define CAMIF_STOP_TIMEOUT 1500 /* ms */
37
38 #define S3C244X_CAMIF_IP_REV 0x20 /* 2.0 */
39 #define S3C2450_CAMIF_IP_REV 0x30 /* 3.0 - not implemented, not tested */
40 #define S3C6400_CAMIF_IP_REV 0x31 /* 3.1 - not implemented, not tested */
41 #define S3C6410_CAMIF_IP_REV 0x32 /* 3.2 */
42
43 /* struct camif_vp::state */
44
45 #define ST_VP_PENDING (1 << 0)
46 #define ST_VP_RUNNING (1 << 1)
47 #define ST_VP_STREAMING (1 << 2)
48 #define ST_VP_SENSOR_STREAMING (1 << 3)
49
50 #define ST_VP_ABORTING (1 << 4)
51 #define ST_VP_OFF (1 << 5)
52 #define ST_VP_LASTIRQ (1 << 6)
53
54 #define ST_VP_CONFIG (1 << 8)
55
56 #define CAMIF_SD_PAD_SINK 0
57 #define CAMIF_SD_PAD_SOURCE_C 1
58 #define CAMIF_SD_PAD_SOURCE_P 2
59 #define CAMIF_SD_PADS_NUM 3
60
61 enum img_fmt {
62 IMG_FMT_RGB565 = 0x0010,
63 IMG_FMT_RGB666,
64 IMG_FMT_XRGB8888,
65 IMG_FMT_YCBCR420 = 0x0020,
66 IMG_FMT_YCRCB420,
67 IMG_FMT_YCBCR422P,
68 IMG_FMT_YCBYCR422 = 0x0040,
69 IMG_FMT_YCRYCB422,
70 IMG_FMT_CBYCRY422,
71 IMG_FMT_CRYCBY422,
72 };
73
74 #define img_fmt_is_rgb(x) ((x) & 0x10)
75 #define img_fmt_is_ycbcr(x) ((x) & 0x60)
76
77 /* Possible values for struct camif_fmt::flags */
78 #define FMT_FL_S3C24XX_CODEC (1 << 0)
79 #define FMT_FL_S3C24XX_PREVIEW (1 << 1)
80 #define FMT_FL_S3C64XX (1 << 2)
81
82 /**
83 * struct camif_fmt - pixel format description
84 * @fourcc: fourcc code for this format, 0 if not applicable
85 * @color: a corresponding enum img_fmt
86 * @colplanes: number of physically contiguous data planes
87 * @flags: indicate for which SoCs revisions this format is valid
88 * @depth: bits per pixel (total)
89 * @ybpp: number of luminance bytes per pixel
90 */
91 struct camif_fmt {
92 u32 fourcc;
93 u32 color;
94 u16 colplanes;
95 u16 flags;
96 u8 depth;
97 u8 ybpp;
98 };
99
100 /**
101 * struct camif_dma_offset - pixel offset information for DMA
102 * @initial: offset (in pixels) to first pixel
103 * @line: offset (in pixels) from end of line to start of next line
104 */
105 struct camif_dma_offset {
106 int initial;
107 int line;
108 };
109
110 /**
111 * struct camif_frame - source/target frame properties
112 * @f_width: full pixel width
113 * @f_height: full pixel height
114 * @rect: crop/composition rectangle
115 * @dma_offset: DMA offset configuration
116 */
117 struct camif_frame {
118 u16 f_width;
119 u16 f_height;
120 struct v4l2_rect rect;
121 struct camif_dma_offset dma_offset;
122 };
123
124 /* CAMIF clocks enumeration */
125 enum {
126 CLK_GATE,
127 CLK_CAM,
128 CLK_MAX_NUM,
129 };
130
131 struct vp_pix_limits {
132 u16 max_out_width;
133 u16 max_sc_out_width;
134 u16 out_width_align;
135 u16 max_height;
136 u8 min_out_width;
137 u16 out_hor_offset_align;
138 };
139
140 struct camif_pix_limits {
141 u16 win_hor_offset_align;
142 };
143
144 /**
145 * struct s3c_camif_variant - CAMIF variant structure
146 * @vp_pix_limits: pixel limits for the codec and preview paths
147 * @camif_pix_limits: pixel limits for the camera input interface
148 * @ip_revision: the CAMIF IP revision: 0x20 for s3c244x, 0x32 for s3c6410
149 */
150 struct s3c_camif_variant {
151 struct vp_pix_limits vp_pix_limits[2];
152 struct camif_pix_limits pix_limits;
153 u8 ip_revision;
154 u8 has_img_effect;
155 unsigned int vp_offset;
156 };
157
158 struct s3c_camif_drvdata {
159 const struct s3c_camif_variant *variant;
160 unsigned long bus_clk_freq;
161 };
162
163 struct camif_scaler {
164 u8 scaleup_h;
165 u8 scaleup_v;
166 u8 copy;
167 u8 enable;
168 u32 h_shift;
169 u32 v_shift;
170 u32 pre_h_ratio;
171 u32 pre_v_ratio;
172 u32 pre_dst_width;
173 u32 pre_dst_height;
174 u32 main_h_ratio;
175 u32 main_v_ratio;
176 };
177
178 struct camif_dev;
179
180 /**
181 * struct camif_vp - CAMIF data processing path structure (codec/preview)
182 * @irq_queue: interrupt handling waitqueue
183 * @irq: interrupt number for this data path
184 * @camif: pointer to the camif structure
185 * @pad: media pad for the video node
186 * @vdev video device
187 * @ctrl_handler: video node controls handler
188 * @owner: file handle that own the streaming
189 * @pending_buf_q: pending (empty) buffers queue head
190 * @active_buf_q: active (being written) buffers queue head
191 * @active_buffers: counter of buffer set up at the DMA engine
192 * @buf_index: identifier of a last empty buffer set up in H/W
193 * @frame_sequence: image frame sequence counter
194 * @reqbufs_count: the number of buffers requested
195 * @scaler: the scaler structure
196 * @out_fmt: pixel format at this video path output
197 * @payload: the output data frame payload size
198 * @out_frame: the output pixel resolution
199 * @state: the video path's state
200 * @fmt_flags: flags determining supported pixel formats
201 * @id: CAMIF id, 0 - codec, 1 - preview
202 * @rotation: current image rotation value
203 * @hflip: apply horizontal flip if set
204 * @vflip: apply vertical flip if set
205 */
206 struct camif_vp {
207 wait_queue_head_t irq_queue;
208 int irq;
209 struct camif_dev *camif;
210 struct media_pad pad;
211 struct video_device vdev;
212 struct v4l2_ctrl_handler ctrl_handler;
213 struct v4l2_fh *owner;
214 struct vb2_queue vb_queue;
215 struct list_head pending_buf_q;
216 struct list_head active_buf_q;
217 unsigned int active_buffers;
218 unsigned int buf_index;
219 unsigned int frame_sequence;
220 unsigned int reqbufs_count;
221 struct camif_scaler scaler;
222 const struct camif_fmt *out_fmt;
223 unsigned int payload;
224 struct camif_frame out_frame;
225 unsigned int state;
226 u16 fmt_flags;
227 u8 id;
228 u16 rotation;
229 u8 hflip;
230 u8 vflip;
231 unsigned int offset;
232 };
233
234 /* Video processing path enumeration */
235 #define VP_CODEC 0
236 #define VP_PREVIEW 1
237 #define CAMIF_VP_NUM 2
238
239 /**
240 * struct camif_dev - the CAMIF driver private data structure
241 * @media_dev: top-level media device structure
242 * @v4l2_dev: root v4l2_device
243 * @subdev: camera interface ("catchcam") subdev
244 * @mbus_fmt: camera input media bus format
245 * @camif_crop: camera input interface crop rectangle
246 * @pads: the camif subdev's media pads
247 * @stream_count: the camera interface streaming reference counter
248 * @sensor: image sensor data structure
249 * @m_pipeline: video entity pipeline description
250 * @ctrl_handler: v4l2 control handler (owned by @subdev)
251 * @test_pattern: test pattern controls
252 * @vp: video path (DMA) description (codec/preview)
253 * @variant: variant information for this device
254 * @dev: pointer to the CAMIF device struct
255 * @pdata: a copy of the driver's platform data
256 * @clock: clocks required for the CAMIF operation
257 * @lock: mutex protecting this data structure
258 * @slock: spinlock protecting CAMIF registers
259 * @io_base: start address of the mmapped CAMIF registers
260 */
261 struct camif_dev {
262 struct media_device media_dev;
263 struct v4l2_device v4l2_dev;
264 struct v4l2_subdev subdev;
265 struct v4l2_mbus_framefmt mbus_fmt;
266 struct v4l2_rect camif_crop;
267 struct media_pad pads[CAMIF_SD_PADS_NUM];
268 int stream_count;
269
270 struct cam_sensor {
271 struct v4l2_subdev *sd;
272 short power_count;
273 short stream_count;
274 } sensor;
275 struct media_pipeline *m_pipeline;
276
277 struct v4l2_ctrl_handler ctrl_handler;
278 struct v4l2_ctrl *ctrl_test_pattern;
279 struct {
280 struct v4l2_ctrl *ctrl_colorfx;
281 struct v4l2_ctrl *ctrl_colorfx_cbcr;
282 };
283 u8 test_pattern;
284 u8 colorfx;
285 u8 colorfx_cb;
286 u8 colorfx_cr;
287
288 struct camif_vp vp[CAMIF_VP_NUM];
289
290 const struct s3c_camif_variant *variant;
291 struct device *dev;
292 struct s3c_camif_plat_data pdata;
293 struct clk *clock[CLK_MAX_NUM];
294 struct mutex lock;
295 spinlock_t slock;
296 void __iomem *io_base;
297 };
298
299 /**
300 * struct camif_addr - Y/Cb/Cr DMA start address structure
301 * @y: luminance plane dma address
302 * @cb: Cb plane dma address
303 * @cr: Cr plane dma address
304 */
305 struct camif_addr {
306 dma_addr_t y;
307 dma_addr_t cb;
308 dma_addr_t cr;
309 };
310
311 /**
312 * struct camif_buffer - the camif video buffer structure
313 * @vb: vb2 buffer
314 * @list: list head for the buffers queue
315 * @paddr: DMA start addresses
316 * @index: an identifier of this buffer at the DMA engine
317 */
318 struct camif_buffer {
319 struct vb2_v4l2_buffer vb;
320 struct list_head list;
321 struct camif_addr paddr;
322 unsigned int index;
323 };
324
325 const struct camif_fmt *s3c_camif_find_format(struct camif_vp *vp,
326 const u32 *pixelformat, int index);
327 int s3c_camif_register_video_node(struct camif_dev *camif, int idx);
328 void s3c_camif_unregister_video_node(struct camif_dev *camif, int idx);
329 irqreturn_t s3c_camif_irq_handler(int irq, void *priv);
330 int s3c_camif_create_subdev(struct camif_dev *camif);
331 void s3c_camif_unregister_subdev(struct camif_dev *camif);
332 int s3c_camif_set_defaults(struct camif_dev *camif);
333 int s3c_camif_get_scaler_config(struct camif_vp *vp,
334 struct camif_scaler *scaler);
335
camif_active_queue_add(struct camif_vp * vp,struct camif_buffer * buf)336 static inline void camif_active_queue_add(struct camif_vp *vp,
337 struct camif_buffer *buf)
338 {
339 list_add_tail(&buf->list, &vp->active_buf_q);
340 vp->active_buffers++;
341 }
342
camif_active_queue_pop(struct camif_vp * vp)343 static inline struct camif_buffer *camif_active_queue_pop(
344 struct camif_vp *vp)
345 {
346 struct camif_buffer *buf = list_first_entry(&vp->active_buf_q,
347 struct camif_buffer, list);
348 list_del(&buf->list);
349 vp->active_buffers--;
350 return buf;
351 }
352
camif_active_queue_peek(struct camif_vp * vp,int index)353 static inline struct camif_buffer *camif_active_queue_peek(
354 struct camif_vp *vp, int index)
355 {
356 struct camif_buffer *tmp, *buf;
357
358 if (WARN_ON(list_empty(&vp->active_buf_q)))
359 return NULL;
360
361 list_for_each_entry_safe(buf, tmp, &vp->active_buf_q, list) {
362 if (buf->index == index) {
363 list_del(&buf->list);
364 vp->active_buffers--;
365 return buf;
366 }
367 }
368
369 return NULL;
370 }
371
camif_pending_queue_add(struct camif_vp * vp,struct camif_buffer * buf)372 static inline void camif_pending_queue_add(struct camif_vp *vp,
373 struct camif_buffer *buf)
374 {
375 list_add_tail(&buf->list, &vp->pending_buf_q);
376 }
377
camif_pending_queue_pop(struct camif_vp * vp)378 static inline struct camif_buffer *camif_pending_queue_pop(
379 struct camif_vp *vp)
380 {
381 struct camif_buffer *buf = list_first_entry(&vp->pending_buf_q,
382 struct camif_buffer, list);
383 list_del(&buf->list);
384 return buf;
385 }
386
387 #endif /* CAMIF_CORE_H_ */
388
