1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24 #ifndef __AMDGPU_TTM_H__
25 #define __AMDGPU_TTM_H__
26
27 #include <linux/dma-direction.h>
28 #include <drm/gpu_scheduler.h>
29 #include "amdgpu.h"
30
31 #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
32 #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
33 #define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
34
35 #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
36 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
37
38 #define AMDGPU_POISON 0xd0bed0be
39
40 struct amdgpu_vram_mgr {
41 struct ttm_resource_manager manager;
42 struct drm_mm mm;
43 spinlock_t lock;
44 atomic64_t usage;
45 atomic64_t vis_usage;
46 };
47
48 struct amdgpu_gtt_mgr {
49 struct ttm_resource_manager manager;
50 struct drm_mm mm;
51 spinlock_t lock;
52 atomic64_t available;
53 };
54
55 struct amdgpu_mman {
56 struct ttm_bo_device bdev;
57 bool mem_global_referenced;
58 bool initialized;
59 void __iomem *aper_base_kaddr;
60
61 #if defined(CONFIG_DEBUG_FS)
62 struct dentry *debugfs_entries[8];
63 #endif
64
65 /* buffer handling */
66 const struct amdgpu_buffer_funcs *buffer_funcs;
67 struct amdgpu_ring *buffer_funcs_ring;
68 bool buffer_funcs_enabled;
69
70 struct mutex gtt_window_lock;
71 /* Scheduler entity for buffer moves */
72 struct drm_sched_entity entity;
73
74 struct amdgpu_vram_mgr vram_mgr;
75 struct amdgpu_gtt_mgr gtt_mgr;
76
77 uint64_t stolen_vga_size;
78 struct amdgpu_bo *stolen_vga_memory;
79 uint64_t stolen_extended_size;
80 struct amdgpu_bo *stolen_extended_memory;
81 bool keep_stolen_vga_memory;
82
83 /* discovery */
84 uint8_t *discovery_bin;
85 uint32_t discovery_tmr_size;
86 struct amdgpu_bo *discovery_memory;
87
88 /* firmware VRAM reservation */
89 u64 fw_vram_usage_start_offset;
90 u64 fw_vram_usage_size;
91 struct amdgpu_bo *fw_vram_usage_reserved_bo;
92 void *fw_vram_usage_va;
93 };
94
95 struct amdgpu_copy_mem {
96 struct ttm_buffer_object *bo;
97 struct ttm_resource *mem;
98 unsigned long offset;
99 };
100
101 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
102 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
103 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
104 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
105
106 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
107 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man);
108 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man);
109
110 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
111 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
112 struct ttm_resource *mem,
113 struct device *dev,
114 enum dma_data_direction dir,
115 struct sg_table **sgt);
116 void amdgpu_vram_mgr_free_sgt(struct amdgpu_device *adev,
117 struct device *dev,
118 enum dma_data_direction dir,
119 struct sg_table *sgt);
120 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man);
121 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man);
122
123 int amdgpu_ttm_init(struct amdgpu_device *adev);
124 void amdgpu_ttm_late_init(struct amdgpu_device *adev);
125 void amdgpu_ttm_fini(struct amdgpu_device *adev);
126 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
127 bool enable);
128
129 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
130 uint64_t dst_offset, uint32_t byte_count,
131 struct dma_resv *resv,
132 struct dma_fence **fence, bool direct_submit,
133 bool vm_needs_flush, bool tmz);
134 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
135 const struct amdgpu_copy_mem *src,
136 const struct amdgpu_copy_mem *dst,
137 uint64_t size, bool tmz,
138 struct dma_resv *resv,
139 struct dma_fence **f);
140 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
141 uint32_t src_data,
142 struct dma_resv *resv,
143 struct dma_fence **fence);
144
145 int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma);
146 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
147 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
148 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
149
150 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
151 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
152 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
153 #else
amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo * bo,struct page ** pages)154 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
155 struct page **pages)
156 {
157 return -EPERM;
158 }
amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt * ttm)159 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
160 {
161 return false;
162 }
163 #endif
164
165 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
166 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
167 uint64_t addr, uint32_t flags);
168 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
169 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
170 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
171 unsigned long end);
172 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
173 int *last_invalidated);
174 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
175 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
176 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
177 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
178 struct ttm_resource *mem);
179
180 int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
181
182 #endif
183
