1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * smp.h: PowerPC-specific SMP code.
4 *
5 * Original was a copy of sparc smp.h. Now heavily modified
6 * for PPC.
7 *
8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
10 */
11
12 #ifndef _ASM_POWERPC_SMP_H
13 #define _ASM_POWERPC_SMP_H
14 #ifdef __KERNEL__
15
16 #include <linux/threads.h>
17 #include <linux/cpumask.h>
18 #include <linux/kernel.h>
19 #include <linux/irqreturn.h>
20
21 #ifndef __ASSEMBLY__
22
23 #ifdef CONFIG_PPC64
24 #include <asm/paca.h>
25 #endif
26 #include <asm/percpu.h>
27
28 extern int boot_cpuid;
29 extern int spinning_secondaries;
30 extern u32 *cpu_to_phys_id;
31 extern bool coregroup_enabled;
32
33 extern int cpu_to_chip_id(int cpu);
34
35 #ifdef CONFIG_SMP
36
37 struct smp_ops_t {
38 void (*message_pass)(int cpu, int msg);
39 #ifdef CONFIG_PPC_SMP_MUXED_IPI
40 void (*cause_ipi)(int cpu);
41 #endif
42 int (*cause_nmi_ipi)(int cpu);
43 void (*probe)(void);
44 int (*kick_cpu)(int nr);
45 int (*prepare_cpu)(int nr);
46 void (*setup_cpu)(int nr);
47 void (*bringup_done)(void);
48 void (*take_timebase)(void);
49 void (*give_timebase)(void);
50 int (*cpu_disable)(void);
51 void (*cpu_die)(unsigned int nr);
52 int (*cpu_bootable)(unsigned int nr);
53 #ifdef CONFIG_HOTPLUG_CPU
54 void (*cpu_offline_self)(void);
55 #endif
56 };
57
58 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
59 extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
60 extern void smp_send_debugger_break(void);
61 extern void start_secondary_resume(void);
62 extern void smp_generic_give_timebase(void);
63 extern void smp_generic_take_timebase(void);
64
65 DECLARE_PER_CPU(unsigned int, cpu_pvr);
66
67 #ifdef CONFIG_HOTPLUG_CPU
68 int generic_cpu_disable(void);
69 void generic_cpu_die(unsigned int cpu);
70 void generic_set_cpu_dead(unsigned int cpu);
71 void generic_set_cpu_up(unsigned int cpu);
72 int generic_check_cpu_restart(unsigned int cpu);
73 int is_cpu_dead(unsigned int cpu);
74 #else
75 #define generic_set_cpu_up(i) do { } while (0)
76 #endif
77
78 #ifdef CONFIG_PPC64
79 #define raw_smp_processor_id() (local_paca->paca_index)
80 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
81 #else
82 /* 32-bit */
83 extern int smp_hw_index[];
84
85 /*
86 * This is particularly ugly: it appears we can't actually get the definition
87 * of task_struct here, but we need access to the CPU this task is running on.
88 * Instead of using task_struct we're using _TASK_CPU which is extracted from
89 * asm-offsets.h by kbuild to get the current processor ID.
90 *
91 * This also needs to be safeguarded when building asm-offsets.s because at
92 * that time _TASK_CPU is not defined yet. It could have been guarded by
93 * _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing
94 * when building something else than asm-offsets.s
95 */
96 #ifdef GENERATING_ASM_OFFSETS
97 #define raw_smp_processor_id() (0)
98 #else
99 #define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TASK_CPU))
100 #endif
101 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
102
get_hard_smp_processor_id(int cpu)103 static inline int get_hard_smp_processor_id(int cpu)
104 {
105 return smp_hw_index[cpu];
106 }
107
set_hard_smp_processor_id(int cpu,int phys)108 static inline void set_hard_smp_processor_id(int cpu, int phys)
109 {
110 smp_hw_index[cpu] = phys;
111 }
112 #endif
113
114 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
115 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
116 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
117 DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
118
cpu_sibling_mask(int cpu)119 static inline struct cpumask *cpu_sibling_mask(int cpu)
120 {
121 return per_cpu(cpu_sibling_map, cpu);
122 }
123
cpu_l2_cache_mask(int cpu)124 static inline struct cpumask *cpu_l2_cache_mask(int cpu)
125 {
126 return per_cpu(cpu_l2_cache_map, cpu);
127 }
128
cpu_smallcore_mask(int cpu)129 static inline struct cpumask *cpu_smallcore_mask(int cpu)
130 {
131 return per_cpu(cpu_smallcore_map, cpu);
132 }
133
134 extern int cpu_to_core_id(int cpu);
135
136 extern bool has_big_cores;
137
138 #define cpu_smt_mask cpu_smt_mask
139 #ifdef CONFIG_SCHED_SMT
cpu_smt_mask(int cpu)140 static inline const struct cpumask *cpu_smt_mask(int cpu)
141 {
142 if (has_big_cores)
143 return per_cpu(cpu_smallcore_map, cpu);
144
145 return per_cpu(cpu_sibling_map, cpu);
146 }
147 #endif /* CONFIG_SCHED_SMT */
148
149 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
150 *
151 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
152 * in /proc/interrupts will be wrong!!! --Troy */
153 #define PPC_MSG_CALL_FUNCTION 0
154 #define PPC_MSG_RESCHEDULE 1
155 #define PPC_MSG_TICK_BROADCAST 2
156 #define PPC_MSG_NMI_IPI 3
157
158 /* This is only used by the powernv kernel */
159 #define PPC_MSG_RM_HOST_ACTION 4
160
161 #define NMI_IPI_ALL_OTHERS -2
162
163 #ifdef CONFIG_NMI_IPI
164 extern int smp_handle_nmi_ipi(struct pt_regs *regs);
165 #else
smp_handle_nmi_ipi(struct pt_regs * regs)166 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
167 #endif
168
169 /* for irq controllers that have dedicated ipis per message (4) */
170 extern int smp_request_message_ipi(int virq, int message);
171 extern const char *smp_ipi_name[];
172
173 /* for irq controllers with only a single ipi */
174 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
175 extern void smp_muxed_ipi_set_message(int cpu, int msg);
176 extern irqreturn_t smp_ipi_demux(void);
177 extern irqreturn_t smp_ipi_demux_relaxed(void);
178
179 void smp_init_pSeries(void);
180 void smp_init_cell(void);
181 void smp_setup_cpu_maps(void);
182
183 extern int __cpu_disable(void);
184 extern void __cpu_die(unsigned int cpu);
185
186 #else
187 /* for UP */
188 #define hard_smp_processor_id() get_hard_smp_processor_id(0)
189 #define smp_setup_cpu_maps()
inhibit_secondary_onlining(void)190 static inline void inhibit_secondary_onlining(void) {}
uninhibit_secondary_onlining(void)191 static inline void uninhibit_secondary_onlining(void) {}
cpu_sibling_mask(int cpu)192 static inline const struct cpumask *cpu_sibling_mask(int cpu)
193 {
194 return cpumask_of(cpu);
195 }
196
cpu_smallcore_mask(int cpu)197 static inline const struct cpumask *cpu_smallcore_mask(int cpu)
198 {
199 return cpumask_of(cpu);
200 }
201
202 #endif /* CONFIG_SMP */
203
204 #ifdef CONFIG_PPC64
get_hard_smp_processor_id(int cpu)205 static inline int get_hard_smp_processor_id(int cpu)
206 {
207 return paca_ptrs[cpu]->hw_cpu_id;
208 }
209
set_hard_smp_processor_id(int cpu,int phys)210 static inline void set_hard_smp_processor_id(int cpu, int phys)
211 {
212 paca_ptrs[cpu]->hw_cpu_id = phys;
213 }
214 #else
215 /* 32-bit */
216 #ifndef CONFIG_SMP
217 extern int boot_cpuid_phys;
get_hard_smp_processor_id(int cpu)218 static inline int get_hard_smp_processor_id(int cpu)
219 {
220 return boot_cpuid_phys;
221 }
222
set_hard_smp_processor_id(int cpu,int phys)223 static inline void set_hard_smp_processor_id(int cpu, int phys)
224 {
225 boot_cpuid_phys = phys;
226 }
227 #endif /* !CONFIG_SMP */
228 #endif /* !CONFIG_PPC64 */
229
230 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
231 extern void smp_release_cpus(void);
232 #else
smp_release_cpus(void)233 static inline void smp_release_cpus(void) { };
234 #endif
235
236 extern int smt_enabled_at_boot;
237
238 extern void smp_mpic_probe(void);
239 extern void smp_mpic_setup_cpu(int cpu);
240 extern int smp_generic_kick_cpu(int nr);
241 extern int smp_generic_cpu_bootable(unsigned int nr);
242
243
244 extern void smp_generic_give_timebase(void);
245 extern void smp_generic_take_timebase(void);
246
247 extern struct smp_ops_t *smp_ops;
248
249 extern void arch_send_call_function_single_ipi(int cpu);
250 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
251
252 /* Definitions relative to the secondary CPU spin loop
253 * and entry point. Not all of them exist on both 32 and
254 * 64-bit but defining them all here doesn't harm
255 */
256 extern void generic_secondary_smp_init(void);
257 extern unsigned long __secondary_hold_spinloop;
258 extern unsigned long __secondary_hold_acknowledge;
259 extern char __secondary_hold;
260 extern unsigned int booting_thread_hwid;
261
262 extern void __early_start(void);
263 #endif /* __ASSEMBLY__ */
264
265 #endif /* __KERNEL__ */
266 #endif /* _ASM_POWERPC_SMP_H) */
267
