1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Core IIO driver for Bosch BMA400 triaxial acceleration sensor.
4 *
5 * Copyright 2019 Dan Robertson <dan@dlrobertson.com>
6 *
7 * TODO:
8 * - Support for power management
9 * - Support events and interrupts
10 * - Create channel for step count
11 * - Create channel for sensor time
12 */
13
14 #include <linux/bitfield.h>
15 #include <linux/bitops.h>
16 #include <linux/device.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
23
24 #include <asm/unaligned.h>
25
26 #include <linux/iio/iio.h>
27 #include <linux/iio/buffer.h>
28 #include <linux/iio/events.h>
29 #include <linux/iio/sysfs.h>
30 #include <linux/iio/trigger.h>
31 #include <linux/iio/trigger_consumer.h>
32 #include <linux/iio/triggered_buffer.h>
33
34 #include "bma400.h"
35
36 /*
37 * The G-range selection may be one of 2g, 4g, 8, or 16g. The scale may
38 * be selected with the acc_range bits of the ACC_CONFIG1 register.
39 * NB: This buffer is populated in the device init.
40 */
41 static int bma400_scales[8];
42
43 /*
44 * See the ACC_CONFIG1 section of the datasheet.
45 * NB: This buffer is populated in the device init.
46 */
47 static int bma400_sample_freqs[14];
48
49 static const int bma400_osr_range[] = { 0, 1, 3 };
50
51 static int tap_reset_timeout[BMA400_TAP_TIM_LIST_LEN] = {
52 300000,
53 400000,
54 500000,
55 600000
56 };
57
58 static int tap_max2min_time[BMA400_TAP_TIM_LIST_LEN] = {
59 30000,
60 45000,
61 60000,
62 90000
63 };
64
65 static int double_tap2_min_delay[BMA400_TAP_TIM_LIST_LEN] = {
66 20000,
67 40000,
68 60000,
69 80000
70 };
71
72 /* See the ACC_CONFIG0 section of the datasheet */
73 enum bma400_power_mode {
74 POWER_MODE_SLEEP = 0x00,
75 POWER_MODE_LOW = 0x01,
76 POWER_MODE_NORMAL = 0x02,
77 POWER_MODE_INVALID = 0x03,
78 };
79
80 enum bma400_scan {
81 BMA400_ACCL_X,
82 BMA400_ACCL_Y,
83 BMA400_ACCL_Z,
84 BMA400_TEMP,
85 };
86
87 struct bma400_sample_freq {
88 int hz;
89 int uhz;
90 };
91
92 enum bma400_activity {
93 BMA400_STILL,
94 BMA400_WALKING,
95 BMA400_RUNNING,
96 };
97
98 struct bma400_data {
99 struct device *dev;
100 struct regmap *regmap;
101 struct regulator_bulk_data regulators[BMA400_NUM_REGULATORS];
102 struct mutex mutex; /* data register lock */
103 struct iio_mount_matrix orientation;
104 enum bma400_power_mode power_mode;
105 struct bma400_sample_freq sample_freq;
106 int oversampling_ratio;
107 int scale;
108 struct iio_trigger *trig;
109 int steps_enabled;
110 bool step_event_en;
111 bool activity_event_en;
112 unsigned int generic_event_en;
113 unsigned int tap_event_en_bitmask;
114 /* Correct time stamp alignment */
115 struct {
116 __le16 buff[3];
117 u8 temperature;
118 s64 ts __aligned(8);
119 } buffer __aligned(IIO_DMA_MINALIGN);
120 __le16 status;
121 __be16 duration;
122 };
123
bma400_is_writable_reg(struct device * dev,unsigned int reg)124 static bool bma400_is_writable_reg(struct device *dev, unsigned int reg)
125 {
126 switch (reg) {
127 case BMA400_CHIP_ID_REG:
128 case BMA400_ERR_REG:
129 case BMA400_STATUS_REG:
130 case BMA400_X_AXIS_LSB_REG:
131 case BMA400_X_AXIS_MSB_REG:
132 case BMA400_Y_AXIS_LSB_REG:
133 case BMA400_Y_AXIS_MSB_REG:
134 case BMA400_Z_AXIS_LSB_REG:
135 case BMA400_Z_AXIS_MSB_REG:
136 case BMA400_SENSOR_TIME0:
137 case BMA400_SENSOR_TIME1:
138 case BMA400_SENSOR_TIME2:
139 case BMA400_EVENT_REG:
140 case BMA400_INT_STAT0_REG:
141 case BMA400_INT_STAT1_REG:
142 case BMA400_INT_STAT2_REG:
143 case BMA400_TEMP_DATA_REG:
144 case BMA400_FIFO_LENGTH0_REG:
145 case BMA400_FIFO_LENGTH1_REG:
146 case BMA400_FIFO_DATA_REG:
147 case BMA400_STEP_CNT0_REG:
148 case BMA400_STEP_CNT1_REG:
149 case BMA400_STEP_CNT3_REG:
150 case BMA400_STEP_STAT_REG:
151 return false;
152 default:
153 return true;
154 }
155 }
156
bma400_is_volatile_reg(struct device * dev,unsigned int reg)157 static bool bma400_is_volatile_reg(struct device *dev, unsigned int reg)
158 {
159 switch (reg) {
160 case BMA400_ERR_REG:
161 case BMA400_STATUS_REG:
162 case BMA400_X_AXIS_LSB_REG:
163 case BMA400_X_AXIS_MSB_REG:
164 case BMA400_Y_AXIS_LSB_REG:
165 case BMA400_Y_AXIS_MSB_REG:
166 case BMA400_Z_AXIS_LSB_REG:
167 case BMA400_Z_AXIS_MSB_REG:
168 case BMA400_SENSOR_TIME0:
169 case BMA400_SENSOR_TIME1:
170 case BMA400_SENSOR_TIME2:
171 case BMA400_EVENT_REG:
172 case BMA400_INT_STAT0_REG:
173 case BMA400_INT_STAT1_REG:
174 case BMA400_INT_STAT2_REG:
175 case BMA400_TEMP_DATA_REG:
176 case BMA400_FIFO_LENGTH0_REG:
177 case BMA400_FIFO_LENGTH1_REG:
178 case BMA400_FIFO_DATA_REG:
179 case BMA400_STEP_CNT0_REG:
180 case BMA400_STEP_CNT1_REG:
181 case BMA400_STEP_CNT3_REG:
182 case BMA400_STEP_STAT_REG:
183 return true;
184 default:
185 return false;
186 }
187 }
188
189 const struct regmap_config bma400_regmap_config = {
190 .reg_bits = 8,
191 .val_bits = 8,
192 .max_register = BMA400_CMD_REG,
193 .cache_type = REGCACHE_RBTREE,
194 .writeable_reg = bma400_is_writable_reg,
195 .volatile_reg = bma400_is_volatile_reg,
196 };
197 EXPORT_SYMBOL_NS(bma400_regmap_config, IIO_BMA400);
198
199 static const struct iio_mount_matrix *
bma400_accel_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)200 bma400_accel_get_mount_matrix(const struct iio_dev *indio_dev,
201 const struct iio_chan_spec *chan)
202 {
203 struct bma400_data *data = iio_priv(indio_dev);
204
205 return &data->orientation;
206 }
207
208 static const struct iio_chan_spec_ext_info bma400_ext_info[] = {
209 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma400_accel_get_mount_matrix),
210 { }
211 };
212
213 static const struct iio_event_spec bma400_step_detect_event = {
214 .type = IIO_EV_TYPE_CHANGE,
215 .dir = IIO_EV_DIR_NONE,
216 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
217 };
218
219 static const struct iio_event_spec bma400_activity_event = {
220 .type = IIO_EV_TYPE_CHANGE,
221 .dir = IIO_EV_DIR_NONE,
222 .mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE),
223 };
224
225 static const struct iio_event_spec bma400_accel_event[] = {
226 {
227 .type = IIO_EV_TYPE_MAG,
228 .dir = IIO_EV_DIR_FALLING,
229 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
230 BIT(IIO_EV_INFO_PERIOD) |
231 BIT(IIO_EV_INFO_HYSTERESIS) |
232 BIT(IIO_EV_INFO_ENABLE),
233 },
234 {
235 .type = IIO_EV_TYPE_MAG,
236 .dir = IIO_EV_DIR_RISING,
237 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
238 BIT(IIO_EV_INFO_PERIOD) |
239 BIT(IIO_EV_INFO_HYSTERESIS) |
240 BIT(IIO_EV_INFO_ENABLE),
241 },
242 {
243 .type = IIO_EV_TYPE_GESTURE,
244 .dir = IIO_EV_DIR_SINGLETAP,
245 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
246 BIT(IIO_EV_INFO_ENABLE) |
247 BIT(IIO_EV_INFO_RESET_TIMEOUT),
248 },
249 {
250 .type = IIO_EV_TYPE_GESTURE,
251 .dir = IIO_EV_DIR_DOUBLETAP,
252 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
253 BIT(IIO_EV_INFO_ENABLE) |
254 BIT(IIO_EV_INFO_RESET_TIMEOUT) |
255 BIT(IIO_EV_INFO_TAP2_MIN_DELAY),
256 },
257 };
258
usec_to_tapreg_raw(int usec,const int * time_list)259 static int usec_to_tapreg_raw(int usec, const int *time_list)
260 {
261 int index;
262
263 for (index = 0; index < BMA400_TAP_TIM_LIST_LEN; index++) {
264 if (usec == time_list[index])
265 return index;
266 }
267 return -EINVAL;
268 }
269
in_accel_gesture_tap_maxtomin_time_show(struct device * dev,struct device_attribute * attr,char * buf)270 static ssize_t in_accel_gesture_tap_maxtomin_time_show(struct device *dev,
271 struct device_attribute *attr,
272 char *buf)
273 {
274 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
275 struct bma400_data *data = iio_priv(indio_dev);
276 int ret, reg_val, raw, vals[2];
277
278 ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1, ®_val);
279 if (ret)
280 return ret;
281
282 raw = FIELD_GET(BMA400_TAP_TICSTH_MSK, reg_val);
283 vals[0] = 0;
284 vals[1] = tap_max2min_time[raw];
285
286 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
287 }
288
in_accel_gesture_tap_maxtomin_time_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)289 static ssize_t in_accel_gesture_tap_maxtomin_time_store(struct device *dev,
290 struct device_attribute *attr,
291 const char *buf, size_t len)
292 {
293 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
294 struct bma400_data *data = iio_priv(indio_dev);
295 int ret, val_int, val_fract, raw;
296
297 ret = iio_str_to_fixpoint(buf, 100000, &val_int, &val_fract);
298 if (ret)
299 return ret;
300
301 raw = usec_to_tapreg_raw(val_fract, tap_max2min_time);
302 if (raw < 0)
303 return -EINVAL;
304
305 ret = regmap_update_bits(data->regmap, BMA400_TAP_CONFIG1,
306 BMA400_TAP_TICSTH_MSK,
307 FIELD_PREP(BMA400_TAP_TICSTH_MSK, raw));
308 if (ret)
309 return ret;
310
311 return len;
312 }
313
314 static IIO_DEVICE_ATTR_RW(in_accel_gesture_tap_maxtomin_time, 0);
315
316 /*
317 * Tap interrupts works with 200 Hz input data rate and the time based tap
318 * controls are in the terms of data samples so the below calculation is
319 * used to convert the configuration values into seconds.
320 * e.g.:
321 * 60 data samples * 0.005 ms = 0.3 seconds.
322 * 80 data samples * 0.005 ms = 0.4 seconds.
323 */
324
325 /* quiet configuration values in seconds */
326 static IIO_CONST_ATTR(in_accel_gesture_tap_reset_timeout_available,
327 "0.3 0.4 0.5 0.6");
328
329 /* tics_th configuration values in seconds */
330 static IIO_CONST_ATTR(in_accel_gesture_tap_maxtomin_time_available,
331 "0.03 0.045 0.06 0.09");
332
333 /* quiet_dt configuration values in seconds */
334 static IIO_CONST_ATTR(in_accel_gesture_doubletap_tap2_min_delay_available,
335 "0.02 0.04 0.06 0.08");
336
337 /* List of sensitivity values available to configure tap interrupts */
338 static IIO_CONST_ATTR(in_accel_gesture_tap_value_available, "0 1 2 3 4 5 6 7");
339
340 static struct attribute *bma400_event_attributes[] = {
341 &iio_const_attr_in_accel_gesture_tap_value_available.dev_attr.attr,
342 &iio_const_attr_in_accel_gesture_tap_reset_timeout_available.dev_attr.attr,
343 &iio_const_attr_in_accel_gesture_tap_maxtomin_time_available.dev_attr.attr,
344 &iio_const_attr_in_accel_gesture_doubletap_tap2_min_delay_available.dev_attr.attr,
345 &iio_dev_attr_in_accel_gesture_tap_maxtomin_time.dev_attr.attr,
346 NULL
347 };
348
349 static const struct attribute_group bma400_event_attribute_group = {
350 .attrs = bma400_event_attributes,
351 };
352
353 #define BMA400_ACC_CHANNEL(_index, _axis) { \
354 .type = IIO_ACCEL, \
355 .modified = 1, \
356 .channel2 = IIO_MOD_##_axis, \
357 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
358 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
359 BIT(IIO_CHAN_INFO_SCALE) | \
360 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
361 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
362 BIT(IIO_CHAN_INFO_SCALE) | \
363 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
364 .ext_info = bma400_ext_info, \
365 .scan_index = _index, \
366 .scan_type = { \
367 .sign = 's', \
368 .realbits = 12, \
369 .storagebits = 16, \
370 .endianness = IIO_LE, \
371 }, \
372 .event_spec = bma400_accel_event, \
373 .num_event_specs = ARRAY_SIZE(bma400_accel_event) \
374 }
375
376 #define BMA400_ACTIVITY_CHANNEL(_chan2) { \
377 .type = IIO_ACTIVITY, \
378 .modified = 1, \
379 .channel2 = _chan2, \
380 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
381 .scan_index = -1, /* No buffer support */ \
382 .event_spec = &bma400_activity_event, \
383 .num_event_specs = 1, \
384 }
385
386 static const struct iio_chan_spec bma400_channels[] = {
387 BMA400_ACC_CHANNEL(0, X),
388 BMA400_ACC_CHANNEL(1, Y),
389 BMA400_ACC_CHANNEL(2, Z),
390 {
391 .type = IIO_TEMP,
392 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
393 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ),
394 .scan_index = 3,
395 .scan_type = {
396 .sign = 's',
397 .realbits = 8,
398 .storagebits = 8,
399 .endianness = IIO_LE,
400 },
401 },
402 {
403 .type = IIO_STEPS,
404 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
405 BIT(IIO_CHAN_INFO_ENABLE),
406 .scan_index = -1, /* No buffer support */
407 .event_spec = &bma400_step_detect_event,
408 .num_event_specs = 1,
409 },
410 BMA400_ACTIVITY_CHANNEL(IIO_MOD_STILL),
411 BMA400_ACTIVITY_CHANNEL(IIO_MOD_WALKING),
412 BMA400_ACTIVITY_CHANNEL(IIO_MOD_RUNNING),
413 IIO_CHAN_SOFT_TIMESTAMP(4),
414 };
415
bma400_get_temp_reg(struct bma400_data * data,int * val,int * val2)416 static int bma400_get_temp_reg(struct bma400_data *data, int *val, int *val2)
417 {
418 unsigned int raw_temp;
419 int host_temp;
420 int ret;
421
422 if (data->power_mode == POWER_MODE_SLEEP)
423 return -EBUSY;
424
425 ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &raw_temp);
426 if (ret)
427 return ret;
428
429 host_temp = sign_extend32(raw_temp, 7);
430 /*
431 * The formula for the TEMP_DATA register in the datasheet
432 * is: x * 0.5 + 23
433 */
434 *val = (host_temp >> 1) + 23;
435 *val2 = (host_temp & 0x1) * 500000;
436 return IIO_VAL_INT_PLUS_MICRO;
437 }
438
bma400_get_accel_reg(struct bma400_data * data,const struct iio_chan_spec * chan,int * val)439 static int bma400_get_accel_reg(struct bma400_data *data,
440 const struct iio_chan_spec *chan,
441 int *val)
442 {
443 __le16 raw_accel;
444 int lsb_reg;
445 int ret;
446
447 if (data->power_mode == POWER_MODE_SLEEP)
448 return -EBUSY;
449
450 switch (chan->channel2) {
451 case IIO_MOD_X:
452 lsb_reg = BMA400_X_AXIS_LSB_REG;
453 break;
454 case IIO_MOD_Y:
455 lsb_reg = BMA400_Y_AXIS_LSB_REG;
456 break;
457 case IIO_MOD_Z:
458 lsb_reg = BMA400_Z_AXIS_LSB_REG;
459 break;
460 default:
461 dev_err(data->dev, "invalid axis channel modifier\n");
462 return -EINVAL;
463 }
464
465 /* bulk read two registers, with the base being the LSB register */
466 ret = regmap_bulk_read(data->regmap, lsb_reg, &raw_accel,
467 sizeof(raw_accel));
468 if (ret)
469 return ret;
470
471 *val = sign_extend32(le16_to_cpu(raw_accel), 11);
472 return IIO_VAL_INT;
473 }
474
bma400_output_data_rate_from_raw(int raw,unsigned int * val,unsigned int * val2)475 static void bma400_output_data_rate_from_raw(int raw, unsigned int *val,
476 unsigned int *val2)
477 {
478 *val = BMA400_ACC_ODR_MAX_HZ >> (BMA400_ACC_ODR_MAX_RAW - raw);
479 if (raw > BMA400_ACC_ODR_MIN_RAW)
480 *val2 = 0;
481 else
482 *val2 = 500000;
483 }
484
bma400_get_accel_output_data_rate(struct bma400_data * data)485 static int bma400_get_accel_output_data_rate(struct bma400_data *data)
486 {
487 unsigned int val;
488 unsigned int odr;
489 int ret;
490
491 switch (data->power_mode) {
492 case POWER_MODE_LOW:
493 /*
494 * Runs at a fixed rate in low-power mode. See section 4.3
495 * in the datasheet.
496 */
497 bma400_output_data_rate_from_raw(BMA400_ACC_ODR_LP_RAW,
498 &data->sample_freq.hz,
499 &data->sample_freq.uhz);
500 return 0;
501 case POWER_MODE_NORMAL:
502 /*
503 * In normal mode the ODR can be found in the ACC_CONFIG1
504 * register.
505 */
506 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
507 if (ret)
508 goto error;
509
510 odr = val & BMA400_ACC_ODR_MASK;
511 if (odr < BMA400_ACC_ODR_MIN_RAW ||
512 odr > BMA400_ACC_ODR_MAX_RAW) {
513 ret = -EINVAL;
514 goto error;
515 }
516
517 bma400_output_data_rate_from_raw(odr, &data->sample_freq.hz,
518 &data->sample_freq.uhz);
519 return 0;
520 case POWER_MODE_SLEEP:
521 data->sample_freq.hz = 0;
522 data->sample_freq.uhz = 0;
523 return 0;
524 default:
525 ret = 0;
526 goto error;
527 }
528 error:
529 data->sample_freq.hz = -1;
530 data->sample_freq.uhz = -1;
531 return ret;
532 }
533
bma400_set_accel_output_data_rate(struct bma400_data * data,int hz,int uhz)534 static int bma400_set_accel_output_data_rate(struct bma400_data *data,
535 int hz, int uhz)
536 {
537 unsigned int idx;
538 unsigned int odr;
539 unsigned int val;
540 int ret;
541
542 if (hz >= BMA400_ACC_ODR_MIN_WHOLE_HZ) {
543 if (uhz || hz > BMA400_ACC_ODR_MAX_HZ)
544 return -EINVAL;
545
546 /* Note this works because MIN_WHOLE_HZ is odd */
547 idx = __ffs(hz);
548
549 if (hz >> idx != BMA400_ACC_ODR_MIN_WHOLE_HZ)
550 return -EINVAL;
551
552 idx += BMA400_ACC_ODR_MIN_RAW + 1;
553 } else if (hz == BMA400_ACC_ODR_MIN_HZ && uhz == 500000) {
554 idx = BMA400_ACC_ODR_MIN_RAW;
555 } else {
556 return -EINVAL;
557 }
558
559 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
560 if (ret)
561 return ret;
562
563 /* preserve the range and normal mode osr */
564 odr = (~BMA400_ACC_ODR_MASK & val) | idx;
565
566 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG, odr);
567 if (ret)
568 return ret;
569
570 bma400_output_data_rate_from_raw(idx, &data->sample_freq.hz,
571 &data->sample_freq.uhz);
572 return 0;
573 }
574
bma400_get_accel_oversampling_ratio(struct bma400_data * data)575 static int bma400_get_accel_oversampling_ratio(struct bma400_data *data)
576 {
577 unsigned int val;
578 unsigned int osr;
579 int ret;
580
581 /*
582 * The oversampling ratio is stored in a different register
583 * based on the power-mode. In normal mode the OSR is stored
584 * in ACC_CONFIG1. In low-power mode it is stored in
585 * ACC_CONFIG0.
586 */
587 switch (data->power_mode) {
588 case POWER_MODE_LOW:
589 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val);
590 if (ret) {
591 data->oversampling_ratio = -1;
592 return ret;
593 }
594
595 osr = (val & BMA400_LP_OSR_MASK) >> BMA400_LP_OSR_SHIFT;
596
597 data->oversampling_ratio = osr;
598 return 0;
599 case POWER_MODE_NORMAL:
600 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
601 if (ret) {
602 data->oversampling_ratio = -1;
603 return ret;
604 }
605
606 osr = (val & BMA400_NP_OSR_MASK) >> BMA400_NP_OSR_SHIFT;
607
608 data->oversampling_ratio = osr;
609 return 0;
610 case POWER_MODE_SLEEP:
611 data->oversampling_ratio = 0;
612 return 0;
613 default:
614 data->oversampling_ratio = -1;
615 return -EINVAL;
616 }
617 }
618
bma400_set_accel_oversampling_ratio(struct bma400_data * data,int val)619 static int bma400_set_accel_oversampling_ratio(struct bma400_data *data,
620 int val)
621 {
622 unsigned int acc_config;
623 int ret;
624
625 if (val & ~BMA400_TWO_BITS_MASK)
626 return -EINVAL;
627
628 /*
629 * The oversampling ratio is stored in a different register
630 * based on the power-mode.
631 */
632 switch (data->power_mode) {
633 case POWER_MODE_LOW:
634 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG,
635 &acc_config);
636 if (ret)
637 return ret;
638
639 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
640 (acc_config & ~BMA400_LP_OSR_MASK) |
641 (val << BMA400_LP_OSR_SHIFT));
642 if (ret) {
643 dev_err(data->dev, "Failed to write out OSR\n");
644 return ret;
645 }
646
647 data->oversampling_ratio = val;
648 return 0;
649 case POWER_MODE_NORMAL:
650 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG,
651 &acc_config);
652 if (ret)
653 return ret;
654
655 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
656 (acc_config & ~BMA400_NP_OSR_MASK) |
657 (val << BMA400_NP_OSR_SHIFT));
658 if (ret) {
659 dev_err(data->dev, "Failed to write out OSR\n");
660 return ret;
661 }
662
663 data->oversampling_ratio = val;
664 return 0;
665 default:
666 return -EINVAL;
667 }
668 return ret;
669 }
670
bma400_accel_scale_to_raw(struct bma400_data * data,unsigned int val)671 static int bma400_accel_scale_to_raw(struct bma400_data *data,
672 unsigned int val)
673 {
674 int raw;
675
676 if (val == 0)
677 return -EINVAL;
678
679 /* Note this works because BMA400_SCALE_MIN is odd */
680 raw = __ffs(val);
681
682 if (val >> raw != BMA400_SCALE_MIN)
683 return -EINVAL;
684
685 return raw;
686 }
687
bma400_get_accel_scale(struct bma400_data * data)688 static int bma400_get_accel_scale(struct bma400_data *data)
689 {
690 unsigned int raw_scale;
691 unsigned int val;
692 int ret;
693
694 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
695 if (ret)
696 return ret;
697
698 raw_scale = (val & BMA400_ACC_SCALE_MASK) >> BMA400_SCALE_SHIFT;
699 if (raw_scale > BMA400_TWO_BITS_MASK)
700 return -EINVAL;
701
702 data->scale = BMA400_SCALE_MIN << raw_scale;
703
704 return 0;
705 }
706
bma400_set_accel_scale(struct bma400_data * data,unsigned int val)707 static int bma400_set_accel_scale(struct bma400_data *data, unsigned int val)
708 {
709 unsigned int acc_config;
710 int raw;
711 int ret;
712
713 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &acc_config);
714 if (ret)
715 return ret;
716
717 raw = bma400_accel_scale_to_raw(data, val);
718 if (raw < 0)
719 return raw;
720
721 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
722 (acc_config & ~BMA400_ACC_SCALE_MASK) |
723 (raw << BMA400_SCALE_SHIFT));
724 if (ret)
725 return ret;
726
727 data->scale = val;
728 return 0;
729 }
730
bma400_get_power_mode(struct bma400_data * data)731 static int bma400_get_power_mode(struct bma400_data *data)
732 {
733 unsigned int val;
734 int ret;
735
736 ret = regmap_read(data->regmap, BMA400_STATUS_REG, &val);
737 if (ret) {
738 dev_err(data->dev, "Failed to read status register\n");
739 return ret;
740 }
741
742 data->power_mode = (val >> 1) & BMA400_TWO_BITS_MASK;
743 return 0;
744 }
745
bma400_set_power_mode(struct bma400_data * data,enum bma400_power_mode mode)746 static int bma400_set_power_mode(struct bma400_data *data,
747 enum bma400_power_mode mode)
748 {
749 unsigned int val;
750 int ret;
751
752 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val);
753 if (ret)
754 return ret;
755
756 if (data->power_mode == mode)
757 return 0;
758
759 if (mode == POWER_MODE_INVALID)
760 return -EINVAL;
761
762 /* Preserve the low-power oversample ratio etc */
763 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
764 mode | (val & ~BMA400_TWO_BITS_MASK));
765 if (ret) {
766 dev_err(data->dev, "Failed to write to power-mode\n");
767 return ret;
768 }
769
770 data->power_mode = mode;
771
772 /*
773 * Update our cached osr and odr based on the new
774 * power-mode.
775 */
776 bma400_get_accel_output_data_rate(data);
777 bma400_get_accel_oversampling_ratio(data);
778 return 0;
779 }
780
bma400_enable_steps(struct bma400_data * data,int val)781 static int bma400_enable_steps(struct bma400_data *data, int val)
782 {
783 int ret;
784
785 if (data->steps_enabled == val)
786 return 0;
787
788 ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG1_REG,
789 BMA400_STEP_INT_MSK,
790 FIELD_PREP(BMA400_STEP_INT_MSK, val ? 1 : 0));
791 if (ret)
792 return ret;
793 data->steps_enabled = val;
794 return ret;
795 }
796
bma400_get_steps_reg(struct bma400_data * data,int * val)797 static int bma400_get_steps_reg(struct bma400_data *data, int *val)
798 {
799 u8 *steps_raw;
800 int ret;
801
802 steps_raw = kmalloc(BMA400_STEP_RAW_LEN, GFP_KERNEL);
803 if (!steps_raw)
804 return -ENOMEM;
805
806 ret = regmap_bulk_read(data->regmap, BMA400_STEP_CNT0_REG,
807 steps_raw, BMA400_STEP_RAW_LEN);
808 if (ret) {
809 kfree(steps_raw);
810 return ret;
811 }
812 *val = get_unaligned_le24(steps_raw);
813 kfree(steps_raw);
814 return IIO_VAL_INT;
815 }
816
bma400_init_tables(void)817 static void bma400_init_tables(void)
818 {
819 int raw;
820 int i;
821
822 for (i = 0; i + 1 < ARRAY_SIZE(bma400_sample_freqs); i += 2) {
823 raw = (i / 2) + 5;
824 bma400_output_data_rate_from_raw(raw, &bma400_sample_freqs[i],
825 &bma400_sample_freqs[i + 1]);
826 }
827
828 for (i = 0; i + 1 < ARRAY_SIZE(bma400_scales); i += 2) {
829 raw = i / 2;
830 bma400_scales[i] = 0;
831 bma400_scales[i + 1] = BMA400_SCALE_MIN << raw;
832 }
833 }
834
bma400_regulators_disable(void * data_ptr)835 static void bma400_regulators_disable(void *data_ptr)
836 {
837 struct bma400_data *data = data_ptr;
838
839 regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
840 }
841
bma400_power_disable(void * data_ptr)842 static void bma400_power_disable(void *data_ptr)
843 {
844 struct bma400_data *data = data_ptr;
845 int ret;
846
847 mutex_lock(&data->mutex);
848 ret = bma400_set_power_mode(data, POWER_MODE_SLEEP);
849 mutex_unlock(&data->mutex);
850 if (ret)
851 dev_warn(data->dev, "Failed to put device into sleep mode (%pe)\n",
852 ERR_PTR(ret));
853 }
854
bma400_act_to_mod(enum bma400_activity activity)855 static enum iio_modifier bma400_act_to_mod(enum bma400_activity activity)
856 {
857 switch (activity) {
858 case BMA400_STILL:
859 return IIO_MOD_STILL;
860 case BMA400_WALKING:
861 return IIO_MOD_WALKING;
862 case BMA400_RUNNING:
863 return IIO_MOD_RUNNING;
864 default:
865 return IIO_NO_MOD;
866 }
867 }
868
bma400_init(struct bma400_data * data)869 static int bma400_init(struct bma400_data *data)
870 {
871 unsigned int val;
872 int ret;
873
874 data->regulators[BMA400_VDD_REGULATOR].supply = "vdd";
875 data->regulators[BMA400_VDDIO_REGULATOR].supply = "vddio";
876 ret = devm_regulator_bulk_get(data->dev,
877 ARRAY_SIZE(data->regulators),
878 data->regulators);
879 if (ret) {
880 if (ret != -EPROBE_DEFER)
881 dev_err(data->dev,
882 "Failed to get regulators: %d\n",
883 ret);
884
885 return ret;
886 }
887 ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
888 data->regulators);
889 if (ret) {
890 dev_err(data->dev, "Failed to enable regulators: %d\n",
891 ret);
892 return ret;
893 }
894
895 ret = devm_add_action_or_reset(data->dev, bma400_regulators_disable, data);
896 if (ret)
897 return ret;
898
899 /* Try to read chip_id register. It must return 0x90. */
900 ret = regmap_read(data->regmap, BMA400_CHIP_ID_REG, &val);
901 if (ret) {
902 dev_err(data->dev, "Failed to read chip id register\n");
903 return ret;
904 }
905
906 if (val != BMA400_ID_REG_VAL) {
907 dev_err(data->dev, "Chip ID mismatch\n");
908 return -ENODEV;
909 }
910
911 ret = bma400_get_power_mode(data);
912 if (ret) {
913 dev_err(data->dev, "Failed to get the initial power-mode\n");
914 return ret;
915 }
916
917 if (data->power_mode != POWER_MODE_NORMAL) {
918 ret = bma400_set_power_mode(data, POWER_MODE_NORMAL);
919 if (ret) {
920 dev_err(data->dev, "Failed to wake up the device\n");
921 return ret;
922 }
923 /*
924 * TODO: The datasheet waits 1500us here in the example, but
925 * lists 2/ODR as the wakeup time.
926 */
927 usleep_range(1500, 2000);
928 }
929
930 ret = devm_add_action_or_reset(data->dev, bma400_power_disable, data);
931 if (ret)
932 return ret;
933
934 bma400_init_tables();
935
936 ret = bma400_get_accel_output_data_rate(data);
937 if (ret)
938 return ret;
939
940 ret = bma400_get_accel_oversampling_ratio(data);
941 if (ret)
942 return ret;
943
944 ret = bma400_get_accel_scale(data);
945 if (ret)
946 return ret;
947
948 /* Configure INT1 pin to open drain */
949 ret = regmap_write(data->regmap, BMA400_INT_IO_CTRL_REG, 0x06);
950 if (ret)
951 return ret;
952 /*
953 * Once the interrupt engine is supported we might use the
954 * data_src_reg, but for now ensure this is set to the
955 * variable ODR filter selectable by the sample frequency
956 * channel.
957 */
958 return regmap_write(data->regmap, BMA400_ACC_CONFIG2_REG, 0x00);
959 }
960
bma400_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)961 static int bma400_read_raw(struct iio_dev *indio_dev,
962 struct iio_chan_spec const *chan, int *val,
963 int *val2, long mask)
964 {
965 struct bma400_data *data = iio_priv(indio_dev);
966 unsigned int activity;
967 int ret;
968
969 switch (mask) {
970 case IIO_CHAN_INFO_PROCESSED:
971 switch (chan->type) {
972 case IIO_TEMP:
973 mutex_lock(&data->mutex);
974 ret = bma400_get_temp_reg(data, val, val2);
975 mutex_unlock(&data->mutex);
976 return ret;
977 case IIO_STEPS:
978 return bma400_get_steps_reg(data, val);
979 case IIO_ACTIVITY:
980 ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
981 &activity);
982 if (ret)
983 return ret;
984 /*
985 * The device does not support confidence value levels,
986 * so we will always have 100% for current activity and
987 * 0% for the others.
988 */
989 if (chan->channel2 == bma400_act_to_mod(activity))
990 *val = 100;
991 else
992 *val = 0;
993 return IIO_VAL_INT;
994 default:
995 return -EINVAL;
996 }
997 case IIO_CHAN_INFO_RAW:
998 mutex_lock(&data->mutex);
999 ret = bma400_get_accel_reg(data, chan, val);
1000 mutex_unlock(&data->mutex);
1001 return ret;
1002 case IIO_CHAN_INFO_SAMP_FREQ:
1003 switch (chan->type) {
1004 case IIO_ACCEL:
1005 if (data->sample_freq.hz < 0)
1006 return -EINVAL;
1007
1008 *val = data->sample_freq.hz;
1009 *val2 = data->sample_freq.uhz;
1010 return IIO_VAL_INT_PLUS_MICRO;
1011 case IIO_TEMP:
1012 /*
1013 * Runs at a fixed sampling frequency. See Section 4.4
1014 * of the datasheet.
1015 */
1016 *val = 6;
1017 *val2 = 250000;
1018 return IIO_VAL_INT_PLUS_MICRO;
1019 default:
1020 return -EINVAL;
1021 }
1022 case IIO_CHAN_INFO_SCALE:
1023 *val = 0;
1024 *val2 = data->scale;
1025 return IIO_VAL_INT_PLUS_MICRO;
1026 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
1027 /*
1028 * TODO: We could avoid this logic and returning -EINVAL here if
1029 * we set both the low-power and normal mode OSR registers when
1030 * we configure the device.
1031 */
1032 if (data->oversampling_ratio < 0)
1033 return -EINVAL;
1034
1035 *val = data->oversampling_ratio;
1036 return IIO_VAL_INT;
1037 case IIO_CHAN_INFO_ENABLE:
1038 *val = data->steps_enabled;
1039 return IIO_VAL_INT;
1040 default:
1041 return -EINVAL;
1042 }
1043 }
1044
bma400_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)1045 static int bma400_read_avail(struct iio_dev *indio_dev,
1046 struct iio_chan_spec const *chan,
1047 const int **vals, int *type, int *length,
1048 long mask)
1049 {
1050 switch (mask) {
1051 case IIO_CHAN_INFO_SCALE:
1052 *type = IIO_VAL_INT_PLUS_MICRO;
1053 *vals = bma400_scales;
1054 *length = ARRAY_SIZE(bma400_scales);
1055 return IIO_AVAIL_LIST;
1056 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
1057 *type = IIO_VAL_INT;
1058 *vals = bma400_osr_range;
1059 *length = ARRAY_SIZE(bma400_osr_range);
1060 return IIO_AVAIL_RANGE;
1061 case IIO_CHAN_INFO_SAMP_FREQ:
1062 *type = IIO_VAL_INT_PLUS_MICRO;
1063 *vals = bma400_sample_freqs;
1064 *length = ARRAY_SIZE(bma400_sample_freqs);
1065 return IIO_AVAIL_LIST;
1066 default:
1067 return -EINVAL;
1068 }
1069 }
1070
bma400_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1071 static int bma400_write_raw(struct iio_dev *indio_dev,
1072 struct iio_chan_spec const *chan, int val, int val2,
1073 long mask)
1074 {
1075 struct bma400_data *data = iio_priv(indio_dev);
1076 int ret;
1077
1078 switch (mask) {
1079 case IIO_CHAN_INFO_SAMP_FREQ:
1080 /*
1081 * The sample frequency is readonly for the temperature
1082 * register and a fixed value in low-power mode.
1083 */
1084 if (chan->type != IIO_ACCEL)
1085 return -EINVAL;
1086
1087 mutex_lock(&data->mutex);
1088 ret = bma400_set_accel_output_data_rate(data, val, val2);
1089 mutex_unlock(&data->mutex);
1090 return ret;
1091 case IIO_CHAN_INFO_SCALE:
1092 if (val != 0 ||
1093 val2 < BMA400_SCALE_MIN || val2 > BMA400_SCALE_MAX)
1094 return -EINVAL;
1095
1096 mutex_lock(&data->mutex);
1097 ret = bma400_set_accel_scale(data, val2);
1098 mutex_unlock(&data->mutex);
1099 return ret;
1100 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
1101 mutex_lock(&data->mutex);
1102 ret = bma400_set_accel_oversampling_ratio(data, val);
1103 mutex_unlock(&data->mutex);
1104 return ret;
1105 case IIO_CHAN_INFO_ENABLE:
1106 mutex_lock(&data->mutex);
1107 ret = bma400_enable_steps(data, val);
1108 mutex_unlock(&data->mutex);
1109 return ret;
1110 default:
1111 return -EINVAL;
1112 }
1113 }
1114
bma400_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)1115 static int bma400_write_raw_get_fmt(struct iio_dev *indio_dev,
1116 struct iio_chan_spec const *chan,
1117 long mask)
1118 {
1119 switch (mask) {
1120 case IIO_CHAN_INFO_SAMP_FREQ:
1121 return IIO_VAL_INT_PLUS_MICRO;
1122 case IIO_CHAN_INFO_SCALE:
1123 return IIO_VAL_INT_PLUS_MICRO;
1124 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
1125 return IIO_VAL_INT;
1126 case IIO_CHAN_INFO_ENABLE:
1127 return IIO_VAL_INT;
1128 default:
1129 return -EINVAL;
1130 }
1131 }
1132
bma400_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1133 static int bma400_read_event_config(struct iio_dev *indio_dev,
1134 const struct iio_chan_spec *chan,
1135 enum iio_event_type type,
1136 enum iio_event_direction dir)
1137 {
1138 struct bma400_data *data = iio_priv(indio_dev);
1139
1140 switch (chan->type) {
1141 case IIO_ACCEL:
1142 switch (dir) {
1143 case IIO_EV_DIR_RISING:
1144 return FIELD_GET(BMA400_INT_GEN1_MSK,
1145 data->generic_event_en);
1146 case IIO_EV_DIR_FALLING:
1147 return FIELD_GET(BMA400_INT_GEN2_MSK,
1148 data->generic_event_en);
1149 case IIO_EV_DIR_SINGLETAP:
1150 return FIELD_GET(BMA400_S_TAP_MSK,
1151 data->tap_event_en_bitmask);
1152 case IIO_EV_DIR_DOUBLETAP:
1153 return FIELD_GET(BMA400_D_TAP_MSK,
1154 data->tap_event_en_bitmask);
1155 default:
1156 return -EINVAL;
1157 }
1158 case IIO_STEPS:
1159 return data->step_event_en;
1160 case IIO_ACTIVITY:
1161 return data->activity_event_en;
1162 default:
1163 return -EINVAL;
1164 }
1165 }
1166
bma400_steps_event_enable(struct bma400_data * data,int state)1167 static int bma400_steps_event_enable(struct bma400_data *data, int state)
1168 {
1169 int ret;
1170
1171 ret = bma400_enable_steps(data, 1);
1172 if (ret)
1173 return ret;
1174
1175 ret = regmap_update_bits(data->regmap, BMA400_INT12_MAP_REG,
1176 BMA400_STEP_INT_MSK,
1177 FIELD_PREP(BMA400_STEP_INT_MSK,
1178 state));
1179 if (ret)
1180 return ret;
1181 data->step_event_en = state;
1182 return 0;
1183 }
1184
bma400_activity_event_en(struct bma400_data * data,enum iio_event_direction dir,int state)1185 static int bma400_activity_event_en(struct bma400_data *data,
1186 enum iio_event_direction dir,
1187 int state)
1188 {
1189 int ret, reg, msk, value;
1190 int field_value = 0;
1191
1192 switch (dir) {
1193 case IIO_EV_DIR_RISING:
1194 reg = BMA400_GEN1INT_CONFIG0;
1195 msk = BMA400_INT_GEN1_MSK;
1196 value = 2;
1197 set_mask_bits(&field_value, BMA400_INT_GEN1_MSK,
1198 FIELD_PREP(BMA400_INT_GEN1_MSK, state));
1199 break;
1200 case IIO_EV_DIR_FALLING:
1201 reg = BMA400_GEN2INT_CONFIG0;
1202 msk = BMA400_INT_GEN2_MSK;
1203 value = 0;
1204 set_mask_bits(&field_value, BMA400_INT_GEN2_MSK,
1205 FIELD_PREP(BMA400_INT_GEN2_MSK, state));
1206 break;
1207 default:
1208 return -EINVAL;
1209 }
1210
1211 /* Enabling all axis for interrupt evaluation */
1212 ret = regmap_write(data->regmap, reg, 0xF8);
1213 if (ret)
1214 return ret;
1215
1216 /* OR combination of all axis for interrupt evaluation */
1217 ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG1_OFF, value);
1218 if (ret)
1219 return ret;
1220
1221 /* Initial value to avoid interrupts while enabling*/
1222 ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG2_OFF, 0x0A);
1223 if (ret)
1224 return ret;
1225
1226 /* Initial duration value to avoid interrupts while enabling*/
1227 ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG31_OFF, 0x0F);
1228 if (ret)
1229 return ret;
1230
1231 ret = regmap_update_bits(data->regmap, BMA400_INT1_MAP_REG, msk,
1232 field_value);
1233 if (ret)
1234 return ret;
1235
1236 ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG0_REG, msk,
1237 field_value);
1238 if (ret)
1239 return ret;
1240
1241 set_mask_bits(&data->generic_event_en, msk, field_value);
1242 return 0;
1243 }
1244
bma400_tap_event_en(struct bma400_data * data,enum iio_event_direction dir,int state)1245 static int bma400_tap_event_en(struct bma400_data *data,
1246 enum iio_event_direction dir, int state)
1247 {
1248 unsigned int mask, field_value;
1249 int ret;
1250
1251 /*
1252 * Tap interrupts can be configured only in normal mode.
1253 * See table in section 4.3 "Power modes - performance modes" of
1254 * datasheet v1.2.
1255 */
1256 if (data->power_mode != POWER_MODE_NORMAL)
1257 return -EINVAL;
1258
1259 /*
1260 * Tap interrupts are operating with a data rate of 200Hz.
1261 * See section 4.7 "Tap sensing interrupt" in datasheet v1.2.
1262 */
1263 if (data->sample_freq.hz != 200 && state) {
1264 dev_err(data->dev, "Invalid data rate for tap interrupts.\n");
1265 return -EINVAL;
1266 }
1267
1268 ret = regmap_update_bits(data->regmap, BMA400_INT12_MAP_REG,
1269 BMA400_S_TAP_MSK,
1270 FIELD_PREP(BMA400_S_TAP_MSK, state));
1271 if (ret)
1272 return ret;
1273
1274 switch (dir) {
1275 case IIO_EV_DIR_SINGLETAP:
1276 mask = BMA400_S_TAP_MSK;
1277 set_mask_bits(&field_value, BMA400_S_TAP_MSK,
1278 FIELD_PREP(BMA400_S_TAP_MSK, state));
1279 break;
1280 case IIO_EV_DIR_DOUBLETAP:
1281 mask = BMA400_D_TAP_MSK;
1282 set_mask_bits(&field_value, BMA400_D_TAP_MSK,
1283 FIELD_PREP(BMA400_D_TAP_MSK, state));
1284 break;
1285 default:
1286 return -EINVAL;
1287 }
1288
1289 ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG1_REG, mask,
1290 field_value);
1291 if (ret)
1292 return ret;
1293
1294 set_mask_bits(&data->tap_event_en_bitmask, mask, field_value);
1295
1296 return 0;
1297 }
1298
bma400_disable_adv_interrupt(struct bma400_data * data)1299 static int bma400_disable_adv_interrupt(struct bma400_data *data)
1300 {
1301 int ret;
1302
1303 ret = regmap_write(data->regmap, BMA400_INT_CONFIG0_REG, 0);
1304 if (ret)
1305 return ret;
1306
1307 ret = regmap_write(data->regmap, BMA400_INT_CONFIG1_REG, 0);
1308 if (ret)
1309 return ret;
1310
1311 data->tap_event_en_bitmask = 0;
1312 data->generic_event_en = 0;
1313 data->step_event_en = false;
1314 data->activity_event_en = false;
1315
1316 return 0;
1317 }
1318
bma400_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)1319 static int bma400_write_event_config(struct iio_dev *indio_dev,
1320 const struct iio_chan_spec *chan,
1321 enum iio_event_type type,
1322 enum iio_event_direction dir, int state)
1323 {
1324 struct bma400_data *data = iio_priv(indio_dev);
1325 int ret;
1326
1327 switch (chan->type) {
1328 case IIO_ACCEL:
1329 switch (type) {
1330 case IIO_EV_TYPE_MAG:
1331 mutex_lock(&data->mutex);
1332 ret = bma400_activity_event_en(data, dir, state);
1333 mutex_unlock(&data->mutex);
1334 return ret;
1335 case IIO_EV_TYPE_GESTURE:
1336 mutex_lock(&data->mutex);
1337 ret = bma400_tap_event_en(data, dir, state);
1338 mutex_unlock(&data->mutex);
1339 return ret;
1340 default:
1341 return -EINVAL;
1342 }
1343 case IIO_STEPS:
1344 mutex_lock(&data->mutex);
1345 ret = bma400_steps_event_enable(data, state);
1346 mutex_unlock(&data->mutex);
1347 return ret;
1348 case IIO_ACTIVITY:
1349 mutex_lock(&data->mutex);
1350 if (!data->step_event_en) {
1351 ret = bma400_steps_event_enable(data, true);
1352 if (ret) {
1353 mutex_unlock(&data->mutex);
1354 return ret;
1355 }
1356 }
1357 data->activity_event_en = state;
1358 mutex_unlock(&data->mutex);
1359 return 0;
1360 default:
1361 return -EINVAL;
1362 }
1363 }
1364
get_gen_config_reg(enum iio_event_direction dir)1365 static int get_gen_config_reg(enum iio_event_direction dir)
1366 {
1367 switch (dir) {
1368 case IIO_EV_DIR_FALLING:
1369 return BMA400_GEN2INT_CONFIG0;
1370 case IIO_EV_DIR_RISING:
1371 return BMA400_GEN1INT_CONFIG0;
1372 default:
1373 return -EINVAL;
1374 }
1375 }
1376
bma400_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1377 static int bma400_read_event_value(struct iio_dev *indio_dev,
1378 const struct iio_chan_spec *chan,
1379 enum iio_event_type type,
1380 enum iio_event_direction dir,
1381 enum iio_event_info info,
1382 int *val, int *val2)
1383 {
1384 struct bma400_data *data = iio_priv(indio_dev);
1385 int ret, reg, reg_val, raw;
1386
1387 if (chan->type != IIO_ACCEL)
1388 return -EINVAL;
1389
1390 switch (type) {
1391 case IIO_EV_TYPE_MAG:
1392 reg = get_gen_config_reg(dir);
1393 if (reg < 0)
1394 return -EINVAL;
1395
1396 *val2 = 0;
1397 switch (info) {
1398 case IIO_EV_INFO_VALUE:
1399 ret = regmap_read(data->regmap,
1400 reg + BMA400_GEN_CONFIG2_OFF,
1401 val);
1402 if (ret)
1403 return ret;
1404 return IIO_VAL_INT;
1405 case IIO_EV_INFO_PERIOD:
1406 mutex_lock(&data->mutex);
1407 ret = regmap_bulk_read(data->regmap,
1408 reg + BMA400_GEN_CONFIG3_OFF,
1409 &data->duration,
1410 sizeof(data->duration));
1411 if (ret) {
1412 mutex_unlock(&data->mutex);
1413 return ret;
1414 }
1415 *val = be16_to_cpu(data->duration);
1416 mutex_unlock(&data->mutex);
1417 return IIO_VAL_INT;
1418 case IIO_EV_INFO_HYSTERESIS:
1419 ret = regmap_read(data->regmap, reg, val);
1420 if (ret)
1421 return ret;
1422 *val = FIELD_GET(BMA400_GEN_HYST_MSK, *val);
1423 return IIO_VAL_INT;
1424 default:
1425 return -EINVAL;
1426 }
1427 case IIO_EV_TYPE_GESTURE:
1428 switch (info) {
1429 case IIO_EV_INFO_VALUE:
1430 ret = regmap_read(data->regmap, BMA400_TAP_CONFIG,
1431 ®_val);
1432 if (ret)
1433 return ret;
1434
1435 *val = FIELD_GET(BMA400_TAP_SEN_MSK, reg_val);
1436 return IIO_VAL_INT;
1437 case IIO_EV_INFO_RESET_TIMEOUT:
1438 ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1,
1439 ®_val);
1440 if (ret)
1441 return ret;
1442
1443 raw = FIELD_GET(BMA400_TAP_QUIET_MSK, reg_val);
1444 *val = 0;
1445 *val2 = tap_reset_timeout[raw];
1446 return IIO_VAL_INT_PLUS_MICRO;
1447 case IIO_EV_INFO_TAP2_MIN_DELAY:
1448 ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1,
1449 ®_val);
1450 if (ret)
1451 return ret;
1452
1453 raw = FIELD_GET(BMA400_TAP_QUIETDT_MSK, reg_val);
1454 *val = 0;
1455 *val2 = double_tap2_min_delay[raw];
1456 return IIO_VAL_INT_PLUS_MICRO;
1457 default:
1458 return -EINVAL;
1459 }
1460 default:
1461 return -EINVAL;
1462 }
1463 }
1464
bma400_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1465 static int bma400_write_event_value(struct iio_dev *indio_dev,
1466 const struct iio_chan_spec *chan,
1467 enum iio_event_type type,
1468 enum iio_event_direction dir,
1469 enum iio_event_info info,
1470 int val, int val2)
1471 {
1472 struct bma400_data *data = iio_priv(indio_dev);
1473 int reg, ret, raw;
1474
1475 if (chan->type != IIO_ACCEL)
1476 return -EINVAL;
1477
1478 switch (type) {
1479 case IIO_EV_TYPE_MAG:
1480 reg = get_gen_config_reg(dir);
1481 if (reg < 0)
1482 return -EINVAL;
1483
1484 switch (info) {
1485 case IIO_EV_INFO_VALUE:
1486 if (val < 1 || val > 255)
1487 return -EINVAL;
1488
1489 return regmap_write(data->regmap,
1490 reg + BMA400_GEN_CONFIG2_OFF,
1491 val);
1492 case IIO_EV_INFO_PERIOD:
1493 if (val < 1 || val > 65535)
1494 return -EINVAL;
1495
1496 mutex_lock(&data->mutex);
1497 put_unaligned_be16(val, &data->duration);
1498 ret = regmap_bulk_write(data->regmap,
1499 reg + BMA400_GEN_CONFIG3_OFF,
1500 &data->duration,
1501 sizeof(data->duration));
1502 mutex_unlock(&data->mutex);
1503 return ret;
1504 case IIO_EV_INFO_HYSTERESIS:
1505 if (val < 0 || val > 3)
1506 return -EINVAL;
1507
1508 return regmap_update_bits(data->regmap, reg,
1509 BMA400_GEN_HYST_MSK,
1510 FIELD_PREP(BMA400_GEN_HYST_MSK,
1511 val));
1512 default:
1513 return -EINVAL;
1514 }
1515 case IIO_EV_TYPE_GESTURE:
1516 switch (info) {
1517 case IIO_EV_INFO_VALUE:
1518 if (val < 0 || val > 7)
1519 return -EINVAL;
1520
1521 return regmap_update_bits(data->regmap,
1522 BMA400_TAP_CONFIG,
1523 BMA400_TAP_SEN_MSK,
1524 FIELD_PREP(BMA400_TAP_SEN_MSK,
1525 val));
1526 case IIO_EV_INFO_RESET_TIMEOUT:
1527 raw = usec_to_tapreg_raw(val2, tap_reset_timeout);
1528 if (raw < 0)
1529 return -EINVAL;
1530
1531 return regmap_update_bits(data->regmap,
1532 BMA400_TAP_CONFIG1,
1533 BMA400_TAP_QUIET_MSK,
1534 FIELD_PREP(BMA400_TAP_QUIET_MSK,
1535 raw));
1536 case IIO_EV_INFO_TAP2_MIN_DELAY:
1537 raw = usec_to_tapreg_raw(val2, double_tap2_min_delay);
1538 if (raw < 0)
1539 return -EINVAL;
1540
1541 return regmap_update_bits(data->regmap,
1542 BMA400_TAP_CONFIG1,
1543 BMA400_TAP_QUIETDT_MSK,
1544 FIELD_PREP(BMA400_TAP_QUIETDT_MSK,
1545 raw));
1546 default:
1547 return -EINVAL;
1548 }
1549 default:
1550 return -EINVAL;
1551 }
1552 }
1553
bma400_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)1554 static int bma400_data_rdy_trigger_set_state(struct iio_trigger *trig,
1555 bool state)
1556 {
1557 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1558 struct bma400_data *data = iio_priv(indio_dev);
1559 int ret;
1560
1561 ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG0_REG,
1562 BMA400_INT_DRDY_MSK,
1563 FIELD_PREP(BMA400_INT_DRDY_MSK, state));
1564 if (ret)
1565 return ret;
1566
1567 return regmap_update_bits(data->regmap, BMA400_INT1_MAP_REG,
1568 BMA400_INT_DRDY_MSK,
1569 FIELD_PREP(BMA400_INT_DRDY_MSK, state));
1570 }
1571
1572 static const unsigned long bma400_avail_scan_masks[] = {
1573 BIT(BMA400_ACCL_X) | BIT(BMA400_ACCL_Y) | BIT(BMA400_ACCL_Z),
1574 BIT(BMA400_ACCL_X) | BIT(BMA400_ACCL_Y) | BIT(BMA400_ACCL_Z)
1575 | BIT(BMA400_TEMP),
1576 0
1577 };
1578
1579 static const struct iio_info bma400_info = {
1580 .read_raw = bma400_read_raw,
1581 .read_avail = bma400_read_avail,
1582 .write_raw = bma400_write_raw,
1583 .write_raw_get_fmt = bma400_write_raw_get_fmt,
1584 .read_event_config = bma400_read_event_config,
1585 .write_event_config = bma400_write_event_config,
1586 .write_event_value = bma400_write_event_value,
1587 .read_event_value = bma400_read_event_value,
1588 .event_attrs = &bma400_event_attribute_group,
1589 };
1590
1591 static const struct iio_trigger_ops bma400_trigger_ops = {
1592 .set_trigger_state = &bma400_data_rdy_trigger_set_state,
1593 .validate_device = &iio_trigger_validate_own_device,
1594 };
1595
bma400_trigger_handler(int irq,void * p)1596 static irqreturn_t bma400_trigger_handler(int irq, void *p)
1597 {
1598 struct iio_poll_func *pf = p;
1599 struct iio_dev *indio_dev = pf->indio_dev;
1600 struct bma400_data *data = iio_priv(indio_dev);
1601 int ret, temp;
1602
1603 /* Lock to protect the data->buffer */
1604 mutex_lock(&data->mutex);
1605
1606 /* bulk read six registers, with the base being the LSB register */
1607 ret = regmap_bulk_read(data->regmap, BMA400_X_AXIS_LSB_REG,
1608 &data->buffer.buff, sizeof(data->buffer.buff));
1609 if (ret)
1610 goto unlock_err;
1611
1612 if (test_bit(BMA400_TEMP, indio_dev->active_scan_mask)) {
1613 ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &temp);
1614 if (ret)
1615 goto unlock_err;
1616
1617 data->buffer.temperature = temp;
1618 }
1619
1620 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
1621 iio_get_time_ns(indio_dev));
1622
1623 mutex_unlock(&data->mutex);
1624 iio_trigger_notify_done(indio_dev->trig);
1625 return IRQ_HANDLED;
1626
1627 unlock_err:
1628 mutex_unlock(&data->mutex);
1629 return IRQ_NONE;
1630 }
1631
bma400_interrupt(int irq,void * private)1632 static irqreturn_t bma400_interrupt(int irq, void *private)
1633 {
1634 struct iio_dev *indio_dev = private;
1635 struct bma400_data *data = iio_priv(indio_dev);
1636 s64 timestamp = iio_get_time_ns(indio_dev);
1637 unsigned int act, ev_dir = IIO_EV_DIR_NONE;
1638 int ret;
1639
1640 /* Lock to protect the data->status */
1641 mutex_lock(&data->mutex);
1642 ret = regmap_bulk_read(data->regmap, BMA400_INT_STAT0_REG,
1643 &data->status,
1644 sizeof(data->status));
1645 /*
1646 * if none of the bit is set in the status register then it is
1647 * spurious interrupt.
1648 */
1649 if (ret || !data->status)
1650 goto unlock_err;
1651
1652 /*
1653 * Disable all advance interrupts if interrupt engine overrun occurs.
1654 * See section 4.7 "Interrupt engine overrun" in datasheet v1.2.
1655 */
1656 if (FIELD_GET(BMA400_INT_ENG_OVRUN_MSK, le16_to_cpu(data->status))) {
1657 bma400_disable_adv_interrupt(data);
1658 dev_err(data->dev, "Interrupt engine overrun\n");
1659 goto unlock_err;
1660 }
1661
1662 if (FIELD_GET(BMA400_INT_S_TAP_MSK, le16_to_cpu(data->status)))
1663 iio_push_event(indio_dev,
1664 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
1665 IIO_MOD_X_OR_Y_OR_Z,
1666 IIO_EV_TYPE_GESTURE,
1667 IIO_EV_DIR_SINGLETAP),
1668 timestamp);
1669
1670 if (FIELD_GET(BMA400_INT_D_TAP_MSK, le16_to_cpu(data->status)))
1671 iio_push_event(indio_dev,
1672 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
1673 IIO_MOD_X_OR_Y_OR_Z,
1674 IIO_EV_TYPE_GESTURE,
1675 IIO_EV_DIR_DOUBLETAP),
1676 timestamp);
1677
1678 if (FIELD_GET(BMA400_INT_GEN1_MSK, le16_to_cpu(data->status)))
1679 ev_dir = IIO_EV_DIR_RISING;
1680
1681 if (FIELD_GET(BMA400_INT_GEN2_MSK, le16_to_cpu(data->status)))
1682 ev_dir = IIO_EV_DIR_FALLING;
1683
1684 if (ev_dir != IIO_EV_DIR_NONE) {
1685 iio_push_event(indio_dev,
1686 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
1687 IIO_MOD_X_OR_Y_OR_Z,
1688 IIO_EV_TYPE_MAG, ev_dir),
1689 timestamp);
1690 }
1691
1692 if (FIELD_GET(BMA400_STEP_STAT_MASK, le16_to_cpu(data->status))) {
1693 iio_push_event(indio_dev,
1694 IIO_MOD_EVENT_CODE(IIO_STEPS, 0, IIO_NO_MOD,
1695 IIO_EV_TYPE_CHANGE,
1696 IIO_EV_DIR_NONE),
1697 timestamp);
1698
1699 if (data->activity_event_en) {
1700 ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
1701 &act);
1702 if (ret)
1703 goto unlock_err;
1704
1705 iio_push_event(indio_dev,
1706 IIO_MOD_EVENT_CODE(IIO_ACTIVITY, 0,
1707 bma400_act_to_mod(act),
1708 IIO_EV_TYPE_CHANGE,
1709 IIO_EV_DIR_NONE),
1710 timestamp);
1711 }
1712 }
1713
1714 if (FIELD_GET(BMA400_INT_DRDY_MSK, le16_to_cpu(data->status))) {
1715 mutex_unlock(&data->mutex);
1716 iio_trigger_poll_chained(data->trig);
1717 return IRQ_HANDLED;
1718 }
1719
1720 mutex_unlock(&data->mutex);
1721 return IRQ_HANDLED;
1722
1723 unlock_err:
1724 mutex_unlock(&data->mutex);
1725 return IRQ_NONE;
1726 }
1727
bma400_probe(struct device * dev,struct regmap * regmap,int irq,const char * name)1728 int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
1729 const char *name)
1730 {
1731 struct iio_dev *indio_dev;
1732 struct bma400_data *data;
1733 int ret;
1734
1735 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1736 if (!indio_dev)
1737 return -ENOMEM;
1738
1739 data = iio_priv(indio_dev);
1740 data->regmap = regmap;
1741 data->dev = dev;
1742
1743 ret = bma400_init(data);
1744 if (ret)
1745 return ret;
1746
1747 ret = iio_read_mount_matrix(dev, &data->orientation);
1748 if (ret)
1749 return ret;
1750
1751 mutex_init(&data->mutex);
1752 indio_dev->name = name;
1753 indio_dev->info = &bma400_info;
1754 indio_dev->channels = bma400_channels;
1755 indio_dev->num_channels = ARRAY_SIZE(bma400_channels);
1756 indio_dev->available_scan_masks = bma400_avail_scan_masks;
1757 indio_dev->modes = INDIO_DIRECT_MODE;
1758
1759 if (irq > 0) {
1760 data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
1761 indio_dev->name,
1762 iio_device_id(indio_dev));
1763 if (!data->trig)
1764 return -ENOMEM;
1765
1766 data->trig->ops = &bma400_trigger_ops;
1767 iio_trigger_set_drvdata(data->trig, indio_dev);
1768
1769 ret = devm_iio_trigger_register(data->dev, data->trig);
1770 if (ret)
1771 return dev_err_probe(data->dev, ret,
1772 "iio trigger register fail\n");
1773
1774 indio_dev->trig = iio_trigger_get(data->trig);
1775 ret = devm_request_threaded_irq(dev, irq, NULL,
1776 &bma400_interrupt,
1777 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1778 indio_dev->name, indio_dev);
1779 if (ret)
1780 return dev_err_probe(data->dev, ret,
1781 "request irq %d failed\n", irq);
1782 }
1783
1784 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
1785 &bma400_trigger_handler, NULL);
1786 if (ret)
1787 return dev_err_probe(data->dev, ret,
1788 "iio triggered buffer setup failed\n");
1789
1790 return devm_iio_device_register(dev, indio_dev);
1791 }
1792 EXPORT_SYMBOL_NS(bma400_probe, IIO_BMA400);
1793
1794 MODULE_AUTHOR("Dan Robertson <dan@dlrobertson.com>");
1795 MODULE_AUTHOR("Jagath Jog J <jagathjog1996@gmail.com>");
1796 MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor core");
1797 MODULE_LICENSE("GPL");
1798
