1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 */
7
8 #include <linux/skbuff.h>
9 #include <linux/ctype.h>
10
11 #include "core.h"
12 #include "htc.h"
13 #include "debug.h"
14 #include "wmi.h"
15 #include "wmi-tlv.h"
16 #include "mac.h"
17 #include "testmode.h"
18 #include "wmi-ops.h"
19 #include "p2p.h"
20 #include "hw.h"
21 #include "hif.h"
22 #include "txrx.h"
23
24 #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
25 #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
26 #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
27
28 /* MAIN WMI cmd track */
29 static struct wmi_cmd_map wmi_cmd_map = {
30 .init_cmdid = WMI_INIT_CMDID,
31 .start_scan_cmdid = WMI_START_SCAN_CMDID,
32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
36 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
37 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
38 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
39 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
40 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
41 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
42 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
43 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
44 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
45 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
46 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
47 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
48 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
49 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
50 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
51 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
52 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
53 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
54 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
55 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
56 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
57 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
58 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
59 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
60 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
61 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
62 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
63 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
64 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
65 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
66 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
67 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
68 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
69 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
70 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
71 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
72 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
73 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
74 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
75 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
76 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
77 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
78 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
79 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
80 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
81 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
82 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
83 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
84 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
85 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
86 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
87 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
88 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
89 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
90 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
91 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
92 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
93 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
94 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
95 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
96 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
97 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
98 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
99 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
100 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
101 .wlan_profile_set_hist_intvl_cmdid =
102 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
103 .wlan_profile_get_profile_data_cmdid =
104 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
105 .wlan_profile_enable_profile_id_cmdid =
106 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
107 .wlan_profile_list_profile_id_cmdid =
108 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
109 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
110 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
111 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
112 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
113 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
114 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
115 .wow_enable_disable_wake_event_cmdid =
116 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
117 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
118 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
119 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
120 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
121 .vdev_spectral_scan_configure_cmdid =
122 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
123 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
124 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
125 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
126 .network_list_offload_config_cmdid =
127 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
128 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
129 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
130 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
131 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
132 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
133 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
134 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
135 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
136 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
137 .echo_cmdid = WMI_ECHO_CMDID,
138 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
139 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
140 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
141 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
142 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
143 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
144 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
145 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
146 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
147 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
148 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
149 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
150 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
151 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
152 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
153 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
154 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
156 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
157 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
158 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
159 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
160 .nan_cmdid = WMI_CMD_UNSUPPORTED,
161 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
162 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
163 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
164 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
165 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
166 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
167 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
168 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
169 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
170 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
174 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
175 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
176 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
177 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
178 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
179 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
180 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
184 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
186 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
188 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
189 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
190 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
191 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
192 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
193 };
194
195 /* 10.X WMI cmd track */
196 static struct wmi_cmd_map wmi_10x_cmd_map = {
197 .init_cmdid = WMI_10X_INIT_CMDID,
198 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
199 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
200 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
201 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
202 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254 .roam_scan_rssi_change_threshold =
255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269 .wlan_profile_set_hist_intvl_cmdid =
270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271 .wlan_profile_get_profile_data_cmdid =
272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273 .wlan_profile_enable_profile_id_cmdid =
274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275 .wlan_profile_list_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283 .wow_enable_disable_wake_event_cmdid =
284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286 .wow_hostwakeup_from_sleep_cmdid =
287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290 .vdev_spectral_scan_configure_cmdid =
291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292 .vdev_spectral_scan_enable_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
306 .echo_cmdid = WMI_10X_ECHO_CMDID,
307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329 .nan_cmdid = WMI_CMD_UNSUPPORTED,
330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
360 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
361 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
362 };
363
364 /* 10.2.4 WMI cmd track */
365 static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
366 .init_cmdid = WMI_10_2_INIT_CMDID,
367 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
368 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
369 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
370 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
371 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
372 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
373 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
374 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
375 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
376 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
377 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
378 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
379 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
380 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
381 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
382 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
383 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
384 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
385 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
386 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
387 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
388 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
389 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
390 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
391 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
392 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
393 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
394 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
395 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
396 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
397 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
398 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
399 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
400 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
401 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
402 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
403 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
404 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
405 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
406 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
407 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
408 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
409 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
410 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
411 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
412 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
413 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
414 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
415 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
416 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
417 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
418 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
419 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
420 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
421 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
422 .roam_scan_rssi_change_threshold =
423 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
424 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
425 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
426 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
427 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
428 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
429 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
430 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
431 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
432 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
433 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
434 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
435 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
436 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
437 .wlan_profile_set_hist_intvl_cmdid =
438 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
439 .wlan_profile_get_profile_data_cmdid =
440 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
441 .wlan_profile_enable_profile_id_cmdid =
442 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
443 .wlan_profile_list_profile_id_cmdid =
444 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
445 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
446 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
447 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
448 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
449 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
450 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
451 .wow_enable_disable_wake_event_cmdid =
452 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
453 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
454 .wow_hostwakeup_from_sleep_cmdid =
455 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
456 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
457 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
458 .vdev_spectral_scan_configure_cmdid =
459 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
460 .vdev_spectral_scan_enable_cmdid =
461 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
462 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
463 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
464 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
465 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
466 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
467 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
468 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
469 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
470 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
471 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
472 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
473 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
474 .echo_cmdid = WMI_10_2_ECHO_CMDID,
475 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
476 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
477 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
478 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
479 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
480 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
481 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
482 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
483 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
484 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
485 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
486 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
487 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
488 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
489 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
490 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
491 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
492 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
493 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
494 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
495 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
496 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
497 .nan_cmdid = WMI_CMD_UNSUPPORTED,
498 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
499 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
500 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
501 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
502 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
503 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
504 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
505 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
508 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
509 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
510 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
511 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
512 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
513 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
514 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
515 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
518 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
520 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
521 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
522 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
523 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
524 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
525 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
526 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
527 .pdev_bss_chan_info_request_cmdid =
528 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
529 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
530 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
531 .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
532 };
533
534 /* 10.4 WMI cmd track */
535 static struct wmi_cmd_map wmi_10_4_cmd_map = {
536 .init_cmdid = WMI_10_4_INIT_CMDID,
537 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
538 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
539 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
540 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
541 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
542 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
543 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
544 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
545 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
546 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
547 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
548 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
549 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
550 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
551 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
552 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
553 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
554 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
555 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
556 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
557 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
558 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
559 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
560 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
561 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
562 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
563 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
564 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
565 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
566 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
567 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
568 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
569 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
570 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
571 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
572 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
573 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
574 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
575 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
576 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
577 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
578 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
579 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
580 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
581 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
582 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
583 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
584 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
585 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
586 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
587 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
588 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
589 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
590 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
591 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
592 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
593 .roam_scan_rssi_change_threshold =
594 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
595 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
596 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
597 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
598 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
599 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
600 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
601 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
602 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
603 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
604 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
605 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
606 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
607 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
608 .wlan_profile_set_hist_intvl_cmdid =
609 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
610 .wlan_profile_get_profile_data_cmdid =
611 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
612 .wlan_profile_enable_profile_id_cmdid =
613 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
614 .wlan_profile_list_profile_id_cmdid =
615 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
616 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
617 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
618 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
619 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
620 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
621 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
622 .wow_enable_disable_wake_event_cmdid =
623 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
624 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
625 .wow_hostwakeup_from_sleep_cmdid =
626 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
627 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
628 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
629 .vdev_spectral_scan_configure_cmdid =
630 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
631 .vdev_spectral_scan_enable_cmdid =
632 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
633 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
634 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
635 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
636 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
637 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
638 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
639 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
640 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
641 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
642 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
643 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
644 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
645 .echo_cmdid = WMI_10_4_ECHO_CMDID,
646 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
647 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
648 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
649 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
650 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
651 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
652 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
653 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
654 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
655 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
656 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
657 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
658 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
659 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
660 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
661 .wlan_peer_caching_add_peer_cmdid =
662 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
663 .wlan_peer_caching_evict_peer_cmdid =
664 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
665 .wlan_peer_caching_restore_peer_cmdid =
666 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
667 .wlan_peer_caching_print_all_peers_info_cmdid =
668 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
669 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
670 .peer_add_proxy_sta_entry_cmdid =
671 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
672 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
673 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
674 .nan_cmdid = WMI_10_4_NAN_CMDID,
675 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
676 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
677 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
678 .pdev_smart_ant_set_rx_antenna_cmdid =
679 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
680 .peer_smart_ant_set_tx_antenna_cmdid =
681 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
682 .peer_smart_ant_set_train_info_cmdid =
683 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
684 .peer_smart_ant_set_node_config_ops_cmdid =
685 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
686 .pdev_set_antenna_switch_table_cmdid =
687 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
688 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
689 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
690 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
691 .pdev_ratepwr_chainmsk_table_cmdid =
692 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
693 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
694 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
695 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
696 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
697 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
698 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
699 .pdev_get_ani_ofdm_config_cmdid =
700 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
701 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
702 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
703 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
704 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
705 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
706 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
707 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
708 .vdev_filter_neighbor_rx_packets_cmdid =
709 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
710 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
711 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
712 .pdev_bss_chan_info_request_cmdid =
713 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
714 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
715 .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
716 .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
717 .atf_ssid_grouping_request_cmdid =
718 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
719 .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
720 .set_periodic_channel_stats_cfg_cmdid =
721 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
722 .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
723 .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
724 .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
725 .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
726 .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
727 .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
728 .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
729 .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
730 .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
731 .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
732 .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
733 .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
734 .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
735 .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
736 .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
737 .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
738 .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
739 .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
740 .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
741 .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
742 .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
743 .per_peer_per_tid_config_cmdid = WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
744 };
745
746 static struct wmi_peer_param_map wmi_peer_param_map = {
747 .smps_state = WMI_PEER_SMPS_STATE,
748 .ampdu = WMI_PEER_AMPDU,
749 .authorize = WMI_PEER_AUTHORIZE,
750 .chan_width = WMI_PEER_CHAN_WIDTH,
751 .nss = WMI_PEER_NSS,
752 .use_4addr = WMI_PEER_USE_4ADDR,
753 .use_fixed_power = WMI_PEER_USE_FIXED_PWR,
754 .debug = WMI_PEER_DEBUG,
755 .phymode = WMI_PEER_PHYMODE,
756 .dummy_var = WMI_PEER_DUMMY_VAR,
757 };
758
759 /* MAIN WMI VDEV param map */
760 static struct wmi_vdev_param_map wmi_vdev_param_map = {
761 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
762 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
763 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
764 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
765 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
766 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
767 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
768 .preamble = WMI_VDEV_PARAM_PREAMBLE,
769 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
770 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
771 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
772 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
773 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
774 .wmi_vdev_oc_scheduler_air_time_limit =
775 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
776 .wds = WMI_VDEV_PARAM_WDS,
777 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
778 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
779 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
780 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
781 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
782 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
783 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
784 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
785 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
786 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
787 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
788 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
789 .sgi = WMI_VDEV_PARAM_SGI,
790 .ldpc = WMI_VDEV_PARAM_LDPC,
791 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
792 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
793 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
794 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
795 .nss = WMI_VDEV_PARAM_NSS,
796 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
797 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
798 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
799 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
800 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
801 .ap_keepalive_min_idle_inactive_time_secs =
802 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
803 .ap_keepalive_max_idle_inactive_time_secs =
804 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
805 .ap_keepalive_max_unresponsive_time_secs =
806 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
807 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
808 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
809 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
810 .txbf = WMI_VDEV_PARAM_TXBF,
811 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
812 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
813 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
814 .ap_detect_out_of_sync_sleeping_sta_time_secs =
815 WMI_VDEV_PARAM_UNSUPPORTED,
816 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
817 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
818 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
819 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
820 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
821 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
822 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
823 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
824 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
825 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
826 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
827 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
828 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
829 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
830 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
831 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
832 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
833 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
834 };
835
836 /* 10.X WMI VDEV param map */
837 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
838 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
839 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
840 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
841 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
842 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
843 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
844 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
845 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
846 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
847 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
848 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
849 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
850 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
851 .wmi_vdev_oc_scheduler_air_time_limit =
852 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
853 .wds = WMI_10X_VDEV_PARAM_WDS,
854 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
855 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
856 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
857 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
858 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
859 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
860 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
861 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
862 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
863 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
864 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
865 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
866 .sgi = WMI_10X_VDEV_PARAM_SGI,
867 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
868 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
869 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
870 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
871 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
872 .nss = WMI_10X_VDEV_PARAM_NSS,
873 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
874 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
875 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
876 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
877 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
878 .ap_keepalive_min_idle_inactive_time_secs =
879 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
880 .ap_keepalive_max_idle_inactive_time_secs =
881 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
882 .ap_keepalive_max_unresponsive_time_secs =
883 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
884 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
885 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
886 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
887 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
888 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
889 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
890 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
891 .ap_detect_out_of_sync_sleeping_sta_time_secs =
892 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
893 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
894 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
895 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
896 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
897 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
898 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
899 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
900 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
901 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
902 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
903 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
904 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
905 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
906 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
907 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
908 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
909 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
910 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
911 };
912
913 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
914 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
915 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
916 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
917 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
918 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
919 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
920 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
921 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
922 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
923 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
924 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
925 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
926 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
927 .wmi_vdev_oc_scheduler_air_time_limit =
928 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
929 .wds = WMI_10X_VDEV_PARAM_WDS,
930 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
931 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
932 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
933 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
934 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
935 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
936 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
937 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
938 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
939 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
940 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
941 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
942 .sgi = WMI_10X_VDEV_PARAM_SGI,
943 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
944 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
945 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
946 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
947 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
948 .nss = WMI_10X_VDEV_PARAM_NSS,
949 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
950 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
951 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
952 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
953 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
954 .ap_keepalive_min_idle_inactive_time_secs =
955 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
956 .ap_keepalive_max_idle_inactive_time_secs =
957 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
958 .ap_keepalive_max_unresponsive_time_secs =
959 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
960 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
961 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
962 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
963 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
964 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
965 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
966 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
967 .ap_detect_out_of_sync_sleeping_sta_time_secs =
968 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
969 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
970 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
971 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
972 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
973 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
974 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
975 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
976 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
977 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
978 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
979 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
980 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
981 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
982 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
983 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
984 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
985 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
986 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
987 };
988
989 static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
990 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
991 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
992 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
993 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
994 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
995 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
996 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
997 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
998 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
999 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
1000 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
1001 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
1002 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
1003 .wmi_vdev_oc_scheduler_air_time_limit =
1004 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1005 .wds = WMI_10_4_VDEV_PARAM_WDS,
1006 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
1007 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
1008 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
1009 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
1010 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
1011 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
1012 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
1013 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
1014 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
1015 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
1016 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
1017 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
1018 .sgi = WMI_10_4_VDEV_PARAM_SGI,
1019 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
1020 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
1021 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
1022 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
1023 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
1024 .nss = WMI_10_4_VDEV_PARAM_NSS,
1025 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
1026 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
1027 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
1028 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
1029 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1030 .ap_keepalive_min_idle_inactive_time_secs =
1031 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1032 .ap_keepalive_max_idle_inactive_time_secs =
1033 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1034 .ap_keepalive_max_unresponsive_time_secs =
1035 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1036 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
1037 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
1038 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
1039 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
1040 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
1041 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
1042 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
1043 .ap_detect_out_of_sync_sleeping_sta_time_secs =
1044 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1045 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
1046 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
1047 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
1048 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
1049 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1050 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1051 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1052 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1053 .early_rx_bmiss_sample_cycle =
1054 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1055 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1056 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1057 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1058 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1059 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1060 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1061 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
1062 .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
1063 .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
1064 .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
1065 .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
1066 };
1067
1068 static struct wmi_pdev_param_map wmi_pdev_param_map = {
1069 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1070 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1071 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1072 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1073 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1074 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1075 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1076 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1077 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1078 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1079 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1080 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1081 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1082 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1083 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1084 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1085 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1086 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1087 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1088 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1089 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1090 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1091 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1092 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1093 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1094 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1095 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1096 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1097 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1098 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1099 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1100 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1101 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1102 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1103 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
1104 .dcs = WMI_PDEV_PARAM_DCS,
1105 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1106 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1107 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1108 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1109 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1110 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1111 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1112 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1113 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1114 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1115 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1116 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1117 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
1118 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1119 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1120 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1121 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1122 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1123 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1124 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1125 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1126 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1127 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1128 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1129 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1130 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1131 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1132 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1133 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1134 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1135 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1139 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1140 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1141 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1142 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1143 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1144 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1145 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1146 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1147 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1148 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1149 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1150 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1151 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1152 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1153 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1156 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1157 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1158 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1159 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1160 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1161 };
1162
1163 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1164 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1165 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1166 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1167 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1168 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1169 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1170 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1171 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1172 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1173 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1174 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1175 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1176 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1177 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1178 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1179 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1180 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1181 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1182 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1183 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1184 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1185 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1186 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1187 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1188 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1189 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1190 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1194 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1195 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1196 .bcnflt_stats_update_period =
1197 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1198 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1199 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1200 .dcs = WMI_10X_PDEV_PARAM_DCS,
1201 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1202 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1203 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1204 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1205 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1206 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1207 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1208 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1209 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1210 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1211 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1212 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1213 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1214 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1215 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1216 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1217 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1218 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1219 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1220 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1221 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1222 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1223 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1224 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1225 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1226 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1227 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1228 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1229 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1230 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1234 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1235 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1236 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1237 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1238 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1239 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1240 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1241 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1242 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1243 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1244 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1245 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1246 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1247 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1248 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1251 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1252 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1253 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1254 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1255 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1257 };
1258
1259 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1260 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1261 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1262 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1263 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1264 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1265 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1266 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1267 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1268 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1269 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1270 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1271 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1272 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1273 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1274 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1275 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1276 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1277 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1278 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1279 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1280 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1281 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1282 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1283 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1284 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1285 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1286 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1290 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1291 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1292 .bcnflt_stats_update_period =
1293 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1294 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1295 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1296 .dcs = WMI_10X_PDEV_PARAM_DCS,
1297 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1298 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1299 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1300 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1301 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1302 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1303 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1304 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1305 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1306 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1307 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1308 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1309 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1310 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1311 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1312 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1313 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1314 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1315 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1316 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1317 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1318 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1319 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1320 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1321 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1322 .peer_sta_ps_statechg_enable =
1323 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
1324 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1325 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1326 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1327 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1328 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1329 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1330 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1331 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1332 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1333 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1334 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1335 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1336 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1337 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1338 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1339 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1340 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1341 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1342 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1343 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1344 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1345 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1346 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1347 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1348 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1349 .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
1350 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1351 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1352 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1353 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1354 };
1355
1356 /* firmware 10.2 specific mappings */
1357 static struct wmi_cmd_map wmi_10_2_cmd_map = {
1358 .init_cmdid = WMI_10_2_INIT_CMDID,
1359 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1360 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1361 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1362 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1363 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
1364 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1365 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1366 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1367 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1368 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1369 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1370 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1371 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1372 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1373 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1374 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1375 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1376 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1377 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1378 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1379 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1380 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1381 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1382 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1383 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1384 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1385 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1386 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1387 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1388 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1389 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1390 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1391 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1392 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1393 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1394 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1395 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1396 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1397 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1398 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1399 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1400 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1401 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1402 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1403 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1404 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1405 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1406 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1407 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1408 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1409 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1410 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1411 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1412 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1413 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1414 .roam_scan_rssi_change_threshold =
1415 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1416 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1417 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1418 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1419 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1420 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1421 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1422 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1423 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1424 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1425 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1426 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1427 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1428 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1429 .wlan_profile_set_hist_intvl_cmdid =
1430 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1431 .wlan_profile_get_profile_data_cmdid =
1432 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1433 .wlan_profile_enable_profile_id_cmdid =
1434 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1435 .wlan_profile_list_profile_id_cmdid =
1436 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1437 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1438 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1439 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1440 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1441 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1442 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1443 .wow_enable_disable_wake_event_cmdid =
1444 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1445 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1446 .wow_hostwakeup_from_sleep_cmdid =
1447 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1448 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1449 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1450 .vdev_spectral_scan_configure_cmdid =
1451 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1452 .vdev_spectral_scan_enable_cmdid =
1453 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1454 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1455 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1456 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1457 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1458 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1459 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1460 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1461 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1462 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1463 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1464 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1465 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1466 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1467 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1468 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1469 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1470 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1471 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1472 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1473 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1474 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1475 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
1476 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
1477 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
1478 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1479 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1480 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1481 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1482 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1483 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1484 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1485 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1486 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1487 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1488 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1489 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1490 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1491 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1492 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1493 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1494 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1495 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1496 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1497 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1498 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1499 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1500 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1501 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1502 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1503 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1504 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1505 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1506 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1507 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1508 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1509 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
1510 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
1511 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
1512 };
1513
1514 static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1515 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1516 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1517 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1518 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1519 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1520 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1521 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1522 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1523 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1524 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1525 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1526 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1527 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1528 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1529 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1530 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1531 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1532 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1533 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1534 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1535 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1536 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1537 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1538 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1539 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1540 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1541 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1542 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1543 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1544 .pdev_stats_update_period =
1545 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1546 .vdev_stats_update_period =
1547 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1548 .peer_stats_update_period =
1549 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1550 .bcnflt_stats_update_period =
1551 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1552 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1553 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1554 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1555 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1556 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1557 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1558 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1559 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1560 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1561 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1562 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1563 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1564 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1565 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1566 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1567 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1568 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1569 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1570 .smart_antenna_default_antenna =
1571 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1572 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1573 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1574 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1575 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1576 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1577 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1578 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1579 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1580 .remove_mcast2ucast_buffer =
1581 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1582 .peer_sta_ps_statechg_enable =
1583 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1584 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1585 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1586 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1587 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1588 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1589 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1590 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1591 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1592 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1593 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1594 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1595 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1596 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1597 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1598 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1599 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1600 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1601 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1602 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1603 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1604 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1605 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1606 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1607 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1608 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1609 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1610 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1611 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1612 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1613 .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
1614 };
1615
1616 static const u8 wmi_key_cipher_suites[] = {
1617 [WMI_CIPHER_NONE] = WMI_CIPHER_NONE,
1618 [WMI_CIPHER_WEP] = WMI_CIPHER_WEP,
1619 [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP,
1620 [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB,
1621 [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM,
1622 [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI,
1623 [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP,
1624 [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC,
1625 [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM,
1626 };
1627
1628 static const u8 wmi_tlv_key_cipher_suites[] = {
1629 [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE,
1630 [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP,
1631 [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP,
1632 [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB,
1633 [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM,
1634 [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI,
1635 [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP,
1636 [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC,
1637 [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM,
1638 };
1639
1640 static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1641 .auth = WMI_PEER_AUTH,
1642 .qos = WMI_PEER_QOS,
1643 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1644 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1645 .apsd = WMI_PEER_APSD,
1646 .ht = WMI_PEER_HT,
1647 .bw40 = WMI_PEER_40MHZ,
1648 .stbc = WMI_PEER_STBC,
1649 .ldbc = WMI_PEER_LDPC,
1650 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1651 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1652 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1653 .vht = WMI_PEER_VHT,
1654 .bw80 = WMI_PEER_80MHZ,
1655 .vht_2g = WMI_PEER_VHT_2G,
1656 .pmf = WMI_PEER_PMF,
1657 .bw160 = WMI_PEER_160MHZ,
1658 };
1659
1660 static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1661 .auth = WMI_10X_PEER_AUTH,
1662 .qos = WMI_10X_PEER_QOS,
1663 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1664 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1665 .apsd = WMI_10X_PEER_APSD,
1666 .ht = WMI_10X_PEER_HT,
1667 .bw40 = WMI_10X_PEER_40MHZ,
1668 .stbc = WMI_10X_PEER_STBC,
1669 .ldbc = WMI_10X_PEER_LDPC,
1670 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1671 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1672 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1673 .vht = WMI_10X_PEER_VHT,
1674 .bw80 = WMI_10X_PEER_80MHZ,
1675 .bw160 = WMI_10X_PEER_160MHZ,
1676 };
1677
1678 static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1679 .auth = WMI_10_2_PEER_AUTH,
1680 .qos = WMI_10_2_PEER_QOS,
1681 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1682 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1683 .apsd = WMI_10_2_PEER_APSD,
1684 .ht = WMI_10_2_PEER_HT,
1685 .bw40 = WMI_10_2_PEER_40MHZ,
1686 .stbc = WMI_10_2_PEER_STBC,
1687 .ldbc = WMI_10_2_PEER_LDPC,
1688 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1689 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1690 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1691 .vht = WMI_10_2_PEER_VHT,
1692 .bw80 = WMI_10_2_PEER_80MHZ,
1693 .vht_2g = WMI_10_2_PEER_VHT_2G,
1694 .pmf = WMI_10_2_PEER_PMF,
1695 .bw160 = WMI_10_2_PEER_160MHZ,
1696 };
1697
ath10k_wmi_put_wmi_channel(struct ath10k * ar,struct wmi_channel * ch,const struct wmi_channel_arg * arg)1698 void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
1699 const struct wmi_channel_arg *arg)
1700 {
1701 u32 flags = 0;
1702 struct ieee80211_channel *chan = NULL;
1703
1704 memset(ch, 0, sizeof(*ch));
1705
1706 if (arg->passive)
1707 flags |= WMI_CHAN_FLAG_PASSIVE;
1708 if (arg->allow_ibss)
1709 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1710 if (arg->allow_ht)
1711 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1712 if (arg->allow_vht)
1713 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1714 if (arg->ht40plus)
1715 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1716 if (arg->chan_radar)
1717 flags |= WMI_CHAN_FLAG_DFS;
1718
1719 ch->band_center_freq2 = 0;
1720 ch->mhz = __cpu_to_le32(arg->freq);
1721 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1722 if (arg->mode == MODE_11AC_VHT80_80) {
1723 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
1724 chan = ieee80211_get_channel(ar->hw->wiphy,
1725 arg->band_center_freq2 - 10);
1726 }
1727
1728 if (arg->mode == MODE_11AC_VHT160) {
1729 u32 band_center_freq1;
1730 u32 band_center_freq2;
1731
1732 if (arg->freq > arg->band_center_freq1) {
1733 band_center_freq1 = arg->band_center_freq1 + 40;
1734 band_center_freq2 = arg->band_center_freq1 - 40;
1735 } else {
1736 band_center_freq1 = arg->band_center_freq1 - 40;
1737 band_center_freq2 = arg->band_center_freq1 + 40;
1738 }
1739
1740 ch->band_center_freq1 =
1741 __cpu_to_le32(band_center_freq1);
1742 /* Minus 10 to get a defined 5G channel frequency*/
1743 chan = ieee80211_get_channel(ar->hw->wiphy,
1744 band_center_freq2 - 10);
1745 /* The center frequency of the entire VHT160 */
1746 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1);
1747 }
1748
1749 if (chan && chan->flags & IEEE80211_CHAN_RADAR)
1750 flags |= WMI_CHAN_FLAG_DFS_CFREQ2;
1751
1752 ch->min_power = arg->min_power;
1753 ch->max_power = arg->max_power;
1754 ch->reg_power = arg->max_reg_power;
1755 ch->antenna_max = arg->max_antenna_gain;
1756 ch->max_tx_power = arg->max_power;
1757
1758 /* mode & flags share storage */
1759 ch->mode = arg->mode;
1760 ch->flags |= __cpu_to_le32(flags);
1761 }
1762
ath10k_wmi_wait_for_service_ready(struct ath10k * ar)1763 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1764 {
1765 unsigned long time_left;
1766
1767 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1768 WMI_SERVICE_READY_TIMEOUT_HZ);
1769 if (!time_left)
1770 return -ETIMEDOUT;
1771 return 0;
1772 }
1773
ath10k_wmi_wait_for_unified_ready(struct ath10k * ar)1774 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1775 {
1776 unsigned long time_left;
1777
1778 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1779 WMI_UNIFIED_READY_TIMEOUT_HZ);
1780 if (!time_left)
1781 return -ETIMEDOUT;
1782 return 0;
1783 }
1784
ath10k_wmi_alloc_skb(struct ath10k * ar,u32 len)1785 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
1786 {
1787 struct sk_buff *skb;
1788 u32 round_len = roundup(len, 4);
1789
1790 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
1791 if (!skb)
1792 return NULL;
1793
1794 skb_reserve(skb, WMI_SKB_HEADROOM);
1795 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1796 ath10k_warn(ar, "Unaligned WMI skb\n");
1797
1798 skb_put(skb, round_len);
1799 memset(skb->data, 0, round_len);
1800
1801 return skb;
1802 }
1803
ath10k_wmi_htc_tx_complete(struct ath10k * ar,struct sk_buff * skb)1804 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1805 {
1806 dev_kfree_skb(skb);
1807 }
1808
ath10k_wmi_cmd_send_nowait(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1809 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1810 u32 cmd_id)
1811 {
1812 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1813 struct wmi_cmd_hdr *cmd_hdr;
1814 int ret;
1815 u32 cmd = 0;
1816
1817 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1818 return -ENOMEM;
1819
1820 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1821
1822 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1823 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1824
1825 memset(skb_cb, 0, sizeof(*skb_cb));
1826 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
1827 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
1828
1829 if (ret)
1830 goto err_pull;
1831
1832 return 0;
1833
1834 err_pull:
1835 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1836 return ret;
1837 }
1838
ath10k_wmi_tx_beacon_nowait(struct ath10k_vif * arvif)1839 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1840 {
1841 struct ath10k *ar = arvif->ar;
1842 struct ath10k_skb_cb *cb;
1843 struct sk_buff *bcn;
1844 bool dtim_zero;
1845 bool deliver_cab;
1846 int ret;
1847
1848 spin_lock_bh(&ar->data_lock);
1849
1850 bcn = arvif->beacon;
1851
1852 if (!bcn)
1853 goto unlock;
1854
1855 cb = ATH10K_SKB_CB(bcn);
1856
1857 switch (arvif->beacon_state) {
1858 case ATH10K_BEACON_SENDING:
1859 case ATH10K_BEACON_SENT:
1860 break;
1861 case ATH10K_BEACON_SCHEDULED:
1862 arvif->beacon_state = ATH10K_BEACON_SENDING;
1863 spin_unlock_bh(&ar->data_lock);
1864
1865 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1866 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
1867 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1868 arvif->vdev_id,
1869 bcn->data, bcn->len,
1870 cb->paddr,
1871 dtim_zero,
1872 deliver_cab);
1873
1874 spin_lock_bh(&ar->data_lock);
1875
1876 if (ret == 0)
1877 arvif->beacon_state = ATH10K_BEACON_SENT;
1878 else
1879 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1880 }
1881
1882 unlock:
1883 spin_unlock_bh(&ar->data_lock);
1884 }
1885
ath10k_wmi_tx_beacons_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1886 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1887 struct ieee80211_vif *vif)
1888 {
1889 struct ath10k_vif *arvif = (void *)vif->drv_priv;
1890
1891 ath10k_wmi_tx_beacon_nowait(arvif);
1892 }
1893
ath10k_wmi_tx_beacons_nowait(struct ath10k * ar)1894 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1895 {
1896 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1897 IEEE80211_IFACE_ITER_NORMAL,
1898 ath10k_wmi_tx_beacons_iter,
1899 NULL);
1900 }
1901
ath10k_wmi_op_ep_tx_credits(struct ath10k * ar)1902 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
1903 {
1904 /* try to send pending beacons first. they take priority */
1905 ath10k_wmi_tx_beacons_nowait(ar);
1906
1907 wake_up(&ar->wmi.tx_credits_wq);
1908 }
1909
ath10k_wmi_cmd_send(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1910 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1911 {
1912 int ret = -EOPNOTSUPP;
1913
1914 might_sleep();
1915
1916 if (cmd_id == WMI_CMD_UNSUPPORTED) {
1917 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1918 cmd_id);
1919 return ret;
1920 }
1921
1922 wait_event_timeout(ar->wmi.tx_credits_wq, ({
1923 /* try to send pending beacons first. they take priority */
1924 ath10k_wmi_tx_beacons_nowait(ar);
1925
1926 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1927
1928 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1929 ret = -ESHUTDOWN;
1930
1931 (ret != -EAGAIN);
1932 }), 3 * HZ);
1933
1934 if (ret)
1935 dev_kfree_skb_any(skb);
1936
1937 if (ret == -EAGAIN) {
1938 ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n",
1939 cmd_id);
1940 queue_work(ar->workqueue, &ar->restart_work);
1941 }
1942
1943 return ret;
1944 }
1945
1946 static struct sk_buff *
ath10k_wmi_op_gen_mgmt_tx(struct ath10k * ar,struct sk_buff * msdu)1947 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1948 {
1949 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1950 struct ath10k_vif *arvif;
1951 struct wmi_mgmt_tx_cmd *cmd;
1952 struct ieee80211_hdr *hdr;
1953 struct sk_buff *skb;
1954 int len;
1955 u32 vdev_id;
1956 u32 buf_len = msdu->len;
1957 u16 fc;
1958 const u8 *peer_addr;
1959
1960 hdr = (struct ieee80211_hdr *)msdu->data;
1961 fc = le16_to_cpu(hdr->frame_control);
1962
1963 if (cb->vif) {
1964 arvif = (void *)cb->vif->drv_priv;
1965 vdev_id = arvif->vdev_id;
1966 } else {
1967 vdev_id = 0;
1968 }
1969
1970 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1971 return ERR_PTR(-EINVAL);
1972
1973 len = sizeof(cmd->hdr) + msdu->len;
1974
1975 if ((ieee80211_is_action(hdr->frame_control) ||
1976 ieee80211_is_deauth(hdr->frame_control) ||
1977 ieee80211_is_disassoc(hdr->frame_control)) &&
1978 ieee80211_has_protected(hdr->frame_control)) {
1979 peer_addr = hdr->addr1;
1980 if (is_multicast_ether_addr(peer_addr)) {
1981 len += sizeof(struct ieee80211_mmie_16);
1982 buf_len += sizeof(struct ieee80211_mmie_16);
1983 } else {
1984 if (cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP ||
1985 cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) {
1986 len += IEEE80211_GCMP_MIC_LEN;
1987 buf_len += IEEE80211_GCMP_MIC_LEN;
1988 } else {
1989 len += IEEE80211_CCMP_MIC_LEN;
1990 buf_len += IEEE80211_CCMP_MIC_LEN;
1991 }
1992 }
1993 }
1994
1995 len = round_up(len, 4);
1996
1997 skb = ath10k_wmi_alloc_skb(ar, len);
1998 if (!skb)
1999 return ERR_PTR(-ENOMEM);
2000
2001 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
2002
2003 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
2004 cmd->hdr.tx_rate = 0;
2005 cmd->hdr.tx_power = 0;
2006 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
2007
2008 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
2009 memcpy(cmd->buf, msdu->data, msdu->len);
2010
2011 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
2012 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
2013 fc & IEEE80211_FCTL_STYPE);
2014 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
2015 trace_ath10k_tx_payload(ar, skb->data, skb->len);
2016
2017 return skb;
2018 }
2019
ath10k_wmi_event_scan_started(struct ath10k * ar)2020 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
2021 {
2022 lockdep_assert_held(&ar->data_lock);
2023
2024 switch (ar->scan.state) {
2025 case ATH10K_SCAN_IDLE:
2026 case ATH10K_SCAN_RUNNING:
2027 case ATH10K_SCAN_ABORTING:
2028 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
2029 ath10k_scan_state_str(ar->scan.state),
2030 ar->scan.state);
2031 break;
2032 case ATH10K_SCAN_STARTING:
2033 ar->scan.state = ATH10K_SCAN_RUNNING;
2034
2035 if (ar->scan.is_roc)
2036 ieee80211_ready_on_channel(ar->hw);
2037
2038 complete(&ar->scan.started);
2039 break;
2040 }
2041 }
2042
ath10k_wmi_event_scan_start_failed(struct ath10k * ar)2043 static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
2044 {
2045 lockdep_assert_held(&ar->data_lock);
2046
2047 switch (ar->scan.state) {
2048 case ATH10K_SCAN_IDLE:
2049 case ATH10K_SCAN_RUNNING:
2050 case ATH10K_SCAN_ABORTING:
2051 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
2052 ath10k_scan_state_str(ar->scan.state),
2053 ar->scan.state);
2054 break;
2055 case ATH10K_SCAN_STARTING:
2056 complete(&ar->scan.started);
2057 __ath10k_scan_finish(ar);
2058 break;
2059 }
2060 }
2061
ath10k_wmi_event_scan_completed(struct ath10k * ar)2062 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
2063 {
2064 lockdep_assert_held(&ar->data_lock);
2065
2066 switch (ar->scan.state) {
2067 case ATH10K_SCAN_IDLE:
2068 case ATH10K_SCAN_STARTING:
2069 /* One suspected reason scan can be completed while starting is
2070 * if firmware fails to deliver all scan events to the host,
2071 * e.g. when transport pipe is full. This has been observed
2072 * with spectral scan phyerr events starving wmi transport
2073 * pipe. In such case the "scan completed" event should be (and
2074 * is) ignored by the host as it may be just firmware's scan
2075 * state machine recovering.
2076 */
2077 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
2078 ath10k_scan_state_str(ar->scan.state),
2079 ar->scan.state);
2080 break;
2081 case ATH10K_SCAN_RUNNING:
2082 case ATH10K_SCAN_ABORTING:
2083 __ath10k_scan_finish(ar);
2084 break;
2085 }
2086 }
2087
ath10k_wmi_event_scan_bss_chan(struct ath10k * ar)2088 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
2089 {
2090 lockdep_assert_held(&ar->data_lock);
2091
2092 switch (ar->scan.state) {
2093 case ATH10K_SCAN_IDLE:
2094 case ATH10K_SCAN_STARTING:
2095 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
2096 ath10k_scan_state_str(ar->scan.state),
2097 ar->scan.state);
2098 break;
2099 case ATH10K_SCAN_RUNNING:
2100 case ATH10K_SCAN_ABORTING:
2101 ar->scan_channel = NULL;
2102 break;
2103 }
2104 }
2105
ath10k_wmi_event_scan_foreign_chan(struct ath10k * ar,u32 freq)2106 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
2107 {
2108 lockdep_assert_held(&ar->data_lock);
2109
2110 switch (ar->scan.state) {
2111 case ATH10K_SCAN_IDLE:
2112 case ATH10K_SCAN_STARTING:
2113 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
2114 ath10k_scan_state_str(ar->scan.state),
2115 ar->scan.state);
2116 break;
2117 case ATH10K_SCAN_RUNNING:
2118 case ATH10K_SCAN_ABORTING:
2119 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
2120
2121 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
2122 complete(&ar->scan.on_channel);
2123 break;
2124 }
2125 }
2126
2127 static const char *
ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)2128 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
2129 enum wmi_scan_completion_reason reason)
2130 {
2131 switch (type) {
2132 case WMI_SCAN_EVENT_STARTED:
2133 return "started";
2134 case WMI_SCAN_EVENT_COMPLETED:
2135 switch (reason) {
2136 case WMI_SCAN_REASON_COMPLETED:
2137 return "completed";
2138 case WMI_SCAN_REASON_CANCELLED:
2139 return "completed [cancelled]";
2140 case WMI_SCAN_REASON_PREEMPTED:
2141 return "completed [preempted]";
2142 case WMI_SCAN_REASON_TIMEDOUT:
2143 return "completed [timedout]";
2144 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2145 return "completed [internal err]";
2146 case WMI_SCAN_REASON_MAX:
2147 break;
2148 }
2149 return "completed [unknown]";
2150 case WMI_SCAN_EVENT_BSS_CHANNEL:
2151 return "bss channel";
2152 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2153 return "foreign channel";
2154 case WMI_SCAN_EVENT_DEQUEUED:
2155 return "dequeued";
2156 case WMI_SCAN_EVENT_PREEMPTED:
2157 return "preempted";
2158 case WMI_SCAN_EVENT_START_FAILED:
2159 return "start failed";
2160 case WMI_SCAN_EVENT_RESTARTED:
2161 return "restarted";
2162 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2163 return "foreign channel exit";
2164 default:
2165 return "unknown";
2166 }
2167 }
2168
ath10k_wmi_op_pull_scan_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_scan_ev_arg * arg)2169 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2170 struct wmi_scan_ev_arg *arg)
2171 {
2172 struct wmi_scan_event *ev = (void *)skb->data;
2173
2174 if (skb->len < sizeof(*ev))
2175 return -EPROTO;
2176
2177 skb_pull(skb, sizeof(*ev));
2178 arg->event_type = ev->event_type;
2179 arg->reason = ev->reason;
2180 arg->channel_freq = ev->channel_freq;
2181 arg->scan_req_id = ev->scan_req_id;
2182 arg->scan_id = ev->scan_id;
2183 arg->vdev_id = ev->vdev_id;
2184
2185 return 0;
2186 }
2187
ath10k_wmi_event_scan(struct ath10k * ar,struct sk_buff * skb)2188 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
2189 {
2190 struct wmi_scan_ev_arg arg = {};
2191 enum wmi_scan_event_type event_type;
2192 enum wmi_scan_completion_reason reason;
2193 u32 freq;
2194 u32 req_id;
2195 u32 scan_id;
2196 u32 vdev_id;
2197 int ret;
2198
2199 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
2200 if (ret) {
2201 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2202 return ret;
2203 }
2204
2205 event_type = __le32_to_cpu(arg.event_type);
2206 reason = __le32_to_cpu(arg.reason);
2207 freq = __le32_to_cpu(arg.channel_freq);
2208 req_id = __le32_to_cpu(arg.scan_req_id);
2209 scan_id = __le32_to_cpu(arg.scan_id);
2210 vdev_id = __le32_to_cpu(arg.vdev_id);
2211
2212 spin_lock_bh(&ar->data_lock);
2213
2214 ath10k_dbg(ar, ATH10K_DBG_WMI,
2215 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
2216 ath10k_wmi_event_scan_type_str(event_type, reason),
2217 event_type, reason, freq, req_id, scan_id, vdev_id,
2218 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
2219
2220 switch (event_type) {
2221 case WMI_SCAN_EVENT_STARTED:
2222 ath10k_wmi_event_scan_started(ar);
2223 break;
2224 case WMI_SCAN_EVENT_COMPLETED:
2225 ath10k_wmi_event_scan_completed(ar);
2226 break;
2227 case WMI_SCAN_EVENT_BSS_CHANNEL:
2228 ath10k_wmi_event_scan_bss_chan(ar);
2229 break;
2230 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2231 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2232 break;
2233 case WMI_SCAN_EVENT_START_FAILED:
2234 ath10k_warn(ar, "received scan start failure event\n");
2235 ath10k_wmi_event_scan_start_failed(ar);
2236 break;
2237 case WMI_SCAN_EVENT_DEQUEUED:
2238 case WMI_SCAN_EVENT_PREEMPTED:
2239 case WMI_SCAN_EVENT_RESTARTED:
2240 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2241 default:
2242 break;
2243 }
2244
2245 spin_unlock_bh(&ar->data_lock);
2246 return 0;
2247 }
2248
2249 /* If keys are configured, HW decrypts all frames
2250 * with protected bit set. Mark such frames as decrypted.
2251 */
ath10k_wmi_handle_wep_reauth(struct ath10k * ar,struct sk_buff * skb,struct ieee80211_rx_status * status)2252 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2253 struct sk_buff *skb,
2254 struct ieee80211_rx_status *status)
2255 {
2256 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2257 unsigned int hdrlen;
2258 bool peer_key;
2259 u8 *addr, keyidx;
2260
2261 if (!ieee80211_is_auth(hdr->frame_control) ||
2262 !ieee80211_has_protected(hdr->frame_control))
2263 return;
2264
2265 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2266 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2267 return;
2268
2269 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2270 addr = ieee80211_get_SA(hdr);
2271
2272 spin_lock_bh(&ar->data_lock);
2273 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2274 spin_unlock_bh(&ar->data_lock);
2275
2276 if (peer_key) {
2277 ath10k_dbg(ar, ATH10K_DBG_MAC,
2278 "mac wep key present for peer %pM\n", addr);
2279 status->flag |= RX_FLAG_DECRYPTED;
2280 }
2281 }
2282
ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2283 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2284 struct wmi_mgmt_rx_ev_arg *arg)
2285 {
2286 struct wmi_mgmt_rx_event_v1 *ev_v1;
2287 struct wmi_mgmt_rx_event_v2 *ev_v2;
2288 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
2289 struct wmi_mgmt_rx_ext_info *ext_info;
2290 size_t pull_len;
2291 u32 msdu_len;
2292 u32 len;
2293
2294 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2295 ar->running_fw->fw_file.fw_features)) {
2296 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2297 ev_hdr = &ev_v2->hdr.v1;
2298 pull_len = sizeof(*ev_v2);
2299 } else {
2300 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2301 ev_hdr = &ev_v1->hdr;
2302 pull_len = sizeof(*ev_v1);
2303 }
2304
2305 if (skb->len < pull_len)
2306 return -EPROTO;
2307
2308 skb_pull(skb, pull_len);
2309 arg->channel = ev_hdr->channel;
2310 arg->buf_len = ev_hdr->buf_len;
2311 arg->status = ev_hdr->status;
2312 arg->snr = ev_hdr->snr;
2313 arg->phy_mode = ev_hdr->phy_mode;
2314 arg->rate = ev_hdr->rate;
2315
2316 msdu_len = __le32_to_cpu(arg->buf_len);
2317 if (skb->len < msdu_len)
2318 return -EPROTO;
2319
2320 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2321 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2322 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2323 memcpy(&arg->ext_info, ext_info,
2324 sizeof(struct wmi_mgmt_rx_ext_info));
2325 }
2326 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2327 * trailer with credit update. Trim the excess garbage.
2328 */
2329 skb_trim(skb, msdu_len);
2330
2331 return 0;
2332 }
2333
ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2334 static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2335 struct sk_buff *skb,
2336 struct wmi_mgmt_rx_ev_arg *arg)
2337 {
2338 struct wmi_10_4_mgmt_rx_event *ev;
2339 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2340 size_t pull_len;
2341 u32 msdu_len;
2342 struct wmi_mgmt_rx_ext_info *ext_info;
2343 u32 len;
2344
2345 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2346 ev_hdr = &ev->hdr;
2347 pull_len = sizeof(*ev);
2348
2349 if (skb->len < pull_len)
2350 return -EPROTO;
2351
2352 skb_pull(skb, pull_len);
2353 arg->channel = ev_hdr->channel;
2354 arg->buf_len = ev_hdr->buf_len;
2355 arg->status = ev_hdr->status;
2356 arg->snr = ev_hdr->snr;
2357 arg->phy_mode = ev_hdr->phy_mode;
2358 arg->rate = ev_hdr->rate;
2359
2360 msdu_len = __le32_to_cpu(arg->buf_len);
2361 if (skb->len < msdu_len)
2362 return -EPROTO;
2363
2364 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2365 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2366 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2367 memcpy(&arg->ext_info, ext_info,
2368 sizeof(struct wmi_mgmt_rx_ext_info));
2369 }
2370
2371 /* Make sure bytes added for padding are removed. */
2372 skb_trim(skb, msdu_len);
2373
2374 return 0;
2375 }
2376
ath10k_wmi_rx_is_decrypted(struct ath10k * ar,struct ieee80211_hdr * hdr)2377 static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
2378 struct ieee80211_hdr *hdr)
2379 {
2380 if (!ieee80211_has_protected(hdr->frame_control))
2381 return false;
2382
2383 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2384 * encrypted payload. However in case of PMF it delivers decrypted
2385 * frames with Protected Bit set.
2386 */
2387 if (ieee80211_is_auth(hdr->frame_control))
2388 return false;
2389
2390 /* qca99x0 based FW delivers broadcast or multicast management frames
2391 * (ex: group privacy action frames in mesh) as encrypted payload.
2392 */
2393 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
2394 ar->hw_params.sw_decrypt_mcast_mgmt)
2395 return false;
2396
2397 return true;
2398 }
2399
2400 static int
wmi_process_mgmt_tx_comp(struct ath10k * ar,struct mgmt_tx_compl_params * param)2401 wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param)
2402 {
2403 struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
2404 struct ath10k_wmi *wmi = &ar->wmi;
2405 struct ieee80211_tx_info *info;
2406 struct sk_buff *msdu;
2407 int ret;
2408
2409 spin_lock_bh(&ar->data_lock);
2410
2411 pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id);
2412 if (!pkt_addr) {
2413 ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
2414 param->desc_id);
2415 ret = -ENOENT;
2416 goto out;
2417 }
2418
2419 msdu = pkt_addr->vaddr;
2420 dma_unmap_single(ar->dev, pkt_addr->paddr,
2421 msdu->len, DMA_TO_DEVICE);
2422 info = IEEE80211_SKB_CB(msdu);
2423
2424 if (param->status) {
2425 info->flags &= ~IEEE80211_TX_STAT_ACK;
2426 } else {
2427 info->flags |= IEEE80211_TX_STAT_ACK;
2428 info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR +
2429 param->ack_rssi;
2430 info->status.is_valid_ack_signal = true;
2431 }
2432
2433 ieee80211_tx_status_irqsafe(ar->hw, msdu);
2434
2435 ret = 0;
2436
2437 out:
2438 idr_remove(&wmi->mgmt_pending_tx, param->desc_id);
2439 spin_unlock_bh(&ar->data_lock);
2440 return ret;
2441 }
2442
ath10k_wmi_event_mgmt_tx_compl(struct ath10k * ar,struct sk_buff * skb)2443 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
2444 {
2445 struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
2446 struct mgmt_tx_compl_params param;
2447 int ret;
2448
2449 ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
2450 if (ret) {
2451 ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
2452 return ret;
2453 }
2454
2455 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2456 param.desc_id = __le32_to_cpu(arg.desc_id);
2457 param.status = __le32_to_cpu(arg.status);
2458
2459 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2460 param.ack_rssi = __le32_to_cpu(arg.ack_rssi);
2461
2462 wmi_process_mgmt_tx_comp(ar, ¶m);
2463
2464 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
2465
2466 return 0;
2467 }
2468
ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k * ar,struct sk_buff * skb)2469 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb)
2470 {
2471 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg;
2472 struct mgmt_tx_compl_params param;
2473 u32 num_reports;
2474 int i, ret;
2475
2476 ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg);
2477 if (ret) {
2478 ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret);
2479 return ret;
2480 }
2481
2482 num_reports = __le32_to_cpu(arg.num_reports);
2483
2484 for (i = 0; i < num_reports; i++) {
2485 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2486 param.desc_id = __le32_to_cpu(arg.desc_ids[i]);
2487 param.status = __le32_to_cpu(arg.desc_ids[i]);
2488
2489 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2490 param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]);
2491 wmi_process_mgmt_tx_comp(ar, ¶m);
2492 }
2493
2494 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n");
2495
2496 return 0;
2497 }
2498
ath10k_wmi_event_mgmt_rx(struct ath10k * ar,struct sk_buff * skb)2499 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
2500 {
2501 struct wmi_mgmt_rx_ev_arg arg = {};
2502 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2503 struct ieee80211_hdr *hdr;
2504 struct ieee80211_supported_band *sband;
2505 u32 rx_status;
2506 u32 channel;
2507 u32 phy_mode;
2508 u32 snr, rssi;
2509 u32 rate;
2510 u16 fc;
2511 int ret, i;
2512
2513 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
2514 if (ret) {
2515 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
2516 dev_kfree_skb(skb);
2517 return ret;
2518 }
2519
2520 channel = __le32_to_cpu(arg.channel);
2521 rx_status = __le32_to_cpu(arg.status);
2522 snr = __le32_to_cpu(arg.snr);
2523 phy_mode = __le32_to_cpu(arg.phy_mode);
2524 rate = __le32_to_cpu(arg.rate);
2525
2526 memset(status, 0, sizeof(*status));
2527
2528 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2529 "event mgmt rx status %08x\n", rx_status);
2530
2531 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2532 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2533 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
2534 dev_kfree_skb(skb);
2535 return 0;
2536 }
2537
2538 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2539 status->flag |= RX_FLAG_MMIC_ERROR;
2540
2541 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2542 status->mactime =
2543 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2544 status->flag |= RX_FLAG_MACTIME_END;
2545 }
2546 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
2547 * MODE_11B. This means phy_mode is not a reliable source for the band
2548 * of mgmt rx.
2549 */
2550 if (channel >= 1 && channel <= 14) {
2551 status->band = NL80211_BAND_2GHZ;
2552 } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
2553 status->band = NL80211_BAND_5GHZ;
2554 } else {
2555 /* Shouldn't happen unless list of advertised channels to
2556 * mac80211 has been changed.
2557 */
2558 WARN_ON_ONCE(1);
2559 dev_kfree_skb(skb);
2560 return 0;
2561 }
2562
2563 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
2564 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2565
2566 sband = &ar->mac.sbands[status->band];
2567
2568 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2569 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
2570
2571 BUILD_BUG_ON(ARRAY_SIZE(status->chain_signal) != ARRAY_SIZE(arg.rssi));
2572
2573 for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
2574 status->chains &= ~BIT(i);
2575 rssi = __le32_to_cpu(arg.rssi[i]);
2576 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt rssi[%d]:%d\n", i, arg.rssi[i]);
2577
2578 if (rssi != ATH10K_INVALID_RSSI && rssi != 0) {
2579 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + rssi;
2580 status->chains |= BIT(i);
2581 }
2582 }
2583
2584 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
2585
2586 hdr = (struct ieee80211_hdr *)skb->data;
2587 fc = le16_to_cpu(hdr->frame_control);
2588
2589 /* Firmware is guaranteed to report all essential management frames via
2590 * WMI while it can deliver some extra via HTT. Since there can be
2591 * duplicates split the reporting wrt monitor/sniffing.
2592 */
2593 status->flag |= RX_FLAG_SKIP_MONITOR;
2594
2595 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2596
2597 if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
2598 status->flag |= RX_FLAG_DECRYPTED;
2599
2600 if (!ieee80211_is_action(hdr->frame_control) &&
2601 !ieee80211_is_deauth(hdr->frame_control) &&
2602 !ieee80211_is_disassoc(hdr->frame_control)) {
2603 status->flag |= RX_FLAG_IV_STRIPPED |
2604 RX_FLAG_MMIC_STRIPPED;
2605 hdr->frame_control = __cpu_to_le16(fc &
2606 ~IEEE80211_FCTL_PROTECTED);
2607 }
2608 }
2609
2610 if (ieee80211_is_beacon(hdr->frame_control))
2611 ath10k_mac_handle_beacon(ar, skb);
2612
2613 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2614 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
2615 skb, skb->len,
2616 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2617
2618 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2619 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2620 status->freq, status->band, status->signal,
2621 status->rate_idx);
2622
2623 ieee80211_rx_ni(ar->hw, skb);
2624
2625 return 0;
2626 }
2627
freq_to_idx(struct ath10k * ar,int freq)2628 static int freq_to_idx(struct ath10k *ar, int freq)
2629 {
2630 struct ieee80211_supported_band *sband;
2631 int band, ch, idx = 0;
2632
2633 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2634 sband = ar->hw->wiphy->bands[band];
2635 if (!sband)
2636 continue;
2637
2638 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2639 if (sband->channels[ch].center_freq == freq)
2640 goto exit;
2641 }
2642
2643 exit:
2644 return idx;
2645 }
2646
ath10k_wmi_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2647 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2648 struct wmi_ch_info_ev_arg *arg)
2649 {
2650 struct wmi_chan_info_event *ev = (void *)skb->data;
2651
2652 if (skb->len < sizeof(*ev))
2653 return -EPROTO;
2654
2655 skb_pull(skb, sizeof(*ev));
2656 arg->err_code = ev->err_code;
2657 arg->freq = ev->freq;
2658 arg->cmd_flags = ev->cmd_flags;
2659 arg->noise_floor = ev->noise_floor;
2660 arg->rx_clear_count = ev->rx_clear_count;
2661 arg->cycle_count = ev->cycle_count;
2662
2663 return 0;
2664 }
2665
ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2666 static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2667 struct sk_buff *skb,
2668 struct wmi_ch_info_ev_arg *arg)
2669 {
2670 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2671
2672 if (skb->len < sizeof(*ev))
2673 return -EPROTO;
2674
2675 skb_pull(skb, sizeof(*ev));
2676 arg->err_code = ev->err_code;
2677 arg->freq = ev->freq;
2678 arg->cmd_flags = ev->cmd_flags;
2679 arg->noise_floor = ev->noise_floor;
2680 arg->rx_clear_count = ev->rx_clear_count;
2681 arg->cycle_count = ev->cycle_count;
2682 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2683 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2684 arg->rx_frame_count = ev->rx_frame_count;
2685
2686 return 0;
2687 }
2688
2689 /*
2690 * Handle the channel info event for firmware which only sends one
2691 * chan_info event per scanned channel.
2692 */
ath10k_wmi_event_chan_info_unpaired(struct ath10k * ar,struct chan_info_params * params)2693 static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar,
2694 struct chan_info_params *params)
2695 {
2696 struct survey_info *survey;
2697 int idx;
2698
2699 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2700 ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n");
2701 return;
2702 }
2703
2704 idx = freq_to_idx(ar, params->freq);
2705 if (idx >= ARRAY_SIZE(ar->survey)) {
2706 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2707 params->freq, idx);
2708 return;
2709 }
2710
2711 survey = &ar->survey[idx];
2712
2713 if (!params->mac_clk_mhz)
2714 return;
2715
2716 memset(survey, 0, sizeof(*survey));
2717
2718 survey->noise = params->noise_floor;
2719 survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000;
2720 survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000;
2721 survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
2722 SURVEY_INFO_TIME_BUSY;
2723 }
2724
2725 /*
2726 * Handle the channel info event for firmware which sends chan_info
2727 * event in pairs(start and stop events) for every scanned channel.
2728 */
ath10k_wmi_event_chan_info_paired(struct ath10k * ar,struct chan_info_params * params)2729 static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar,
2730 struct chan_info_params *params)
2731 {
2732 struct survey_info *survey;
2733 int idx;
2734
2735 idx = freq_to_idx(ar, params->freq);
2736 if (idx >= ARRAY_SIZE(ar->survey)) {
2737 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2738 params->freq, idx);
2739 return;
2740 }
2741
2742 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2743 if (ar->ch_info_can_report_survey) {
2744 survey = &ar->survey[idx];
2745 survey->noise = params->noise_floor;
2746 survey->filled = SURVEY_INFO_NOISE_DBM;
2747
2748 ath10k_hw_fill_survey_time(ar,
2749 survey,
2750 params->cycle_count,
2751 params->rx_clear_count,
2752 ar->survey_last_cycle_count,
2753 ar->survey_last_rx_clear_count);
2754 }
2755
2756 ar->ch_info_can_report_survey = false;
2757 } else {
2758 ar->ch_info_can_report_survey = true;
2759 }
2760
2761 if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2762 ar->survey_last_rx_clear_count = params->rx_clear_count;
2763 ar->survey_last_cycle_count = params->cycle_count;
2764 }
2765 }
2766
ath10k_wmi_event_chan_info(struct ath10k * ar,struct sk_buff * skb)2767 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
2768 {
2769 struct chan_info_params ch_info_param;
2770 struct wmi_ch_info_ev_arg arg = {};
2771 int ret;
2772
2773 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
2774 if (ret) {
2775 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2776 return;
2777 }
2778
2779 ch_info_param.err_code = __le32_to_cpu(arg.err_code);
2780 ch_info_param.freq = __le32_to_cpu(arg.freq);
2781 ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags);
2782 ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor);
2783 ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2784 ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count);
2785 ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz);
2786
2787 ath10k_dbg(ar, ATH10K_DBG_WMI,
2788 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2789 ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags,
2790 ch_info_param.noise_floor, ch_info_param.rx_clear_count,
2791 ch_info_param.cycle_count);
2792
2793 spin_lock_bh(&ar->data_lock);
2794
2795 switch (ar->scan.state) {
2796 case ATH10K_SCAN_IDLE:
2797 case ATH10K_SCAN_STARTING:
2798 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2799 goto exit;
2800 case ATH10K_SCAN_RUNNING:
2801 case ATH10K_SCAN_ABORTING:
2802 break;
2803 }
2804
2805 if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL,
2806 ar->running_fw->fw_file.fw_features))
2807 ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param);
2808 else
2809 ath10k_wmi_event_chan_info_paired(ar, &ch_info_param);
2810
2811 exit:
2812 spin_unlock_bh(&ar->data_lock);
2813 }
2814
ath10k_wmi_event_echo(struct ath10k * ar,struct sk_buff * skb)2815 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
2816 {
2817 struct wmi_echo_ev_arg arg = {};
2818 int ret;
2819
2820 ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
2821 if (ret) {
2822 ath10k_warn(ar, "failed to parse echo: %d\n", ret);
2823 return;
2824 }
2825
2826 ath10k_dbg(ar, ATH10K_DBG_WMI,
2827 "wmi event echo value 0x%08x\n",
2828 le32_to_cpu(arg.value));
2829
2830 if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
2831 complete(&ar->wmi.barrier);
2832 }
2833
ath10k_wmi_event_debug_mesg(struct ath10k * ar,struct sk_buff * skb)2834 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
2835 {
2836 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
2837 skb->len);
2838
2839 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
2840
2841 return 0;
2842 }
2843
ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base * src,struct ath10k_fw_stats_pdev * dst)2844 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2845 struct ath10k_fw_stats_pdev *dst)
2846 {
2847 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2848 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2849 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2850 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2851 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2852 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2853 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
2854 }
2855
ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2856 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2857 struct ath10k_fw_stats_pdev *dst)
2858 {
2859 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2860 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2861 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2862 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2863 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2864 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2865 dst->local_freed = __le32_to_cpu(src->local_freed);
2866 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2867 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2868 dst->underrun = __le32_to_cpu(src->underrun);
2869 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2870 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2871 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2872 dst->data_rc = __le32_to_cpu(src->data_rc);
2873 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2874 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2875 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2876 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2877 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2878 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2879 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2880 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2881 }
2882
2883 static void
ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2884 ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2885 struct ath10k_fw_stats_pdev *dst)
2886 {
2887 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2888 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2889 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2890 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2891 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2892 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2893 dst->local_freed = __le32_to_cpu(src->local_freed);
2894 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2895 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2896 dst->underrun = __le32_to_cpu(src->underrun);
2897 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2898 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2899 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2900 dst->data_rc = __le32_to_cpu(src->data_rc);
2901 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2902 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2903 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2904 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2905 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2906 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2907 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2908 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2909 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2910 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2911 dst->seq_failed_queueing =
2912 __le32_to_cpu(src->seq_failed_queueing);
2913 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2914 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2915 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2916 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2917 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2918 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2919 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2920 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2921 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2922 }
2923
ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx * src,struct ath10k_fw_stats_pdev * dst)2924 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2925 struct ath10k_fw_stats_pdev *dst)
2926 {
2927 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2928 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2929 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2930 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2931 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2932 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2933 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2934 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2935 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2936 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2937 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2938 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2939 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2940 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2941 }
2942
ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra * src,struct ath10k_fw_stats_pdev * dst)2943 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2944 struct ath10k_fw_stats_pdev *dst)
2945 {
2946 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2947 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2948 dst->rts_good = __le32_to_cpu(src->rts_good);
2949 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2950 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2951 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
2952 }
2953
ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats * src,struct ath10k_fw_stats_peer * dst)2954 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2955 struct ath10k_fw_stats_peer *dst)
2956 {
2957 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2958 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2959 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2960 }
2961
2962 static void
ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats * src,struct ath10k_fw_stats_peer * dst)2963 ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2964 struct ath10k_fw_stats_peer *dst)
2965 {
2966 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2967 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2968 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2969 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2970 }
2971
2972 static void
ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd * src,struct ath10k_fw_stats_vdev_extd * dst)2973 ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
2974 struct ath10k_fw_stats_vdev_extd *dst)
2975 {
2976 dst->vdev_id = __le32_to_cpu(src->vdev_id);
2977 dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
2978 dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
2979 dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
2980 dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
2981 dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
2982 dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
2983 dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
2984 dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
2985 dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
2986 dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
2987 dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
2988 dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
2989 dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
2990 dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
2991 dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
2992 }
2993
ath10k_wmi_main_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)2994 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2995 struct sk_buff *skb,
2996 struct ath10k_fw_stats *stats)
2997 {
2998 const struct wmi_stats_event *ev = (void *)skb->data;
2999 u32 num_pdev_stats, num_peer_stats;
3000 int i;
3001
3002 if (!skb_pull(skb, sizeof(*ev)))
3003 return -EPROTO;
3004
3005 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3006 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3007
3008 for (i = 0; i < num_pdev_stats; i++) {
3009 const struct wmi_pdev_stats *src;
3010 struct ath10k_fw_stats_pdev *dst;
3011
3012 src = (void *)skb->data;
3013 if (!skb_pull(skb, sizeof(*src)))
3014 return -EPROTO;
3015
3016 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3017 if (!dst)
3018 continue;
3019
3020 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3021 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3022 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3023
3024 list_add_tail(&dst->list, &stats->pdevs);
3025 }
3026
3027 /* fw doesn't implement vdev stats */
3028
3029 for (i = 0; i < num_peer_stats; i++) {
3030 const struct wmi_peer_stats *src;
3031 struct ath10k_fw_stats_peer *dst;
3032
3033 src = (void *)skb->data;
3034 if (!skb_pull(skb, sizeof(*src)))
3035 return -EPROTO;
3036
3037 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3038 if (!dst)
3039 continue;
3040
3041 ath10k_wmi_pull_peer_stats(src, dst);
3042 list_add_tail(&dst->list, &stats->peers);
3043 }
3044
3045 return 0;
3046 }
3047
ath10k_wmi_10x_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3048 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
3049 struct sk_buff *skb,
3050 struct ath10k_fw_stats *stats)
3051 {
3052 const struct wmi_stats_event *ev = (void *)skb->data;
3053 u32 num_pdev_stats, num_peer_stats;
3054 int i;
3055
3056 if (!skb_pull(skb, sizeof(*ev)))
3057 return -EPROTO;
3058
3059 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3060 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3061
3062 for (i = 0; i < num_pdev_stats; i++) {
3063 const struct wmi_10x_pdev_stats *src;
3064 struct ath10k_fw_stats_pdev *dst;
3065
3066 src = (void *)skb->data;
3067 if (!skb_pull(skb, sizeof(*src)))
3068 return -EPROTO;
3069
3070 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3071 if (!dst)
3072 continue;
3073
3074 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3075 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3076 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3077 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3078
3079 list_add_tail(&dst->list, &stats->pdevs);
3080 }
3081
3082 /* fw doesn't implement vdev stats */
3083
3084 for (i = 0; i < num_peer_stats; i++) {
3085 const struct wmi_10x_peer_stats *src;
3086 struct ath10k_fw_stats_peer *dst;
3087
3088 src = (void *)skb->data;
3089 if (!skb_pull(skb, sizeof(*src)))
3090 return -EPROTO;
3091
3092 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3093 if (!dst)
3094 continue;
3095
3096 ath10k_wmi_pull_peer_stats(&src->old, dst);
3097
3098 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3099
3100 list_add_tail(&dst->list, &stats->peers);
3101 }
3102
3103 return 0;
3104 }
3105
ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3106 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
3107 struct sk_buff *skb,
3108 struct ath10k_fw_stats *stats)
3109 {
3110 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3111 u32 num_pdev_stats;
3112 u32 num_pdev_ext_stats;
3113 u32 num_peer_stats;
3114 int i;
3115
3116 if (!skb_pull(skb, sizeof(*ev)))
3117 return -EPROTO;
3118
3119 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3120 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3121 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3122
3123 for (i = 0; i < num_pdev_stats; i++) {
3124 const struct wmi_10_2_pdev_stats *src;
3125 struct ath10k_fw_stats_pdev *dst;
3126
3127 src = (void *)skb->data;
3128 if (!skb_pull(skb, sizeof(*src)))
3129 return -EPROTO;
3130
3131 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3132 if (!dst)
3133 continue;
3134
3135 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3136 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3137 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3138 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3139 /* FIXME: expose 10.2 specific values */
3140
3141 list_add_tail(&dst->list, &stats->pdevs);
3142 }
3143
3144 for (i = 0; i < num_pdev_ext_stats; i++) {
3145 const struct wmi_10_2_pdev_ext_stats *src;
3146
3147 src = (void *)skb->data;
3148 if (!skb_pull(skb, sizeof(*src)))
3149 return -EPROTO;
3150
3151 /* FIXME: expose values to userspace
3152 *
3153 * Note: Even though this loop seems to do nothing it is
3154 * required to parse following sub-structures properly.
3155 */
3156 }
3157
3158 /* fw doesn't implement vdev stats */
3159
3160 for (i = 0; i < num_peer_stats; i++) {
3161 const struct wmi_10_2_peer_stats *src;
3162 struct ath10k_fw_stats_peer *dst;
3163
3164 src = (void *)skb->data;
3165 if (!skb_pull(skb, sizeof(*src)))
3166 return -EPROTO;
3167
3168 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3169 if (!dst)
3170 continue;
3171
3172 ath10k_wmi_pull_peer_stats(&src->old, dst);
3173
3174 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3175 /* FIXME: expose 10.2 specific values */
3176
3177 list_add_tail(&dst->list, &stats->peers);
3178 }
3179
3180 return 0;
3181 }
3182
ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3183 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
3184 struct sk_buff *skb,
3185 struct ath10k_fw_stats *stats)
3186 {
3187 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3188 u32 num_pdev_stats;
3189 u32 num_pdev_ext_stats;
3190 u32 num_peer_stats;
3191 int i;
3192
3193 if (!skb_pull(skb, sizeof(*ev)))
3194 return -EPROTO;
3195
3196 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3197 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3198 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3199
3200 for (i = 0; i < num_pdev_stats; i++) {
3201 const struct wmi_10_2_pdev_stats *src;
3202 struct ath10k_fw_stats_pdev *dst;
3203
3204 src = (void *)skb->data;
3205 if (!skb_pull(skb, sizeof(*src)))
3206 return -EPROTO;
3207
3208 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3209 if (!dst)
3210 continue;
3211
3212 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3213 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3214 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3215 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3216 /* FIXME: expose 10.2 specific values */
3217
3218 list_add_tail(&dst->list, &stats->pdevs);
3219 }
3220
3221 for (i = 0; i < num_pdev_ext_stats; i++) {
3222 const struct wmi_10_2_pdev_ext_stats *src;
3223
3224 src = (void *)skb->data;
3225 if (!skb_pull(skb, sizeof(*src)))
3226 return -EPROTO;
3227
3228 /* FIXME: expose values to userspace
3229 *
3230 * Note: Even though this loop seems to do nothing it is
3231 * required to parse following sub-structures properly.
3232 */
3233 }
3234
3235 /* fw doesn't implement vdev stats */
3236
3237 for (i = 0; i < num_peer_stats; i++) {
3238 const struct wmi_10_2_4_ext_peer_stats *src;
3239 struct ath10k_fw_stats_peer *dst;
3240 int stats_len;
3241
3242 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
3243 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
3244 else
3245 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
3246
3247 src = (void *)skb->data;
3248 if (!skb_pull(skb, stats_len))
3249 return -EPROTO;
3250
3251 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3252 if (!dst)
3253 continue;
3254
3255 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
3256
3257 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
3258
3259 if (ath10k_peer_stats_enabled(ar))
3260 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3261 /* FIXME: expose 10.2 specific values */
3262
3263 list_add_tail(&dst->list, &stats->peers);
3264 }
3265
3266 return 0;
3267 }
3268
ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3269 static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
3270 struct sk_buff *skb,
3271 struct ath10k_fw_stats *stats)
3272 {
3273 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3274 u32 num_pdev_stats;
3275 u32 num_pdev_ext_stats;
3276 u32 num_vdev_stats;
3277 u32 num_peer_stats;
3278 u32 num_bcnflt_stats;
3279 u32 stats_id;
3280 int i;
3281
3282 if (!skb_pull(skb, sizeof(*ev)))
3283 return -EPROTO;
3284
3285 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3286 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3287 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
3288 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3289 num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
3290 stats_id = __le32_to_cpu(ev->stats_id);
3291
3292 for (i = 0; i < num_pdev_stats; i++) {
3293 const struct wmi_10_4_pdev_stats *src;
3294 struct ath10k_fw_stats_pdev *dst;
3295
3296 src = (void *)skb->data;
3297 if (!skb_pull(skb, sizeof(*src)))
3298 return -EPROTO;
3299
3300 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3301 if (!dst)
3302 continue;
3303
3304 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3305 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
3306 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3307 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
3308 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3309
3310 list_add_tail(&dst->list, &stats->pdevs);
3311 }
3312
3313 for (i = 0; i < num_pdev_ext_stats; i++) {
3314 const struct wmi_10_2_pdev_ext_stats *src;
3315
3316 src = (void *)skb->data;
3317 if (!skb_pull(skb, sizeof(*src)))
3318 return -EPROTO;
3319
3320 /* FIXME: expose values to userspace
3321 *
3322 * Note: Even though this loop seems to do nothing it is
3323 * required to parse following sub-structures properly.
3324 */
3325 }
3326
3327 for (i = 0; i < num_vdev_stats; i++) {
3328 const struct wmi_vdev_stats *src;
3329
3330 /* Ignore vdev stats here as it has only vdev id. Actual vdev
3331 * stats will be retrieved from vdev extended stats.
3332 */
3333 src = (void *)skb->data;
3334 if (!skb_pull(skb, sizeof(*src)))
3335 return -EPROTO;
3336 }
3337
3338 for (i = 0; i < num_peer_stats; i++) {
3339 const struct wmi_10_4_peer_stats *src;
3340 struct ath10k_fw_stats_peer *dst;
3341
3342 src = (void *)skb->data;
3343 if (!skb_pull(skb, sizeof(*src)))
3344 return -EPROTO;
3345
3346 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3347 if (!dst)
3348 continue;
3349
3350 ath10k_wmi_10_4_pull_peer_stats(src, dst);
3351 list_add_tail(&dst->list, &stats->peers);
3352 }
3353
3354 for (i = 0; i < num_bcnflt_stats; i++) {
3355 const struct wmi_10_4_bss_bcn_filter_stats *src;
3356
3357 src = (void *)skb->data;
3358 if (!skb_pull(skb, sizeof(*src)))
3359 return -EPROTO;
3360
3361 /* FIXME: expose values to userspace
3362 *
3363 * Note: Even though this loop seems to do nothing it is
3364 * required to parse following sub-structures properly.
3365 */
3366 }
3367
3368 if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
3369 stats->extended = true;
3370
3371 for (i = 0; i < num_peer_stats; i++) {
3372 const struct wmi_10_4_peer_extd_stats *src;
3373 struct ath10k_fw_extd_stats_peer *dst;
3374
3375 src = (void *)skb->data;
3376 if (!skb_pull(skb, sizeof(*src)))
3377 return -EPROTO;
3378
3379 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3380 if (!dst)
3381 continue;
3382
3383 ether_addr_copy(dst->peer_macaddr,
3384 src->peer_macaddr.addr);
3385 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3386 list_add_tail(&dst->list, &stats->peers_extd);
3387 }
3388 }
3389
3390 if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
3391 for (i = 0; i < num_vdev_stats; i++) {
3392 const struct wmi_vdev_stats_extd *src;
3393 struct ath10k_fw_stats_vdev_extd *dst;
3394
3395 src = (void *)skb->data;
3396 if (!skb_pull(skb, sizeof(*src)))
3397 return -EPROTO;
3398
3399 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3400 if (!dst)
3401 continue;
3402 ath10k_wmi_10_4_pull_vdev_stats(src, dst);
3403 list_add_tail(&dst->list, &stats->vdevs);
3404 }
3405 }
3406
3407 return 0;
3408 }
3409
ath10k_wmi_event_update_stats(struct ath10k * ar,struct sk_buff * skb)3410 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
3411 {
3412 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
3413 ath10k_debug_fw_stats_process(ar, skb);
3414 }
3415
3416 static int
ath10k_wmi_op_pull_vdev_start_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_vdev_start_ev_arg * arg)3417 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3418 struct wmi_vdev_start_ev_arg *arg)
3419 {
3420 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3421
3422 if (skb->len < sizeof(*ev))
3423 return -EPROTO;
3424
3425 skb_pull(skb, sizeof(*ev));
3426 arg->vdev_id = ev->vdev_id;
3427 arg->req_id = ev->req_id;
3428 arg->resp_type = ev->resp_type;
3429 arg->status = ev->status;
3430
3431 return 0;
3432 }
3433
ath10k_wmi_event_vdev_start_resp(struct ath10k * ar,struct sk_buff * skb)3434 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
3435 {
3436 struct wmi_vdev_start_ev_arg arg = {};
3437 int ret;
3438 u32 status;
3439
3440 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
3441
3442 ar->last_wmi_vdev_start_status = 0;
3443
3444 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
3445 if (ret) {
3446 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3447 ar->last_wmi_vdev_start_status = ret;
3448 goto out;
3449 }
3450
3451 status = __le32_to_cpu(arg.status);
3452 if (WARN_ON_ONCE(status)) {
3453 ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n",
3454 status, (status == WMI_VDEV_START_CHAN_INVALID) ?
3455 "chan-invalid" : "unknown");
3456 /* Setup is done one way or another though, so we should still
3457 * do the completion, so don't return here.
3458 */
3459 ar->last_wmi_vdev_start_status = -EINVAL;
3460 }
3461
3462 out:
3463 complete(&ar->vdev_setup_done);
3464 }
3465
ath10k_wmi_event_vdev_stopped(struct ath10k * ar,struct sk_buff * skb)3466 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
3467 {
3468 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
3469 complete(&ar->vdev_setup_done);
3470 }
3471
3472 static int
ath10k_wmi_op_pull_peer_kick_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_peer_kick_ev_arg * arg)3473 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3474 struct wmi_peer_kick_ev_arg *arg)
3475 {
3476 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3477
3478 if (skb->len < sizeof(*ev))
3479 return -EPROTO;
3480
3481 skb_pull(skb, sizeof(*ev));
3482 arg->mac_addr = ev->peer_macaddr.addr;
3483
3484 return 0;
3485 }
3486
ath10k_wmi_event_peer_sta_kickout(struct ath10k * ar,struct sk_buff * skb)3487 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
3488 {
3489 struct wmi_peer_kick_ev_arg arg = {};
3490 struct ieee80211_sta *sta;
3491 int ret;
3492
3493 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
3494 if (ret) {
3495 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3496 ret);
3497 return;
3498 }
3499
3500 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
3501 arg.mac_addr);
3502
3503 rcu_read_lock();
3504
3505 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
3506 if (!sta) {
3507 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
3508 arg.mac_addr);
3509 goto exit;
3510 }
3511
3512 ieee80211_report_low_ack(sta, 10);
3513
3514 exit:
3515 rcu_read_unlock();
3516 }
3517
3518 /*
3519 * FIXME
3520 *
3521 * We don't report to mac80211 sleep state of connected
3522 * stations. Due to this mac80211 can't fill in TIM IE
3523 * correctly.
3524 *
3525 * I know of no way of getting nullfunc frames that contain
3526 * sleep transition from connected stations - these do not
3527 * seem to be sent from the target to the host. There also
3528 * doesn't seem to be a dedicated event for that. So the
3529 * only way left to do this would be to read tim_bitmap
3530 * during SWBA.
3531 *
3532 * We could probably try using tim_bitmap from SWBA to tell
3533 * mac80211 which stations are asleep and which are not. The
3534 * problem here is calling mac80211 functions so many times
3535 * could take too long and make us miss the time to submit
3536 * the beacon to the target.
3537 *
3538 * So as a workaround we try to extend the TIM IE if there
3539 * is unicast buffered for stations with aid > 7 and fill it
3540 * in ourselves.
3541 */
ath10k_wmi_update_tim(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_tim_info_arg * tim_info)3542 static void ath10k_wmi_update_tim(struct ath10k *ar,
3543 struct ath10k_vif *arvif,
3544 struct sk_buff *bcn,
3545 const struct wmi_tim_info_arg *tim_info)
3546 {
3547 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3548 struct ieee80211_tim_ie *tim;
3549 u8 *ies, *ie;
3550 u8 ie_len, pvm_len;
3551 __le32 t;
3552 u32 v, tim_len;
3553
3554 /* When FW reports 0 in tim_len, ensure atleast first byte
3555 * in tim_bitmap is considered for pvm calculation.
3556 */
3557 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
3558
3559 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3560 * we must copy the bitmap upon change and reuse it later
3561 */
3562 if (__le32_to_cpu(tim_info->tim_changed)) {
3563 int i;
3564
3565 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3566 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3567 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3568 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3569 }
3570
3571 for (i = 0; i < tim_len; i++) {
3572 t = tim_info->tim_bitmap[i / 4];
3573 v = __le32_to_cpu(t);
3574 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3575 }
3576
3577 /* FW reports either length 0 or length based on max supported
3578 * station. so we calculate this on our own
3579 */
3580 arvif->u.ap.tim_len = 0;
3581 for (i = 0; i < tim_len; i++)
3582 if (arvif->u.ap.tim_bitmap[i])
3583 arvif->u.ap.tim_len = i;
3584
3585 arvif->u.ap.tim_len++;
3586 }
3587
3588 ies = bcn->data;
3589 ies += ieee80211_hdrlen(hdr->frame_control);
3590 ies += 12; /* fixed parameters */
3591
3592 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3593 (u8 *)skb_tail_pointer(bcn) - ies);
3594 if (!ie) {
3595 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
3596 ath10k_warn(ar, "no tim ie found;\n");
3597 return;
3598 }
3599
3600 tim = (void *)ie + 2;
3601 ie_len = ie[1];
3602 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3603
3604 if (pvm_len < arvif->u.ap.tim_len) {
3605 int expand_size = tim_len - pvm_len;
3606 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3607 void *next_ie = ie + 2 + ie_len;
3608
3609 if (skb_put(bcn, expand_size)) {
3610 memmove(next_ie + expand_size, next_ie, move_size);
3611
3612 ie[1] += expand_size;
3613 ie_len += expand_size;
3614 pvm_len += expand_size;
3615 } else {
3616 ath10k_warn(ar, "tim expansion failed\n");
3617 }
3618 }
3619
3620 if (pvm_len > tim_len) {
3621 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
3622 return;
3623 }
3624
3625 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
3626 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3627
3628 if (tim->dtim_count == 0) {
3629 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
3630
3631 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
3632 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
3633 }
3634
3635 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
3636 tim->dtim_count, tim->dtim_period,
3637 tim->bitmap_ctrl, pvm_len);
3638 }
3639
ath10k_wmi_update_noa(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_p2p_noa_info * noa)3640 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3641 struct sk_buff *bcn,
3642 const struct wmi_p2p_noa_info *noa)
3643 {
3644 if (!arvif->vif->p2p)
3645 return;
3646
3647 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
3648
3649 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3650 ath10k_p2p_noa_update(arvif, noa);
3651
3652 if (arvif->u.ap.noa_data)
3653 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3654 skb_put_data(bcn, arvif->u.ap.noa_data,
3655 arvif->u.ap.noa_len);
3656 }
3657
ath10k_wmi_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3658 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3659 struct wmi_swba_ev_arg *arg)
3660 {
3661 struct wmi_host_swba_event *ev = (void *)skb->data;
3662 u32 map;
3663 size_t i;
3664
3665 if (skb->len < sizeof(*ev))
3666 return -EPROTO;
3667
3668 skb_pull(skb, sizeof(*ev));
3669 arg->vdev_map = ev->vdev_map;
3670
3671 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3672 if (!(map & BIT(0)))
3673 continue;
3674
3675 /* If this happens there were some changes in firmware and
3676 * ath10k should update the max size of tim_info array.
3677 */
3678 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3679 break;
3680
3681 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3682 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3683 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3684 return -EPROTO;
3685 }
3686
3687 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3688 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3689 arg->tim_info[i].tim_bitmap =
3690 ev->bcn_info[i].tim_info.tim_bitmap;
3691 arg->tim_info[i].tim_changed =
3692 ev->bcn_info[i].tim_info.tim_changed;
3693 arg->tim_info[i].tim_num_ps_pending =
3694 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3695
3696 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3697 i++;
3698 }
3699
3700 return 0;
3701 }
3702
ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3703 static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3704 struct sk_buff *skb,
3705 struct wmi_swba_ev_arg *arg)
3706 {
3707 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3708 u32 map;
3709 size_t i;
3710
3711 if (skb->len < sizeof(*ev))
3712 return -EPROTO;
3713
3714 skb_pull(skb, sizeof(*ev));
3715 arg->vdev_map = ev->vdev_map;
3716
3717 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3718 if (!(map & BIT(0)))
3719 continue;
3720
3721 /* If this happens there were some changes in firmware and
3722 * ath10k should update the max size of tim_info array.
3723 */
3724 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3725 break;
3726
3727 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3728 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3729 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3730 return -EPROTO;
3731 }
3732
3733 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3734 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3735 arg->tim_info[i].tim_bitmap =
3736 ev->bcn_info[i].tim_info.tim_bitmap;
3737 arg->tim_info[i].tim_changed =
3738 ev->bcn_info[i].tim_info.tim_changed;
3739 arg->tim_info[i].tim_num_ps_pending =
3740 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3741 i++;
3742 }
3743
3744 return 0;
3745 }
3746
ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3747 static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3748 struct sk_buff *skb,
3749 struct wmi_swba_ev_arg *arg)
3750 {
3751 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3752 u32 map, tim_len;
3753 size_t i;
3754
3755 if (skb->len < sizeof(*ev))
3756 return -EPROTO;
3757
3758 skb_pull(skb, sizeof(*ev));
3759 arg->vdev_map = ev->vdev_map;
3760
3761 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3762 if (!(map & BIT(0)))
3763 continue;
3764
3765 /* If this happens there were some changes in firmware and
3766 * ath10k should update the max size of tim_info array.
3767 */
3768 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3769 break;
3770
3771 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3772 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3773 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3774 return -EPROTO;
3775 }
3776
3777 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3778 if (tim_len) {
3779 /* Exclude 4 byte guard length */
3780 tim_len -= 4;
3781 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3782 } else {
3783 arg->tim_info[i].tim_len = 0;
3784 }
3785
3786 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3787 arg->tim_info[i].tim_bitmap =
3788 ev->bcn_info[i].tim_info.tim_bitmap;
3789 arg->tim_info[i].tim_changed =
3790 ev->bcn_info[i].tim_info.tim_changed;
3791 arg->tim_info[i].tim_num_ps_pending =
3792 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3793
3794 /* 10.4 firmware doesn't have p2p support. notice of absence
3795 * info can be ignored for now.
3796 */
3797
3798 i++;
3799 }
3800
3801 return 0;
3802 }
3803
ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k * ar)3804 static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3805 {
3806 return WMI_TXBF_CONF_BEFORE_ASSOC;
3807 }
3808
ath10k_wmi_event_host_swba(struct ath10k * ar,struct sk_buff * skb)3809 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
3810 {
3811 struct wmi_swba_ev_arg arg = {};
3812 u32 map;
3813 int i = -1;
3814 const struct wmi_tim_info_arg *tim_info;
3815 const struct wmi_p2p_noa_info *noa_info;
3816 struct ath10k_vif *arvif;
3817 struct sk_buff *bcn;
3818 dma_addr_t paddr;
3819 int ret, vdev_id = 0;
3820
3821 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
3822 if (ret) {
3823 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3824 return;
3825 }
3826
3827 map = __le32_to_cpu(arg.vdev_map);
3828
3829 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
3830 map);
3831
3832 for (; map; map >>= 1, vdev_id++) {
3833 if (!(map & 0x1))
3834 continue;
3835
3836 i++;
3837
3838 if (i >= WMI_MAX_AP_VDEV) {
3839 ath10k_warn(ar, "swba has corrupted vdev map\n");
3840 break;
3841 }
3842
3843 tim_info = &arg.tim_info[i];
3844 noa_info = arg.noa_info[i];
3845
3846 ath10k_dbg(ar, ATH10K_DBG_MGMT,
3847 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
3848 i,
3849 __le32_to_cpu(tim_info->tim_len),
3850 __le32_to_cpu(tim_info->tim_mcast),
3851 __le32_to_cpu(tim_info->tim_changed),
3852 __le32_to_cpu(tim_info->tim_num_ps_pending),
3853 __le32_to_cpu(tim_info->tim_bitmap[3]),
3854 __le32_to_cpu(tim_info->tim_bitmap[2]),
3855 __le32_to_cpu(tim_info->tim_bitmap[1]),
3856 __le32_to_cpu(tim_info->tim_bitmap[0]));
3857
3858 /* TODO: Only first 4 word from tim_bitmap is dumped.
3859 * Extend debug code to dump full tim_bitmap.
3860 */
3861
3862 arvif = ath10k_get_arvif(ar, vdev_id);
3863 if (arvif == NULL) {
3864 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3865 vdev_id);
3866 continue;
3867 }
3868
3869 /* mac80211 would have already asked us to stop beaconing and
3870 * bring the vdev down, so continue in that case
3871 */
3872 if (!arvif->is_up)
3873 continue;
3874
3875 /* There are no completions for beacons so wait for next SWBA
3876 * before telling mac80211 to decrement CSA counter
3877 *
3878 * Once CSA counter is completed stop sending beacons until
3879 * actual channel switch is done
3880 */
3881 if (arvif->vif->csa_active &&
3882 ieee80211_beacon_cntdwn_is_complete(arvif->vif)) {
3883 ieee80211_csa_finish(arvif->vif);
3884 continue;
3885 }
3886
3887 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
3888 if (!bcn) {
3889 ath10k_warn(ar, "could not get mac80211 beacon\n");
3890 continue;
3891 }
3892
3893 ath10k_tx_h_seq_no(arvif->vif, bcn);
3894 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3895 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
3896
3897 spin_lock_bh(&ar->data_lock);
3898
3899 if (arvif->beacon) {
3900 switch (arvif->beacon_state) {
3901 case ATH10K_BEACON_SENT:
3902 break;
3903 case ATH10K_BEACON_SCHEDULED:
3904 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3905 arvif->vdev_id);
3906 break;
3907 case ATH10K_BEACON_SENDING:
3908 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
3909 arvif->vdev_id);
3910 dev_kfree_skb(bcn);
3911 goto skip;
3912 }
3913
3914 ath10k_mac_vif_beacon_free(arvif);
3915 }
3916
3917 if (!arvif->beacon_buf) {
3918 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3919 bcn->len, DMA_TO_DEVICE);
3920 ret = dma_mapping_error(arvif->ar->dev, paddr);
3921 if (ret) {
3922 ath10k_warn(ar, "failed to map beacon: %d\n",
3923 ret);
3924 dev_kfree_skb_any(bcn);
3925 goto skip;
3926 }
3927
3928 ATH10K_SKB_CB(bcn)->paddr = paddr;
3929 } else {
3930 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3931 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3932 bcn->len, IEEE80211_MAX_FRAME_LEN);
3933 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3934 }
3935 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3936 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
3937 }
3938
3939 arvif->beacon = bcn;
3940 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
3941
3942 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3943 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3944
3945 skip:
3946 spin_unlock_bh(&ar->data_lock);
3947 }
3948
3949 ath10k_wmi_tx_beacons_nowait(ar);
3950 }
3951
ath10k_wmi_event_tbttoffset_update(struct ath10k * ar,struct sk_buff * skb)3952 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
3953 {
3954 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
3955 }
3956
ath10k_radar_detected(struct ath10k * ar)3957 static void ath10k_radar_detected(struct ath10k *ar)
3958 {
3959 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
3960 ATH10K_DFS_STAT_INC(ar, radar_detected);
3961
3962 /* Control radar events reporting in debugfs file
3963 * dfs_block_radar_events
3964 */
3965 if (ar->dfs_block_radar_events)
3966 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
3967 else
3968 ieee80211_radar_detected(ar->hw);
3969 }
3970
ath10k_radar_confirmation_work(struct work_struct * work)3971 static void ath10k_radar_confirmation_work(struct work_struct *work)
3972 {
3973 struct ath10k *ar = container_of(work, struct ath10k,
3974 radar_confirmation_work);
3975 struct ath10k_radar_found_info radar_info;
3976 int ret, time_left;
3977
3978 reinit_completion(&ar->wmi.radar_confirm);
3979
3980 spin_lock_bh(&ar->data_lock);
3981 memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
3982 spin_unlock_bh(&ar->data_lock);
3983
3984 ret = ath10k_wmi_report_radar_found(ar, &radar_info);
3985 if (ret) {
3986 ath10k_warn(ar, "failed to send radar found %d\n", ret);
3987 goto wait_complete;
3988 }
3989
3990 time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
3991 ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
3992 if (time_left) {
3993 /* DFS Confirmation status event received and
3994 * necessary action completed.
3995 */
3996 goto wait_complete;
3997 } else {
3998 /* DFS Confirmation event not received from FW.Considering this
3999 * as real radar.
4000 */
4001 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4002 "dfs confirmation not received from fw, considering as radar\n");
4003 goto radar_detected;
4004 }
4005
4006 radar_detected:
4007 ath10k_radar_detected(ar);
4008
4009 /* Reset state to allow sending confirmation on consecutive radar
4010 * detections, unless radar confirmation is disabled/stopped.
4011 */
4012 wait_complete:
4013 spin_lock_bh(&ar->data_lock);
4014 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
4015 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
4016 spin_unlock_bh(&ar->data_lock);
4017 }
4018
ath10k_dfs_radar_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_radar_report * rr,u64 tsf)4019 static void ath10k_dfs_radar_report(struct ath10k *ar,
4020 struct wmi_phyerr_ev_arg *phyerr,
4021 const struct phyerr_radar_report *rr,
4022 u64 tsf)
4023 {
4024 u32 reg0, reg1, tsf32l;
4025 struct ieee80211_channel *ch;
4026 struct pulse_event pe;
4027 struct radar_detector_specs rs;
4028 u64 tsf64;
4029 u8 rssi, width;
4030 struct ath10k_radar_found_info *radar_info;
4031
4032 reg0 = __le32_to_cpu(rr->reg0);
4033 reg1 = __le32_to_cpu(rr->reg1);
4034
4035 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4036 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
4037 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
4038 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
4039 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
4040 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
4041 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4042 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
4043 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
4044 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
4045 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
4046 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
4047 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
4048 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4049 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
4050 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
4051 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
4052
4053 if (!ar->dfs_detector)
4054 return;
4055
4056 spin_lock_bh(&ar->data_lock);
4057 ch = ar->rx_channel;
4058
4059 /* fetch target operating channel during channel change */
4060 if (!ch)
4061 ch = ar->tgt_oper_chan;
4062
4063 spin_unlock_bh(&ar->data_lock);
4064
4065 if (!ch) {
4066 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
4067 goto radar_detected;
4068 }
4069
4070 /* report event to DFS pattern detector */
4071 tsf32l = phyerr->tsf_timestamp;
4072 tsf64 = tsf & (~0xFFFFFFFFULL);
4073 tsf64 |= tsf32l;
4074
4075 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
4076 rssi = phyerr->rssi_combined;
4077
4078 /* hardware store this as 8 bit signed value,
4079 * set to zero if negative number
4080 */
4081 if (rssi & 0x80)
4082 rssi = 0;
4083
4084 pe.ts = tsf64;
4085 pe.freq = ch->center_freq;
4086 pe.width = width;
4087 pe.rssi = rssi;
4088 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
4089 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4090 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
4091 pe.freq, pe.width, pe.rssi, pe.ts);
4092
4093 ATH10K_DFS_STAT_INC(ar, pulses_detected);
4094
4095 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
4096 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4097 "dfs no pulse pattern detected, yet\n");
4098 return;
4099 }
4100
4101 if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
4102 ar->dfs_detector->region == NL80211_DFS_FCC) {
4103 /* Consecutive radar indications need not be
4104 * sent to the firmware until we get confirmation
4105 * for the previous detected radar.
4106 */
4107 spin_lock_bh(&ar->data_lock);
4108 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
4109 spin_unlock_bh(&ar->data_lock);
4110 return;
4111 }
4112 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
4113 radar_info = &ar->last_radar_info;
4114
4115 radar_info->pri_min = rs.pri_min;
4116 radar_info->pri_max = rs.pri_max;
4117 radar_info->width_min = rs.width_min;
4118 radar_info->width_max = rs.width_max;
4119 /*TODO Find sidx_min and sidx_max */
4120 radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4121 radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4122
4123 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4124 "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
4125 radar_info->pri_min, radar_info->pri_max,
4126 radar_info->width_min, radar_info->width_max,
4127 radar_info->sidx_min, radar_info->sidx_max);
4128 ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
4129 spin_unlock_bh(&ar->data_lock);
4130 return;
4131 }
4132
4133 radar_detected:
4134 ath10k_radar_detected(ar);
4135 }
4136
ath10k_dfs_fft_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_fft_report * fftr,u64 tsf)4137 static int ath10k_dfs_fft_report(struct ath10k *ar,
4138 struct wmi_phyerr_ev_arg *phyerr,
4139 const struct phyerr_fft_report *fftr,
4140 u64 tsf)
4141 {
4142 u32 reg0, reg1;
4143 u8 rssi, peak_mag;
4144
4145 reg0 = __le32_to_cpu(fftr->reg0);
4146 reg1 = __le32_to_cpu(fftr->reg1);
4147 rssi = phyerr->rssi_combined;
4148
4149 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4150 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
4151 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
4152 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
4153 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
4154 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
4155 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4156 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
4157 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
4158 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
4159 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
4160 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
4161
4162 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
4163
4164 /* false event detection */
4165 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
4166 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
4167 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
4168 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
4169 return -EINVAL;
4170 }
4171
4172 return 0;
4173 }
4174
ath10k_wmi_event_dfs(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4175 void ath10k_wmi_event_dfs(struct ath10k *ar,
4176 struct wmi_phyerr_ev_arg *phyerr,
4177 u64 tsf)
4178 {
4179 int buf_len, tlv_len, res, i = 0;
4180 const struct phyerr_tlv *tlv;
4181 const struct phyerr_radar_report *rr;
4182 const struct phyerr_fft_report *fftr;
4183 const u8 *tlv_buf;
4184
4185 buf_len = phyerr->buf_len;
4186 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4187 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
4188 phyerr->phy_err_code, phyerr->rssi_combined,
4189 phyerr->tsf_timestamp, tsf, buf_len);
4190
4191 /* Skip event if DFS disabled */
4192 if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
4193 return;
4194
4195 ATH10K_DFS_STAT_INC(ar, pulses_total);
4196
4197 while (i < buf_len) {
4198 if (i + sizeof(*tlv) > buf_len) {
4199 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
4200 i);
4201 return;
4202 }
4203
4204 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4205 tlv_len = __le16_to_cpu(tlv->len);
4206 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4207 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4208 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
4209 tlv_len, tlv->tag, tlv->sig);
4210
4211 switch (tlv->tag) {
4212 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
4213 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
4214 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
4215 i);
4216 return;
4217 }
4218
4219 rr = (struct phyerr_radar_report *)tlv_buf;
4220 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
4221 break;
4222 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4223 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
4224 ath10k_warn(ar, "too short fft report (%d)\n",
4225 i);
4226 return;
4227 }
4228
4229 fftr = (struct phyerr_fft_report *)tlv_buf;
4230 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
4231 if (res)
4232 return;
4233 break;
4234 }
4235
4236 i += sizeof(*tlv) + tlv_len;
4237 }
4238 }
4239
ath10k_wmi_event_spectral_scan(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4240 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
4241 struct wmi_phyerr_ev_arg *phyerr,
4242 u64 tsf)
4243 {
4244 int buf_len, tlv_len, res, i = 0;
4245 struct phyerr_tlv *tlv;
4246 const void *tlv_buf;
4247 const struct phyerr_fft_report *fftr;
4248 size_t fftr_len;
4249
4250 buf_len = phyerr->buf_len;
4251
4252 while (i < buf_len) {
4253 if (i + sizeof(*tlv) > buf_len) {
4254 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
4255 i);
4256 return;
4257 }
4258
4259 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4260 tlv_len = __le16_to_cpu(tlv->len);
4261 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4262
4263 if (i + sizeof(*tlv) + tlv_len > buf_len) {
4264 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
4265 i);
4266 return;
4267 }
4268
4269 switch (tlv->tag) {
4270 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4271 if (sizeof(*fftr) > tlv_len) {
4272 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
4273 i);
4274 return;
4275 }
4276
4277 fftr_len = tlv_len - sizeof(*fftr);
4278 fftr = tlv_buf;
4279 res = ath10k_spectral_process_fft(ar, phyerr,
4280 fftr, fftr_len,
4281 tsf);
4282 if (res < 0) {
4283 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
4284 res);
4285 return;
4286 }
4287 break;
4288 }
4289
4290 i += sizeof(*tlv) + tlv_len;
4291 }
4292 }
4293
ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4294 static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4295 struct sk_buff *skb,
4296 struct wmi_phyerr_hdr_arg *arg)
4297 {
4298 struct wmi_phyerr_event *ev = (void *)skb->data;
4299
4300 if (skb->len < sizeof(*ev))
4301 return -EPROTO;
4302
4303 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
4304 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4305 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4306 arg->buf_len = skb->len - sizeof(*ev);
4307 arg->phyerrs = ev->phyerrs;
4308
4309 return 0;
4310 }
4311
ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4312 static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4313 struct sk_buff *skb,
4314 struct wmi_phyerr_hdr_arg *arg)
4315 {
4316 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
4317
4318 if (skb->len < sizeof(*ev))
4319 return -EPROTO;
4320
4321 /* 10.4 firmware always reports only one phyerr */
4322 arg->num_phyerrs = 1;
4323
4324 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4325 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4326 arg->buf_len = skb->len;
4327 arg->phyerrs = skb->data;
4328
4329 return 0;
4330 }
4331
ath10k_wmi_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4332 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
4333 const void *phyerr_buf,
4334 int left_len,
4335 struct wmi_phyerr_ev_arg *arg)
4336 {
4337 const struct wmi_phyerr *phyerr = phyerr_buf;
4338 int i;
4339
4340 if (left_len < sizeof(*phyerr)) {
4341 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4342 left_len, sizeof(*phyerr));
4343 return -EINVAL;
4344 }
4345
4346 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4347 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4348 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4349 arg->rssi_combined = phyerr->rssi_combined;
4350 arg->chan_width_mhz = phyerr->chan_width_mhz;
4351 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4352 arg->buf = phyerr->buf;
4353 arg->hdr_len = sizeof(*phyerr);
4354
4355 for (i = 0; i < 4; i++)
4356 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4357
4358 switch (phyerr->phy_err_code) {
4359 case PHY_ERROR_GEN_SPECTRAL_SCAN:
4360 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4361 break;
4362 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
4363 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
4364 break;
4365 case PHY_ERROR_GEN_RADAR:
4366 arg->phy_err_code = PHY_ERROR_RADAR;
4367 break;
4368 default:
4369 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4370 break;
4371 }
4372
4373 return 0;
4374 }
4375
ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4376 static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
4377 const void *phyerr_buf,
4378 int left_len,
4379 struct wmi_phyerr_ev_arg *arg)
4380 {
4381 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
4382 u32 phy_err_mask;
4383 int i;
4384
4385 if (left_len < sizeof(*phyerr)) {
4386 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4387 left_len, sizeof(*phyerr));
4388 return -EINVAL;
4389 }
4390
4391 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4392 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4393 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4394 arg->rssi_combined = phyerr->rssi_combined;
4395 arg->chan_width_mhz = phyerr->chan_width_mhz;
4396 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4397 arg->buf = phyerr->buf;
4398 arg->hdr_len = sizeof(*phyerr);
4399
4400 for (i = 0; i < 4; i++)
4401 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4402
4403 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
4404
4405 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
4406 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4407 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
4408 arg->phy_err_code = PHY_ERROR_RADAR;
4409 else
4410 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4411
4412 return 0;
4413 }
4414
ath10k_wmi_event_phyerr(struct ath10k * ar,struct sk_buff * skb)4415 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
4416 {
4417 struct wmi_phyerr_hdr_arg hdr_arg = {};
4418 struct wmi_phyerr_ev_arg phyerr_arg = {};
4419 const void *phyerr;
4420 u32 count, i, buf_len, phy_err_code;
4421 u64 tsf;
4422 int left_len, ret;
4423
4424 ATH10K_DFS_STAT_INC(ar, phy_errors);
4425
4426 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
4427 if (ret) {
4428 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
4429 return;
4430 }
4431
4432 /* Check number of included events */
4433 count = hdr_arg.num_phyerrs;
4434
4435 left_len = hdr_arg.buf_len;
4436
4437 tsf = hdr_arg.tsf_u32;
4438 tsf <<= 32;
4439 tsf |= hdr_arg.tsf_l32;
4440
4441 ath10k_dbg(ar, ATH10K_DBG_WMI,
4442 "wmi event phyerr count %d tsf64 0x%llX\n",
4443 count, tsf);
4444
4445 phyerr = hdr_arg.phyerrs;
4446 for (i = 0; i < count; i++) {
4447 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
4448 if (ret) {
4449 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
4450 i);
4451 return;
4452 }
4453
4454 left_len -= phyerr_arg.hdr_len;
4455 buf_len = phyerr_arg.buf_len;
4456 phy_err_code = phyerr_arg.phy_err_code;
4457
4458 if (left_len < buf_len) {
4459 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
4460 return;
4461 }
4462
4463 left_len -= buf_len;
4464
4465 switch (phy_err_code) {
4466 case PHY_ERROR_RADAR:
4467 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4468 break;
4469 case PHY_ERROR_SPECTRAL_SCAN:
4470 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4471 break;
4472 case PHY_ERROR_FALSE_RADAR_EXT:
4473 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4474 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4475 break;
4476 default:
4477 break;
4478 }
4479
4480 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
4481 }
4482 }
4483
4484 static int
ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_dfs_status_ev_arg * arg)4485 ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
4486 struct wmi_dfs_status_ev_arg *arg)
4487 {
4488 struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
4489
4490 if (skb->len < sizeof(*ev))
4491 return -EPROTO;
4492
4493 arg->status = ev->status;
4494
4495 return 0;
4496 }
4497
4498 static void
ath10k_wmi_event_dfs_status_check(struct ath10k * ar,struct sk_buff * skb)4499 ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
4500 {
4501 struct wmi_dfs_status_ev_arg status_arg = {};
4502 int ret;
4503
4504 ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
4505
4506 if (ret) {
4507 ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
4508 return;
4509 }
4510
4511 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4512 "dfs status event received from fw: %d\n",
4513 status_arg.status);
4514
4515 /* Even in case of radar detection failure we follow the same
4516 * behaviour as if radar is detected i.e to switch to a different
4517 * channel.
4518 */
4519 if (status_arg.status == WMI_HW_RADAR_DETECTED ||
4520 status_arg.status == WMI_RADAR_DETECTION_FAIL)
4521 ath10k_radar_detected(ar);
4522 complete(&ar->wmi.radar_confirm);
4523 }
4524
ath10k_wmi_event_roam(struct ath10k * ar,struct sk_buff * skb)4525 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
4526 {
4527 struct wmi_roam_ev_arg arg = {};
4528 int ret;
4529 u32 vdev_id;
4530 u32 reason;
4531 s32 rssi;
4532
4533 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
4534 if (ret) {
4535 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
4536 return;
4537 }
4538
4539 vdev_id = __le32_to_cpu(arg.vdev_id);
4540 reason = __le32_to_cpu(arg.reason);
4541 rssi = __le32_to_cpu(arg.rssi);
4542 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
4543
4544 ath10k_dbg(ar, ATH10K_DBG_WMI,
4545 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
4546 vdev_id, reason, rssi);
4547
4548 if (reason >= WMI_ROAM_REASON_MAX)
4549 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
4550 reason, vdev_id);
4551
4552 switch (reason) {
4553 case WMI_ROAM_REASON_BEACON_MISS:
4554 ath10k_mac_handle_beacon_miss(ar, vdev_id);
4555 break;
4556 case WMI_ROAM_REASON_BETTER_AP:
4557 case WMI_ROAM_REASON_LOW_RSSI:
4558 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4559 case WMI_ROAM_REASON_HO_FAILED:
4560 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4561 reason, vdev_id);
4562 break;
4563 }
4564 }
4565
ath10k_wmi_event_profile_match(struct ath10k * ar,struct sk_buff * skb)4566 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
4567 {
4568 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
4569 }
4570
ath10k_wmi_event_debug_print(struct ath10k * ar,struct sk_buff * skb)4571 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
4572 {
4573 char buf[101], c;
4574 int i;
4575
4576 for (i = 0; i < sizeof(buf) - 1; i++) {
4577 if (i >= skb->len)
4578 break;
4579
4580 c = skb->data[i];
4581
4582 if (c == '\0')
4583 break;
4584
4585 if (isascii(c) && isprint(c))
4586 buf[i] = c;
4587 else
4588 buf[i] = '.';
4589 }
4590
4591 if (i == sizeof(buf) - 1)
4592 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
4593
4594 /* for some reason the debug prints end with \n, remove that */
4595 if (skb->data[i - 1] == '\n')
4596 i--;
4597
4598 /* the last byte is always reserved for the null character */
4599 buf[i] = '\0';
4600
4601 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
4602 }
4603
ath10k_wmi_event_pdev_qvit(struct ath10k * ar,struct sk_buff * skb)4604 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
4605 {
4606 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
4607 }
4608
ath10k_wmi_event_wlan_profile_data(struct ath10k * ar,struct sk_buff * skb)4609 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
4610 {
4611 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
4612 }
4613
ath10k_wmi_event_rtt_measurement_report(struct ath10k * ar,struct sk_buff * skb)4614 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4615 struct sk_buff *skb)
4616 {
4617 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
4618 }
4619
ath10k_wmi_event_tsf_measurement_report(struct ath10k * ar,struct sk_buff * skb)4620 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4621 struct sk_buff *skb)
4622 {
4623 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
4624 }
4625
ath10k_wmi_event_rtt_error_report(struct ath10k * ar,struct sk_buff * skb)4626 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
4627 {
4628 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
4629 }
4630
ath10k_wmi_event_wow_wakeup_host(struct ath10k * ar,struct sk_buff * skb)4631 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
4632 {
4633 struct wmi_wow_ev_arg ev = {};
4634 int ret;
4635
4636 complete(&ar->wow.wakeup_completed);
4637
4638 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4639 if (ret) {
4640 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4641 return;
4642 }
4643
4644 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4645 wow_reason(ev.wake_reason));
4646 }
4647
ath10k_wmi_event_dcs_interference(struct ath10k * ar,struct sk_buff * skb)4648 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
4649 {
4650 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
4651 }
4652
ath10k_tpc_config_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type)4653 static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4654 struct wmi_pdev_tpc_config_event *ev,
4655 u32 rate_idx, u32 num_chains,
4656 u32 rate_code, u8 type)
4657 {
4658 u8 tpc, num_streams, preamble, ch, stm_idx;
4659
4660 num_streams = ATH10K_HW_NSS(rate_code);
4661 preamble = ATH10K_HW_PREAMBLE(rate_code);
4662 ch = num_chains - 1;
4663
4664 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4665
4666 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4667 goto out;
4668
4669 if (preamble == WMI_RATE_PREAMBLE_CCK)
4670 goto out;
4671
4672 stm_idx = num_streams - 1;
4673 if (num_chains <= num_streams)
4674 goto out;
4675
4676 switch (type) {
4677 case WMI_TPC_TABLE_TYPE_STBC:
4678 tpc = min_t(u8, tpc,
4679 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4680 break;
4681 case WMI_TPC_TABLE_TYPE_TXBF:
4682 tpc = min_t(u8, tpc,
4683 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4684 break;
4685 case WMI_TPC_TABLE_TYPE_CDD:
4686 tpc = min_t(u8, tpc,
4687 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4688 break;
4689 default:
4690 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4691 tpc = 0;
4692 break;
4693 }
4694
4695 out:
4696 return tpc;
4697 }
4698
ath10k_tpc_config_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,struct ath10k_tpc_stats * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)4699 static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4700 struct wmi_pdev_tpc_config_event *ev,
4701 struct ath10k_tpc_stats *tpc_stats,
4702 u8 *rate_code, u16 *pream_table, u8 type)
4703 {
4704 u32 i, j, pream_idx, flags;
4705 u8 tpc[WMI_TPC_TX_N_CHAIN];
4706 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4707 char buff[WMI_TPC_BUF_SIZE];
4708
4709 flags = __le32_to_cpu(ev->flags);
4710
4711 switch (type) {
4712 case WMI_TPC_TABLE_TYPE_CDD:
4713 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4714 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4715 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4716 return;
4717 }
4718 break;
4719 case WMI_TPC_TABLE_TYPE_STBC:
4720 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4721 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4722 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4723 return;
4724 }
4725 break;
4726 case WMI_TPC_TABLE_TYPE_TXBF:
4727 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4728 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4729 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4730 return;
4731 }
4732 break;
4733 default:
4734 ath10k_dbg(ar, ATH10K_DBG_WMI,
4735 "invalid table type in wmi tpc event: %d\n", type);
4736 return;
4737 }
4738
4739 pream_idx = 0;
4740 for (i = 0; i < tpc_stats->rate_max; i++) {
4741 memset(tpc_value, 0, sizeof(tpc_value));
4742 memset(buff, 0, sizeof(buff));
4743 if (i == pream_table[pream_idx])
4744 pream_idx++;
4745
4746 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
4747 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4748 rate_code[i],
4749 type);
4750 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4751 strlcat(tpc_value, buff, sizeof(tpc_value));
4752 }
4753 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4754 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4755 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4756 tpc_value, sizeof(tpc_value));
4757 }
4758 }
4759
ath10k_wmi_tpc_config_get_rate_code(u8 * rate_code,u16 * pream_table,u32 num_tx_chain)4760 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
4761 u32 num_tx_chain)
4762 {
4763 u32 i, j, pream_idx;
4764 u8 rate_idx;
4765
4766 /* Create the rate code table based on the chains supported */
4767 rate_idx = 0;
4768 pream_idx = 0;
4769
4770 /* Fill CCK rate code */
4771 for (i = 0; i < 4; i++) {
4772 rate_code[rate_idx] =
4773 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4774 rate_idx++;
4775 }
4776 pream_table[pream_idx] = rate_idx;
4777 pream_idx++;
4778
4779 /* Fill OFDM rate code */
4780 for (i = 0; i < 8; i++) {
4781 rate_code[rate_idx] =
4782 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4783 rate_idx++;
4784 }
4785 pream_table[pream_idx] = rate_idx;
4786 pream_idx++;
4787
4788 /* Fill HT20 rate code */
4789 for (i = 0; i < num_tx_chain; i++) {
4790 for (j = 0; j < 8; j++) {
4791 rate_code[rate_idx] =
4792 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4793 rate_idx++;
4794 }
4795 }
4796 pream_table[pream_idx] = rate_idx;
4797 pream_idx++;
4798
4799 /* Fill HT40 rate code */
4800 for (i = 0; i < num_tx_chain; i++) {
4801 for (j = 0; j < 8; j++) {
4802 rate_code[rate_idx] =
4803 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4804 rate_idx++;
4805 }
4806 }
4807 pream_table[pream_idx] = rate_idx;
4808 pream_idx++;
4809
4810 /* Fill VHT20 rate code */
4811 for (i = 0; i < num_tx_chain; i++) {
4812 for (j = 0; j < 10; j++) {
4813 rate_code[rate_idx] =
4814 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4815 rate_idx++;
4816 }
4817 }
4818 pream_table[pream_idx] = rate_idx;
4819 pream_idx++;
4820
4821 /* Fill VHT40 rate code */
4822 for (i = 0; i < num_tx_chain; i++) {
4823 for (j = 0; j < 10; j++) {
4824 rate_code[rate_idx] =
4825 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4826 rate_idx++;
4827 }
4828 }
4829 pream_table[pream_idx] = rate_idx;
4830 pream_idx++;
4831
4832 /* Fill VHT80 rate code */
4833 for (i = 0; i < num_tx_chain; i++) {
4834 for (j = 0; j < 10; j++) {
4835 rate_code[rate_idx] =
4836 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4837 rate_idx++;
4838 }
4839 }
4840 pream_table[pream_idx] = rate_idx;
4841 pream_idx++;
4842
4843 rate_code[rate_idx++] =
4844 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4845 rate_code[rate_idx++] =
4846 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4847 rate_code[rate_idx++] =
4848 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4849 rate_code[rate_idx++] =
4850 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4851 rate_code[rate_idx++] =
4852 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4853
4854 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4855 }
4856
ath10k_wmi_event_pdev_tpc_config(struct ath10k * ar,struct sk_buff * skb)4857 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
4858 {
4859 u32 num_tx_chain, rate_max;
4860 u8 rate_code[WMI_TPC_RATE_MAX];
4861 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4862 struct wmi_pdev_tpc_config_event *ev;
4863 struct ath10k_tpc_stats *tpc_stats;
4864
4865 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4866
4867 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4868
4869 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
4870 ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
4871 num_tx_chain, WMI_TPC_TX_N_CHAIN);
4872 return;
4873 }
4874
4875 rate_max = __le32_to_cpu(ev->rate_max);
4876 if (rate_max > WMI_TPC_RATE_MAX) {
4877 ath10k_warn(ar, "number of rate is %d greater than TPC configured rate %d\n",
4878 rate_max, WMI_TPC_RATE_MAX);
4879 rate_max = WMI_TPC_RATE_MAX;
4880 }
4881
4882 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4883 if (!tpc_stats)
4884 return;
4885
4886 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
4887 num_tx_chain);
4888
4889 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4890 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4891 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4892 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4893 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4894 tpc_stats->twice_antenna_reduction =
4895 __le32_to_cpu(ev->twice_antenna_reduction);
4896 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4897 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4898 tpc_stats->num_tx_chain = num_tx_chain;
4899 tpc_stats->rate_max = rate_max;
4900
4901 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4902 rate_code, pream_table,
4903 WMI_TPC_TABLE_TYPE_CDD);
4904 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4905 rate_code, pream_table,
4906 WMI_TPC_TABLE_TYPE_STBC);
4907 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4908 rate_code, pream_table,
4909 WMI_TPC_TABLE_TYPE_TXBF);
4910
4911 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4912
4913 ath10k_dbg(ar, ATH10K_DBG_WMI,
4914 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4915 __le32_to_cpu(ev->chan_freq),
4916 __le32_to_cpu(ev->phy_mode),
4917 __le32_to_cpu(ev->ctl),
4918 __le32_to_cpu(ev->reg_domain),
4919 a_sle32_to_cpu(ev->twice_antenna_gain),
4920 __le32_to_cpu(ev->twice_antenna_reduction),
4921 __le32_to_cpu(ev->power_limit),
4922 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4923 __le32_to_cpu(ev->num_tx_chain),
4924 __le32_to_cpu(ev->rate_max));
4925 }
4926
4927 static u8
ath10k_wmi_tpc_final_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type,u32 pream_idx)4928 ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
4929 struct wmi_pdev_tpc_final_table_event *ev,
4930 u32 rate_idx, u32 num_chains,
4931 u32 rate_code, u8 type, u32 pream_idx)
4932 {
4933 u8 tpc, num_streams, preamble, ch, stm_idx;
4934 s8 pow_agcdd, pow_agstbc, pow_agtxbf;
4935 int pream;
4936
4937 num_streams = ATH10K_HW_NSS(rate_code);
4938 preamble = ATH10K_HW_PREAMBLE(rate_code);
4939 ch = num_chains - 1;
4940 stm_idx = num_streams - 1;
4941 pream = -1;
4942
4943 if (__le32_to_cpu(ev->chan_freq) <= 2483) {
4944 switch (pream_idx) {
4945 case WMI_TPC_PREAM_2GHZ_CCK:
4946 pream = 0;
4947 break;
4948 case WMI_TPC_PREAM_2GHZ_OFDM:
4949 pream = 1;
4950 break;
4951 case WMI_TPC_PREAM_2GHZ_HT20:
4952 case WMI_TPC_PREAM_2GHZ_VHT20:
4953 pream = 2;
4954 break;
4955 case WMI_TPC_PREAM_2GHZ_HT40:
4956 case WMI_TPC_PREAM_2GHZ_VHT40:
4957 pream = 3;
4958 break;
4959 case WMI_TPC_PREAM_2GHZ_VHT80:
4960 pream = 4;
4961 break;
4962 default:
4963 pream = -1;
4964 break;
4965 }
4966 }
4967
4968 if (__le32_to_cpu(ev->chan_freq) >= 5180) {
4969 switch (pream_idx) {
4970 case WMI_TPC_PREAM_5GHZ_OFDM:
4971 pream = 0;
4972 break;
4973 case WMI_TPC_PREAM_5GHZ_HT20:
4974 case WMI_TPC_PREAM_5GHZ_VHT20:
4975 pream = 1;
4976 break;
4977 case WMI_TPC_PREAM_5GHZ_HT40:
4978 case WMI_TPC_PREAM_5GHZ_VHT40:
4979 pream = 2;
4980 break;
4981 case WMI_TPC_PREAM_5GHZ_VHT80:
4982 pream = 3;
4983 break;
4984 case WMI_TPC_PREAM_5GHZ_HTCUP:
4985 pream = 4;
4986 break;
4987 default:
4988 pream = -1;
4989 break;
4990 }
4991 }
4992
4993 if (pream == -1) {
4994 ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n",
4995 pream_idx, __le32_to_cpu(ev->chan_freq));
4996 tpc = 0;
4997 goto out;
4998 }
4999
5000 if (pream == 4)
5001 tpc = min_t(u8, ev->rates_array[rate_idx],
5002 ev->max_reg_allow_pow[ch]);
5003 else
5004 tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
5005 ev->max_reg_allow_pow[ch]),
5006 ev->ctl_power_table[0][pream][stm_idx]);
5007
5008 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
5009 goto out;
5010
5011 if (preamble == WMI_RATE_PREAMBLE_CCK)
5012 goto out;
5013
5014 if (num_chains <= num_streams)
5015 goto out;
5016
5017 switch (type) {
5018 case WMI_TPC_TABLE_TYPE_STBC:
5019 pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
5020 if (pream == 4)
5021 tpc = min_t(u8, tpc, pow_agstbc);
5022 else
5023 tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
5024 ev->ctl_power_table[0][pream][stm_idx]);
5025 break;
5026 case WMI_TPC_TABLE_TYPE_TXBF:
5027 pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
5028 if (pream == 4)
5029 tpc = min_t(u8, tpc, pow_agtxbf);
5030 else
5031 tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
5032 ev->ctl_power_table[1][pream][stm_idx]);
5033 break;
5034 case WMI_TPC_TABLE_TYPE_CDD:
5035 pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
5036 if (pream == 4)
5037 tpc = min_t(u8, tpc, pow_agcdd);
5038 else
5039 tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
5040 ev->ctl_power_table[0][pream][stm_idx]);
5041 break;
5042 default:
5043 ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
5044 tpc = 0;
5045 break;
5046 }
5047
5048 out:
5049 return tpc;
5050 }
5051
5052 static void
ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,struct ath10k_tpc_stats_final * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)5053 ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
5054 struct wmi_pdev_tpc_final_table_event *ev,
5055 struct ath10k_tpc_stats_final *tpc_stats,
5056 u8 *rate_code, u16 *pream_table, u8 type)
5057 {
5058 u32 i, j, pream_idx, flags;
5059 u8 tpc[WMI_TPC_TX_N_CHAIN];
5060 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
5061 char buff[WMI_TPC_BUF_SIZE];
5062
5063 flags = __le32_to_cpu(ev->flags);
5064
5065 switch (type) {
5066 case WMI_TPC_TABLE_TYPE_CDD:
5067 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
5068 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
5069 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5070 return;
5071 }
5072 break;
5073 case WMI_TPC_TABLE_TYPE_STBC:
5074 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
5075 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
5076 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5077 return;
5078 }
5079 break;
5080 case WMI_TPC_TABLE_TYPE_TXBF:
5081 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
5082 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
5083 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5084 return;
5085 }
5086 break;
5087 default:
5088 ath10k_dbg(ar, ATH10K_DBG_WMI,
5089 "invalid table type in wmi tpc event: %d\n", type);
5090 return;
5091 }
5092
5093 pream_idx = 0;
5094 for (i = 0; i < tpc_stats->rate_max; i++) {
5095 memset(tpc_value, 0, sizeof(tpc_value));
5096 memset(buff, 0, sizeof(buff));
5097 if (i == pream_table[pream_idx])
5098 pream_idx++;
5099
5100 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
5101 tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
5102 rate_code[i],
5103 type, pream_idx);
5104 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
5105 strlcat(tpc_value, buff, sizeof(tpc_value));
5106 }
5107 tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
5108 tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
5109 memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
5110 tpc_value, sizeof(tpc_value));
5111 }
5112 }
5113
ath10k_wmi_event_tpc_final_table(struct ath10k * ar,struct sk_buff * skb)5114 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
5115 {
5116 u32 num_tx_chain, rate_max;
5117 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
5118 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
5119 struct wmi_pdev_tpc_final_table_event *ev;
5120 struct ath10k_tpc_stats_final *tpc_stats;
5121
5122 ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
5123
5124 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
5125 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
5126 ath10k_warn(ar, "number of tx chain is %d greater than TPC final configured tx chain %d\n",
5127 num_tx_chain, WMI_TPC_TX_N_CHAIN);
5128 return;
5129 }
5130
5131 rate_max = __le32_to_cpu(ev->rate_max);
5132 if (rate_max > WMI_TPC_FINAL_RATE_MAX) {
5133 ath10k_warn(ar, "number of rate is %d greater than TPC final configured rate %d\n",
5134 rate_max, WMI_TPC_FINAL_RATE_MAX);
5135 rate_max = WMI_TPC_FINAL_RATE_MAX;
5136 }
5137
5138 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
5139 if (!tpc_stats)
5140 return;
5141
5142 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
5143 num_tx_chain);
5144
5145 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
5146 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
5147 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
5148 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
5149 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
5150 tpc_stats->twice_antenna_reduction =
5151 __le32_to_cpu(ev->twice_antenna_reduction);
5152 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
5153 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
5154 tpc_stats->num_tx_chain = num_tx_chain;
5155 tpc_stats->rate_max = rate_max;
5156
5157 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5158 rate_code, pream_table,
5159 WMI_TPC_TABLE_TYPE_CDD);
5160 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5161 rate_code, pream_table,
5162 WMI_TPC_TABLE_TYPE_STBC);
5163 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5164 rate_code, pream_table,
5165 WMI_TPC_TABLE_TYPE_TXBF);
5166
5167 ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
5168
5169 ath10k_dbg(ar, ATH10K_DBG_WMI,
5170 "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
5171 __le32_to_cpu(ev->chan_freq),
5172 __le32_to_cpu(ev->phy_mode),
5173 __le32_to_cpu(ev->ctl),
5174 __le32_to_cpu(ev->reg_domain),
5175 a_sle32_to_cpu(ev->twice_antenna_gain),
5176 __le32_to_cpu(ev->twice_antenna_reduction),
5177 __le32_to_cpu(ev->power_limit),
5178 __le32_to_cpu(ev->twice_max_rd_power) / 2,
5179 __le32_to_cpu(ev->num_tx_chain),
5180 __le32_to_cpu(ev->rate_max));
5181 }
5182
5183 static void
ath10k_wmi_handle_tdls_peer_event(struct ath10k * ar,struct sk_buff * skb)5184 ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
5185 {
5186 struct wmi_tdls_peer_event *ev;
5187 struct ath10k_peer *peer;
5188 struct ath10k_vif *arvif;
5189 int vdev_id;
5190 int peer_status;
5191 int peer_reason;
5192 u8 reason;
5193
5194 if (skb->len < sizeof(*ev)) {
5195 ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
5196 skb->len);
5197 return;
5198 }
5199
5200 ev = (struct wmi_tdls_peer_event *)skb->data;
5201 vdev_id = __le32_to_cpu(ev->vdev_id);
5202 peer_status = __le32_to_cpu(ev->peer_status);
5203 peer_reason = __le32_to_cpu(ev->peer_reason);
5204
5205 spin_lock_bh(&ar->data_lock);
5206 peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
5207 spin_unlock_bh(&ar->data_lock);
5208
5209 if (!peer) {
5210 ath10k_warn(ar, "failed to find peer entry for %pM\n",
5211 ev->peer_macaddr.addr);
5212 return;
5213 }
5214
5215 switch (peer_status) {
5216 case WMI_TDLS_SHOULD_TEARDOWN:
5217 switch (peer_reason) {
5218 case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
5219 case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
5220 case WMI_TDLS_TEARDOWN_REASON_RSSI:
5221 reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
5222 break;
5223 default:
5224 reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
5225 break;
5226 }
5227
5228 arvif = ath10k_get_arvif(ar, vdev_id);
5229 if (!arvif) {
5230 ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
5231 vdev_id);
5232 return;
5233 }
5234
5235 ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
5236 NL80211_TDLS_TEARDOWN, reason,
5237 GFP_ATOMIC);
5238
5239 ath10k_dbg(ar, ATH10K_DBG_WMI,
5240 "received tdls teardown event for peer %pM reason %u\n",
5241 ev->peer_macaddr.addr, peer_reason);
5242 break;
5243 default:
5244 ath10k_dbg(ar, ATH10K_DBG_WMI,
5245 "received unknown tdls peer event %u\n",
5246 peer_status);
5247 break;
5248 }
5249 }
5250
5251 static void
ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k * ar,struct sk_buff * skb)5252 ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb)
5253 {
5254 struct wmi_peer_sta_ps_state_chg_event *ev;
5255 struct ieee80211_sta *sta;
5256 struct ath10k_sta *arsta;
5257 u8 peer_addr[ETH_ALEN];
5258
5259 lockdep_assert_held(&ar->data_lock);
5260
5261 ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data;
5262 ether_addr_copy(peer_addr, ev->peer_macaddr.addr);
5263
5264 rcu_read_lock();
5265
5266 sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL);
5267
5268 if (!sta) {
5269 ath10k_warn(ar, "failed to find station entry %pM\n",
5270 peer_addr);
5271 goto exit;
5272 }
5273
5274 arsta = (struct ath10k_sta *)sta->drv_priv;
5275 arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state);
5276
5277 exit:
5278 rcu_read_unlock();
5279 }
5280
ath10k_wmi_event_pdev_ftm_intg(struct ath10k * ar,struct sk_buff * skb)5281 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5282 {
5283 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5284 }
5285
ath10k_wmi_event_gtk_offload_status(struct ath10k * ar,struct sk_buff * skb)5286 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5287 {
5288 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5289 }
5290
ath10k_wmi_event_gtk_rekey_fail(struct ath10k * ar,struct sk_buff * skb)5291 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5292 {
5293 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5294 }
5295
ath10k_wmi_event_delba_complete(struct ath10k * ar,struct sk_buff * skb)5296 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5297 {
5298 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5299 }
5300
ath10k_wmi_event_addba_complete(struct ath10k * ar,struct sk_buff * skb)5301 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5302 {
5303 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5304 }
5305
ath10k_wmi_event_vdev_install_key_complete(struct ath10k * ar,struct sk_buff * skb)5306 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5307 struct sk_buff *skb)
5308 {
5309 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5310 }
5311
ath10k_wmi_event_inst_rssi_stats(struct ath10k * ar,struct sk_buff * skb)5312 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
5313 {
5314 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
5315 }
5316
ath10k_wmi_event_vdev_standby_req(struct ath10k * ar,struct sk_buff * skb)5317 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
5318 {
5319 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
5320 }
5321
ath10k_wmi_event_vdev_resume_req(struct ath10k * ar,struct sk_buff * skb)5322 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
5323 {
5324 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
5325 }
5326
ath10k_wmi_alloc_chunk(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5327 static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
5328 u32 num_units, u32 unit_len)
5329 {
5330 dma_addr_t paddr;
5331 u32 pool_size;
5332 int idx = ar->wmi.num_mem_chunks;
5333 void *vaddr;
5334
5335 pool_size = num_units * round_up(unit_len, 4);
5336 vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
5337
5338 if (!vaddr)
5339 return -ENOMEM;
5340
5341 ar->wmi.mem_chunks[idx].vaddr = vaddr;
5342 ar->wmi.mem_chunks[idx].paddr = paddr;
5343 ar->wmi.mem_chunks[idx].len = pool_size;
5344 ar->wmi.mem_chunks[idx].req_id = req_id;
5345 ar->wmi.num_mem_chunks++;
5346
5347 return num_units;
5348 }
5349
ath10k_wmi_alloc_host_mem(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5350 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5351 u32 num_units, u32 unit_len)
5352 {
5353 int ret;
5354
5355 while (num_units) {
5356 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
5357 if (ret < 0)
5358 return ret;
5359
5360 num_units -= ret;
5361 }
5362
5363 return 0;
5364 }
5365
5366 static bool
ath10k_wmi_is_host_mem_allocated(struct ath10k * ar,const struct wlan_host_mem_req ** mem_reqs,u32 num_mem_reqs)5367 ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
5368 const struct wlan_host_mem_req **mem_reqs,
5369 u32 num_mem_reqs)
5370 {
5371 u32 req_id, num_units, unit_size, num_unit_info;
5372 u32 pool_size;
5373 int i, j;
5374 bool found;
5375
5376 if (ar->wmi.num_mem_chunks != num_mem_reqs)
5377 return false;
5378
5379 for (i = 0; i < num_mem_reqs; ++i) {
5380 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
5381 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
5382 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
5383 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
5384
5385 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5386 if (ar->num_active_peers)
5387 num_units = ar->num_active_peers + 1;
5388 else
5389 num_units = ar->max_num_peers + 1;
5390 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5391 num_units = ar->max_num_peers + 1;
5392 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5393 num_units = ar->max_num_vdevs + 1;
5394 }
5395
5396 found = false;
5397 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
5398 if (ar->wmi.mem_chunks[j].req_id == req_id) {
5399 pool_size = num_units * round_up(unit_size, 4);
5400 if (ar->wmi.mem_chunks[j].len == pool_size) {
5401 found = true;
5402 break;
5403 }
5404 }
5405 }
5406 if (!found)
5407 return false;
5408 }
5409
5410 return true;
5411 }
5412
5413 static int
ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5414 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5415 struct wmi_svc_rdy_ev_arg *arg)
5416 {
5417 struct wmi_service_ready_event *ev;
5418 size_t i, n;
5419
5420 if (skb->len < sizeof(*ev))
5421 return -EPROTO;
5422
5423 ev = (void *)skb->data;
5424 skb_pull(skb, sizeof(*ev));
5425 arg->min_tx_power = ev->hw_min_tx_power;
5426 arg->max_tx_power = ev->hw_max_tx_power;
5427 arg->ht_cap = ev->ht_cap_info;
5428 arg->vht_cap = ev->vht_cap_info;
5429 arg->vht_supp_mcs = ev->vht_supp_mcs;
5430 arg->sw_ver0 = ev->sw_version;
5431 arg->sw_ver1 = ev->sw_version_1;
5432 arg->phy_capab = ev->phy_capability;
5433 arg->num_rf_chains = ev->num_rf_chains;
5434 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5435 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5436 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5437 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5438 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5439 arg->num_mem_reqs = ev->num_mem_reqs;
5440 arg->service_map = ev->wmi_service_bitmap;
5441 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5442
5443 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5444 ARRAY_SIZE(arg->mem_reqs));
5445 for (i = 0; i < n; i++)
5446 arg->mem_reqs[i] = &ev->mem_reqs[i];
5447
5448 if (skb->len <
5449 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5450 return -EPROTO;
5451
5452 return 0;
5453 }
5454
5455 static int
ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5456 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5457 struct wmi_svc_rdy_ev_arg *arg)
5458 {
5459 struct wmi_10x_service_ready_event *ev;
5460 int i, n;
5461
5462 if (skb->len < sizeof(*ev))
5463 return -EPROTO;
5464
5465 ev = (void *)skb->data;
5466 skb_pull(skb, sizeof(*ev));
5467 arg->min_tx_power = ev->hw_min_tx_power;
5468 arg->max_tx_power = ev->hw_max_tx_power;
5469 arg->ht_cap = ev->ht_cap_info;
5470 arg->vht_cap = ev->vht_cap_info;
5471 arg->vht_supp_mcs = ev->vht_supp_mcs;
5472 arg->sw_ver0 = ev->sw_version;
5473 arg->phy_capab = ev->phy_capability;
5474 arg->num_rf_chains = ev->num_rf_chains;
5475 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5476 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5477 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5478 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5479 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5480 arg->num_mem_reqs = ev->num_mem_reqs;
5481 arg->service_map = ev->wmi_service_bitmap;
5482 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5483
5484 /* Deliberately skipping ev->sys_cap_info as WMI and WMI-TLV have
5485 * different values. We would need a translation to handle that,
5486 * but as we don't currently need anything from sys_cap_info from
5487 * WMI interface (only from WMI-TLV) safest it to skip it.
5488 */
5489
5490 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5491 ARRAY_SIZE(arg->mem_reqs));
5492 for (i = 0; i < n; i++)
5493 arg->mem_reqs[i] = &ev->mem_reqs[i];
5494
5495 if (skb->len <
5496 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5497 return -EPROTO;
5498
5499 return 0;
5500 }
5501
ath10k_wmi_event_service_ready_work(struct work_struct * work)5502 static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5503 {
5504 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
5505 struct sk_buff *skb = ar->svc_rdy_skb;
5506 struct wmi_svc_rdy_ev_arg arg = {};
5507 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5508 int ret;
5509 bool allocated;
5510
5511 if (!skb) {
5512 ath10k_warn(ar, "invalid service ready event skb\n");
5513 return;
5514 }
5515
5516 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5517 if (ret) {
5518 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5519 return;
5520 }
5521
5522 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
5523 arg.service_map_len);
5524
5525 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
5526 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
5527 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
5528 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5529 ar->vht_supp_mcs = __le32_to_cpu(arg.vht_supp_mcs);
5530 ar->fw_version_major =
5531 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
5532 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5533 ar->fw_version_release =
5534 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
5535 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
5536 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
5537 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
5538 ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
5539 ar->low_2ghz_chan = __le32_to_cpu(arg.low_2ghz_chan);
5540 ar->high_2ghz_chan = __le32_to_cpu(arg.high_2ghz_chan);
5541 ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
5542 ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
5543 ar->sys_cap_info = __le32_to_cpu(arg.sys_cap_info);
5544
5545 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
5546 arg.service_map, arg.service_map_len);
5547 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sys_cap_info 0x%x\n",
5548 ar->sys_cap_info);
5549
5550 if (ar->num_rf_chains > ar->max_spatial_stream) {
5551 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5552 ar->num_rf_chains, ar->max_spatial_stream);
5553 ar->num_rf_chains = ar->max_spatial_stream;
5554 }
5555
5556 if (!ar->cfg_tx_chainmask) {
5557 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
5558 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
5559 }
5560
5561 if (strlen(ar->hw->wiphy->fw_version) == 0) {
5562 snprintf(ar->hw->wiphy->fw_version,
5563 sizeof(ar->hw->wiphy->fw_version),
5564 "%u.%u.%u.%u",
5565 ar->fw_version_major,
5566 ar->fw_version_minor,
5567 ar->fw_version_release,
5568 ar->fw_version_build);
5569 }
5570
5571 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
5572 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
5573 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
5574 num_mem_reqs);
5575 return;
5576 }
5577
5578 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
5579 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
5580 ar->running_fw->fw_file.fw_features))
5581 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
5582 ar->max_num_vdevs;
5583 else
5584 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
5585 ar->max_num_vdevs;
5586
5587 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5588 ar->max_num_vdevs;
5589 ar->num_tids = ar->num_active_peers * 2;
5590 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
5591 }
5592
5593 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
5594 * and WMI_SERVICE_IRAM_TIDS, etc.
5595 */
5596
5597 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
5598 num_mem_reqs);
5599 if (allocated)
5600 goto skip_mem_alloc;
5601
5602 /* Either this event is received during boot time or there is a change
5603 * in memory requirement from firmware when compared to last request.
5604 * Free any old memory and do a fresh allocation based on the current
5605 * memory requirement.
5606 */
5607 ath10k_wmi_free_host_mem(ar);
5608
5609 for (i = 0; i < num_mem_reqs; ++i) {
5610 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
5611 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
5612 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
5613 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
5614
5615 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5616 if (ar->num_active_peers)
5617 num_units = ar->num_active_peers + 1;
5618 else
5619 num_units = ar->max_num_peers + 1;
5620 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5621 /* number of units to allocate is number of
5622 * peers, 1 extra for self peer on target
5623 * this needs to be tied, host and target
5624 * can get out of sync
5625 */
5626 num_units = ar->max_num_peers + 1;
5627 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5628 num_units = ar->max_num_vdevs + 1;
5629 }
5630
5631 ath10k_dbg(ar, ATH10K_DBG_WMI,
5632 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
5633 req_id,
5634 __le32_to_cpu(arg.mem_reqs[i]->num_units),
5635 num_unit_info,
5636 unit_size,
5637 num_units);
5638
5639 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
5640 unit_size);
5641 if (ret)
5642 return;
5643 }
5644
5645 skip_mem_alloc:
5646 ath10k_dbg(ar, ATH10K_DBG_WMI,
5647 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_mcs 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x low_2ghz_chan %d high_2ghz_chan %d low_5ghz_chan %d high_5ghz_chan %d num_mem_reqs 0x%08x\n",
5648 __le32_to_cpu(arg.min_tx_power),
5649 __le32_to_cpu(arg.max_tx_power),
5650 __le32_to_cpu(arg.ht_cap),
5651 __le32_to_cpu(arg.vht_cap),
5652 __le32_to_cpu(arg.vht_supp_mcs),
5653 __le32_to_cpu(arg.sw_ver0),
5654 __le32_to_cpu(arg.sw_ver1),
5655 __le32_to_cpu(arg.fw_build),
5656 __le32_to_cpu(arg.phy_capab),
5657 __le32_to_cpu(arg.num_rf_chains),
5658 __le32_to_cpu(arg.eeprom_rd),
5659 __le32_to_cpu(arg.low_2ghz_chan),
5660 __le32_to_cpu(arg.high_2ghz_chan),
5661 __le32_to_cpu(arg.low_5ghz_chan),
5662 __le32_to_cpu(arg.high_5ghz_chan),
5663 __le32_to_cpu(arg.num_mem_reqs));
5664
5665 dev_kfree_skb(skb);
5666 ar->svc_rdy_skb = NULL;
5667 complete(&ar->wmi.service_ready);
5668 }
5669
ath10k_wmi_event_service_ready(struct ath10k * ar,struct sk_buff * skb)5670 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
5671 {
5672 ar->svc_rdy_skb = skb;
5673 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
5674 }
5675
ath10k_wmi_op_pull_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_rdy_ev_arg * arg)5676 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5677 struct wmi_rdy_ev_arg *arg)
5678 {
5679 struct wmi_ready_event *ev = (void *)skb->data;
5680
5681 if (skb->len < sizeof(*ev))
5682 return -EPROTO;
5683
5684 skb_pull(skb, sizeof(*ev));
5685 arg->sw_version = ev->sw_version;
5686 arg->abi_version = ev->abi_version;
5687 arg->status = ev->status;
5688 arg->mac_addr = ev->mac_addr.addr;
5689
5690 return 0;
5691 }
5692
ath10k_wmi_op_pull_roam_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_roam_ev_arg * arg)5693 static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
5694 struct wmi_roam_ev_arg *arg)
5695 {
5696 struct wmi_roam_ev *ev = (void *)skb->data;
5697
5698 if (skb->len < sizeof(*ev))
5699 return -EPROTO;
5700
5701 skb_pull(skb, sizeof(*ev));
5702 arg->vdev_id = ev->vdev_id;
5703 arg->reason = ev->reason;
5704
5705 return 0;
5706 }
5707
ath10k_wmi_op_pull_echo_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_echo_ev_arg * arg)5708 static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
5709 struct sk_buff *skb,
5710 struct wmi_echo_ev_arg *arg)
5711 {
5712 struct wmi_echo_event *ev = (void *)skb->data;
5713
5714 arg->value = ev->value;
5715
5716 return 0;
5717 }
5718
ath10k_wmi_event_ready(struct ath10k * ar,struct sk_buff * skb)5719 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
5720 {
5721 struct wmi_rdy_ev_arg arg = {};
5722 int ret;
5723
5724 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
5725 if (ret) {
5726 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
5727 return ret;
5728 }
5729
5730 ath10k_dbg(ar, ATH10K_DBG_WMI,
5731 "wmi event ready sw_version 0x%08x abi_version %u mac_addr %pM status %d\n",
5732 __le32_to_cpu(arg.sw_version),
5733 __le32_to_cpu(arg.abi_version),
5734 arg.mac_addr,
5735 __le32_to_cpu(arg.status));
5736
5737 if (is_zero_ether_addr(ar->mac_addr))
5738 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5739 complete(&ar->wmi.unified_ready);
5740 return 0;
5741 }
5742
ath10k_wmi_event_service_available(struct ath10k * ar,struct sk_buff * skb)5743 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
5744 {
5745 int ret;
5746 struct wmi_svc_avail_ev_arg arg = {};
5747
5748 ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
5749 if (ret) {
5750 ath10k_warn(ar, "failed to parse service available event: %d\n",
5751 ret);
5752 }
5753
5754 ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
5755 __le32_to_cpu(arg.service_map_ext_len));
5756 }
5757
ath10k_wmi_event_temperature(struct ath10k * ar,struct sk_buff * skb)5758 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
5759 {
5760 const struct wmi_pdev_temperature_event *ev;
5761
5762 ev = (struct wmi_pdev_temperature_event *)skb->data;
5763 if (WARN_ON(skb->len < sizeof(*ev)))
5764 return -EPROTO;
5765
5766 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
5767 return 0;
5768 }
5769
ath10k_wmi_event_pdev_bss_chan_info(struct ath10k * ar,struct sk_buff * skb)5770 static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
5771 struct sk_buff *skb)
5772 {
5773 struct wmi_pdev_bss_chan_info_event *ev;
5774 struct survey_info *survey;
5775 u64 busy, total, tx, rx, rx_bss;
5776 u32 freq, noise_floor;
5777 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
5778 int idx;
5779
5780 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
5781 if (WARN_ON(skb->len < sizeof(*ev)))
5782 return -EPROTO;
5783
5784 freq = __le32_to_cpu(ev->freq);
5785 noise_floor = __le32_to_cpu(ev->noise_floor);
5786 busy = __le64_to_cpu(ev->cycle_busy);
5787 total = __le64_to_cpu(ev->cycle_total);
5788 tx = __le64_to_cpu(ev->cycle_tx);
5789 rx = __le64_to_cpu(ev->cycle_rx);
5790 rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
5791
5792 ath10k_dbg(ar, ATH10K_DBG_WMI,
5793 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
5794 freq, noise_floor, busy, total, tx, rx, rx_bss);
5795
5796 spin_lock_bh(&ar->data_lock);
5797 idx = freq_to_idx(ar, freq);
5798 if (idx >= ARRAY_SIZE(ar->survey)) {
5799 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
5800 freq, idx);
5801 goto exit;
5802 }
5803
5804 survey = &ar->survey[idx];
5805
5806 survey->noise = noise_floor;
5807 survey->time = div_u64(total, cc_freq_hz);
5808 survey->time_busy = div_u64(busy, cc_freq_hz);
5809 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
5810 survey->time_tx = div_u64(tx, cc_freq_hz);
5811 survey->filled |= (SURVEY_INFO_NOISE_DBM |
5812 SURVEY_INFO_TIME |
5813 SURVEY_INFO_TIME_BUSY |
5814 SURVEY_INFO_TIME_RX |
5815 SURVEY_INFO_TIME_TX);
5816 exit:
5817 spin_unlock_bh(&ar->data_lock);
5818 complete(&ar->bss_survey_done);
5819 return 0;
5820 }
5821
ath10k_wmi_queue_set_coverage_class_work(struct ath10k * ar)5822 static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
5823 {
5824 if (ar->hw_params.hw_ops->set_coverage_class) {
5825 spin_lock_bh(&ar->data_lock);
5826
5827 /* This call only ensures that the modified coverage class
5828 * persists in case the firmware sets the registers back to
5829 * their default value. So calling it is only necessary if the
5830 * coverage class has a non-zero value.
5831 */
5832 if (ar->fw_coverage.coverage_class)
5833 queue_work(ar->workqueue, &ar->set_coverage_class_work);
5834
5835 spin_unlock_bh(&ar->data_lock);
5836 }
5837 }
5838
ath10k_wmi_op_rx(struct ath10k * ar,struct sk_buff * skb)5839 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5840 {
5841 struct wmi_cmd_hdr *cmd_hdr;
5842 enum wmi_event_id id;
5843
5844 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5845 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5846
5847 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5848 goto out;
5849
5850 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5851
5852 switch (id) {
5853 case WMI_MGMT_RX_EVENTID:
5854 ath10k_wmi_event_mgmt_rx(ar, skb);
5855 /* mgmt_rx() owns the skb now! */
5856 return;
5857 case WMI_SCAN_EVENTID:
5858 ath10k_wmi_event_scan(ar, skb);
5859 ath10k_wmi_queue_set_coverage_class_work(ar);
5860 break;
5861 case WMI_CHAN_INFO_EVENTID:
5862 ath10k_wmi_event_chan_info(ar, skb);
5863 break;
5864 case WMI_ECHO_EVENTID:
5865 ath10k_wmi_event_echo(ar, skb);
5866 break;
5867 case WMI_DEBUG_MESG_EVENTID:
5868 ath10k_wmi_event_debug_mesg(ar, skb);
5869 ath10k_wmi_queue_set_coverage_class_work(ar);
5870 break;
5871 case WMI_UPDATE_STATS_EVENTID:
5872 ath10k_wmi_event_update_stats(ar, skb);
5873 break;
5874 case WMI_VDEV_START_RESP_EVENTID:
5875 ath10k_wmi_event_vdev_start_resp(ar, skb);
5876 ath10k_wmi_queue_set_coverage_class_work(ar);
5877 break;
5878 case WMI_VDEV_STOPPED_EVENTID:
5879 ath10k_wmi_event_vdev_stopped(ar, skb);
5880 ath10k_wmi_queue_set_coverage_class_work(ar);
5881 break;
5882 case WMI_PEER_STA_KICKOUT_EVENTID:
5883 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5884 break;
5885 case WMI_HOST_SWBA_EVENTID:
5886 ath10k_wmi_event_host_swba(ar, skb);
5887 break;
5888 case WMI_TBTTOFFSET_UPDATE_EVENTID:
5889 ath10k_wmi_event_tbttoffset_update(ar, skb);
5890 break;
5891 case WMI_PHYERR_EVENTID:
5892 ath10k_wmi_event_phyerr(ar, skb);
5893 break;
5894 case WMI_ROAM_EVENTID:
5895 ath10k_wmi_event_roam(ar, skb);
5896 ath10k_wmi_queue_set_coverage_class_work(ar);
5897 break;
5898 case WMI_PROFILE_MATCH:
5899 ath10k_wmi_event_profile_match(ar, skb);
5900 break;
5901 case WMI_DEBUG_PRINT_EVENTID:
5902 ath10k_wmi_event_debug_print(ar, skb);
5903 ath10k_wmi_queue_set_coverage_class_work(ar);
5904 break;
5905 case WMI_PDEV_QVIT_EVENTID:
5906 ath10k_wmi_event_pdev_qvit(ar, skb);
5907 break;
5908 case WMI_WLAN_PROFILE_DATA_EVENTID:
5909 ath10k_wmi_event_wlan_profile_data(ar, skb);
5910 break;
5911 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
5912 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5913 break;
5914 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
5915 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5916 break;
5917 case WMI_RTT_ERROR_REPORT_EVENTID:
5918 ath10k_wmi_event_rtt_error_report(ar, skb);
5919 break;
5920 case WMI_WOW_WAKEUP_HOST_EVENTID:
5921 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5922 break;
5923 case WMI_DCS_INTERFERENCE_EVENTID:
5924 ath10k_wmi_event_dcs_interference(ar, skb);
5925 break;
5926 case WMI_PDEV_TPC_CONFIG_EVENTID:
5927 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5928 break;
5929 case WMI_PDEV_FTM_INTG_EVENTID:
5930 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
5931 break;
5932 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
5933 ath10k_wmi_event_gtk_offload_status(ar, skb);
5934 break;
5935 case WMI_GTK_REKEY_FAIL_EVENTID:
5936 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
5937 break;
5938 case WMI_TX_DELBA_COMPLETE_EVENTID:
5939 ath10k_wmi_event_delba_complete(ar, skb);
5940 break;
5941 case WMI_TX_ADDBA_COMPLETE_EVENTID:
5942 ath10k_wmi_event_addba_complete(ar, skb);
5943 break;
5944 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
5945 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
5946 break;
5947 case WMI_SERVICE_READY_EVENTID:
5948 ath10k_wmi_event_service_ready(ar, skb);
5949 return;
5950 case WMI_READY_EVENTID:
5951 ath10k_wmi_event_ready(ar, skb);
5952 ath10k_wmi_queue_set_coverage_class_work(ar);
5953 break;
5954 case WMI_SERVICE_AVAILABLE_EVENTID:
5955 ath10k_wmi_event_service_available(ar, skb);
5956 break;
5957 default:
5958 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5959 break;
5960 }
5961
5962 out:
5963 dev_kfree_skb(skb);
5964 }
5965
ath10k_wmi_10_1_op_rx(struct ath10k * ar,struct sk_buff * skb)5966 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
5967 {
5968 struct wmi_cmd_hdr *cmd_hdr;
5969 enum wmi_10x_event_id id;
5970 bool consumed;
5971
5972 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5973 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5974
5975 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5976 goto out;
5977
5978 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5979
5980 consumed = ath10k_tm_event_wmi(ar, id, skb);
5981
5982 /* Ready event must be handled normally also in UTF mode so that we
5983 * know the UTF firmware has booted, others we are just bypass WMI
5984 * events to testmode.
5985 */
5986 if (consumed && id != WMI_10X_READY_EVENTID) {
5987 ath10k_dbg(ar, ATH10K_DBG_WMI,
5988 "wmi testmode consumed 0x%x\n", id);
5989 goto out;
5990 }
5991
5992 switch (id) {
5993 case WMI_10X_MGMT_RX_EVENTID:
5994 ath10k_wmi_event_mgmt_rx(ar, skb);
5995 /* mgmt_rx() owns the skb now! */
5996 return;
5997 case WMI_10X_SCAN_EVENTID:
5998 ath10k_wmi_event_scan(ar, skb);
5999 ath10k_wmi_queue_set_coverage_class_work(ar);
6000 break;
6001 case WMI_10X_CHAN_INFO_EVENTID:
6002 ath10k_wmi_event_chan_info(ar, skb);
6003 break;
6004 case WMI_10X_ECHO_EVENTID:
6005 ath10k_wmi_event_echo(ar, skb);
6006 break;
6007 case WMI_10X_DEBUG_MESG_EVENTID:
6008 ath10k_wmi_event_debug_mesg(ar, skb);
6009 ath10k_wmi_queue_set_coverage_class_work(ar);
6010 break;
6011 case WMI_10X_UPDATE_STATS_EVENTID:
6012 ath10k_wmi_event_update_stats(ar, skb);
6013 break;
6014 case WMI_10X_VDEV_START_RESP_EVENTID:
6015 ath10k_wmi_event_vdev_start_resp(ar, skb);
6016 ath10k_wmi_queue_set_coverage_class_work(ar);
6017 break;
6018 case WMI_10X_VDEV_STOPPED_EVENTID:
6019 ath10k_wmi_event_vdev_stopped(ar, skb);
6020 ath10k_wmi_queue_set_coverage_class_work(ar);
6021 break;
6022 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
6023 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6024 break;
6025 case WMI_10X_HOST_SWBA_EVENTID:
6026 ath10k_wmi_event_host_swba(ar, skb);
6027 break;
6028 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
6029 ath10k_wmi_event_tbttoffset_update(ar, skb);
6030 break;
6031 case WMI_10X_PHYERR_EVENTID:
6032 ath10k_wmi_event_phyerr(ar, skb);
6033 break;
6034 case WMI_10X_ROAM_EVENTID:
6035 ath10k_wmi_event_roam(ar, skb);
6036 ath10k_wmi_queue_set_coverage_class_work(ar);
6037 break;
6038 case WMI_10X_PROFILE_MATCH:
6039 ath10k_wmi_event_profile_match(ar, skb);
6040 break;
6041 case WMI_10X_DEBUG_PRINT_EVENTID:
6042 ath10k_wmi_event_debug_print(ar, skb);
6043 ath10k_wmi_queue_set_coverage_class_work(ar);
6044 break;
6045 case WMI_10X_PDEV_QVIT_EVENTID:
6046 ath10k_wmi_event_pdev_qvit(ar, skb);
6047 break;
6048 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
6049 ath10k_wmi_event_wlan_profile_data(ar, skb);
6050 break;
6051 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
6052 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6053 break;
6054 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
6055 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6056 break;
6057 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
6058 ath10k_wmi_event_rtt_error_report(ar, skb);
6059 break;
6060 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
6061 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6062 break;
6063 case WMI_10X_DCS_INTERFERENCE_EVENTID:
6064 ath10k_wmi_event_dcs_interference(ar, skb);
6065 break;
6066 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
6067 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6068 break;
6069 case WMI_10X_INST_RSSI_STATS_EVENTID:
6070 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6071 break;
6072 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
6073 ath10k_wmi_event_vdev_standby_req(ar, skb);
6074 break;
6075 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
6076 ath10k_wmi_event_vdev_resume_req(ar, skb);
6077 break;
6078 case WMI_10X_SERVICE_READY_EVENTID:
6079 ath10k_wmi_event_service_ready(ar, skb);
6080 return;
6081 case WMI_10X_READY_EVENTID:
6082 ath10k_wmi_event_ready(ar, skb);
6083 ath10k_wmi_queue_set_coverage_class_work(ar);
6084 break;
6085 case WMI_10X_PDEV_UTF_EVENTID:
6086 /* ignore utf events */
6087 break;
6088 default:
6089 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6090 break;
6091 }
6092
6093 out:
6094 dev_kfree_skb(skb);
6095 }
6096
ath10k_wmi_10_2_op_rx(struct ath10k * ar,struct sk_buff * skb)6097 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
6098 {
6099 struct wmi_cmd_hdr *cmd_hdr;
6100 enum wmi_10_2_event_id id;
6101 bool consumed;
6102
6103 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6104 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6105
6106 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
6107 goto out;
6108
6109 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6110
6111 consumed = ath10k_tm_event_wmi(ar, id, skb);
6112
6113 /* Ready event must be handled normally also in UTF mode so that we
6114 * know the UTF firmware has booted, others we are just bypass WMI
6115 * events to testmode.
6116 */
6117 if (consumed && id != WMI_10_2_READY_EVENTID) {
6118 ath10k_dbg(ar, ATH10K_DBG_WMI,
6119 "wmi testmode consumed 0x%x\n", id);
6120 goto out;
6121 }
6122
6123 switch (id) {
6124 case WMI_10_2_MGMT_RX_EVENTID:
6125 ath10k_wmi_event_mgmt_rx(ar, skb);
6126 /* mgmt_rx() owns the skb now! */
6127 return;
6128 case WMI_10_2_SCAN_EVENTID:
6129 ath10k_wmi_event_scan(ar, skb);
6130 ath10k_wmi_queue_set_coverage_class_work(ar);
6131 break;
6132 case WMI_10_2_CHAN_INFO_EVENTID:
6133 ath10k_wmi_event_chan_info(ar, skb);
6134 break;
6135 case WMI_10_2_ECHO_EVENTID:
6136 ath10k_wmi_event_echo(ar, skb);
6137 break;
6138 case WMI_10_2_DEBUG_MESG_EVENTID:
6139 ath10k_wmi_event_debug_mesg(ar, skb);
6140 ath10k_wmi_queue_set_coverage_class_work(ar);
6141 break;
6142 case WMI_10_2_UPDATE_STATS_EVENTID:
6143 ath10k_wmi_event_update_stats(ar, skb);
6144 break;
6145 case WMI_10_2_VDEV_START_RESP_EVENTID:
6146 ath10k_wmi_event_vdev_start_resp(ar, skb);
6147 ath10k_wmi_queue_set_coverage_class_work(ar);
6148 break;
6149 case WMI_10_2_VDEV_STOPPED_EVENTID:
6150 ath10k_wmi_event_vdev_stopped(ar, skb);
6151 ath10k_wmi_queue_set_coverage_class_work(ar);
6152 break;
6153 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
6154 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6155 break;
6156 case WMI_10_2_HOST_SWBA_EVENTID:
6157 ath10k_wmi_event_host_swba(ar, skb);
6158 break;
6159 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
6160 ath10k_wmi_event_tbttoffset_update(ar, skb);
6161 break;
6162 case WMI_10_2_PHYERR_EVENTID:
6163 ath10k_wmi_event_phyerr(ar, skb);
6164 break;
6165 case WMI_10_2_ROAM_EVENTID:
6166 ath10k_wmi_event_roam(ar, skb);
6167 ath10k_wmi_queue_set_coverage_class_work(ar);
6168 break;
6169 case WMI_10_2_PROFILE_MATCH:
6170 ath10k_wmi_event_profile_match(ar, skb);
6171 break;
6172 case WMI_10_2_DEBUG_PRINT_EVENTID:
6173 ath10k_wmi_event_debug_print(ar, skb);
6174 ath10k_wmi_queue_set_coverage_class_work(ar);
6175 break;
6176 case WMI_10_2_PDEV_QVIT_EVENTID:
6177 ath10k_wmi_event_pdev_qvit(ar, skb);
6178 break;
6179 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
6180 ath10k_wmi_event_wlan_profile_data(ar, skb);
6181 break;
6182 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
6183 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6184 break;
6185 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
6186 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6187 break;
6188 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
6189 ath10k_wmi_event_rtt_error_report(ar, skb);
6190 break;
6191 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
6192 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6193 break;
6194 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
6195 ath10k_wmi_event_dcs_interference(ar, skb);
6196 break;
6197 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
6198 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6199 break;
6200 case WMI_10_2_INST_RSSI_STATS_EVENTID:
6201 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6202 break;
6203 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
6204 ath10k_wmi_event_vdev_standby_req(ar, skb);
6205 ath10k_wmi_queue_set_coverage_class_work(ar);
6206 break;
6207 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
6208 ath10k_wmi_event_vdev_resume_req(ar, skb);
6209 ath10k_wmi_queue_set_coverage_class_work(ar);
6210 break;
6211 case WMI_10_2_SERVICE_READY_EVENTID:
6212 ath10k_wmi_event_service_ready(ar, skb);
6213 return;
6214 case WMI_10_2_READY_EVENTID:
6215 ath10k_wmi_event_ready(ar, skb);
6216 ath10k_wmi_queue_set_coverage_class_work(ar);
6217 break;
6218 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
6219 ath10k_wmi_event_temperature(ar, skb);
6220 break;
6221 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
6222 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6223 break;
6224 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
6225 case WMI_10_2_GPIO_INPUT_EVENTID:
6226 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
6227 case WMI_10_2_GENERIC_BUFFER_EVENTID:
6228 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
6229 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
6230 case WMI_10_2_WDS_PEER_EVENTID:
6231 ath10k_dbg(ar, ATH10K_DBG_WMI,
6232 "received event id %d not implemented\n", id);
6233 break;
6234 case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID:
6235 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6236 break;
6237 default:
6238 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6239 break;
6240 }
6241
6242 out:
6243 dev_kfree_skb(skb);
6244 }
6245
ath10k_wmi_10_4_op_rx(struct ath10k * ar,struct sk_buff * skb)6246 static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
6247 {
6248 struct wmi_cmd_hdr *cmd_hdr;
6249 enum wmi_10_4_event_id id;
6250 bool consumed;
6251
6252 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6253 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6254
6255 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6256 goto out;
6257
6258 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6259
6260 consumed = ath10k_tm_event_wmi(ar, id, skb);
6261
6262 /* Ready event must be handled normally also in UTF mode so that we
6263 * know the UTF firmware has booted, others we are just bypass WMI
6264 * events to testmode.
6265 */
6266 if (consumed && id != WMI_10_4_READY_EVENTID) {
6267 ath10k_dbg(ar, ATH10K_DBG_WMI,
6268 "wmi testmode consumed 0x%x\n", id);
6269 goto out;
6270 }
6271
6272 switch (id) {
6273 case WMI_10_4_MGMT_RX_EVENTID:
6274 ath10k_wmi_event_mgmt_rx(ar, skb);
6275 /* mgmt_rx() owns the skb now! */
6276 return;
6277 case WMI_10_4_ECHO_EVENTID:
6278 ath10k_wmi_event_echo(ar, skb);
6279 break;
6280 case WMI_10_4_DEBUG_MESG_EVENTID:
6281 ath10k_wmi_event_debug_mesg(ar, skb);
6282 ath10k_wmi_queue_set_coverage_class_work(ar);
6283 break;
6284 case WMI_10_4_SERVICE_READY_EVENTID:
6285 ath10k_wmi_event_service_ready(ar, skb);
6286 return;
6287 case WMI_10_4_SCAN_EVENTID:
6288 ath10k_wmi_event_scan(ar, skb);
6289 ath10k_wmi_queue_set_coverage_class_work(ar);
6290 break;
6291 case WMI_10_4_CHAN_INFO_EVENTID:
6292 ath10k_wmi_event_chan_info(ar, skb);
6293 break;
6294 case WMI_10_4_PHYERR_EVENTID:
6295 ath10k_wmi_event_phyerr(ar, skb);
6296 break;
6297 case WMI_10_4_READY_EVENTID:
6298 ath10k_wmi_event_ready(ar, skb);
6299 ath10k_wmi_queue_set_coverage_class_work(ar);
6300 break;
6301 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
6302 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6303 break;
6304 case WMI_10_4_ROAM_EVENTID:
6305 ath10k_wmi_event_roam(ar, skb);
6306 ath10k_wmi_queue_set_coverage_class_work(ar);
6307 break;
6308 case WMI_10_4_HOST_SWBA_EVENTID:
6309 ath10k_wmi_event_host_swba(ar, skb);
6310 break;
6311 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
6312 ath10k_wmi_event_tbttoffset_update(ar, skb);
6313 break;
6314 case WMI_10_4_DEBUG_PRINT_EVENTID:
6315 ath10k_wmi_event_debug_print(ar, skb);
6316 ath10k_wmi_queue_set_coverage_class_work(ar);
6317 break;
6318 case WMI_10_4_VDEV_START_RESP_EVENTID:
6319 ath10k_wmi_event_vdev_start_resp(ar, skb);
6320 ath10k_wmi_queue_set_coverage_class_work(ar);
6321 break;
6322 case WMI_10_4_VDEV_STOPPED_EVENTID:
6323 ath10k_wmi_event_vdev_stopped(ar, skb);
6324 ath10k_wmi_queue_set_coverage_class_work(ar);
6325 break;
6326 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
6327 case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
6328 case WMI_10_4_WDS_PEER_EVENTID:
6329 case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
6330 ath10k_dbg(ar, ATH10K_DBG_WMI,
6331 "received event id %d not implemented\n", id);
6332 break;
6333 case WMI_10_4_UPDATE_STATS_EVENTID:
6334 ath10k_wmi_event_update_stats(ar, skb);
6335 break;
6336 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
6337 ath10k_wmi_event_temperature(ar, skb);
6338 break;
6339 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
6340 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6341 break;
6342 case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
6343 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6344 break;
6345 case WMI_10_4_TDLS_PEER_EVENTID:
6346 ath10k_wmi_handle_tdls_peer_event(ar, skb);
6347 break;
6348 case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
6349 ath10k_wmi_event_tpc_final_table(ar, skb);
6350 break;
6351 case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
6352 ath10k_wmi_event_dfs_status_check(ar, skb);
6353 break;
6354 case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID:
6355 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6356 break;
6357 default:
6358 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6359 break;
6360 }
6361
6362 out:
6363 dev_kfree_skb(skb);
6364 }
6365
ath10k_wmi_process_rx(struct ath10k * ar,struct sk_buff * skb)6366 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
6367 {
6368 int ret;
6369
6370 ret = ath10k_wmi_rx(ar, skb);
6371 if (ret)
6372 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
6373 }
6374
ath10k_wmi_connect(struct ath10k * ar)6375 int ath10k_wmi_connect(struct ath10k *ar)
6376 {
6377 int status;
6378 struct ath10k_htc_svc_conn_req conn_req;
6379 struct ath10k_htc_svc_conn_resp conn_resp;
6380
6381 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
6382
6383 memset(&conn_req, 0, sizeof(conn_req));
6384 memset(&conn_resp, 0, sizeof(conn_resp));
6385
6386 /* these fields are the same for all service endpoints */
6387 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
6388 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
6389 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
6390
6391 /* connect to control service */
6392 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
6393
6394 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
6395 if (status) {
6396 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
6397 status);
6398 return status;
6399 }
6400
6401 ar->wmi.eid = conn_resp.eid;
6402 return 0;
6403 }
6404
6405 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k * ar,const u8 macaddr[ETH_ALEN])6406 ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar,
6407 const u8 macaddr[ETH_ALEN])
6408 {
6409 struct wmi_pdev_set_base_macaddr_cmd *cmd;
6410 struct sk_buff *skb;
6411
6412 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6413 if (!skb)
6414 return ERR_PTR(-ENOMEM);
6415
6416 cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data;
6417 ether_addr_copy(cmd->mac_addr.addr, macaddr);
6418
6419 ath10k_dbg(ar, ATH10K_DBG_WMI,
6420 "wmi pdev basemac %pM\n", macaddr);
6421 return skb;
6422 }
6423
6424 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6425 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
6426 u16 ctl2g, u16 ctl5g,
6427 enum wmi_dfs_region dfs_reg)
6428 {
6429 struct wmi_pdev_set_regdomain_cmd *cmd;
6430 struct sk_buff *skb;
6431
6432 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6433 if (!skb)
6434 return ERR_PTR(-ENOMEM);
6435
6436 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
6437 cmd->reg_domain = __cpu_to_le32(rd);
6438 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6439 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6440 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6441 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6442
6443 ath10k_dbg(ar, ATH10K_DBG_WMI,
6444 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
6445 rd, rd2g, rd5g, ctl2g, ctl5g);
6446 return skb;
6447 }
6448
6449 static struct sk_buff *
ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6450 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
6451 rd5g, u16 ctl2g, u16 ctl5g,
6452 enum wmi_dfs_region dfs_reg)
6453 {
6454 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
6455 struct sk_buff *skb;
6456
6457 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6458 if (!skb)
6459 return ERR_PTR(-ENOMEM);
6460
6461 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
6462 cmd->reg_domain = __cpu_to_le32(rd);
6463 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6464 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6465 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6466 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6467 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
6468
6469 ath10k_dbg(ar, ATH10K_DBG_WMI,
6470 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
6471 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
6472 return skb;
6473 }
6474
6475 static struct sk_buff *
ath10k_wmi_op_gen_pdev_suspend(struct ath10k * ar,u32 suspend_opt)6476 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
6477 {
6478 struct wmi_pdev_suspend_cmd *cmd;
6479 struct sk_buff *skb;
6480
6481 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6482 if (!skb)
6483 return ERR_PTR(-ENOMEM);
6484
6485 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
6486 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
6487
6488 return skb;
6489 }
6490
6491 static struct sk_buff *
ath10k_wmi_op_gen_pdev_resume(struct ath10k * ar)6492 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
6493 {
6494 struct sk_buff *skb;
6495
6496 skb = ath10k_wmi_alloc_skb(ar, 0);
6497 if (!skb)
6498 return ERR_PTR(-ENOMEM);
6499
6500 return skb;
6501 }
6502
6503 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_param(struct ath10k * ar,u32 id,u32 value)6504 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
6505 {
6506 struct wmi_pdev_set_param_cmd *cmd;
6507 struct sk_buff *skb;
6508
6509 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
6510 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
6511 id);
6512 return ERR_PTR(-EOPNOTSUPP);
6513 }
6514
6515 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6516 if (!skb)
6517 return ERR_PTR(-ENOMEM);
6518
6519 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
6520 cmd->param_id = __cpu_to_le32(id);
6521 cmd->param_value = __cpu_to_le32(value);
6522
6523 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
6524 id, value);
6525 return skb;
6526 }
6527
ath10k_wmi_put_host_mem_chunks(struct ath10k * ar,struct wmi_host_mem_chunks * chunks)6528 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6529 struct wmi_host_mem_chunks *chunks)
6530 {
6531 struct host_memory_chunk *chunk;
6532 int i;
6533
6534 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
6535
6536 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
6537 chunk = &chunks->items[i];
6538 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
6539 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
6540 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
6541
6542 ath10k_dbg(ar, ATH10K_DBG_WMI,
6543 "wmi chunk %d len %d requested, addr 0x%llx\n",
6544 i,
6545 ar->wmi.mem_chunks[i].len,
6546 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
6547 }
6548 }
6549
ath10k_wmi_op_gen_init(struct ath10k * ar)6550 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
6551 {
6552 struct wmi_init_cmd *cmd;
6553 struct sk_buff *buf;
6554 struct wmi_resource_config config = {};
6555 u32 val;
6556
6557 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
6558 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
6559 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
6560
6561 config.num_offload_reorder_bufs =
6562 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
6563
6564 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
6565 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
6566 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
6567 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
6568 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
6569 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6570 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6571 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6572 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
6573 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6574 config.scan_max_pending_reqs =
6575 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
6576
6577 config.bmiss_offload_max_vdev =
6578 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
6579
6580 config.roam_offload_max_vdev =
6581 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
6582
6583 config.roam_offload_max_ap_profiles =
6584 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
6585
6586 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
6587 config.num_mcast_table_elems =
6588 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
6589
6590 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
6591 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
6592 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
6593 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
6594 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
6595
6596 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6597 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6598
6599 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
6600
6601 config.gtk_offload_max_vdev =
6602 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
6603
6604 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
6605 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
6606
6607 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6608 ar->wmi.num_mem_chunks));
6609 if (!buf)
6610 return ERR_PTR(-ENOMEM);
6611
6612 cmd = (struct wmi_init_cmd *)buf->data;
6613
6614 memcpy(&cmd->resource_config, &config, sizeof(config));
6615 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6616
6617 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
6618 return buf;
6619 }
6620
ath10k_wmi_10_1_op_gen_init(struct ath10k * ar)6621 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
6622 {
6623 struct wmi_init_cmd_10x *cmd;
6624 struct sk_buff *buf;
6625 struct wmi_resource_config_10x config = {};
6626 u32 val;
6627
6628 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6629 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6630 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6631 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6632 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6633 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6634 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6635 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6636 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6637 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6638 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6639 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6640 config.scan_max_pending_reqs =
6641 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6642
6643 config.bmiss_offload_max_vdev =
6644 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6645
6646 config.roam_offload_max_vdev =
6647 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6648
6649 config.roam_offload_max_ap_profiles =
6650 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6651
6652 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6653 config.num_mcast_table_elems =
6654 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6655
6656 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6657 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6658 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6659 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
6660 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6661
6662 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6663 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6664
6665 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6666
6667 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6668 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6669
6670 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6671 ar->wmi.num_mem_chunks));
6672 if (!buf)
6673 return ERR_PTR(-ENOMEM);
6674
6675 cmd = (struct wmi_init_cmd_10x *)buf->data;
6676
6677 memcpy(&cmd->resource_config, &config, sizeof(config));
6678 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6679
6680 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
6681 return buf;
6682 }
6683
ath10k_wmi_10_2_op_gen_init(struct ath10k * ar)6684 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
6685 {
6686 struct wmi_init_cmd_10_2 *cmd;
6687 struct sk_buff *buf;
6688 struct wmi_resource_config_10x config = {};
6689 u32 val, features;
6690
6691 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6692 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6693
6694 if (ath10k_peer_stats_enabled(ar)) {
6695 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
6696 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
6697 } else {
6698 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6699 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6700 }
6701
6702 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6703 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6704 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6705 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6706 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6707 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6708 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6709 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6710
6711 config.scan_max_pending_reqs =
6712 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6713
6714 config.bmiss_offload_max_vdev =
6715 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6716
6717 config.roam_offload_max_vdev =
6718 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6719
6720 config.roam_offload_max_ap_profiles =
6721 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6722
6723 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6724 config.num_mcast_table_elems =
6725 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6726
6727 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6728 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6729 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6730 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
6731 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6732
6733 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6734 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6735
6736 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6737
6738 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6739 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6740
6741 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6742 ar->wmi.num_mem_chunks));
6743 if (!buf)
6744 return ERR_PTR(-ENOMEM);
6745
6746 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
6747
6748 features = WMI_10_2_RX_BATCH_MODE;
6749
6750 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
6751 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
6752 features |= WMI_10_2_COEX_GPIO;
6753
6754 if (ath10k_peer_stats_enabled(ar))
6755 features |= WMI_10_2_PEER_STATS;
6756
6757 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
6758 features |= WMI_10_2_BSS_CHAN_INFO;
6759
6760 cmd->resource_config.feature_mask = __cpu_to_le32(features);
6761
6762 memcpy(&cmd->resource_config.common, &config, sizeof(config));
6763 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6764
6765 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
6766 return buf;
6767 }
6768
ath10k_wmi_10_4_op_gen_init(struct ath10k * ar)6769 static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
6770 {
6771 struct wmi_init_cmd_10_4 *cmd;
6772 struct sk_buff *buf;
6773 struct wmi_resource_config_10_4 config = {};
6774
6775 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
6776 config.num_peers = __cpu_to_le32(ar->max_num_peers);
6777 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
6778 config.num_tids = __cpu_to_le32(ar->num_tids);
6779
6780 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
6781 config.num_offload_reorder_buffs =
6782 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
6783 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
6784 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
6785 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
6786 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
6787
6788 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6789 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6790 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6791 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
6792
6793 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6794 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
6795 config.bmiss_offload_max_vdev =
6796 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
6797 config.roam_offload_max_vdev =
6798 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
6799 config.roam_offload_max_ap_profiles =
6800 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
6801 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
6802 config.num_mcast_table_elems =
6803 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
6804
6805 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
6806 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
6807 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
6808 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
6809 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
6810
6811 config.rx_skip_defrag_timeout_dup_detection_check =
6812 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
6813
6814 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
6815 config.gtk_offload_max_vdev =
6816 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
6817 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
6818 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
6819 config.max_peer_ext_stats =
6820 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
6821 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
6822
6823 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
6824 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
6825 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
6826 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
6827
6828 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
6829 config.tt_support =
6830 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
6831 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
6832 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
6833 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
6834
6835 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6836 ar->wmi.num_mem_chunks));
6837 if (!buf)
6838 return ERR_PTR(-ENOMEM);
6839
6840 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
6841 memcpy(&cmd->resource_config, &config, sizeof(config));
6842 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6843
6844 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
6845 return buf;
6846 }
6847
ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg * arg)6848 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
6849 {
6850 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
6851 return -EINVAL;
6852 if (arg->n_channels > ARRAY_SIZE(arg->channels))
6853 return -EINVAL;
6854 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
6855 return -EINVAL;
6856 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
6857 return -EINVAL;
6858
6859 return 0;
6860 }
6861
6862 static size_t
ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg * arg)6863 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
6864 {
6865 int len = 0;
6866
6867 if (arg->ie_len) {
6868 len += sizeof(struct wmi_ie_data);
6869 len += roundup(arg->ie_len, 4);
6870 }
6871
6872 if (arg->n_channels) {
6873 len += sizeof(struct wmi_chan_list);
6874 len += sizeof(__le32) * arg->n_channels;
6875 }
6876
6877 if (arg->n_ssids) {
6878 len += sizeof(struct wmi_ssid_list);
6879 len += sizeof(struct wmi_ssid) * arg->n_ssids;
6880 }
6881
6882 if (arg->n_bssids) {
6883 len += sizeof(struct wmi_bssid_list);
6884 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6885 }
6886
6887 return len;
6888 }
6889
ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common * cmn,const struct wmi_start_scan_arg * arg)6890 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6891 const struct wmi_start_scan_arg *arg)
6892 {
6893 u32 scan_id;
6894 u32 scan_req_id;
6895
6896 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
6897 scan_id |= arg->scan_id;
6898
6899 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6900 scan_req_id |= arg->scan_req_id;
6901
6902 cmn->scan_id = __cpu_to_le32(scan_id);
6903 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
6904 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
6905 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
6906 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
6907 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
6908 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
6909 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
6910 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
6911 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
6912 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
6913 cmn->idle_time = __cpu_to_le32(arg->idle_time);
6914 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
6915 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
6916 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
6917 }
6918
6919 static void
ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs * tlvs,const struct wmi_start_scan_arg * arg)6920 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
6921 const struct wmi_start_scan_arg *arg)
6922 {
6923 struct wmi_ie_data *ie;
6924 struct wmi_chan_list *channels;
6925 struct wmi_ssid_list *ssids;
6926 struct wmi_bssid_list *bssids;
6927 void *ptr = tlvs->tlvs;
6928 int i;
6929
6930 if (arg->n_channels) {
6931 channels = ptr;
6932 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
6933 channels->num_chan = __cpu_to_le32(arg->n_channels);
6934
6935 for (i = 0; i < arg->n_channels; i++)
6936 channels->channel_list[i].freq =
6937 __cpu_to_le16(arg->channels[i]);
6938
6939 ptr += sizeof(*channels);
6940 ptr += sizeof(__le32) * arg->n_channels;
6941 }
6942
6943 if (arg->n_ssids) {
6944 ssids = ptr;
6945 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
6946 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
6947
6948 for (i = 0; i < arg->n_ssids; i++) {
6949 ssids->ssids[i].ssid_len =
6950 __cpu_to_le32(arg->ssids[i].len);
6951 memcpy(&ssids->ssids[i].ssid,
6952 arg->ssids[i].ssid,
6953 arg->ssids[i].len);
6954 }
6955
6956 ptr += sizeof(*ssids);
6957 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
6958 }
6959
6960 if (arg->n_bssids) {
6961 bssids = ptr;
6962 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
6963 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
6964
6965 for (i = 0; i < arg->n_bssids; i++)
6966 ether_addr_copy(bssids->bssid_list[i].addr,
6967 arg->bssids[i].bssid);
6968
6969 ptr += sizeof(*bssids);
6970 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6971 }
6972
6973 if (arg->ie_len) {
6974 ie = ptr;
6975 ie->tag = __cpu_to_le32(WMI_IE_TAG);
6976 ie->ie_len = __cpu_to_le32(arg->ie_len);
6977 memcpy(ie->ie_data, arg->ie, arg->ie_len);
6978
6979 ptr += sizeof(*ie);
6980 ptr += roundup(arg->ie_len, 4);
6981 }
6982 }
6983
6984 static struct sk_buff *
ath10k_wmi_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)6985 ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
6986 const struct wmi_start_scan_arg *arg)
6987 {
6988 struct wmi_start_scan_cmd *cmd;
6989 struct sk_buff *skb;
6990 size_t len;
6991 int ret;
6992
6993 ret = ath10k_wmi_start_scan_verify(arg);
6994 if (ret)
6995 return ERR_PTR(ret);
6996
6997 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
6998 skb = ath10k_wmi_alloc_skb(ar, len);
6999 if (!skb)
7000 return ERR_PTR(-ENOMEM);
7001
7002 cmd = (struct wmi_start_scan_cmd *)skb->data;
7003
7004 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7005 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7006
7007 cmd->burst_duration_ms = __cpu_to_le32(0);
7008
7009 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
7010 return skb;
7011 }
7012
7013 static struct sk_buff *
ath10k_wmi_10x_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)7014 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
7015 const struct wmi_start_scan_arg *arg)
7016 {
7017 struct wmi_10x_start_scan_cmd *cmd;
7018 struct sk_buff *skb;
7019 size_t len;
7020 int ret;
7021
7022 ret = ath10k_wmi_start_scan_verify(arg);
7023 if (ret)
7024 return ERR_PTR(ret);
7025
7026 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7027 skb = ath10k_wmi_alloc_skb(ar, len);
7028 if (!skb)
7029 return ERR_PTR(-ENOMEM);
7030
7031 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
7032
7033 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7034 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7035
7036 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
7037 return skb;
7038 }
7039
ath10k_wmi_start_scan_init(struct ath10k * ar,struct wmi_start_scan_arg * arg)7040 void ath10k_wmi_start_scan_init(struct ath10k *ar,
7041 struct wmi_start_scan_arg *arg)
7042 {
7043 /* setup commonly used values */
7044 arg->scan_req_id = 1;
7045 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
7046 arg->dwell_time_active = 50;
7047 arg->dwell_time_passive = 150;
7048 arg->min_rest_time = 50;
7049 arg->max_rest_time = 500;
7050 arg->repeat_probe_time = 0;
7051 arg->probe_spacing_time = 0;
7052 arg->idle_time = 0;
7053 arg->max_scan_time = 20000;
7054 arg->probe_delay = 5;
7055 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
7056 | WMI_SCAN_EVENT_COMPLETED
7057 | WMI_SCAN_EVENT_BSS_CHANNEL
7058 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
7059 | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
7060 | WMI_SCAN_EVENT_DEQUEUED;
7061 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
7062 arg->n_bssids = 1;
7063 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
7064 }
7065
7066 static struct sk_buff *
ath10k_wmi_op_gen_stop_scan(struct ath10k * ar,const struct wmi_stop_scan_arg * arg)7067 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
7068 const struct wmi_stop_scan_arg *arg)
7069 {
7070 struct wmi_stop_scan_cmd *cmd;
7071 struct sk_buff *skb;
7072 u32 scan_id;
7073 u32 req_id;
7074
7075 if (arg->req_id > 0xFFF)
7076 return ERR_PTR(-EINVAL);
7077 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
7078 return ERR_PTR(-EINVAL);
7079
7080 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7081 if (!skb)
7082 return ERR_PTR(-ENOMEM);
7083
7084 scan_id = arg->u.scan_id;
7085 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
7086
7087 req_id = arg->req_id;
7088 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
7089
7090 cmd = (struct wmi_stop_scan_cmd *)skb->data;
7091 cmd->req_type = __cpu_to_le32(arg->req_type);
7092 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
7093 cmd->scan_id = __cpu_to_le32(scan_id);
7094 cmd->scan_req_id = __cpu_to_le32(req_id);
7095
7096 ath10k_dbg(ar, ATH10K_DBG_WMI,
7097 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
7098 arg->req_id, arg->req_type, arg->u.scan_id);
7099 return skb;
7100 }
7101
7102 static struct sk_buff *
ath10k_wmi_op_gen_vdev_create(struct ath10k * ar,u32 vdev_id,enum wmi_vdev_type type,enum wmi_vdev_subtype subtype,const u8 macaddr[ETH_ALEN])7103 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
7104 enum wmi_vdev_type type,
7105 enum wmi_vdev_subtype subtype,
7106 const u8 macaddr[ETH_ALEN])
7107 {
7108 struct wmi_vdev_create_cmd *cmd;
7109 struct sk_buff *skb;
7110
7111 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7112 if (!skb)
7113 return ERR_PTR(-ENOMEM);
7114
7115 cmd = (struct wmi_vdev_create_cmd *)skb->data;
7116 cmd->vdev_id = __cpu_to_le32(vdev_id);
7117 cmd->vdev_type = __cpu_to_le32(type);
7118 cmd->vdev_subtype = __cpu_to_le32(subtype);
7119 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
7120
7121 ath10k_dbg(ar, ATH10K_DBG_WMI,
7122 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
7123 vdev_id, type, subtype, macaddr);
7124 return skb;
7125 }
7126
7127 static struct sk_buff *
ath10k_wmi_op_gen_vdev_delete(struct ath10k * ar,u32 vdev_id)7128 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
7129 {
7130 struct wmi_vdev_delete_cmd *cmd;
7131 struct sk_buff *skb;
7132
7133 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7134 if (!skb)
7135 return ERR_PTR(-ENOMEM);
7136
7137 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
7138 cmd->vdev_id = __cpu_to_le32(vdev_id);
7139
7140 ath10k_dbg(ar, ATH10K_DBG_WMI,
7141 "WMI vdev delete id %d\n", vdev_id);
7142 return skb;
7143 }
7144
7145 static struct sk_buff *
ath10k_wmi_op_gen_vdev_start(struct ath10k * ar,const struct wmi_vdev_start_request_arg * arg,bool restart)7146 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
7147 const struct wmi_vdev_start_request_arg *arg,
7148 bool restart)
7149 {
7150 struct wmi_vdev_start_request_cmd *cmd;
7151 struct sk_buff *skb;
7152 const char *cmdname;
7153 u32 flags = 0;
7154
7155 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
7156 return ERR_PTR(-EINVAL);
7157 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
7158 return ERR_PTR(-EINVAL);
7159
7160 if (restart)
7161 cmdname = "restart";
7162 else
7163 cmdname = "start";
7164
7165 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7166 if (!skb)
7167 return ERR_PTR(-ENOMEM);
7168
7169 if (arg->hidden_ssid)
7170 flags |= WMI_VDEV_START_HIDDEN_SSID;
7171 if (arg->pmf_enabled)
7172 flags |= WMI_VDEV_START_PMF_ENABLED;
7173
7174 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
7175 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7176 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
7177 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
7178 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
7179 cmd->flags = __cpu_to_le32(flags);
7180 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
7181 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
7182
7183 if (arg->ssid) {
7184 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
7185 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
7186 }
7187
7188 ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel);
7189
7190 ath10k_dbg(ar, ATH10K_DBG_WMI,
7191 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
7192 cmdname, arg->vdev_id,
7193 flags, arg->channel.freq, arg->channel.mode,
7194 cmd->chan.flags, arg->channel.max_power);
7195
7196 return skb;
7197 }
7198
7199 static struct sk_buff *
ath10k_wmi_op_gen_vdev_stop(struct ath10k * ar,u32 vdev_id)7200 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
7201 {
7202 struct wmi_vdev_stop_cmd *cmd;
7203 struct sk_buff *skb;
7204
7205 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7206 if (!skb)
7207 return ERR_PTR(-ENOMEM);
7208
7209 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
7210 cmd->vdev_id = __cpu_to_le32(vdev_id);
7211
7212 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
7213 return skb;
7214 }
7215
7216 static struct sk_buff *
ath10k_wmi_op_gen_vdev_up(struct ath10k * ar,u32 vdev_id,u32 aid,const u8 * bssid)7217 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
7218 const u8 *bssid)
7219 {
7220 struct wmi_vdev_up_cmd *cmd;
7221 struct sk_buff *skb;
7222
7223 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7224 if (!skb)
7225 return ERR_PTR(-ENOMEM);
7226
7227 cmd = (struct wmi_vdev_up_cmd *)skb->data;
7228 cmd->vdev_id = __cpu_to_le32(vdev_id);
7229 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7230 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
7231
7232 ath10k_dbg(ar, ATH10K_DBG_WMI,
7233 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
7234 vdev_id, aid, bssid);
7235 return skb;
7236 }
7237
7238 static struct sk_buff *
ath10k_wmi_op_gen_vdev_down(struct ath10k * ar,u32 vdev_id)7239 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
7240 {
7241 struct wmi_vdev_down_cmd *cmd;
7242 struct sk_buff *skb;
7243
7244 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7245 if (!skb)
7246 return ERR_PTR(-ENOMEM);
7247
7248 cmd = (struct wmi_vdev_down_cmd *)skb->data;
7249 cmd->vdev_id = __cpu_to_le32(vdev_id);
7250
7251 ath10k_dbg(ar, ATH10K_DBG_WMI,
7252 "wmi mgmt vdev down id 0x%x\n", vdev_id);
7253 return skb;
7254 }
7255
7256 static struct sk_buff *
ath10k_wmi_op_gen_vdev_set_param(struct ath10k * ar,u32 vdev_id,u32 param_id,u32 param_value)7257 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
7258 u32 param_id, u32 param_value)
7259 {
7260 struct wmi_vdev_set_param_cmd *cmd;
7261 struct sk_buff *skb;
7262
7263 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7264 ath10k_dbg(ar, ATH10K_DBG_WMI,
7265 "vdev param %d not supported by firmware\n",
7266 param_id);
7267 return ERR_PTR(-EOPNOTSUPP);
7268 }
7269
7270 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7271 if (!skb)
7272 return ERR_PTR(-ENOMEM);
7273
7274 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
7275 cmd->vdev_id = __cpu_to_le32(vdev_id);
7276 cmd->param_id = __cpu_to_le32(param_id);
7277 cmd->param_value = __cpu_to_le32(param_value);
7278
7279 ath10k_dbg(ar, ATH10K_DBG_WMI,
7280 "wmi vdev id 0x%x set param %d value %d\n",
7281 vdev_id, param_id, param_value);
7282 return skb;
7283 }
7284
7285 static struct sk_buff *
ath10k_wmi_op_gen_vdev_install_key(struct ath10k * ar,const struct wmi_vdev_install_key_arg * arg)7286 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
7287 const struct wmi_vdev_install_key_arg *arg)
7288 {
7289 struct wmi_vdev_install_key_cmd *cmd;
7290 struct sk_buff *skb;
7291
7292 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
7293 return ERR_PTR(-EINVAL);
7294 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
7295 return ERR_PTR(-EINVAL);
7296
7297 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
7298 if (!skb)
7299 return ERR_PTR(-ENOMEM);
7300
7301 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
7302 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7303 cmd->key_idx = __cpu_to_le32(arg->key_idx);
7304 cmd->key_flags = __cpu_to_le32(arg->key_flags);
7305 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
7306 cmd->key_len = __cpu_to_le32(arg->key_len);
7307 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
7308 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
7309
7310 if (arg->macaddr)
7311 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
7312 if (arg->key_data)
7313 memcpy(cmd->key_data, arg->key_data, arg->key_len);
7314
7315 ath10k_dbg(ar, ATH10K_DBG_WMI,
7316 "wmi vdev install key idx %d cipher %d len %d\n",
7317 arg->key_idx, arg->key_cipher, arg->key_len);
7318 return skb;
7319 }
7320
7321 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k * ar,const struct wmi_vdev_spectral_conf_arg * arg)7322 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
7323 const struct wmi_vdev_spectral_conf_arg *arg)
7324 {
7325 struct wmi_vdev_spectral_conf_cmd *cmd;
7326 struct sk_buff *skb;
7327
7328 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7329 if (!skb)
7330 return ERR_PTR(-ENOMEM);
7331
7332 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
7333 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7334 cmd->scan_count = __cpu_to_le32(arg->scan_count);
7335 cmd->scan_period = __cpu_to_le32(arg->scan_period);
7336 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
7337 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
7338 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
7339 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
7340 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
7341 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
7342 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
7343 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
7344 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
7345 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
7346 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
7347 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
7348 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
7349 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
7350 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
7351 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
7352
7353 return skb;
7354 }
7355
7356 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k * ar,u32 vdev_id,u32 trigger,u32 enable)7357 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
7358 u32 trigger, u32 enable)
7359 {
7360 struct wmi_vdev_spectral_enable_cmd *cmd;
7361 struct sk_buff *skb;
7362
7363 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7364 if (!skb)
7365 return ERR_PTR(-ENOMEM);
7366
7367 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
7368 cmd->vdev_id = __cpu_to_le32(vdev_id);
7369 cmd->trigger_cmd = __cpu_to_le32(trigger);
7370 cmd->enable_cmd = __cpu_to_le32(enable);
7371
7372 return skb;
7373 }
7374
7375 static struct sk_buff *
ath10k_wmi_op_gen_peer_create(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],enum wmi_peer_type peer_type)7376 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7377 const u8 peer_addr[ETH_ALEN],
7378 enum wmi_peer_type peer_type)
7379 {
7380 struct wmi_peer_create_cmd *cmd;
7381 struct sk_buff *skb;
7382
7383 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7384 if (!skb)
7385 return ERR_PTR(-ENOMEM);
7386
7387 cmd = (struct wmi_peer_create_cmd *)skb->data;
7388 cmd->vdev_id = __cpu_to_le32(vdev_id);
7389 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7390 cmd->peer_type = __cpu_to_le32(peer_type);
7391
7392 ath10k_dbg(ar, ATH10K_DBG_WMI,
7393 "wmi peer create vdev_id %d peer_addr %pM\n",
7394 vdev_id, peer_addr);
7395 return skb;
7396 }
7397
7398 static struct sk_buff *
ath10k_wmi_op_gen_peer_delete(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN])7399 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
7400 const u8 peer_addr[ETH_ALEN])
7401 {
7402 struct wmi_peer_delete_cmd *cmd;
7403 struct sk_buff *skb;
7404
7405 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7406 if (!skb)
7407 return ERR_PTR(-ENOMEM);
7408
7409 cmd = (struct wmi_peer_delete_cmd *)skb->data;
7410 cmd->vdev_id = __cpu_to_le32(vdev_id);
7411 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7412
7413 ath10k_dbg(ar, ATH10K_DBG_WMI,
7414 "wmi peer delete vdev_id %d peer_addr %pM\n",
7415 vdev_id, peer_addr);
7416 return skb;
7417 }
7418
7419 static struct sk_buff *
ath10k_wmi_op_gen_peer_flush(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],u32 tid_bitmap)7420 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
7421 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
7422 {
7423 struct wmi_peer_flush_tids_cmd *cmd;
7424 struct sk_buff *skb;
7425
7426 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7427 if (!skb)
7428 return ERR_PTR(-ENOMEM);
7429
7430 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
7431 cmd->vdev_id = __cpu_to_le32(vdev_id);
7432 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
7433 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7434
7435 ath10k_dbg(ar, ATH10K_DBG_WMI,
7436 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
7437 vdev_id, peer_addr, tid_bitmap);
7438 return skb;
7439 }
7440
7441 static struct sk_buff *
ath10k_wmi_op_gen_peer_set_param(struct ath10k * ar,u32 vdev_id,const u8 * peer_addr,enum wmi_peer_param param_id,u32 param_value)7442 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
7443 const u8 *peer_addr,
7444 enum wmi_peer_param param_id,
7445 u32 param_value)
7446 {
7447 struct wmi_peer_set_param_cmd *cmd;
7448 struct sk_buff *skb;
7449
7450 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7451 if (!skb)
7452 return ERR_PTR(-ENOMEM);
7453
7454 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
7455 cmd->vdev_id = __cpu_to_le32(vdev_id);
7456 cmd->param_id = __cpu_to_le32(param_id);
7457 cmd->param_value = __cpu_to_le32(param_value);
7458 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7459
7460 ath10k_dbg(ar, ATH10K_DBG_WMI,
7461 "wmi vdev %d peer 0x%pM set param %d value %d\n",
7462 vdev_id, peer_addr, param_id, param_value);
7463 return skb;
7464 }
7465
7466 static struct sk_buff *
ath10k_wmi_op_gen_set_psmode(struct ath10k * ar,u32 vdev_id,enum wmi_sta_ps_mode psmode)7467 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
7468 enum wmi_sta_ps_mode psmode)
7469 {
7470 struct wmi_sta_powersave_mode_cmd *cmd;
7471 struct sk_buff *skb;
7472
7473 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7474 if (!skb)
7475 return ERR_PTR(-ENOMEM);
7476
7477 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
7478 cmd->vdev_id = __cpu_to_le32(vdev_id);
7479 cmd->sta_ps_mode = __cpu_to_le32(psmode);
7480
7481 ath10k_dbg(ar, ATH10K_DBG_WMI,
7482 "wmi set powersave id 0x%x mode %d\n",
7483 vdev_id, psmode);
7484 return skb;
7485 }
7486
7487 static struct sk_buff *
ath10k_wmi_op_gen_set_sta_ps(struct ath10k * ar,u32 vdev_id,enum wmi_sta_powersave_param param_id,u32 value)7488 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
7489 enum wmi_sta_powersave_param param_id,
7490 u32 value)
7491 {
7492 struct wmi_sta_powersave_param_cmd *cmd;
7493 struct sk_buff *skb;
7494
7495 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7496 if (!skb)
7497 return ERR_PTR(-ENOMEM);
7498
7499 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
7500 cmd->vdev_id = __cpu_to_le32(vdev_id);
7501 cmd->param_id = __cpu_to_le32(param_id);
7502 cmd->param_value = __cpu_to_le32(value);
7503
7504 ath10k_dbg(ar, ATH10K_DBG_WMI,
7505 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
7506 vdev_id, param_id, value);
7507 return skb;
7508 }
7509
7510 static struct sk_buff *
ath10k_wmi_op_gen_set_ap_ps(struct ath10k * ar,u32 vdev_id,const u8 * mac,enum wmi_ap_ps_peer_param param_id,u32 value)7511 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7512 enum wmi_ap_ps_peer_param param_id, u32 value)
7513 {
7514 struct wmi_ap_ps_peer_cmd *cmd;
7515 struct sk_buff *skb;
7516
7517 if (!mac)
7518 return ERR_PTR(-EINVAL);
7519
7520 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7521 if (!skb)
7522 return ERR_PTR(-ENOMEM);
7523
7524 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
7525 cmd->vdev_id = __cpu_to_le32(vdev_id);
7526 cmd->param_id = __cpu_to_le32(param_id);
7527 cmd->param_value = __cpu_to_le32(value);
7528 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7529
7530 ath10k_dbg(ar, ATH10K_DBG_WMI,
7531 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
7532 vdev_id, param_id, value, mac);
7533 return skb;
7534 }
7535
7536 static struct sk_buff *
ath10k_wmi_op_gen_scan_chan_list(struct ath10k * ar,const struct wmi_scan_chan_list_arg * arg)7537 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
7538 const struct wmi_scan_chan_list_arg *arg)
7539 {
7540 struct wmi_scan_chan_list_cmd *cmd;
7541 struct sk_buff *skb;
7542 struct wmi_channel_arg *ch;
7543 struct wmi_channel *ci;
7544 int i;
7545
7546 skb = ath10k_wmi_alloc_skb(ar, struct_size(cmd, chan_info, arg->n_channels));
7547 if (!skb)
7548 return ERR_PTR(-EINVAL);
7549
7550 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
7551 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
7552
7553 for (i = 0; i < arg->n_channels; i++) {
7554 ch = &arg->channels[i];
7555 ci = &cmd->chan_info[i];
7556
7557 ath10k_wmi_put_wmi_channel(ar, ci, ch);
7558 }
7559
7560 return skb;
7561 }
7562
7563 static void
ath10k_wmi_peer_assoc_fill(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7564 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
7565 const struct wmi_peer_assoc_complete_arg *arg)
7566 {
7567 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
7568
7569 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7570 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
7571 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
7572 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
7573 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
7574 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
7575 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
7576 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
7577 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
7578 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
7579 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
7580 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
7581 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
7582
7583 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
7584
7585 cmd->peer_legacy_rates.num_rates =
7586 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
7587 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
7588 arg->peer_legacy_rates.num_rates);
7589
7590 cmd->peer_ht_rates.num_rates =
7591 __cpu_to_le32(arg->peer_ht_rates.num_rates);
7592 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
7593 arg->peer_ht_rates.num_rates);
7594
7595 cmd->peer_vht_rates.rx_max_rate =
7596 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
7597 cmd->peer_vht_rates.rx_mcs_set =
7598 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
7599 cmd->peer_vht_rates.tx_max_rate =
7600 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
7601 cmd->peer_vht_rates.tx_mcs_set =
7602 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
7603 }
7604
7605 static void
ath10k_wmi_peer_assoc_fill_main(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7606 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
7607 const struct wmi_peer_assoc_complete_arg *arg)
7608 {
7609 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
7610
7611 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7612 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
7613 }
7614
7615 static void
ath10k_wmi_peer_assoc_fill_10_1(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7616 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
7617 const struct wmi_peer_assoc_complete_arg *arg)
7618 {
7619 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7620 }
7621
7622 static void
ath10k_wmi_peer_assoc_fill_10_2(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7623 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
7624 const struct wmi_peer_assoc_complete_arg *arg)
7625 {
7626 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
7627 int max_mcs, max_nss;
7628 u32 info0;
7629
7630 /* TODO: Is using max values okay with firmware? */
7631 max_mcs = 0xf;
7632 max_nss = 0xf;
7633
7634 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
7635 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
7636
7637 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7638 cmd->info0 = __cpu_to_le32(info0);
7639 }
7640
7641 static void
ath10k_wmi_peer_assoc_fill_10_4(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7642 ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
7643 const struct wmi_peer_assoc_complete_arg *arg)
7644 {
7645 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
7646
7647 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
7648 cmd->peer_bw_rxnss_override =
7649 __cpu_to_le32(arg->peer_bw_rxnss_override);
7650 }
7651
7652 static int
ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg * arg)7653 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
7654 {
7655 if (arg->peer_mpdu_density > 16)
7656 return -EINVAL;
7657 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
7658 return -EINVAL;
7659 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
7660 return -EINVAL;
7661
7662 return 0;
7663 }
7664
7665 static struct sk_buff *
ath10k_wmi_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7666 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
7667 const struct wmi_peer_assoc_complete_arg *arg)
7668 {
7669 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
7670 struct sk_buff *skb;
7671 int ret;
7672
7673 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7674 if (ret)
7675 return ERR_PTR(ret);
7676
7677 skb = ath10k_wmi_alloc_skb(ar, len);
7678 if (!skb)
7679 return ERR_PTR(-ENOMEM);
7680
7681 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
7682
7683 ath10k_dbg(ar, ATH10K_DBG_WMI,
7684 "wmi peer assoc vdev %d addr %pM (%s)\n",
7685 arg->vdev_id, arg->addr,
7686 arg->peer_reassoc ? "reassociate" : "new");
7687 return skb;
7688 }
7689
7690 static struct sk_buff *
ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7691 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
7692 const struct wmi_peer_assoc_complete_arg *arg)
7693 {
7694 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
7695 struct sk_buff *skb;
7696 int ret;
7697
7698 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7699 if (ret)
7700 return ERR_PTR(ret);
7701
7702 skb = ath10k_wmi_alloc_skb(ar, len);
7703 if (!skb)
7704 return ERR_PTR(-ENOMEM);
7705
7706 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
7707
7708 ath10k_dbg(ar, ATH10K_DBG_WMI,
7709 "wmi peer assoc vdev %d addr %pM (%s)\n",
7710 arg->vdev_id, arg->addr,
7711 arg->peer_reassoc ? "reassociate" : "new");
7712 return skb;
7713 }
7714
7715 static struct sk_buff *
ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7716 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
7717 const struct wmi_peer_assoc_complete_arg *arg)
7718 {
7719 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
7720 struct sk_buff *skb;
7721 int ret;
7722
7723 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7724 if (ret)
7725 return ERR_PTR(ret);
7726
7727 skb = ath10k_wmi_alloc_skb(ar, len);
7728 if (!skb)
7729 return ERR_PTR(-ENOMEM);
7730
7731 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
7732
7733 ath10k_dbg(ar, ATH10K_DBG_WMI,
7734 "wmi peer assoc vdev %d addr %pM (%s)\n",
7735 arg->vdev_id, arg->addr,
7736 arg->peer_reassoc ? "reassociate" : "new");
7737 return skb;
7738 }
7739
7740 static struct sk_buff *
ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7741 ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
7742 const struct wmi_peer_assoc_complete_arg *arg)
7743 {
7744 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
7745 struct sk_buff *skb;
7746 int ret;
7747
7748 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7749 if (ret)
7750 return ERR_PTR(ret);
7751
7752 skb = ath10k_wmi_alloc_skb(ar, len);
7753 if (!skb)
7754 return ERR_PTR(-ENOMEM);
7755
7756 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
7757
7758 ath10k_dbg(ar, ATH10K_DBG_WMI,
7759 "wmi peer assoc vdev %d addr %pM (%s)\n",
7760 arg->vdev_id, arg->addr,
7761 arg->peer_reassoc ? "reassociate" : "new");
7762 return skb;
7763 }
7764
7765 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k * ar)7766 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
7767 {
7768 struct sk_buff *skb;
7769
7770 skb = ath10k_wmi_alloc_skb(ar, 0);
7771 if (!skb)
7772 return ERR_PTR(-ENOMEM);
7773
7774 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
7775 return skb;
7776 }
7777
7778 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k * ar,enum wmi_bss_survey_req_type type)7779 ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
7780 enum wmi_bss_survey_req_type type)
7781 {
7782 struct wmi_pdev_chan_info_req_cmd *cmd;
7783 struct sk_buff *skb;
7784
7785 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7786 if (!skb)
7787 return ERR_PTR(-ENOMEM);
7788
7789 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
7790 cmd->type = __cpu_to_le32(type);
7791
7792 ath10k_dbg(ar, ATH10K_DBG_WMI,
7793 "wmi pdev bss info request type %d\n", type);
7794
7795 return skb;
7796 }
7797
7798 /* This function assumes the beacon is already DMA mapped */
7799 static struct sk_buff *
ath10k_wmi_op_gen_beacon_dma(struct ath10k * ar,u32 vdev_id,const void * bcn,size_t bcn_len,u32 bcn_paddr,bool dtim_zero,bool deliver_cab)7800 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
7801 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
7802 bool deliver_cab)
7803 {
7804 struct wmi_bcn_tx_ref_cmd *cmd;
7805 struct sk_buff *skb;
7806 struct ieee80211_hdr *hdr;
7807 u16 fc;
7808
7809 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7810 if (!skb)
7811 return ERR_PTR(-ENOMEM);
7812
7813 hdr = (struct ieee80211_hdr *)bcn;
7814 fc = le16_to_cpu(hdr->frame_control);
7815
7816 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
7817 cmd->vdev_id = __cpu_to_le32(vdev_id);
7818 cmd->data_len = __cpu_to_le32(bcn_len);
7819 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
7820 cmd->msdu_id = 0;
7821 cmd->frame_control = __cpu_to_le32(fc);
7822 cmd->flags = 0;
7823 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
7824
7825 if (dtim_zero)
7826 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
7827
7828 if (deliver_cab)
7829 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
7830
7831 return skb;
7832 }
7833
ath10k_wmi_set_wmm_param(struct wmi_wmm_params * params,const struct wmi_wmm_params_arg * arg)7834 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7835 const struct wmi_wmm_params_arg *arg)
7836 {
7837 params->cwmin = __cpu_to_le32(arg->cwmin);
7838 params->cwmax = __cpu_to_le32(arg->cwmax);
7839 params->aifs = __cpu_to_le32(arg->aifs);
7840 params->txop = __cpu_to_le32(arg->txop);
7841 params->acm = __cpu_to_le32(arg->acm);
7842 params->no_ack = __cpu_to_le32(arg->no_ack);
7843 }
7844
7845 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k * ar,const struct wmi_wmm_params_all_arg * arg)7846 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
7847 const struct wmi_wmm_params_all_arg *arg)
7848 {
7849 struct wmi_pdev_set_wmm_params *cmd;
7850 struct sk_buff *skb;
7851
7852 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7853 if (!skb)
7854 return ERR_PTR(-ENOMEM);
7855
7856 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
7857 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
7858 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
7859 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
7860 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
7861
7862 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
7863 return skb;
7864 }
7865
7866 static struct sk_buff *
ath10k_wmi_op_gen_request_stats(struct ath10k * ar,u32 stats_mask)7867 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
7868 {
7869 struct wmi_request_stats_cmd *cmd;
7870 struct sk_buff *skb;
7871
7872 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7873 if (!skb)
7874 return ERR_PTR(-ENOMEM);
7875
7876 cmd = (struct wmi_request_stats_cmd *)skb->data;
7877 cmd->stats_id = __cpu_to_le32(stats_mask);
7878
7879 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
7880 stats_mask);
7881 return skb;
7882 }
7883
7884 static struct sk_buff *
ath10k_wmi_op_gen_force_fw_hang(struct ath10k * ar,enum wmi_force_fw_hang_type type,u32 delay_ms)7885 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
7886 enum wmi_force_fw_hang_type type, u32 delay_ms)
7887 {
7888 struct wmi_force_fw_hang_cmd *cmd;
7889 struct sk_buff *skb;
7890
7891 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7892 if (!skb)
7893 return ERR_PTR(-ENOMEM);
7894
7895 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
7896 cmd->type = __cpu_to_le32(type);
7897 cmd->delay_ms = __cpu_to_le32(delay_ms);
7898
7899 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
7900 type, delay_ms);
7901 return skb;
7902 }
7903
7904 static struct sk_buff *
ath10k_wmi_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7905 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7906 u32 log_level)
7907 {
7908 struct wmi_dbglog_cfg_cmd *cmd;
7909 struct sk_buff *skb;
7910 u32 cfg;
7911
7912 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7913 if (!skb)
7914 return ERR_PTR(-ENOMEM);
7915
7916 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
7917
7918 if (module_enable) {
7919 cfg = SM(log_level,
7920 ATH10K_DBGLOG_CFG_LOG_LVL);
7921 } else {
7922 /* set back defaults, all modules with WARN level */
7923 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7924 ATH10K_DBGLOG_CFG_LOG_LVL);
7925 module_enable = ~0;
7926 }
7927
7928 cmd->module_enable = __cpu_to_le32(module_enable);
7929 cmd->module_valid = __cpu_to_le32(~0);
7930 cmd->config_enable = __cpu_to_le32(cfg);
7931 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7932
7933 ath10k_dbg(ar, ATH10K_DBG_WMI,
7934 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
7935 __le32_to_cpu(cmd->module_enable),
7936 __le32_to_cpu(cmd->module_valid),
7937 __le32_to_cpu(cmd->config_enable),
7938 __le32_to_cpu(cmd->config_valid));
7939 return skb;
7940 }
7941
7942 static struct sk_buff *
ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7943 ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7944 u32 log_level)
7945 {
7946 struct wmi_10_4_dbglog_cfg_cmd *cmd;
7947 struct sk_buff *skb;
7948 u32 cfg;
7949
7950 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7951 if (!skb)
7952 return ERR_PTR(-ENOMEM);
7953
7954 cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
7955
7956 if (module_enable) {
7957 cfg = SM(log_level,
7958 ATH10K_DBGLOG_CFG_LOG_LVL);
7959 } else {
7960 /* set back defaults, all modules with WARN level */
7961 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7962 ATH10K_DBGLOG_CFG_LOG_LVL);
7963 module_enable = ~0;
7964 }
7965
7966 cmd->module_enable = __cpu_to_le64(module_enable);
7967 cmd->module_valid = __cpu_to_le64(~0);
7968 cmd->config_enable = __cpu_to_le32(cfg);
7969 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7970
7971 ath10k_dbg(ar, ATH10K_DBG_WMI,
7972 "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
7973 __le64_to_cpu(cmd->module_enable),
7974 __le64_to_cpu(cmd->module_valid),
7975 __le32_to_cpu(cmd->config_enable),
7976 __le32_to_cpu(cmd->config_valid));
7977 return skb;
7978 }
7979
7980 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_enable(struct ath10k * ar,u32 ev_bitmap)7981 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
7982 {
7983 struct wmi_pdev_pktlog_enable_cmd *cmd;
7984 struct sk_buff *skb;
7985
7986 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7987 if (!skb)
7988 return ERR_PTR(-ENOMEM);
7989
7990 ev_bitmap &= ATH10K_PKTLOG_ANY;
7991
7992 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
7993 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
7994
7995 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
7996 ev_bitmap);
7997 return skb;
7998 }
7999
8000 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_disable(struct ath10k * ar)8001 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
8002 {
8003 struct sk_buff *skb;
8004
8005 skb = ath10k_wmi_alloc_skb(ar, 0);
8006 if (!skb)
8007 return ERR_PTR(-ENOMEM);
8008
8009 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
8010 return skb;
8011 }
8012
8013 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k * ar,u32 period,u32 duration,u32 next_offset,u32 enabled)8014 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
8015 u32 duration, u32 next_offset,
8016 u32 enabled)
8017 {
8018 struct wmi_pdev_set_quiet_cmd *cmd;
8019 struct sk_buff *skb;
8020
8021 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8022 if (!skb)
8023 return ERR_PTR(-ENOMEM);
8024
8025 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
8026 cmd->period = __cpu_to_le32(period);
8027 cmd->duration = __cpu_to_le32(duration);
8028 cmd->next_start = __cpu_to_le32(next_offset);
8029 cmd->enabled = __cpu_to_le32(enabled);
8030
8031 ath10k_dbg(ar, ATH10K_DBG_WMI,
8032 "wmi quiet param: period %u duration %u enabled %d\n",
8033 period, duration, enabled);
8034 return skb;
8035 }
8036
8037 static struct sk_buff *
ath10k_wmi_op_gen_addba_clear_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac)8038 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
8039 const u8 *mac)
8040 {
8041 struct wmi_addba_clear_resp_cmd *cmd;
8042 struct sk_buff *skb;
8043
8044 if (!mac)
8045 return ERR_PTR(-EINVAL);
8046
8047 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8048 if (!skb)
8049 return ERR_PTR(-ENOMEM);
8050
8051 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
8052 cmd->vdev_id = __cpu_to_le32(vdev_id);
8053 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8054
8055 ath10k_dbg(ar, ATH10K_DBG_WMI,
8056 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
8057 vdev_id, mac);
8058 return skb;
8059 }
8060
8061 static struct sk_buff *
ath10k_wmi_op_gen_addba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)8062 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8063 u32 tid, u32 buf_size)
8064 {
8065 struct wmi_addba_send_cmd *cmd;
8066 struct sk_buff *skb;
8067
8068 if (!mac)
8069 return ERR_PTR(-EINVAL);
8070
8071 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8072 if (!skb)
8073 return ERR_PTR(-ENOMEM);
8074
8075 cmd = (struct wmi_addba_send_cmd *)skb->data;
8076 cmd->vdev_id = __cpu_to_le32(vdev_id);
8077 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8078 cmd->tid = __cpu_to_le32(tid);
8079 cmd->buffersize = __cpu_to_le32(buf_size);
8080
8081 ath10k_dbg(ar, ATH10K_DBG_WMI,
8082 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
8083 vdev_id, mac, tid, buf_size);
8084 return skb;
8085 }
8086
8087 static struct sk_buff *
ath10k_wmi_op_gen_addba_set_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)8088 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8089 u32 tid, u32 status)
8090 {
8091 struct wmi_addba_setresponse_cmd *cmd;
8092 struct sk_buff *skb;
8093
8094 if (!mac)
8095 return ERR_PTR(-EINVAL);
8096
8097 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8098 if (!skb)
8099 return ERR_PTR(-ENOMEM);
8100
8101 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
8102 cmd->vdev_id = __cpu_to_le32(vdev_id);
8103 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8104 cmd->tid = __cpu_to_le32(tid);
8105 cmd->statuscode = __cpu_to_le32(status);
8106
8107 ath10k_dbg(ar, ATH10K_DBG_WMI,
8108 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
8109 vdev_id, mac, tid, status);
8110 return skb;
8111 }
8112
8113 static struct sk_buff *
ath10k_wmi_op_gen_delba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)8114 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8115 u32 tid, u32 initiator, u32 reason)
8116 {
8117 struct wmi_delba_send_cmd *cmd;
8118 struct sk_buff *skb;
8119
8120 if (!mac)
8121 return ERR_PTR(-EINVAL);
8122
8123 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8124 if (!skb)
8125 return ERR_PTR(-ENOMEM);
8126
8127 cmd = (struct wmi_delba_send_cmd *)skb->data;
8128 cmd->vdev_id = __cpu_to_le32(vdev_id);
8129 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8130 cmd->tid = __cpu_to_le32(tid);
8131 cmd->initiator = __cpu_to_le32(initiator);
8132 cmd->reasoncode = __cpu_to_le32(reason);
8133
8134 ath10k_dbg(ar, ATH10K_DBG_WMI,
8135 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
8136 vdev_id, mac, tid, initiator, reason);
8137 return skb;
8138 }
8139
8140 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k * ar,u32 param)8141 ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
8142 {
8143 struct wmi_pdev_get_tpc_config_cmd *cmd;
8144 struct sk_buff *skb;
8145
8146 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8147 if (!skb)
8148 return ERR_PTR(-ENOMEM);
8149
8150 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
8151 cmd->param = __cpu_to_le32(param);
8152
8153 ath10k_dbg(ar, ATH10K_DBG_WMI,
8154 "wmi pdev get tpc config param %d\n", param);
8155 return skb;
8156 }
8157
ath10k_wmi_fw_stats_num_peers(struct list_head * head)8158 size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
8159 {
8160 struct ath10k_fw_stats_peer *i;
8161 size_t num = 0;
8162
8163 list_for_each_entry(i, head, list)
8164 ++num;
8165
8166 return num;
8167 }
8168
ath10k_wmi_fw_stats_num_vdevs(struct list_head * head)8169 size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
8170 {
8171 struct ath10k_fw_stats_vdev *i;
8172 size_t num = 0;
8173
8174 list_for_each_entry(i, head, list)
8175 ++num;
8176
8177 return num;
8178 }
8179
8180 static void
ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8181 ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8182 char *buf, u32 *length)
8183 {
8184 u32 len = *length;
8185 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8186
8187 len += scnprintf(buf + len, buf_len - len, "\n");
8188 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8189 "ath10k PDEV stats");
8190 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8191 "=================");
8192
8193 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8194 "Channel noise floor", pdev->ch_noise_floor);
8195 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8196 "Channel TX power", pdev->chan_tx_power);
8197 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8198 "TX frame count", pdev->tx_frame_count);
8199 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8200 "RX frame count", pdev->rx_frame_count);
8201 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8202 "RX clear count", pdev->rx_clear_count);
8203 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8204 "Cycle count", pdev->cycle_count);
8205 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8206 "PHY error count", pdev->phy_err_count);
8207
8208 *length = len;
8209 }
8210
8211 static void
ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8212 ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8213 char *buf, u32 *length)
8214 {
8215 u32 len = *length;
8216 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8217
8218 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8219 "RTS bad count", pdev->rts_bad);
8220 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8221 "RTS good count", pdev->rts_good);
8222 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8223 "FCS bad count", pdev->fcs_bad);
8224 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8225 "No beacon count", pdev->no_beacons);
8226 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8227 "MIB int count", pdev->mib_int_count);
8228
8229 len += scnprintf(buf + len, buf_len - len, "\n");
8230 *length = len;
8231 }
8232
8233 static void
ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8234 ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8235 char *buf, u32 *length)
8236 {
8237 u32 len = *length;
8238 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8239
8240 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8241 "ath10k PDEV TX stats");
8242 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8243 "=================");
8244
8245 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8246 "HTT cookies queued", pdev->comp_queued);
8247 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8248 "HTT cookies disp.", pdev->comp_delivered);
8249 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8250 "MSDU queued", pdev->msdu_enqued);
8251 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8252 "MPDU queued", pdev->mpdu_enqued);
8253 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8254 "MSDUs dropped", pdev->wmm_drop);
8255 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8256 "Local enqued", pdev->local_enqued);
8257 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8258 "Local freed", pdev->local_freed);
8259 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8260 "HW queued", pdev->hw_queued);
8261 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8262 "PPDUs reaped", pdev->hw_reaped);
8263 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8264 "Num underruns", pdev->underrun);
8265 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8266 "PPDUs cleaned", pdev->tx_abort);
8267 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8268 "MPDUs requed", pdev->mpdus_requed);
8269 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8270 "Excessive retries", pdev->tx_ko);
8271 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8272 "HW rate", pdev->data_rc);
8273 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8274 "Sched self triggers", pdev->self_triggers);
8275 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8276 "Dropped due to SW retries",
8277 pdev->sw_retry_failure);
8278 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8279 "Illegal rate phy errors",
8280 pdev->illgl_rate_phy_err);
8281 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8282 "Pdev continuous xretry", pdev->pdev_cont_xretry);
8283 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8284 "TX timeout", pdev->pdev_tx_timeout);
8285 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8286 "PDEV resets", pdev->pdev_resets);
8287 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8288 "PHY underrun", pdev->phy_underrun);
8289 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8290 "MPDU is more than txop limit", pdev->txop_ovf);
8291 *length = len;
8292 }
8293
8294 static void
ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8295 ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8296 char *buf, u32 *length)
8297 {
8298 u32 len = *length;
8299 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8300
8301 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8302 "ath10k PDEV RX stats");
8303 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8304 "=================");
8305
8306 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8307 "Mid PPDU route change",
8308 pdev->mid_ppdu_route_change);
8309 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8310 "Tot. number of statuses", pdev->status_rcvd);
8311 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8312 "Extra frags on rings 0", pdev->r0_frags);
8313 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8314 "Extra frags on rings 1", pdev->r1_frags);
8315 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8316 "Extra frags on rings 2", pdev->r2_frags);
8317 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8318 "Extra frags on rings 3", pdev->r3_frags);
8319 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8320 "MSDUs delivered to HTT", pdev->htt_msdus);
8321 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8322 "MPDUs delivered to HTT", pdev->htt_mpdus);
8323 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8324 "MSDUs delivered to stack", pdev->loc_msdus);
8325 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8326 "MPDUs delivered to stack", pdev->loc_mpdus);
8327 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8328 "Oversized AMSDUs", pdev->oversize_amsdu);
8329 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8330 "PHY errors", pdev->phy_errs);
8331 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8332 "PHY errors drops", pdev->phy_err_drop);
8333 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8334 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8335 *length = len;
8336 }
8337
8338 static void
ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev * vdev,char * buf,u32 * length)8339 ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
8340 char *buf, u32 *length)
8341 {
8342 u32 len = *length;
8343 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8344 int i;
8345
8346 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8347 "vdev id", vdev->vdev_id);
8348 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8349 "beacon snr", vdev->beacon_snr);
8350 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8351 "data snr", vdev->data_snr);
8352 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8353 "num rx frames", vdev->num_rx_frames);
8354 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8355 "num rts fail", vdev->num_rts_fail);
8356 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8357 "num rts success", vdev->num_rts_success);
8358 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8359 "num rx err", vdev->num_rx_err);
8360 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8361 "num rx discard", vdev->num_rx_discard);
8362 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8363 "num tx not acked", vdev->num_tx_not_acked);
8364
8365 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
8366 len += scnprintf(buf + len, buf_len - len,
8367 "%25s [%02d] %u\n",
8368 "num tx frames", i,
8369 vdev->num_tx_frames[i]);
8370
8371 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
8372 len += scnprintf(buf + len, buf_len - len,
8373 "%25s [%02d] %u\n",
8374 "num tx frames retries", i,
8375 vdev->num_tx_frames_retries[i]);
8376
8377 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
8378 len += scnprintf(buf + len, buf_len - len,
8379 "%25s [%02d] %u\n",
8380 "num tx frames failures", i,
8381 vdev->num_tx_frames_failures[i]);
8382
8383 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
8384 len += scnprintf(buf + len, buf_len - len,
8385 "%25s [%02d] 0x%08x\n",
8386 "tx rate history", i,
8387 vdev->tx_rate_history[i]);
8388
8389 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
8390 len += scnprintf(buf + len, buf_len - len,
8391 "%25s [%02d] %u\n",
8392 "beacon rssi history", i,
8393 vdev->beacon_rssi_history[i]);
8394
8395 len += scnprintf(buf + len, buf_len - len, "\n");
8396 *length = len;
8397 }
8398
8399 static void
ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer * peer,char * buf,u32 * length,bool extended_peer)8400 ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
8401 char *buf, u32 *length, bool extended_peer)
8402 {
8403 u32 len = *length;
8404 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8405
8406 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8407 "Peer MAC address", peer->peer_macaddr);
8408 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8409 "Peer RSSI", peer->peer_rssi);
8410 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8411 "Peer TX rate", peer->peer_tx_rate);
8412 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8413 "Peer RX rate", peer->peer_rx_rate);
8414 if (!extended_peer)
8415 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8416 "Peer RX duration", peer->rx_duration);
8417
8418 len += scnprintf(buf + len, buf_len - len, "\n");
8419 *length = len;
8420 }
8421
8422 static void
ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer * peer,char * buf,u32 * length)8423 ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer *peer,
8424 char *buf, u32 *length)
8425 {
8426 u32 len = *length;
8427 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8428
8429 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8430 "Peer MAC address", peer->peer_macaddr);
8431 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8432 "Peer RX duration", peer->rx_duration);
8433 }
8434
ath10k_wmi_main_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8435 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
8436 struct ath10k_fw_stats *fw_stats,
8437 char *buf)
8438 {
8439 u32 len = 0;
8440 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8441 const struct ath10k_fw_stats_pdev *pdev;
8442 const struct ath10k_fw_stats_vdev *vdev;
8443 const struct ath10k_fw_stats_peer *peer;
8444 size_t num_peers;
8445 size_t num_vdevs;
8446
8447 spin_lock_bh(&ar->data_lock);
8448
8449 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8450 struct ath10k_fw_stats_pdev, list);
8451 if (!pdev) {
8452 ath10k_warn(ar, "failed to get pdev stats\n");
8453 goto unlock;
8454 }
8455
8456 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8457 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8458
8459 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8460 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8461 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8462
8463 len += scnprintf(buf + len, buf_len - len, "\n");
8464 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8465 "ath10k VDEV stats", num_vdevs);
8466 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8467 "=================");
8468
8469 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8470 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8471 }
8472
8473 len += scnprintf(buf + len, buf_len - len, "\n");
8474 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8475 "ath10k PEER stats", num_peers);
8476 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8477 "=================");
8478
8479 list_for_each_entry(peer, &fw_stats->peers, list) {
8480 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8481 fw_stats->extended);
8482 }
8483
8484 unlock:
8485 spin_unlock_bh(&ar->data_lock);
8486
8487 if (len >= buf_len)
8488 buf[len - 1] = 0;
8489 else
8490 buf[len] = 0;
8491 }
8492
ath10k_wmi_10x_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8493 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
8494 struct ath10k_fw_stats *fw_stats,
8495 char *buf)
8496 {
8497 unsigned int len = 0;
8498 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
8499 const struct ath10k_fw_stats_pdev *pdev;
8500 const struct ath10k_fw_stats_vdev *vdev;
8501 const struct ath10k_fw_stats_peer *peer;
8502 size_t num_peers;
8503 size_t num_vdevs;
8504
8505 spin_lock_bh(&ar->data_lock);
8506
8507 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8508 struct ath10k_fw_stats_pdev, list);
8509 if (!pdev) {
8510 ath10k_warn(ar, "failed to get pdev stats\n");
8511 goto unlock;
8512 }
8513
8514 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8515 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8516
8517 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8518 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8519 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8520 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8521
8522 len += scnprintf(buf + len, buf_len - len, "\n");
8523 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8524 "ath10k VDEV stats", num_vdevs);
8525 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8526 "=================");
8527
8528 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8529 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8530 }
8531
8532 len += scnprintf(buf + len, buf_len - len, "\n");
8533 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8534 "ath10k PEER stats", num_peers);
8535 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8536 "=================");
8537
8538 list_for_each_entry(peer, &fw_stats->peers, list) {
8539 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8540 fw_stats->extended);
8541 }
8542
8543 unlock:
8544 spin_unlock_bh(&ar->data_lock);
8545
8546 if (len >= buf_len)
8547 buf[len - 1] = 0;
8548 else
8549 buf[len] = 0;
8550 }
8551
8552 static struct sk_buff *
ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k * ar,u8 enable,u32 detect_level,u32 detect_margin)8553 ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
8554 u32 detect_level, u32 detect_margin)
8555 {
8556 struct wmi_pdev_set_adaptive_cca_params *cmd;
8557 struct sk_buff *skb;
8558
8559 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8560 if (!skb)
8561 return ERR_PTR(-ENOMEM);
8562
8563 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
8564 cmd->enable = __cpu_to_le32(enable);
8565 cmd->cca_detect_level = __cpu_to_le32(detect_level);
8566 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
8567
8568 ath10k_dbg(ar, ATH10K_DBG_WMI,
8569 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
8570 enable, detect_level, detect_margin);
8571 return skb;
8572 }
8573
8574 static void
ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd * vdev,char * buf,u32 * length)8575 ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
8576 char *buf, u32 *length)
8577 {
8578 u32 len = *length;
8579 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8580 u32 val;
8581
8582 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8583 "vdev id", vdev->vdev_id);
8584 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8585 "ppdu aggr count", vdev->ppdu_aggr_cnt);
8586 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8587 "ppdu noack", vdev->ppdu_noack);
8588 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8589 "mpdu queued", vdev->mpdu_queued);
8590 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8591 "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
8592 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8593 "mpdu sw requeued", vdev->mpdu_sw_requeued);
8594 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8595 "mpdu success retry", vdev->mpdu_suc_retry);
8596 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8597 "mpdu success multitry", vdev->mpdu_suc_multitry);
8598 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8599 "mpdu fail retry", vdev->mpdu_fail_retry);
8600 val = vdev->tx_ftm_suc;
8601 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8602 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8603 "tx ftm success",
8604 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8605 val = vdev->tx_ftm_suc_retry;
8606 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8607 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8608 "tx ftm success retry",
8609 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8610 val = vdev->tx_ftm_fail;
8611 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8612 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8613 "tx ftm fail",
8614 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8615 val = vdev->rx_ftmr_cnt;
8616 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8617 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8618 "rx ftm request count",
8619 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8620 val = vdev->rx_ftmr_dup_cnt;
8621 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8622 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8623 "rx ftm request dup count",
8624 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8625 val = vdev->rx_iftmr_cnt;
8626 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8627 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8628 "rx initial ftm req count",
8629 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8630 val = vdev->rx_iftmr_dup_cnt;
8631 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8632 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8633 "rx initial ftm req dup cnt",
8634 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8635 len += scnprintf(buf + len, buf_len - len, "\n");
8636
8637 *length = len;
8638 }
8639
ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8640 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
8641 struct ath10k_fw_stats *fw_stats,
8642 char *buf)
8643 {
8644 u32 len = 0;
8645 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8646 const struct ath10k_fw_stats_pdev *pdev;
8647 const struct ath10k_fw_stats_vdev_extd *vdev;
8648 const struct ath10k_fw_stats_peer *peer;
8649 const struct ath10k_fw_extd_stats_peer *extd_peer;
8650 size_t num_peers;
8651 size_t num_vdevs;
8652
8653 spin_lock_bh(&ar->data_lock);
8654
8655 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8656 struct ath10k_fw_stats_pdev, list);
8657 if (!pdev) {
8658 ath10k_warn(ar, "failed to get pdev stats\n");
8659 goto unlock;
8660 }
8661
8662 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8663 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8664
8665 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8666 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8667 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8668
8669 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8670 "HW paused", pdev->hw_paused);
8671 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8672 "Seqs posted", pdev->seq_posted);
8673 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8674 "Seqs failed queueing", pdev->seq_failed_queueing);
8675 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8676 "Seqs completed", pdev->seq_completed);
8677 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8678 "Seqs restarted", pdev->seq_restarted);
8679 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8680 "MU Seqs posted", pdev->mu_seq_posted);
8681 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8682 "MPDUs SW flushed", pdev->mpdus_sw_flush);
8683 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8684 "MPDUs HW filtered", pdev->mpdus_hw_filter);
8685 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8686 "MPDUs truncated", pdev->mpdus_truncated);
8687 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8688 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
8689 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8690 "MPDUs expired", pdev->mpdus_expired);
8691
8692 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8693 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8694 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
8695
8696 len += scnprintf(buf + len, buf_len - len, "\n");
8697 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8698 "ath10k VDEV stats", num_vdevs);
8699 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8700 "=================");
8701 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8702 ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
8703 }
8704
8705 len += scnprintf(buf + len, buf_len - len, "\n");
8706 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8707 "ath10k PEER stats", num_peers);
8708 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8709 "=================");
8710
8711 list_for_each_entry(peer, &fw_stats->peers, list) {
8712 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8713 fw_stats->extended);
8714 }
8715
8716 if (fw_stats->extended) {
8717 list_for_each_entry(extd_peer, &fw_stats->peers_extd, list) {
8718 ath10k_wmi_fw_extd_peer_stats_fill(extd_peer, buf,
8719 &len);
8720 }
8721 }
8722
8723 unlock:
8724 spin_unlock_bh(&ar->data_lock);
8725
8726 if (len >= buf_len)
8727 buf[len - 1] = 0;
8728 else
8729 buf[len] = 0;
8730 }
8731
ath10k_wmi_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8732 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
8733 enum wmi_vdev_subtype subtype)
8734 {
8735 switch (subtype) {
8736 case WMI_VDEV_SUBTYPE_NONE:
8737 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
8738 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8739 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
8740 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8741 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
8742 case WMI_VDEV_SUBTYPE_P2P_GO:
8743 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
8744 case WMI_VDEV_SUBTYPE_PROXY_STA:
8745 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
8746 case WMI_VDEV_SUBTYPE_MESH_11S:
8747 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8748 return -ENOTSUPP;
8749 }
8750 return -ENOTSUPP;
8751 }
8752
ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8753 static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
8754 enum wmi_vdev_subtype subtype)
8755 {
8756 switch (subtype) {
8757 case WMI_VDEV_SUBTYPE_NONE:
8758 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
8759 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8760 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
8761 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8762 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
8763 case WMI_VDEV_SUBTYPE_P2P_GO:
8764 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
8765 case WMI_VDEV_SUBTYPE_PROXY_STA:
8766 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
8767 case WMI_VDEV_SUBTYPE_MESH_11S:
8768 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
8769 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8770 return -ENOTSUPP;
8771 }
8772 return -ENOTSUPP;
8773 }
8774
ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8775 static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
8776 enum wmi_vdev_subtype subtype)
8777 {
8778 switch (subtype) {
8779 case WMI_VDEV_SUBTYPE_NONE:
8780 return WMI_VDEV_SUBTYPE_10_4_NONE;
8781 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8782 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
8783 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8784 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
8785 case WMI_VDEV_SUBTYPE_P2P_GO:
8786 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
8787 case WMI_VDEV_SUBTYPE_PROXY_STA:
8788 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
8789 case WMI_VDEV_SUBTYPE_MESH_11S:
8790 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
8791 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8792 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
8793 }
8794 return -ENOTSUPP;
8795 }
8796
8797 static struct sk_buff *
ath10k_wmi_10_4_ext_resource_config(struct ath10k * ar,enum wmi_host_platform_type type,u32 fw_feature_bitmap)8798 ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
8799 enum wmi_host_platform_type type,
8800 u32 fw_feature_bitmap)
8801 {
8802 struct wmi_ext_resource_config_10_4_cmd *cmd;
8803 struct sk_buff *skb;
8804 u32 num_tdls_sleep_sta = 0;
8805
8806 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8807 if (!skb)
8808 return ERR_PTR(-ENOMEM);
8809
8810 if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
8811 num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
8812
8813 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
8814 cmd->host_platform_config = __cpu_to_le32(type);
8815 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
8816 cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
8817 cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
8818 cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
8819 cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
8820 cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
8821 cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
8822 cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
8823 cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
8824 cmd->max_tdls_concurrent_buffer_sta =
8825 __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
8826
8827 ath10k_dbg(ar, ATH10K_DBG_WMI,
8828 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
8829 type, fw_feature_bitmap);
8830 return skb;
8831 }
8832
8833 static struct sk_buff *
ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k * ar,u32 vdev_id,enum wmi_tdls_state state)8834 ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
8835 enum wmi_tdls_state state)
8836 {
8837 struct wmi_10_4_tdls_set_state_cmd *cmd;
8838 struct sk_buff *skb;
8839 u32 options = 0;
8840
8841 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8842 if (!skb)
8843 return ERR_PTR(-ENOMEM);
8844
8845 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
8846 state == WMI_TDLS_ENABLE_ACTIVE)
8847 state = WMI_TDLS_ENABLE_PASSIVE;
8848
8849 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
8850 options |= WMI_TDLS_BUFFER_STA_EN;
8851
8852 cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
8853 cmd->vdev_id = __cpu_to_le32(vdev_id);
8854 cmd->state = __cpu_to_le32(state);
8855 cmd->notification_interval_ms = __cpu_to_le32(5000);
8856 cmd->tx_discovery_threshold = __cpu_to_le32(100);
8857 cmd->tx_teardown_threshold = __cpu_to_le32(5);
8858 cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
8859 cmd->rssi_delta = __cpu_to_le32(-20);
8860 cmd->tdls_options = __cpu_to_le32(options);
8861 cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
8862 cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
8863 cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
8864 cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
8865 cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
8866 cmd->teardown_notification_ms = __cpu_to_le32(10);
8867 cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
8868
8869 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
8870 state, vdev_id);
8871 return skb;
8872 }
8873
ath10k_wmi_prepare_peer_qos(u8 uapsd_queues,u8 sp)8874 static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
8875 {
8876 u32 peer_qos = 0;
8877
8878 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
8879 peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
8880 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
8881 peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
8882 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
8883 peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
8884 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
8885 peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
8886
8887 peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
8888
8889 return peer_qos;
8890 }
8891
8892 static struct sk_buff *
ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k * ar,u32 param)8893 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
8894 {
8895 struct wmi_pdev_get_tpc_table_cmd *cmd;
8896 struct sk_buff *skb;
8897
8898 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8899 if (!skb)
8900 return ERR_PTR(-ENOMEM);
8901
8902 cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
8903 cmd->param = __cpu_to_le32(param);
8904
8905 ath10k_dbg(ar, ATH10K_DBG_WMI,
8906 "wmi pdev get tpc table param:%d\n", param);
8907 return skb;
8908 }
8909
8910 static struct sk_buff *
ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k * ar,const struct wmi_tdls_peer_update_cmd_arg * arg,const struct wmi_tdls_peer_capab_arg * cap,const struct wmi_channel_arg * chan_arg)8911 ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
8912 const struct wmi_tdls_peer_update_cmd_arg *arg,
8913 const struct wmi_tdls_peer_capab_arg *cap,
8914 const struct wmi_channel_arg *chan_arg)
8915 {
8916 struct wmi_10_4_tdls_peer_update_cmd *cmd;
8917 struct wmi_tdls_peer_capabilities *peer_cap;
8918 struct wmi_channel *chan;
8919 struct sk_buff *skb;
8920 u32 peer_qos;
8921 int len, chan_len;
8922 int i;
8923
8924 /* tdls peer update cmd has place holder for one channel*/
8925 chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
8926
8927 len = sizeof(*cmd) + chan_len * sizeof(*chan);
8928
8929 skb = ath10k_wmi_alloc_skb(ar, len);
8930 if (!skb)
8931 return ERR_PTR(-ENOMEM);
8932
8933 memset(skb->data, 0, sizeof(*cmd));
8934
8935 cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
8936 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
8937 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
8938 cmd->peer_state = __cpu_to_le32(arg->peer_state);
8939
8940 peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
8941 cap->peer_max_sp);
8942
8943 peer_cap = &cmd->peer_capab;
8944 peer_cap->peer_qos = __cpu_to_le32(peer_qos);
8945 peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
8946 peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
8947 peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
8948 peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
8949 peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
8950 peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
8951
8952 for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
8953 peer_cap->peer_operclass[i] = cap->peer_operclass[i];
8954
8955 peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
8956 peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
8957 peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
8958
8959 for (i = 0; i < cap->peer_chan_len; i++) {
8960 chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
8961 ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]);
8962 }
8963
8964 ath10k_dbg(ar, ATH10K_DBG_WMI,
8965 "wmi tdls peer update vdev %i state %d n_chans %u\n",
8966 arg->vdev_id, arg->peer_state, cap->peer_chan_len);
8967 return skb;
8968 }
8969
8970 static struct sk_buff *
ath10k_wmi_10_4_gen_radar_found(struct ath10k * ar,const struct ath10k_radar_found_info * arg)8971 ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
8972 const struct ath10k_radar_found_info *arg)
8973 {
8974 struct wmi_radar_found_info *cmd;
8975 struct sk_buff *skb;
8976
8977 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8978 if (!skb)
8979 return ERR_PTR(-ENOMEM);
8980
8981 cmd = (struct wmi_radar_found_info *)skb->data;
8982 cmd->pri_min = __cpu_to_le32(arg->pri_min);
8983 cmd->pri_max = __cpu_to_le32(arg->pri_max);
8984 cmd->width_min = __cpu_to_le32(arg->width_min);
8985 cmd->width_max = __cpu_to_le32(arg->width_max);
8986 cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
8987 cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
8988
8989 ath10k_dbg(ar, ATH10K_DBG_WMI,
8990 "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
8991 arg->pri_min, arg->pri_max, arg->width_min,
8992 arg->width_max, arg->sidx_min, arg->sidx_max);
8993 return skb;
8994 }
8995
8996 static struct sk_buff *
ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k * ar,const struct wmi_per_peer_per_tid_cfg_arg * arg)8997 ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k *ar,
8998 const struct wmi_per_peer_per_tid_cfg_arg *arg)
8999 {
9000 struct wmi_peer_per_tid_cfg_cmd *cmd;
9001 struct sk_buff *skb;
9002
9003 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9004 if (!skb)
9005 return ERR_PTR(-ENOMEM);
9006
9007 memset(skb->data, 0, sizeof(*cmd));
9008
9009 cmd = (struct wmi_peer_per_tid_cfg_cmd *)skb->data;
9010 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
9011 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr.addr);
9012 cmd->tid = cpu_to_le32(arg->tid);
9013 cmd->ack_policy = cpu_to_le32(arg->ack_policy);
9014 cmd->aggr_control = cpu_to_le32(arg->aggr_control);
9015 cmd->rate_control = cpu_to_le32(arg->rate_ctrl);
9016 cmd->retry_count = cpu_to_le32(arg->retry_count);
9017 cmd->rcode_flags = cpu_to_le32(arg->rcode_flags);
9018 cmd->ext_tid_cfg_bitmap = cpu_to_le32(arg->ext_tid_cfg_bitmap);
9019 cmd->rtscts_ctrl = cpu_to_le32(arg->rtscts_ctrl);
9020
9021 ath10k_dbg(ar, ATH10K_DBG_WMI,
9022 "wmi noack tid %d vdev id %d ack_policy %d aggr %u rate_ctrl %u rcflag %u retry_count %d rtscts %d ext_tid_cfg_bitmap %d mac_addr %pM\n",
9023 arg->tid, arg->vdev_id, arg->ack_policy, arg->aggr_control,
9024 arg->rate_ctrl, arg->rcode_flags, arg->retry_count,
9025 arg->rtscts_ctrl, arg->ext_tid_cfg_bitmap, arg->peer_macaddr.addr);
9026 return skb;
9027 }
9028
9029 static struct sk_buff *
ath10k_wmi_op_gen_echo(struct ath10k * ar,u32 value)9030 ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
9031 {
9032 struct wmi_echo_cmd *cmd;
9033 struct sk_buff *skb;
9034
9035 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9036 if (!skb)
9037 return ERR_PTR(-ENOMEM);
9038
9039 cmd = (struct wmi_echo_cmd *)skb->data;
9040 cmd->value = cpu_to_le32(value);
9041
9042 ath10k_dbg(ar, ATH10K_DBG_WMI,
9043 "wmi echo value 0x%08x\n", value);
9044 return skb;
9045 }
9046
9047 int
ath10k_wmi_barrier(struct ath10k * ar)9048 ath10k_wmi_barrier(struct ath10k *ar)
9049 {
9050 int ret;
9051 int time_left;
9052
9053 spin_lock_bh(&ar->data_lock);
9054 reinit_completion(&ar->wmi.barrier);
9055 spin_unlock_bh(&ar->data_lock);
9056
9057 ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
9058 if (ret) {
9059 ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
9060 return ret;
9061 }
9062
9063 time_left = wait_for_completion_timeout(&ar->wmi.barrier,
9064 ATH10K_WMI_BARRIER_TIMEOUT_HZ);
9065 if (!time_left)
9066 return -ETIMEDOUT;
9067
9068 return 0;
9069 }
9070
9071 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k * ar,const struct wmi_bb_timing_cfg_arg * arg)9072 ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar,
9073 const struct wmi_bb_timing_cfg_arg *arg)
9074 {
9075 struct wmi_pdev_bb_timing_cfg_cmd *cmd;
9076 struct sk_buff *skb;
9077
9078 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9079 if (!skb)
9080 return ERR_PTR(-ENOMEM);
9081
9082 cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data;
9083 cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing);
9084 cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing);
9085
9086 ath10k_dbg(ar, ATH10K_DBG_WMI,
9087 "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n",
9088 arg->bb_tx_timing, arg->bb_xpa_timing);
9089 return skb;
9090 }
9091
9092 static const struct wmi_ops wmi_ops = {
9093 .rx = ath10k_wmi_op_rx,
9094 .map_svc = wmi_main_svc_map,
9095
9096 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9097 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9098 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9099 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9100 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9101 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9102 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9103 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9104 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9105 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9106 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
9107 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9108 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9109
9110 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9111 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9112 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
9113 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9114 .gen_init = ath10k_wmi_op_gen_init,
9115 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9116 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9117 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9118 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9119 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9120 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9121 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9122 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9123 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9124 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9125 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9126 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9127 /* .gen_vdev_wmm_conf not implemented */
9128 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9129 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9130 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9131 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9132 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
9133 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9134 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9135 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9136 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9137 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9138 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9139 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9140 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9141 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9142 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9143 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9144 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9145 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9146 /* .gen_pdev_get_temperature not implemented */
9147 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9148 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9149 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9150 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9151 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
9152 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9153 .gen_echo = ath10k_wmi_op_gen_echo,
9154 /* .gen_bcn_tmpl not implemented */
9155 /* .gen_prb_tmpl not implemented */
9156 /* .gen_p2p_go_bcn_ie not implemented */
9157 /* .gen_adaptive_qcs not implemented */
9158 /* .gen_pdev_enable_adaptive_cca not implemented */
9159 };
9160
9161 static const struct wmi_ops wmi_10_1_ops = {
9162 .rx = ath10k_wmi_10_1_op_rx,
9163 .map_svc = wmi_10x_svc_map,
9164 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9165 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
9166 .gen_init = ath10k_wmi_10_1_op_gen_init,
9167 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9168 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9169 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
9170 /* .gen_pdev_get_temperature not implemented */
9171
9172 /* shared with main branch */
9173 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9174 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9175 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9176 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9177 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9178 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9179 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9180 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9181 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9182 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9183 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9184
9185 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9186 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9187 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9188 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9189 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9190 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9191 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9192 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9193 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9194 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9195 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9196 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9197 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9198 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9199 /* .gen_vdev_wmm_conf not implemented */
9200 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9201 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9202 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9203 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9204 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9205 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9206 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9207 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9208 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9209 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9210 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9211 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9212 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9213 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9214 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9215 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9216 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9217 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9218 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9219 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9220 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9221 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9222 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9223 .gen_echo = ath10k_wmi_op_gen_echo,
9224 /* .gen_bcn_tmpl not implemented */
9225 /* .gen_prb_tmpl not implemented */
9226 /* .gen_p2p_go_bcn_ie not implemented */
9227 /* .gen_adaptive_qcs not implemented */
9228 /* .gen_pdev_enable_adaptive_cca not implemented */
9229 };
9230
9231 static const struct wmi_ops wmi_10_2_ops = {
9232 .rx = ath10k_wmi_10_2_op_rx,
9233 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
9234 .gen_init = ath10k_wmi_10_2_op_gen_init,
9235 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9236 /* .gen_pdev_get_temperature not implemented */
9237
9238 /* shared with 10.1 */
9239 .map_svc = wmi_10x_svc_map,
9240 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9241 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9242 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9243 .gen_echo = ath10k_wmi_op_gen_echo,
9244
9245 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9246 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9247 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9248 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9249 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9250 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9251 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9252 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9253 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9254 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9255 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9256
9257 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9258 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9259 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9260 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9261 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9262 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9263 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9264 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9265 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9266 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9267 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9268 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9269 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9270 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9271 /* .gen_vdev_wmm_conf not implemented */
9272 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9273 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9274 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9275 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9276 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9277 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9278 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9279 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9280 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9281 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9282 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9283 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9284 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9285 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9286 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9287 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9288 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9289 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9290 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9291 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9292 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9293 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9294 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9295 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9296 /* .gen_pdev_enable_adaptive_cca not implemented */
9297 };
9298
9299 static const struct wmi_ops wmi_10_2_4_ops = {
9300 .rx = ath10k_wmi_10_2_op_rx,
9301 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
9302 .gen_init = ath10k_wmi_10_2_op_gen_init,
9303 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9304 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9305 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9306
9307 /* shared with 10.1 */
9308 .map_svc = wmi_10x_svc_map,
9309 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9310 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9311 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9312 .gen_echo = ath10k_wmi_op_gen_echo,
9313
9314 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9315 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9316 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9317 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9318 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9319 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
9320 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9321 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9322 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9323 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9324 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9325
9326 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9327 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9328 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9329 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9330 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9331 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9332 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9333 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9334 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9335 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9336 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9337 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9338 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9339 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9340 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9341 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9342 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9343 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9344 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9345 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9346 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9347 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9348 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9349 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9350 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9351 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9352 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9353 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9354 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9355 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9356 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9357 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9358 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9359 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9360 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9361 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9362 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9363 .gen_pdev_enable_adaptive_cca =
9364 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
9365 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
9366 .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
9367 /* .gen_bcn_tmpl not implemented */
9368 /* .gen_prb_tmpl not implemented */
9369 /* .gen_p2p_go_bcn_ie not implemented */
9370 /* .gen_adaptive_qcs not implemented */
9371 };
9372
9373 static const struct wmi_ops wmi_10_4_ops = {
9374 .rx = ath10k_wmi_10_4_op_rx,
9375 .map_svc = wmi_10_4_svc_map,
9376
9377 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
9378 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9379 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
9380 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
9381 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9382 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9383 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
9384 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
9385 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
9386 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9387 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9388 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9389 .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
9390 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
9391
9392 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9393 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9394 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9395 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9396 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9397 .gen_init = ath10k_wmi_10_4_op_gen_init,
9398 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9399 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9400 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9401 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9402 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9403 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9404 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9405 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9406 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9407 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9408 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9409 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9410 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9411 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9412 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9413 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9414 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
9415 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9416 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9417 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9418 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9419 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9420 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9421 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9422 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9423 .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
9424 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9425 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9426 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9427 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9428 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9429 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9430 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9431 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
9432 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
9433 .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
9434 .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
9435 .gen_pdev_get_tpc_table_cmdid =
9436 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
9437 .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
9438 .gen_per_peer_per_tid_cfg = ath10k_wmi_10_4_gen_per_peer_per_tid_cfg,
9439
9440 /* shared with 10.2 */
9441 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9442 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9443 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9444 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
9445 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9446 .gen_echo = ath10k_wmi_op_gen_echo,
9447 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9448 };
9449
ath10k_wmi_attach(struct ath10k * ar)9450 int ath10k_wmi_attach(struct ath10k *ar)
9451 {
9452 switch (ar->running_fw->fw_file.wmi_op_version) {
9453 case ATH10K_FW_WMI_OP_VERSION_10_4:
9454 ar->wmi.ops = &wmi_10_4_ops;
9455 ar->wmi.cmd = &wmi_10_4_cmd_map;
9456 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
9457 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
9458 ar->wmi.peer_param = &wmi_peer_param_map;
9459 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9460 ar->wmi_key_cipher = wmi_key_cipher_suites;
9461 break;
9462 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
9463 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
9464 ar->wmi.ops = &wmi_10_2_4_ops;
9465 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
9466 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
9467 ar->wmi.peer_param = &wmi_peer_param_map;
9468 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9469 ar->wmi_key_cipher = wmi_key_cipher_suites;
9470 break;
9471 case ATH10K_FW_WMI_OP_VERSION_10_2:
9472 ar->wmi.cmd = &wmi_10_2_cmd_map;
9473 ar->wmi.ops = &wmi_10_2_ops;
9474 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9475 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9476 ar->wmi.peer_param = &wmi_peer_param_map;
9477 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9478 ar->wmi_key_cipher = wmi_key_cipher_suites;
9479 break;
9480 case ATH10K_FW_WMI_OP_VERSION_10_1:
9481 ar->wmi.cmd = &wmi_10x_cmd_map;
9482 ar->wmi.ops = &wmi_10_1_ops;
9483 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9484 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9485 ar->wmi.peer_param = &wmi_peer_param_map;
9486 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
9487 ar->wmi_key_cipher = wmi_key_cipher_suites;
9488 break;
9489 case ATH10K_FW_WMI_OP_VERSION_MAIN:
9490 ar->wmi.cmd = &wmi_cmd_map;
9491 ar->wmi.ops = &wmi_ops;
9492 ar->wmi.vdev_param = &wmi_vdev_param_map;
9493 ar->wmi.pdev_param = &wmi_pdev_param_map;
9494 ar->wmi.peer_param = &wmi_peer_param_map;
9495 ar->wmi.peer_flags = &wmi_peer_flags_map;
9496 ar->wmi_key_cipher = wmi_key_cipher_suites;
9497 break;
9498 case ATH10K_FW_WMI_OP_VERSION_TLV:
9499 ath10k_wmi_tlv_attach(ar);
9500 ar->wmi_key_cipher = wmi_tlv_key_cipher_suites;
9501 break;
9502 case ATH10K_FW_WMI_OP_VERSION_UNSET:
9503 case ATH10K_FW_WMI_OP_VERSION_MAX:
9504 ath10k_err(ar, "unsupported WMI op version: %d\n",
9505 ar->running_fw->fw_file.wmi_op_version);
9506 return -EINVAL;
9507 }
9508
9509 init_completion(&ar->wmi.service_ready);
9510 init_completion(&ar->wmi.unified_ready);
9511 init_completion(&ar->wmi.barrier);
9512 init_completion(&ar->wmi.radar_confirm);
9513
9514 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
9515 INIT_WORK(&ar->radar_confirmation_work,
9516 ath10k_radar_confirmation_work);
9517
9518 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9519 ar->running_fw->fw_file.fw_features)) {
9520 idr_init(&ar->wmi.mgmt_pending_tx);
9521 }
9522
9523 return 0;
9524 }
9525
ath10k_wmi_free_host_mem(struct ath10k * ar)9526 void ath10k_wmi_free_host_mem(struct ath10k *ar)
9527 {
9528 int i;
9529
9530 /* free the host memory chunks requested by firmware */
9531 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
9532 dma_free_coherent(ar->dev,
9533 ar->wmi.mem_chunks[i].len,
9534 ar->wmi.mem_chunks[i].vaddr,
9535 ar->wmi.mem_chunks[i].paddr);
9536 }
9537
9538 ar->wmi.num_mem_chunks = 0;
9539 }
9540
ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id,void * ptr,void * ctx)9541 static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
9542 void *ctx)
9543 {
9544 struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
9545 struct ath10k *ar = ctx;
9546 struct sk_buff *msdu;
9547
9548 ath10k_dbg(ar, ATH10K_DBG_WMI,
9549 "force cleanup mgmt msdu_id %hu\n", msdu_id);
9550
9551 msdu = pkt_addr->vaddr;
9552 dma_unmap_single(ar->dev, pkt_addr->paddr,
9553 msdu->len, DMA_TO_DEVICE);
9554 ieee80211_free_txskb(ar->hw, msdu);
9555
9556 return 0;
9557 }
9558
ath10k_wmi_detach(struct ath10k * ar)9559 void ath10k_wmi_detach(struct ath10k *ar)
9560 {
9561 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9562 ar->running_fw->fw_file.fw_features)) {
9563 spin_lock_bh(&ar->data_lock);
9564 idr_for_each(&ar->wmi.mgmt_pending_tx,
9565 ath10k_wmi_mgmt_tx_clean_up_pending, ar);
9566 idr_destroy(&ar->wmi.mgmt_pending_tx);
9567 spin_unlock_bh(&ar->data_lock);
9568 }
9569
9570 cancel_work_sync(&ar->svc_rdy_work);
9571 dev_kfree_skb(ar->svc_rdy_skb);
9572 }
9573
