1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #include <linux/module.h>
20 #include <linux/firmware.h>
21 #include <linux/of.h>
22 #include <linux/dmi.h>
23 #include <linux/ctype.h>
24 #include <asm/byteorder.h>
25
26 #include "core.h"
27 #include "mac.h"
28 #include "htc.h"
29 #include "hif.h"
30 #include "wmi.h"
31 #include "bmi.h"
32 #include "debug.h"
33 #include "htt.h"
34 #include "testmode.h"
35 #include "wmi-ops.h"
36 #include "coredump.h"
37
38 unsigned int ath10k_debug_mask;
39 static unsigned int ath10k_cryptmode_param;
40 static bool uart_print;
41 static bool skip_otp;
42 static bool rawmode;
43
44 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
45 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
46
47 /* FIXME: most of these should be readonly */
48 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
49 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
50 module_param(uart_print, bool, 0644);
51 module_param(skip_otp, bool, 0644);
52 module_param(rawmode, bool, 0644);
53 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
54
55 MODULE_PARM_DESC(debug_mask, "Debugging mask");
56 MODULE_PARM_DESC(uart_print, "Uart target debugging");
57 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
58 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
59 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
60 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
61
62 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
63 {
64 .id = QCA988X_HW_2_0_VERSION,
65 .dev_id = QCA988X_2_0_DEVICE_ID,
66 .name = "qca988x hw2.0",
67 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
68 .uart_pin = 7,
69 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
70 .otp_exe_param = 0,
71 .channel_counters_freq_hz = 88000,
72 .max_probe_resp_desc_thres = 0,
73 .cal_data_len = 2116,
74 .fw = {
75 .dir = QCA988X_HW_2_0_FW_DIR,
76 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
77 .board_size = QCA988X_BOARD_DATA_SZ,
78 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
79 },
80 .hw_ops = &qca988x_ops,
81 .decap_align_bytes = 4,
82 .spectral_bin_discard = 0,
83 .spectral_bin_offset = 0,
84 .vht160_mcs_rx_highest = 0,
85 .vht160_mcs_tx_highest = 0,
86 .n_cipher_suites = 8,
87 .num_peers = TARGET_TLV_NUM_PEERS,
88 .ast_skid_limit = 0x10,
89 .num_wds_entries = 0x20,
90 .target_64bit = false,
91 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
92 .shadow_reg_support = false,
93 .rri_on_ddr = false,
94 },
95 {
96 .id = QCA988X_HW_2_0_VERSION,
97 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
98 .name = "qca988x hw2.0 ubiquiti",
99 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
100 .uart_pin = 7,
101 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
102 .otp_exe_param = 0,
103 .channel_counters_freq_hz = 88000,
104 .max_probe_resp_desc_thres = 0,
105 .cal_data_len = 2116,
106 .fw = {
107 .dir = QCA988X_HW_2_0_FW_DIR,
108 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
109 .board_size = QCA988X_BOARD_DATA_SZ,
110 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
111 },
112 .hw_ops = &qca988x_ops,
113 .decap_align_bytes = 4,
114 .spectral_bin_discard = 0,
115 .spectral_bin_offset = 0,
116 .vht160_mcs_rx_highest = 0,
117 .vht160_mcs_tx_highest = 0,
118 .n_cipher_suites = 8,
119 .num_peers = TARGET_TLV_NUM_PEERS,
120 .ast_skid_limit = 0x10,
121 .num_wds_entries = 0x20,
122 .target_64bit = false,
123 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
124 .per_ce_irq = false,
125 .shadow_reg_support = false,
126 .rri_on_ddr = false,
127 },
128 {
129 .id = QCA9887_HW_1_0_VERSION,
130 .dev_id = QCA9887_1_0_DEVICE_ID,
131 .name = "qca9887 hw1.0",
132 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
133 .uart_pin = 7,
134 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
135 .otp_exe_param = 0,
136 .channel_counters_freq_hz = 88000,
137 .max_probe_resp_desc_thres = 0,
138 .cal_data_len = 2116,
139 .fw = {
140 .dir = QCA9887_HW_1_0_FW_DIR,
141 .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
142 .board_size = QCA9887_BOARD_DATA_SZ,
143 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
144 },
145 .hw_ops = &qca988x_ops,
146 .decap_align_bytes = 4,
147 .spectral_bin_discard = 0,
148 .spectral_bin_offset = 0,
149 .vht160_mcs_rx_highest = 0,
150 .vht160_mcs_tx_highest = 0,
151 .n_cipher_suites = 8,
152 .num_peers = TARGET_TLV_NUM_PEERS,
153 .ast_skid_limit = 0x10,
154 .num_wds_entries = 0x20,
155 .target_64bit = false,
156 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
157 .per_ce_irq = false,
158 .shadow_reg_support = false,
159 .rri_on_ddr = false,
160 },
161 {
162 .id = QCA6174_HW_2_1_VERSION,
163 .dev_id = QCA6164_2_1_DEVICE_ID,
164 .name = "qca6164 hw2.1",
165 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
166 .uart_pin = 6,
167 .otp_exe_param = 0,
168 .channel_counters_freq_hz = 88000,
169 .max_probe_resp_desc_thres = 0,
170 .cal_data_len = 8124,
171 .fw = {
172 .dir = QCA6174_HW_2_1_FW_DIR,
173 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
174 .board_size = QCA6174_BOARD_DATA_SZ,
175 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
176 },
177 .hw_ops = &qca988x_ops,
178 .decap_align_bytes = 4,
179 .spectral_bin_discard = 0,
180 .spectral_bin_offset = 0,
181 .vht160_mcs_rx_highest = 0,
182 .vht160_mcs_tx_highest = 0,
183 .n_cipher_suites = 8,
184 .num_peers = TARGET_TLV_NUM_PEERS,
185 .ast_skid_limit = 0x10,
186 .num_wds_entries = 0x20,
187 .target_64bit = false,
188 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
189 .per_ce_irq = false,
190 .shadow_reg_support = false,
191 .rri_on_ddr = false,
192 },
193 {
194 .id = QCA6174_HW_2_1_VERSION,
195 .dev_id = QCA6174_2_1_DEVICE_ID,
196 .name = "qca6174 hw2.1",
197 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
198 .uart_pin = 6,
199 .otp_exe_param = 0,
200 .channel_counters_freq_hz = 88000,
201 .max_probe_resp_desc_thres = 0,
202 .cal_data_len = 8124,
203 .fw = {
204 .dir = QCA6174_HW_2_1_FW_DIR,
205 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
206 .board_size = QCA6174_BOARD_DATA_SZ,
207 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
208 },
209 .hw_ops = &qca988x_ops,
210 .decap_align_bytes = 4,
211 .spectral_bin_discard = 0,
212 .spectral_bin_offset = 0,
213 .vht160_mcs_rx_highest = 0,
214 .vht160_mcs_tx_highest = 0,
215 .n_cipher_suites = 8,
216 .num_peers = TARGET_TLV_NUM_PEERS,
217 .ast_skid_limit = 0x10,
218 .num_wds_entries = 0x20,
219 .target_64bit = false,
220 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
221 .per_ce_irq = false,
222 .shadow_reg_support = false,
223 .rri_on_ddr = false,
224 },
225 {
226 .id = QCA6174_HW_3_0_VERSION,
227 .dev_id = QCA6174_2_1_DEVICE_ID,
228 .name = "qca6174 hw3.0",
229 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
230 .uart_pin = 6,
231 .otp_exe_param = 0,
232 .channel_counters_freq_hz = 88000,
233 .max_probe_resp_desc_thres = 0,
234 .cal_data_len = 8124,
235 .fw = {
236 .dir = QCA6174_HW_3_0_FW_DIR,
237 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
238 .board_size = QCA6174_BOARD_DATA_SZ,
239 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
240 },
241 .hw_ops = &qca988x_ops,
242 .decap_align_bytes = 4,
243 .spectral_bin_discard = 0,
244 .spectral_bin_offset = 0,
245 .vht160_mcs_rx_highest = 0,
246 .vht160_mcs_tx_highest = 0,
247 .n_cipher_suites = 8,
248 .num_peers = TARGET_TLV_NUM_PEERS,
249 .ast_skid_limit = 0x10,
250 .num_wds_entries = 0x20,
251 .target_64bit = false,
252 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
253 .per_ce_irq = false,
254 .shadow_reg_support = false,
255 .rri_on_ddr = false,
256 },
257 {
258 .id = QCA6174_HW_3_2_VERSION,
259 .dev_id = QCA6174_2_1_DEVICE_ID,
260 .name = "qca6174 hw3.2",
261 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
262 .uart_pin = 6,
263 .otp_exe_param = 0,
264 .channel_counters_freq_hz = 88000,
265 .max_probe_resp_desc_thres = 0,
266 .cal_data_len = 8124,
267 .fw = {
268 /* uses same binaries as hw3.0 */
269 .dir = QCA6174_HW_3_0_FW_DIR,
270 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
271 .board_size = QCA6174_BOARD_DATA_SZ,
272 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
273 },
274 .hw_ops = &qca6174_ops,
275 .hw_clk = qca6174_clk,
276 .target_cpu_freq = 176000000,
277 .decap_align_bytes = 4,
278 .spectral_bin_discard = 0,
279 .spectral_bin_offset = 0,
280 .vht160_mcs_rx_highest = 0,
281 .vht160_mcs_tx_highest = 0,
282 .n_cipher_suites = 8,
283 .num_peers = TARGET_TLV_NUM_PEERS,
284 .ast_skid_limit = 0x10,
285 .num_wds_entries = 0x20,
286 .target_64bit = false,
287 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
288 .per_ce_irq = false,
289 .shadow_reg_support = false,
290 .rri_on_ddr = false,
291 },
292 {
293 .id = QCA99X0_HW_2_0_DEV_VERSION,
294 .dev_id = QCA99X0_2_0_DEVICE_ID,
295 .name = "qca99x0 hw2.0",
296 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
297 .uart_pin = 7,
298 .otp_exe_param = 0x00000700,
299 .continuous_frag_desc = true,
300 .cck_rate_map_rev2 = true,
301 .channel_counters_freq_hz = 150000,
302 .max_probe_resp_desc_thres = 24,
303 .tx_chain_mask = 0xf,
304 .rx_chain_mask = 0xf,
305 .max_spatial_stream = 4,
306 .cal_data_len = 12064,
307 .fw = {
308 .dir = QCA99X0_HW_2_0_FW_DIR,
309 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
310 .board_size = QCA99X0_BOARD_DATA_SZ,
311 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
312 },
313 .sw_decrypt_mcast_mgmt = true,
314 .hw_ops = &qca99x0_ops,
315 .decap_align_bytes = 1,
316 .spectral_bin_discard = 4,
317 .spectral_bin_offset = 0,
318 .vht160_mcs_rx_highest = 0,
319 .vht160_mcs_tx_highest = 0,
320 .n_cipher_suites = 11,
321 .num_peers = TARGET_TLV_NUM_PEERS,
322 .ast_skid_limit = 0x10,
323 .num_wds_entries = 0x20,
324 .target_64bit = false,
325 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
326 .per_ce_irq = false,
327 .shadow_reg_support = false,
328 .rri_on_ddr = false,
329 },
330 {
331 .id = QCA9984_HW_1_0_DEV_VERSION,
332 .dev_id = QCA9984_1_0_DEVICE_ID,
333 .name = "qca9984/qca9994 hw1.0",
334 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
335 .uart_pin = 7,
336 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
337 .otp_exe_param = 0x00000700,
338 .continuous_frag_desc = true,
339 .cck_rate_map_rev2 = true,
340 .channel_counters_freq_hz = 150000,
341 .max_probe_resp_desc_thres = 24,
342 .tx_chain_mask = 0xf,
343 .rx_chain_mask = 0xf,
344 .max_spatial_stream = 4,
345 .cal_data_len = 12064,
346 .fw = {
347 .dir = QCA9984_HW_1_0_FW_DIR,
348 .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
349 .board_size = QCA99X0_BOARD_DATA_SZ,
350 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
351 },
352 .sw_decrypt_mcast_mgmt = true,
353 .hw_ops = &qca99x0_ops,
354 .decap_align_bytes = 1,
355 .spectral_bin_discard = 12,
356 .spectral_bin_offset = 8,
357
358 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
359 * or 2x2 160Mhz, long-guard-interval.
360 */
361 .vht160_mcs_rx_highest = 1560,
362 .vht160_mcs_tx_highest = 1560,
363 .n_cipher_suites = 11,
364 .num_peers = TARGET_TLV_NUM_PEERS,
365 .ast_skid_limit = 0x10,
366 .num_wds_entries = 0x20,
367 .target_64bit = false,
368 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
369 .per_ce_irq = false,
370 .shadow_reg_support = false,
371 .rri_on_ddr = false,
372 },
373 {
374 .id = QCA9888_HW_2_0_DEV_VERSION,
375 .dev_id = QCA9888_2_0_DEVICE_ID,
376 .name = "qca9888 hw2.0",
377 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
378 .uart_pin = 7,
379 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
380 .otp_exe_param = 0x00000700,
381 .continuous_frag_desc = true,
382 .channel_counters_freq_hz = 150000,
383 .max_probe_resp_desc_thres = 24,
384 .tx_chain_mask = 3,
385 .rx_chain_mask = 3,
386 .max_spatial_stream = 2,
387 .cal_data_len = 12064,
388 .fw = {
389 .dir = QCA9888_HW_2_0_FW_DIR,
390 .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
391 .board_size = QCA99X0_BOARD_DATA_SZ,
392 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
393 },
394 .sw_decrypt_mcast_mgmt = true,
395 .hw_ops = &qca99x0_ops,
396 .decap_align_bytes = 1,
397 .spectral_bin_discard = 12,
398 .spectral_bin_offset = 8,
399
400 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
401 * 1x1 160Mhz, long-guard-interval.
402 */
403 .vht160_mcs_rx_highest = 780,
404 .vht160_mcs_tx_highest = 780,
405 .n_cipher_suites = 11,
406 .num_peers = TARGET_TLV_NUM_PEERS,
407 .ast_skid_limit = 0x10,
408 .num_wds_entries = 0x20,
409 .target_64bit = false,
410 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
411 .per_ce_irq = false,
412 .shadow_reg_support = false,
413 .rri_on_ddr = false,
414 },
415 {
416 .id = QCA9377_HW_1_0_DEV_VERSION,
417 .dev_id = QCA9377_1_0_DEVICE_ID,
418 .name = "qca9377 hw1.0",
419 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
420 .uart_pin = 6,
421 .otp_exe_param = 0,
422 .channel_counters_freq_hz = 88000,
423 .max_probe_resp_desc_thres = 0,
424 .cal_data_len = 8124,
425 .fw = {
426 .dir = QCA9377_HW_1_0_FW_DIR,
427 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
428 .board_size = QCA9377_BOARD_DATA_SZ,
429 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
430 },
431 .hw_ops = &qca988x_ops,
432 .decap_align_bytes = 4,
433 .spectral_bin_discard = 0,
434 .spectral_bin_offset = 0,
435 .vht160_mcs_rx_highest = 0,
436 .vht160_mcs_tx_highest = 0,
437 .n_cipher_suites = 8,
438 .num_peers = TARGET_TLV_NUM_PEERS,
439 .ast_skid_limit = 0x10,
440 .num_wds_entries = 0x20,
441 .target_64bit = false,
442 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
443 .per_ce_irq = false,
444 .shadow_reg_support = false,
445 .rri_on_ddr = false,
446 },
447 {
448 .id = QCA9377_HW_1_1_DEV_VERSION,
449 .dev_id = QCA9377_1_0_DEVICE_ID,
450 .name = "qca9377 hw1.1",
451 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
452 .uart_pin = 6,
453 .otp_exe_param = 0,
454 .channel_counters_freq_hz = 88000,
455 .max_probe_resp_desc_thres = 0,
456 .cal_data_len = 8124,
457 .fw = {
458 .dir = QCA9377_HW_1_0_FW_DIR,
459 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
460 .board_size = QCA9377_BOARD_DATA_SZ,
461 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
462 },
463 .hw_ops = &qca6174_ops,
464 .hw_clk = qca6174_clk,
465 .target_cpu_freq = 176000000,
466 .decap_align_bytes = 4,
467 .spectral_bin_discard = 0,
468 .spectral_bin_offset = 0,
469 .vht160_mcs_rx_highest = 0,
470 .vht160_mcs_tx_highest = 0,
471 .n_cipher_suites = 8,
472 .num_peers = TARGET_TLV_NUM_PEERS,
473 .ast_skid_limit = 0x10,
474 .num_wds_entries = 0x20,
475 .target_64bit = false,
476 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
477 .per_ce_irq = false,
478 .shadow_reg_support = false,
479 .rri_on_ddr = false,
480 },
481 {
482 .id = QCA4019_HW_1_0_DEV_VERSION,
483 .dev_id = 0,
484 .name = "qca4019 hw1.0",
485 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
486 .uart_pin = 7,
487 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
488 .otp_exe_param = 0x0010000,
489 .continuous_frag_desc = true,
490 .cck_rate_map_rev2 = true,
491 .channel_counters_freq_hz = 125000,
492 .max_probe_resp_desc_thres = 24,
493 .tx_chain_mask = 0x3,
494 .rx_chain_mask = 0x3,
495 .max_spatial_stream = 2,
496 .cal_data_len = 12064,
497 .fw = {
498 .dir = QCA4019_HW_1_0_FW_DIR,
499 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
500 .board_size = QCA4019_BOARD_DATA_SZ,
501 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
502 },
503 .sw_decrypt_mcast_mgmt = true,
504 .hw_ops = &qca99x0_ops,
505 .decap_align_bytes = 1,
506 .spectral_bin_discard = 4,
507 .spectral_bin_offset = 0,
508 .vht160_mcs_rx_highest = 0,
509 .vht160_mcs_tx_highest = 0,
510 .n_cipher_suites = 11,
511 .num_peers = TARGET_TLV_NUM_PEERS,
512 .ast_skid_limit = 0x10,
513 .num_wds_entries = 0x20,
514 .target_64bit = false,
515 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
516 .per_ce_irq = false,
517 .shadow_reg_support = false,
518 .rri_on_ddr = false,
519 },
520 {
521 .id = WCN3990_HW_1_0_DEV_VERSION,
522 .dev_id = 0,
523 .name = "wcn3990 hw1.0",
524 .continuous_frag_desc = true,
525 .tx_chain_mask = 0x7,
526 .rx_chain_mask = 0x7,
527 .max_spatial_stream = 4,
528 .fw = {
529 .dir = WCN3990_HW_1_0_FW_DIR,
530 },
531 .sw_decrypt_mcast_mgmt = true,
532 .hw_ops = &wcn3990_ops,
533 .decap_align_bytes = 1,
534 .num_peers = TARGET_HL_10_TLV_NUM_PEERS,
535 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,
536 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,
537 .target_64bit = true,
538 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
539 .per_ce_irq = true,
540 .shadow_reg_support = true,
541 .rri_on_ddr = true,
542 },
543 };
544
545 static const char *const ath10k_core_fw_feature_str[] = {
546 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
547 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
548 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
549 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
550 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
551 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
552 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
553 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
554 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
555 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
556 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
557 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
558 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
559 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
560 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
561 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
562 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
563 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
564 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
565 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
566 };
567
ath10k_core_get_fw_feature_str(char * buf,size_t buf_len,enum ath10k_fw_features feat)568 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
569 size_t buf_len,
570 enum ath10k_fw_features feat)
571 {
572 /* make sure that ath10k_core_fw_feature_str[] gets updated */
573 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
574 ATH10K_FW_FEATURE_COUNT);
575
576 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
577 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
578 return scnprintf(buf, buf_len, "bit%d", feat);
579 }
580
581 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
582 }
583
ath10k_core_get_fw_features_str(struct ath10k * ar,char * buf,size_t buf_len)584 void ath10k_core_get_fw_features_str(struct ath10k *ar,
585 char *buf,
586 size_t buf_len)
587 {
588 size_t len = 0;
589 int i;
590
591 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
592 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
593 if (len > 0)
594 len += scnprintf(buf + len, buf_len - len, ",");
595
596 len += ath10k_core_get_fw_feature_str(buf + len,
597 buf_len - len,
598 i);
599 }
600 }
601 }
602
ath10k_send_suspend_complete(struct ath10k * ar)603 static void ath10k_send_suspend_complete(struct ath10k *ar)
604 {
605 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
606
607 complete(&ar->target_suspend);
608 }
609
ath10k_init_sdio(struct ath10k * ar)610 static void ath10k_init_sdio(struct ath10k *ar)
611 {
612 u32 param = 0;
613
614 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
615 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
616 ath10k_bmi_read32(ar, hi_acs_flags, ¶m);
617
618 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET |
619 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET |
620 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE);
621
622 ath10k_bmi_write32(ar, hi_acs_flags, param);
623 }
624
ath10k_init_configure_target(struct ath10k * ar)625 static int ath10k_init_configure_target(struct ath10k *ar)
626 {
627 u32 param_host;
628 int ret;
629
630 /* tell target which HTC version it is used*/
631 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
632 HTC_PROTOCOL_VERSION);
633 if (ret) {
634 ath10k_err(ar, "settings HTC version failed\n");
635 return ret;
636 }
637
638 /* set the firmware mode to STA/IBSS/AP */
639 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
640 if (ret) {
641 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
642 return ret;
643 }
644
645 /* TODO following parameters need to be re-visited. */
646 /* num_device */
647 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
648 /* Firmware mode */
649 /* FIXME: Why FW_MODE_AP ??.*/
650 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
651 /* mac_addr_method */
652 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
653 /* firmware_bridge */
654 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
655 /* fwsubmode */
656 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
657
658 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
659 if (ret) {
660 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
661 return ret;
662 }
663
664 /* We do all byte-swapping on the host */
665 ret = ath10k_bmi_write32(ar, hi_be, 0);
666 if (ret) {
667 ath10k_err(ar, "setting host CPU BE mode failed\n");
668 return ret;
669 }
670
671 /* FW descriptor/Data swap flags */
672 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
673
674 if (ret) {
675 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
676 return ret;
677 }
678
679 /* Some devices have a special sanity check that verifies the PCI
680 * Device ID is written to this host interest var. It is known to be
681 * required to boot QCA6164.
682 */
683 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
684 ar->dev_id);
685 if (ret) {
686 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
687 return ret;
688 }
689
690 return 0;
691 }
692
ath10k_fetch_fw_file(struct ath10k * ar,const char * dir,const char * file)693 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
694 const char *dir,
695 const char *file)
696 {
697 char filename[100];
698 const struct firmware *fw;
699 int ret;
700
701 if (file == NULL)
702 return ERR_PTR(-ENOENT);
703
704 if (dir == NULL)
705 dir = ".";
706
707 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
708 ret = firmware_request_nowarn(&fw, filename, ar->dev);
709 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
710 filename, ret);
711
712 if (ret)
713 return ERR_PTR(ret);
714
715 return fw;
716 }
717
ath10k_push_board_ext_data(struct ath10k * ar,const void * data,size_t data_len)718 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
719 size_t data_len)
720 {
721 u32 board_data_size = ar->hw_params.fw.board_size;
722 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
723 u32 board_ext_data_addr;
724 int ret;
725
726 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
727 if (ret) {
728 ath10k_err(ar, "could not read board ext data addr (%d)\n",
729 ret);
730 return ret;
731 }
732
733 ath10k_dbg(ar, ATH10K_DBG_BOOT,
734 "boot push board extended data addr 0x%x\n",
735 board_ext_data_addr);
736
737 if (board_ext_data_addr == 0)
738 return 0;
739
740 if (data_len != (board_data_size + board_ext_data_size)) {
741 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
742 data_len, board_data_size, board_ext_data_size);
743 return -EINVAL;
744 }
745
746 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
747 data + board_data_size,
748 board_ext_data_size);
749 if (ret) {
750 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
751 return ret;
752 }
753
754 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
755 (board_ext_data_size << 16) | 1);
756 if (ret) {
757 ath10k_err(ar, "could not write board ext data bit (%d)\n",
758 ret);
759 return ret;
760 }
761
762 return 0;
763 }
764
ath10k_download_board_data(struct ath10k * ar,const void * data,size_t data_len)765 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
766 size_t data_len)
767 {
768 u32 board_data_size = ar->hw_params.fw.board_size;
769 u32 address;
770 int ret;
771
772 ret = ath10k_push_board_ext_data(ar, data, data_len);
773 if (ret) {
774 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
775 goto exit;
776 }
777
778 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
779 if (ret) {
780 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
781 goto exit;
782 }
783
784 ret = ath10k_bmi_write_memory(ar, address, data,
785 min_t(u32, board_data_size,
786 data_len));
787 if (ret) {
788 ath10k_err(ar, "could not write board data (%d)\n", ret);
789 goto exit;
790 }
791
792 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
793 if (ret) {
794 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
795 goto exit;
796 }
797
798 exit:
799 return ret;
800 }
801
ath10k_download_cal_file(struct ath10k * ar,const struct firmware * file)802 static int ath10k_download_cal_file(struct ath10k *ar,
803 const struct firmware *file)
804 {
805 int ret;
806
807 if (!file)
808 return -ENOENT;
809
810 if (IS_ERR(file))
811 return PTR_ERR(file);
812
813 ret = ath10k_download_board_data(ar, file->data, file->size);
814 if (ret) {
815 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
816 return ret;
817 }
818
819 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
820
821 return 0;
822 }
823
ath10k_download_cal_dt(struct ath10k * ar,const char * dt_name)824 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
825 {
826 struct device_node *node;
827 int data_len;
828 void *data;
829 int ret;
830
831 node = ar->dev->of_node;
832 if (!node)
833 /* Device Tree is optional, don't print any warnings if
834 * there's no node for ath10k.
835 */
836 return -ENOENT;
837
838 if (!of_get_property(node, dt_name, &data_len)) {
839 /* The calibration data node is optional */
840 return -ENOENT;
841 }
842
843 if (data_len != ar->hw_params.cal_data_len) {
844 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
845 data_len);
846 ret = -EMSGSIZE;
847 goto out;
848 }
849
850 data = kmalloc(data_len, GFP_KERNEL);
851 if (!data) {
852 ret = -ENOMEM;
853 goto out;
854 }
855
856 ret = of_property_read_u8_array(node, dt_name, data, data_len);
857 if (ret) {
858 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
859 ret);
860 goto out_free;
861 }
862
863 ret = ath10k_download_board_data(ar, data, data_len);
864 if (ret) {
865 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
866 ret);
867 goto out_free;
868 }
869
870 ret = 0;
871
872 out_free:
873 kfree(data);
874
875 out:
876 return ret;
877 }
878
ath10k_download_cal_eeprom(struct ath10k * ar)879 static int ath10k_download_cal_eeprom(struct ath10k *ar)
880 {
881 size_t data_len;
882 void *data = NULL;
883 int ret;
884
885 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
886 if (ret) {
887 if (ret != -EOPNOTSUPP)
888 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
889 ret);
890 goto out_free;
891 }
892
893 ret = ath10k_download_board_data(ar, data, data_len);
894 if (ret) {
895 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
896 ret);
897 goto out_free;
898 }
899
900 ret = 0;
901
902 out_free:
903 kfree(data);
904
905 return ret;
906 }
907
ath10k_core_get_board_id_from_otp(struct ath10k * ar)908 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
909 {
910 u32 result, address;
911 u8 board_id, chip_id;
912 int ret, bmi_board_id_param;
913
914 address = ar->hw_params.patch_load_addr;
915
916 if (!ar->normal_mode_fw.fw_file.otp_data ||
917 !ar->normal_mode_fw.fw_file.otp_len) {
918 ath10k_warn(ar,
919 "failed to retrieve board id because of invalid otp\n");
920 return -ENODATA;
921 }
922
923 ath10k_dbg(ar, ATH10K_DBG_BOOT,
924 "boot upload otp to 0x%x len %zd for board id\n",
925 address, ar->normal_mode_fw.fw_file.otp_len);
926
927 ret = ath10k_bmi_fast_download(ar, address,
928 ar->normal_mode_fw.fw_file.otp_data,
929 ar->normal_mode_fw.fw_file.otp_len);
930 if (ret) {
931 ath10k_err(ar, "could not write otp for board id check: %d\n",
932 ret);
933 return ret;
934 }
935
936 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
937 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
938 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
939 else
940 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
941
942 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
943 if (ret) {
944 ath10k_err(ar, "could not execute otp for board id check: %d\n",
945 ret);
946 return ret;
947 }
948
949 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
950 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
951
952 ath10k_dbg(ar, ATH10K_DBG_BOOT,
953 "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
954 result, board_id, chip_id);
955
956 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
957 (board_id == 0)) {
958 ath10k_dbg(ar, ATH10K_DBG_BOOT,
959 "board id does not exist in otp, ignore it\n");
960 return -EOPNOTSUPP;
961 }
962
963 ar->id.bmi_ids_valid = true;
964 ar->id.bmi_board_id = board_id;
965 ar->id.bmi_chip_id = chip_id;
966
967 return 0;
968 }
969
ath10k_core_check_bdfext(const struct dmi_header * hdr,void * data)970 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
971 {
972 struct ath10k *ar = data;
973 const char *bdf_ext;
974 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
975 u8 bdf_enabled;
976 int i;
977
978 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
979 return;
980
981 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
982 ath10k_dbg(ar, ATH10K_DBG_BOOT,
983 "wrong smbios bdf ext type length (%d).\n",
984 hdr->length);
985 return;
986 }
987
988 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
989 if (!bdf_enabled) {
990 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
991 return;
992 }
993
994 /* Only one string exists (per spec) */
995 bdf_ext = (char *)hdr + hdr->length;
996
997 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
998 ath10k_dbg(ar, ATH10K_DBG_BOOT,
999 "bdf variant magic does not match.\n");
1000 return;
1001 }
1002
1003 for (i = 0; i < strlen(bdf_ext); i++) {
1004 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1005 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1006 "bdf variant name contains non ascii chars.\n");
1007 return;
1008 }
1009 }
1010
1011 /* Copy extension name without magic suffix */
1012 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1013 sizeof(ar->id.bdf_ext)) < 0) {
1014 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1015 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1016 bdf_ext);
1017 return;
1018 }
1019
1020 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1021 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1022 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1023 }
1024
ath10k_core_check_smbios(struct ath10k * ar)1025 static int ath10k_core_check_smbios(struct ath10k *ar)
1026 {
1027 ar->id.bdf_ext[0] = '\0';
1028 dmi_walk(ath10k_core_check_bdfext, ar);
1029
1030 if (ar->id.bdf_ext[0] == '\0')
1031 return -ENODATA;
1032
1033 return 0;
1034 }
1035
ath10k_core_check_dt(struct ath10k * ar)1036 static int ath10k_core_check_dt(struct ath10k *ar)
1037 {
1038 struct device_node *node;
1039 const char *variant = NULL;
1040
1041 node = ar->dev->of_node;
1042 if (!node)
1043 return -ENOENT;
1044
1045 of_property_read_string(node, "qcom,ath10k-calibration-variant",
1046 &variant);
1047 if (!variant)
1048 return -ENODATA;
1049
1050 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1051 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1052 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1053 variant);
1054
1055 return 0;
1056 }
1057
ath10k_download_and_run_otp(struct ath10k * ar)1058 static int ath10k_download_and_run_otp(struct ath10k *ar)
1059 {
1060 u32 result, address = ar->hw_params.patch_load_addr;
1061 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1062 int ret;
1063
1064 ret = ath10k_download_board_data(ar,
1065 ar->running_fw->board_data,
1066 ar->running_fw->board_len);
1067 if (ret) {
1068 ath10k_err(ar, "failed to download board data: %d\n", ret);
1069 return ret;
1070 }
1071
1072 /* OTP is optional */
1073
1074 if (!ar->running_fw->fw_file.otp_data ||
1075 !ar->running_fw->fw_file.otp_len) {
1076 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1077 ar->running_fw->fw_file.otp_data,
1078 ar->running_fw->fw_file.otp_len);
1079 return 0;
1080 }
1081
1082 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1083 address, ar->running_fw->fw_file.otp_len);
1084
1085 ret = ath10k_bmi_fast_download(ar, address,
1086 ar->running_fw->fw_file.otp_data,
1087 ar->running_fw->fw_file.otp_len);
1088 if (ret) {
1089 ath10k_err(ar, "could not write otp (%d)\n", ret);
1090 return ret;
1091 }
1092
1093 /* As of now pre-cal is valid for 10_4 variants */
1094 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1095 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1096 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1097
1098 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1099 if (ret) {
1100 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1101 return ret;
1102 }
1103
1104 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1105
1106 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1107 ar->running_fw->fw_file.fw_features)) &&
1108 result != 0) {
1109 ath10k_err(ar, "otp calibration failed: %d", result);
1110 return -EINVAL;
1111 }
1112
1113 return 0;
1114 }
1115
ath10k_download_fw(struct ath10k * ar)1116 static int ath10k_download_fw(struct ath10k *ar)
1117 {
1118 u32 address, data_len;
1119 const void *data;
1120 int ret;
1121
1122 address = ar->hw_params.patch_load_addr;
1123
1124 data = ar->running_fw->fw_file.firmware_data;
1125 data_len = ar->running_fw->fw_file.firmware_len;
1126
1127 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1128 if (ret) {
1129 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1130 ret);
1131 return ret;
1132 }
1133
1134 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1135 "boot uploading firmware image %pK len %d\n",
1136 data, data_len);
1137
1138 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1139 if (ret) {
1140 ath10k_err(ar, "failed to download firmware: %d\n",
1141 ret);
1142 return ret;
1143 }
1144
1145 return ret;
1146 }
1147
ath10k_core_free_board_files(struct ath10k * ar)1148 static void ath10k_core_free_board_files(struct ath10k *ar)
1149 {
1150 if (!IS_ERR(ar->normal_mode_fw.board))
1151 release_firmware(ar->normal_mode_fw.board);
1152
1153 ar->normal_mode_fw.board = NULL;
1154 ar->normal_mode_fw.board_data = NULL;
1155 ar->normal_mode_fw.board_len = 0;
1156 }
1157
ath10k_core_free_firmware_files(struct ath10k * ar)1158 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1159 {
1160 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1161 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1162
1163 if (!IS_ERR(ar->cal_file))
1164 release_firmware(ar->cal_file);
1165
1166 if (!IS_ERR(ar->pre_cal_file))
1167 release_firmware(ar->pre_cal_file);
1168
1169 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1170
1171 ar->normal_mode_fw.fw_file.otp_data = NULL;
1172 ar->normal_mode_fw.fw_file.otp_len = 0;
1173
1174 ar->normal_mode_fw.fw_file.firmware = NULL;
1175 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1176 ar->normal_mode_fw.fw_file.firmware_len = 0;
1177
1178 ar->cal_file = NULL;
1179 ar->pre_cal_file = NULL;
1180 }
1181
ath10k_fetch_cal_file(struct ath10k * ar)1182 static int ath10k_fetch_cal_file(struct ath10k *ar)
1183 {
1184 char filename[100];
1185
1186 /* pre-cal-<bus>-<id>.bin */
1187 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1188 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1189
1190 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1191 if (!IS_ERR(ar->pre_cal_file))
1192 goto success;
1193
1194 /* cal-<bus>-<id>.bin */
1195 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1196 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1197
1198 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1199 if (IS_ERR(ar->cal_file))
1200 /* calibration file is optional, don't print any warnings */
1201 return PTR_ERR(ar->cal_file);
1202 success:
1203 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1204 ATH10K_FW_DIR, filename);
1205
1206 return 0;
1207 }
1208
ath10k_core_fetch_board_data_api_1(struct ath10k * ar)1209 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
1210 {
1211 if (!ar->hw_params.fw.board) {
1212 ath10k_err(ar, "failed to find board file fw entry\n");
1213 return -EINVAL;
1214 }
1215
1216 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1217 ar->hw_params.fw.dir,
1218 ar->hw_params.fw.board);
1219 if (IS_ERR(ar->normal_mode_fw.board))
1220 return PTR_ERR(ar->normal_mode_fw.board);
1221
1222 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1223 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1224
1225 return 0;
1226 }
1227
ath10k_core_parse_bd_ie_board(struct ath10k * ar,const void * buf,size_t buf_len,const char * boardname)1228 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1229 const void *buf, size_t buf_len,
1230 const char *boardname)
1231 {
1232 const struct ath10k_fw_ie *hdr;
1233 bool name_match_found;
1234 int ret, board_ie_id;
1235 size_t board_ie_len;
1236 const void *board_ie_data;
1237
1238 name_match_found = false;
1239
1240 /* go through ATH10K_BD_IE_BOARD_ elements */
1241 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1242 hdr = buf;
1243 board_ie_id = le32_to_cpu(hdr->id);
1244 board_ie_len = le32_to_cpu(hdr->len);
1245 board_ie_data = hdr->data;
1246
1247 buf_len -= sizeof(*hdr);
1248 buf += sizeof(*hdr);
1249
1250 if (buf_len < ALIGN(board_ie_len, 4)) {
1251 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1252 buf_len, ALIGN(board_ie_len, 4));
1253 ret = -EINVAL;
1254 goto out;
1255 }
1256
1257 switch (board_ie_id) {
1258 case ATH10K_BD_IE_BOARD_NAME:
1259 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1260 board_ie_data, board_ie_len);
1261
1262 if (board_ie_len != strlen(boardname))
1263 break;
1264
1265 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1266 if (ret)
1267 break;
1268
1269 name_match_found = true;
1270 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1271 "boot found match for name '%s'",
1272 boardname);
1273 break;
1274 case ATH10K_BD_IE_BOARD_DATA:
1275 if (!name_match_found)
1276 /* no match found */
1277 break;
1278
1279 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1280 "boot found board data for '%s'",
1281 boardname);
1282
1283 ar->normal_mode_fw.board_data = board_ie_data;
1284 ar->normal_mode_fw.board_len = board_ie_len;
1285
1286 ret = 0;
1287 goto out;
1288 default:
1289 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1290 board_ie_id);
1291 break;
1292 }
1293
1294 /* jump over the padding */
1295 board_ie_len = ALIGN(board_ie_len, 4);
1296
1297 buf_len -= board_ie_len;
1298 buf += board_ie_len;
1299 }
1300
1301 /* no match found */
1302 ret = -ENOENT;
1303
1304 out:
1305 return ret;
1306 }
1307
ath10k_core_search_bd(struct ath10k * ar,const char * boardname,const u8 * data,size_t len)1308 static int ath10k_core_search_bd(struct ath10k *ar,
1309 const char *boardname,
1310 const u8 *data,
1311 size_t len)
1312 {
1313 size_t ie_len;
1314 struct ath10k_fw_ie *hdr;
1315 int ret = -ENOENT, ie_id;
1316
1317 while (len > sizeof(struct ath10k_fw_ie)) {
1318 hdr = (struct ath10k_fw_ie *)data;
1319 ie_id = le32_to_cpu(hdr->id);
1320 ie_len = le32_to_cpu(hdr->len);
1321
1322 len -= sizeof(*hdr);
1323 data = hdr->data;
1324
1325 if (len < ALIGN(ie_len, 4)) {
1326 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1327 ie_id, ie_len, len);
1328 return -EINVAL;
1329 }
1330
1331 switch (ie_id) {
1332 case ATH10K_BD_IE_BOARD:
1333 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1334 boardname);
1335 if (ret == -ENOENT)
1336 /* no match found, continue */
1337 break;
1338
1339 /* either found or error, so stop searching */
1340 goto out;
1341 }
1342
1343 /* jump over the padding */
1344 ie_len = ALIGN(ie_len, 4);
1345
1346 len -= ie_len;
1347 data += ie_len;
1348 }
1349
1350 out:
1351 /* return result of parse_bd_ie_board() or -ENOENT */
1352 return ret;
1353 }
1354
ath10k_core_fetch_board_data_api_n(struct ath10k * ar,const char * boardname,const char * fallback_boardname,const char * filename)1355 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1356 const char *boardname,
1357 const char *fallback_boardname,
1358 const char *filename)
1359 {
1360 size_t len, magic_len;
1361 const u8 *data;
1362 int ret;
1363
1364 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1365 ar->hw_params.fw.dir,
1366 filename);
1367 if (IS_ERR(ar->normal_mode_fw.board))
1368 return PTR_ERR(ar->normal_mode_fw.board);
1369
1370 data = ar->normal_mode_fw.board->data;
1371 len = ar->normal_mode_fw.board->size;
1372
1373 /* magic has extra null byte padded */
1374 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1375 if (len < magic_len) {
1376 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1377 ar->hw_params.fw.dir, filename, len);
1378 ret = -EINVAL;
1379 goto err;
1380 }
1381
1382 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1383 ath10k_err(ar, "found invalid board magic\n");
1384 ret = -EINVAL;
1385 goto err;
1386 }
1387
1388 /* magic is padded to 4 bytes */
1389 magic_len = ALIGN(magic_len, 4);
1390 if (len < magic_len) {
1391 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1392 ar->hw_params.fw.dir, filename, len);
1393 ret = -EINVAL;
1394 goto err;
1395 }
1396
1397 data += magic_len;
1398 len -= magic_len;
1399
1400 /* attempt to find boardname in the IE list */
1401 ret = ath10k_core_search_bd(ar, boardname, data, len);
1402
1403 /* if we didn't find it and have a fallback name, try that */
1404 if (ret == -ENOENT && fallback_boardname)
1405 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1406
1407 if (ret == -ENOENT) {
1408 ath10k_err(ar,
1409 "failed to fetch board data for %s from %s/%s\n",
1410 boardname, ar->hw_params.fw.dir, filename);
1411 ret = -ENODATA;
1412 }
1413
1414 if (ret)
1415 goto err;
1416
1417 return 0;
1418
1419 err:
1420 ath10k_core_free_board_files(ar);
1421 return ret;
1422 }
1423
ath10k_core_create_board_name(struct ath10k * ar,char * name,size_t name_len,bool with_variant)1424 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1425 size_t name_len, bool with_variant)
1426 {
1427 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1428 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1429
1430 if (with_variant && ar->id.bdf_ext[0] != '\0')
1431 scnprintf(variant, sizeof(variant), ",variant=%s",
1432 ar->id.bdf_ext);
1433
1434 if (ar->id.bmi_ids_valid) {
1435 scnprintf(name, name_len,
1436 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1437 ath10k_bus_str(ar->hif.bus),
1438 ar->id.bmi_chip_id,
1439 ar->id.bmi_board_id, variant);
1440 goto out;
1441 }
1442
1443 scnprintf(name, name_len,
1444 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1445 ath10k_bus_str(ar->hif.bus),
1446 ar->id.vendor, ar->id.device,
1447 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1448 out:
1449 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1450
1451 return 0;
1452 }
1453
ath10k_core_fetch_board_file(struct ath10k * ar)1454 static int ath10k_core_fetch_board_file(struct ath10k *ar)
1455 {
1456 char boardname[100], fallback_boardname[100];
1457 int ret;
1458
1459 ret = ath10k_core_create_board_name(ar, boardname,
1460 sizeof(boardname), true);
1461 if (ret) {
1462 ath10k_err(ar, "failed to create board name: %d", ret);
1463 return ret;
1464 }
1465
1466 ret = ath10k_core_create_board_name(ar, fallback_boardname,
1467 sizeof(boardname), false);
1468 if (ret) {
1469 ath10k_err(ar, "failed to create fallback board name: %d", ret);
1470 return ret;
1471 }
1472
1473 ar->bd_api = 2;
1474 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1475 fallback_boardname,
1476 ATH10K_BOARD_API2_FILE);
1477 if (!ret)
1478 goto success;
1479
1480 ar->bd_api = 1;
1481 ret = ath10k_core_fetch_board_data_api_1(ar);
1482 if (ret) {
1483 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1484 ar->hw_params.fw.dir);
1485 return ret;
1486 }
1487
1488 success:
1489 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1490 return 0;
1491 }
1492
ath10k_core_fetch_firmware_api_n(struct ath10k * ar,const char * name,struct ath10k_fw_file * fw_file)1493 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1494 struct ath10k_fw_file *fw_file)
1495 {
1496 size_t magic_len, len, ie_len;
1497 int ie_id, i, index, bit, ret;
1498 struct ath10k_fw_ie *hdr;
1499 const u8 *data;
1500 __le32 *timestamp, *version;
1501
1502 /* first fetch the firmware file (firmware-*.bin) */
1503 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1504 name);
1505 if (IS_ERR(fw_file->firmware))
1506 return PTR_ERR(fw_file->firmware);
1507
1508 data = fw_file->firmware->data;
1509 len = fw_file->firmware->size;
1510
1511 /* magic also includes the null byte, check that as well */
1512 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1513
1514 if (len < magic_len) {
1515 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1516 ar->hw_params.fw.dir, name, len);
1517 ret = -EINVAL;
1518 goto err;
1519 }
1520
1521 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1522 ath10k_err(ar, "invalid firmware magic\n");
1523 ret = -EINVAL;
1524 goto err;
1525 }
1526
1527 /* jump over the padding */
1528 magic_len = ALIGN(magic_len, 4);
1529
1530 len -= magic_len;
1531 data += magic_len;
1532
1533 /* loop elements */
1534 while (len > sizeof(struct ath10k_fw_ie)) {
1535 hdr = (struct ath10k_fw_ie *)data;
1536
1537 ie_id = le32_to_cpu(hdr->id);
1538 ie_len = le32_to_cpu(hdr->len);
1539
1540 len -= sizeof(*hdr);
1541 data += sizeof(*hdr);
1542
1543 if (len < ie_len) {
1544 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1545 ie_id, len, ie_len);
1546 ret = -EINVAL;
1547 goto err;
1548 }
1549
1550 switch (ie_id) {
1551 case ATH10K_FW_IE_FW_VERSION:
1552 if (ie_len > sizeof(fw_file->fw_version) - 1)
1553 break;
1554
1555 memcpy(fw_file->fw_version, data, ie_len);
1556 fw_file->fw_version[ie_len] = '\0';
1557
1558 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1559 "found fw version %s\n",
1560 fw_file->fw_version);
1561 break;
1562 case ATH10K_FW_IE_TIMESTAMP:
1563 if (ie_len != sizeof(u32))
1564 break;
1565
1566 timestamp = (__le32 *)data;
1567
1568 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1569 le32_to_cpup(timestamp));
1570 break;
1571 case ATH10K_FW_IE_FEATURES:
1572 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1573 "found firmware features ie (%zd B)\n",
1574 ie_len);
1575
1576 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1577 index = i / 8;
1578 bit = i % 8;
1579
1580 if (index == ie_len)
1581 break;
1582
1583 if (data[index] & (1 << bit)) {
1584 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1585 "Enabling feature bit: %i\n",
1586 i);
1587 __set_bit(i, fw_file->fw_features);
1588 }
1589 }
1590
1591 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1592 fw_file->fw_features,
1593 sizeof(fw_file->fw_features));
1594 break;
1595 case ATH10K_FW_IE_FW_IMAGE:
1596 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1597 "found fw image ie (%zd B)\n",
1598 ie_len);
1599
1600 fw_file->firmware_data = data;
1601 fw_file->firmware_len = ie_len;
1602
1603 break;
1604 case ATH10K_FW_IE_OTP_IMAGE:
1605 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1606 "found otp image ie (%zd B)\n",
1607 ie_len);
1608
1609 fw_file->otp_data = data;
1610 fw_file->otp_len = ie_len;
1611
1612 break;
1613 case ATH10K_FW_IE_WMI_OP_VERSION:
1614 if (ie_len != sizeof(u32))
1615 break;
1616
1617 version = (__le32 *)data;
1618
1619 fw_file->wmi_op_version = le32_to_cpup(version);
1620
1621 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1622 fw_file->wmi_op_version);
1623 break;
1624 case ATH10K_FW_IE_HTT_OP_VERSION:
1625 if (ie_len != sizeof(u32))
1626 break;
1627
1628 version = (__le32 *)data;
1629
1630 fw_file->htt_op_version = le32_to_cpup(version);
1631
1632 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1633 fw_file->htt_op_version);
1634 break;
1635 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1636 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1637 "found fw code swap image ie (%zd B)\n",
1638 ie_len);
1639 fw_file->codeswap_data = data;
1640 fw_file->codeswap_len = ie_len;
1641 break;
1642 default:
1643 ath10k_warn(ar, "Unknown FW IE: %u\n",
1644 le32_to_cpu(hdr->id));
1645 break;
1646 }
1647
1648 /* jump over the padding */
1649 ie_len = ALIGN(ie_len, 4);
1650
1651 len -= ie_len;
1652 data += ie_len;
1653 }
1654
1655 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1656 (!fw_file->firmware_data || !fw_file->firmware_len)) {
1657 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1658 ar->hw_params.fw.dir, name);
1659 ret = -ENOMEDIUM;
1660 goto err;
1661 }
1662
1663 return 0;
1664
1665 err:
1666 ath10k_core_free_firmware_files(ar);
1667 return ret;
1668 }
1669
ath10k_core_get_fw_name(struct ath10k * ar,char * fw_name,size_t fw_name_len,int fw_api)1670 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1671 size_t fw_name_len, int fw_api)
1672 {
1673 switch (ar->hif.bus) {
1674 case ATH10K_BUS_SDIO:
1675 case ATH10K_BUS_USB:
1676 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1677 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1678 fw_api);
1679 break;
1680 case ATH10K_BUS_PCI:
1681 case ATH10K_BUS_AHB:
1682 case ATH10K_BUS_SNOC:
1683 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
1684 ATH10K_FW_FILE_BASE, fw_api);
1685 break;
1686 }
1687 }
1688
ath10k_core_fetch_firmware_files(struct ath10k * ar)1689 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1690 {
1691 int ret, i;
1692 char fw_name[100];
1693
1694 /* calibration file is optional, don't check for any errors */
1695 ath10k_fetch_cal_file(ar);
1696
1697 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1698 ar->fw_api = i;
1699 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1700 ar->fw_api);
1701
1702 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1703 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1704 &ar->normal_mode_fw.fw_file);
1705 if (!ret)
1706 goto success;
1707 }
1708
1709 /* we end up here if we couldn't fetch any firmware */
1710
1711 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1712 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1713 ret);
1714
1715 return ret;
1716
1717 success:
1718 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1719
1720 return 0;
1721 }
1722
ath10k_core_pre_cal_download(struct ath10k * ar)1723 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1724 {
1725 int ret;
1726
1727 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1728 if (ret == 0) {
1729 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1730 goto success;
1731 }
1732
1733 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1734 "boot did not find a pre calibration file, try DT next: %d\n",
1735 ret);
1736
1737 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1738 if (ret) {
1739 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1740 "unable to load pre cal data from DT: %d\n", ret);
1741 return ret;
1742 }
1743 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1744
1745 success:
1746 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1747 ath10k_cal_mode_str(ar->cal_mode));
1748
1749 return 0;
1750 }
1751
ath10k_core_pre_cal_config(struct ath10k * ar)1752 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1753 {
1754 int ret;
1755
1756 ret = ath10k_core_pre_cal_download(ar);
1757 if (ret) {
1758 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1759 "failed to load pre cal data: %d\n", ret);
1760 return ret;
1761 }
1762
1763 ret = ath10k_core_get_board_id_from_otp(ar);
1764 if (ret) {
1765 ath10k_err(ar, "failed to get board id: %d\n", ret);
1766 return ret;
1767 }
1768
1769 ret = ath10k_download_and_run_otp(ar);
1770 if (ret) {
1771 ath10k_err(ar, "failed to run otp: %d\n", ret);
1772 return ret;
1773 }
1774
1775 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1776 "pre cal configuration done successfully\n");
1777
1778 return 0;
1779 }
1780
ath10k_download_cal_data(struct ath10k * ar)1781 static int ath10k_download_cal_data(struct ath10k *ar)
1782 {
1783 int ret;
1784
1785 ret = ath10k_core_pre_cal_config(ar);
1786 if (ret == 0)
1787 return 0;
1788
1789 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1790 "pre cal download procedure failed, try cal file: %d\n",
1791 ret);
1792
1793 ret = ath10k_download_cal_file(ar, ar->cal_file);
1794 if (ret == 0) {
1795 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1796 goto done;
1797 }
1798
1799 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1800 "boot did not find a calibration file, try DT next: %d\n",
1801 ret);
1802
1803 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1804 if (ret == 0) {
1805 ar->cal_mode = ATH10K_CAL_MODE_DT;
1806 goto done;
1807 }
1808
1809 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1810 "boot did not find DT entry, try target EEPROM next: %d\n",
1811 ret);
1812
1813 ret = ath10k_download_cal_eeprom(ar);
1814 if (ret == 0) {
1815 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1816 goto done;
1817 }
1818
1819 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1820 "boot did not find target EEPROM entry, try OTP next: %d\n",
1821 ret);
1822
1823 ret = ath10k_download_and_run_otp(ar);
1824 if (ret) {
1825 ath10k_err(ar, "failed to run otp: %d\n", ret);
1826 return ret;
1827 }
1828
1829 ar->cal_mode = ATH10K_CAL_MODE_OTP;
1830
1831 done:
1832 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1833 ath10k_cal_mode_str(ar->cal_mode));
1834 return 0;
1835 }
1836
ath10k_init_uart(struct ath10k * ar)1837 static int ath10k_init_uart(struct ath10k *ar)
1838 {
1839 int ret;
1840
1841 /*
1842 * Explicitly setting UART prints to zero as target turns it on
1843 * based on scratch registers.
1844 */
1845 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1846 if (ret) {
1847 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1848 return ret;
1849 }
1850
1851 if (!uart_print)
1852 return 0;
1853
1854 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1855 if (ret) {
1856 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1857 return ret;
1858 }
1859
1860 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1861 if (ret) {
1862 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1863 return ret;
1864 }
1865
1866 /* Set the UART baud rate to 19200. */
1867 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1868 if (ret) {
1869 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1870 return ret;
1871 }
1872
1873 ath10k_info(ar, "UART prints enabled\n");
1874 return 0;
1875 }
1876
ath10k_init_hw_params(struct ath10k * ar)1877 static int ath10k_init_hw_params(struct ath10k *ar)
1878 {
1879 const struct ath10k_hw_params *uninitialized_var(hw_params);
1880 int i;
1881
1882 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1883 hw_params = &ath10k_hw_params_list[i];
1884
1885 if (hw_params->id == ar->target_version &&
1886 hw_params->dev_id == ar->dev_id)
1887 break;
1888 }
1889
1890 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1891 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1892 ar->target_version);
1893 return -EINVAL;
1894 }
1895
1896 ar->hw_params = *hw_params;
1897
1898 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1899 ar->hw_params.name, ar->target_version);
1900
1901 return 0;
1902 }
1903
ath10k_core_restart(struct work_struct * work)1904 static void ath10k_core_restart(struct work_struct *work)
1905 {
1906 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1907 int ret;
1908
1909 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1910
1911 /* Place a barrier to make sure the compiler doesn't reorder
1912 * CRASH_FLUSH and calling other functions.
1913 */
1914 barrier();
1915
1916 ieee80211_stop_queues(ar->hw);
1917 ath10k_drain_tx(ar);
1918 complete(&ar->scan.started);
1919 complete(&ar->scan.completed);
1920 complete(&ar->scan.on_channel);
1921 complete(&ar->offchan_tx_completed);
1922 complete(&ar->install_key_done);
1923 complete(&ar->vdev_setup_done);
1924 complete(&ar->thermal.wmi_sync);
1925 complete(&ar->bss_survey_done);
1926 wake_up(&ar->htt.empty_tx_wq);
1927 wake_up(&ar->wmi.tx_credits_wq);
1928 wake_up(&ar->peer_mapping_wq);
1929
1930 /* TODO: We can have one instance of cancelling coverage_class_work by
1931 * moving it to ath10k_halt(), so that both stop() and restart() would
1932 * call that but it takes conf_mutex() and if we call cancel_work_sync()
1933 * with conf_mutex it will deadlock.
1934 */
1935 cancel_work_sync(&ar->set_coverage_class_work);
1936
1937 mutex_lock(&ar->conf_mutex);
1938
1939 switch (ar->state) {
1940 case ATH10K_STATE_ON:
1941 ar->state = ATH10K_STATE_RESTARTING;
1942 ath10k_halt(ar);
1943 ath10k_scan_finish(ar);
1944 ieee80211_restart_hw(ar->hw);
1945 break;
1946 case ATH10K_STATE_OFF:
1947 /* this can happen if driver is being unloaded
1948 * or if the crash happens during FW probing
1949 */
1950 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1951 break;
1952 case ATH10K_STATE_RESTARTING:
1953 /* hw restart might be requested from multiple places */
1954 break;
1955 case ATH10K_STATE_RESTARTED:
1956 ar->state = ATH10K_STATE_WEDGED;
1957 /* fall through */
1958 case ATH10K_STATE_WEDGED:
1959 ath10k_warn(ar, "device is wedged, will not restart\n");
1960 break;
1961 case ATH10K_STATE_UTF:
1962 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1963 break;
1964 }
1965
1966 mutex_unlock(&ar->conf_mutex);
1967
1968 ret = ath10k_coredump_submit(ar);
1969 if (ret)
1970 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
1971 ret);
1972 }
1973
ath10k_core_set_coverage_class_work(struct work_struct * work)1974 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
1975 {
1976 struct ath10k *ar = container_of(work, struct ath10k,
1977 set_coverage_class_work);
1978
1979 if (ar->hw_params.hw_ops->set_coverage_class)
1980 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
1981 }
1982
ath10k_core_init_firmware_features(struct ath10k * ar)1983 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1984 {
1985 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1986
1987 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1988 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1989 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1990 return -EINVAL;
1991 }
1992
1993 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1994 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1995 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1996 return -EINVAL;
1997 }
1998
1999 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2000 switch (ath10k_cryptmode_param) {
2001 case ATH10K_CRYPT_MODE_HW:
2002 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2003 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2004 break;
2005 case ATH10K_CRYPT_MODE_SW:
2006 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2007 fw_file->fw_features)) {
2008 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2009 return -EINVAL;
2010 }
2011
2012 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2013 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2014 break;
2015 default:
2016 ath10k_info(ar, "invalid cryptmode: %d\n",
2017 ath10k_cryptmode_param);
2018 return -EINVAL;
2019 }
2020
2021 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2022 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2023
2024 if (rawmode) {
2025 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2026 fw_file->fw_features)) {
2027 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2028 return -EINVAL;
2029 }
2030 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2031 }
2032
2033 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2034 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2035
2036 /* Workaround:
2037 *
2038 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2039 * and causes enormous performance issues (malformed frames,
2040 * etc).
2041 *
2042 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2043 * albeit a bit slower compared to regular operation.
2044 */
2045 ar->htt.max_num_amsdu = 1;
2046 }
2047
2048 /* Backwards compatibility for firmwares without
2049 * ATH10K_FW_IE_WMI_OP_VERSION.
2050 */
2051 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2052 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2053 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2054 fw_file->fw_features))
2055 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2056 else
2057 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2058 } else {
2059 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2060 }
2061 }
2062
2063 switch (fw_file->wmi_op_version) {
2064 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2065 ar->max_num_peers = TARGET_NUM_PEERS;
2066 ar->max_num_stations = TARGET_NUM_STATIONS;
2067 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2068 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2069 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2070 WMI_STAT_PEER;
2071 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2072 break;
2073 case ATH10K_FW_WMI_OP_VERSION_10_1:
2074 case ATH10K_FW_WMI_OP_VERSION_10_2:
2075 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2076 if (ath10k_peer_stats_enabled(ar)) {
2077 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2078 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2079 } else {
2080 ar->max_num_peers = TARGET_10X_NUM_PEERS;
2081 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2082 }
2083 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2084 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2085 ar->fw_stats_req_mask = WMI_STAT_PEER;
2086 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2087 break;
2088 case ATH10K_FW_WMI_OP_VERSION_TLV:
2089 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
2090 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2091 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2092 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2093 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2094 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2095 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2096 WMI_STAT_PEER;
2097 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2098 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2099 break;
2100 case ATH10K_FW_WMI_OP_VERSION_10_4:
2101 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
2102 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2103 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2104 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2105 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2106 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2107 WMI_10_4_STAT_PEER_EXTD |
2108 WMI_10_4_STAT_VDEV_EXTD;
2109 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2110 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2111
2112 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2113 fw_file->fw_features))
2114 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2115 else
2116 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2117 break;
2118 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2119 case ATH10K_FW_WMI_OP_VERSION_MAX:
2120 WARN_ON(1);
2121 return -EINVAL;
2122 }
2123
2124 /* Backwards compatibility for firmwares without
2125 * ATH10K_FW_IE_HTT_OP_VERSION.
2126 */
2127 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2128 switch (fw_file->wmi_op_version) {
2129 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2130 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2131 break;
2132 case ATH10K_FW_WMI_OP_VERSION_10_1:
2133 case ATH10K_FW_WMI_OP_VERSION_10_2:
2134 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2135 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2136 break;
2137 case ATH10K_FW_WMI_OP_VERSION_TLV:
2138 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2139 break;
2140 case ATH10K_FW_WMI_OP_VERSION_10_4:
2141 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2142 case ATH10K_FW_WMI_OP_VERSION_MAX:
2143 ath10k_err(ar, "htt op version not found from fw meta data");
2144 return -EINVAL;
2145 }
2146 }
2147
2148 return 0;
2149 }
2150
ath10k_core_reset_rx_filter(struct ath10k * ar)2151 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2152 {
2153 int ret;
2154 int vdev_id;
2155 int vdev_type;
2156 int vdev_subtype;
2157 const u8 *vdev_addr;
2158
2159 vdev_id = 0;
2160 vdev_type = WMI_VDEV_TYPE_STA;
2161 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2162 vdev_addr = ar->mac_addr;
2163
2164 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2165 vdev_addr);
2166 if (ret) {
2167 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2168 return ret;
2169 }
2170
2171 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2172 if (ret) {
2173 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2174 return ret;
2175 }
2176
2177 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2178 * serialized properly implicitly.
2179 *
2180 * Moreover (most) WMI commands have no explicit acknowledges. It is
2181 * possible to infer it implicitly by poking firmware with echo
2182 * command - getting a reply means all preceding comments have been
2183 * (mostly) processed.
2184 *
2185 * In case of vdev create/delete this is sufficient.
2186 *
2187 * Without this it's possible to end up with a race when HTT Rx ring is
2188 * started before vdev create/delete hack is complete allowing a short
2189 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2190 */
2191 ret = ath10k_wmi_barrier(ar);
2192 if (ret) {
2193 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2194 return ret;
2195 }
2196
2197 return 0;
2198 }
2199
ath10k_core_start(struct ath10k * ar,enum ath10k_firmware_mode mode,const struct ath10k_fw_components * fw)2200 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2201 const struct ath10k_fw_components *fw)
2202 {
2203 int status;
2204 u32 val;
2205
2206 lockdep_assert_held(&ar->conf_mutex);
2207
2208 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2209
2210 ar->running_fw = fw;
2211
2212 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2213 ar->running_fw->fw_file.fw_features)) {
2214 ath10k_bmi_start(ar);
2215
2216 if (ath10k_init_configure_target(ar)) {
2217 status = -EINVAL;
2218 goto err;
2219 }
2220
2221 status = ath10k_download_cal_data(ar);
2222 if (status)
2223 goto err;
2224
2225 /* Some of of qca988x solutions are having global reset issue
2226 * during target initialization. Bypassing PLL setting before
2227 * downloading firmware and letting the SoC run on REF_CLK is
2228 * fixing the problem. Corresponding firmware change is also
2229 * needed to set the clock source once the target is
2230 * initialized.
2231 */
2232 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2233 ar->running_fw->fw_file.fw_features)) {
2234 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2235 if (status) {
2236 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2237 status);
2238 goto err;
2239 }
2240 }
2241
2242 status = ath10k_download_fw(ar);
2243 if (status)
2244 goto err;
2245
2246 status = ath10k_init_uart(ar);
2247 if (status)
2248 goto err;
2249
2250 if (ar->hif.bus == ATH10K_BUS_SDIO)
2251 ath10k_init_sdio(ar);
2252 }
2253
2254 ar->htc.htc_ops.target_send_suspend_complete =
2255 ath10k_send_suspend_complete;
2256
2257 status = ath10k_htc_init(ar);
2258 if (status) {
2259 ath10k_err(ar, "could not init HTC (%d)\n", status);
2260 goto err;
2261 }
2262
2263 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2264 ar->running_fw->fw_file.fw_features)) {
2265 status = ath10k_bmi_done(ar);
2266 if (status)
2267 goto err;
2268 }
2269
2270 status = ath10k_wmi_attach(ar);
2271 if (status) {
2272 ath10k_err(ar, "WMI attach failed: %d\n", status);
2273 goto err;
2274 }
2275
2276 status = ath10k_htt_init(ar);
2277 if (status) {
2278 ath10k_err(ar, "failed to init htt: %d\n", status);
2279 goto err_wmi_detach;
2280 }
2281
2282 status = ath10k_htt_tx_start(&ar->htt);
2283 if (status) {
2284 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2285 goto err_wmi_detach;
2286 }
2287
2288 /* If firmware indicates Full Rx Reorder support it must be used in a
2289 * slightly different manner. Let HTT code know.
2290 */
2291 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2292 ar->wmi.svc_map));
2293
2294 status = ath10k_htt_rx_alloc(&ar->htt);
2295 if (status) {
2296 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2297 goto err_htt_tx_detach;
2298 }
2299
2300 status = ath10k_hif_start(ar);
2301 if (status) {
2302 ath10k_err(ar, "could not start HIF: %d\n", status);
2303 goto err_htt_rx_detach;
2304 }
2305
2306 status = ath10k_htc_wait_target(&ar->htc);
2307 if (status) {
2308 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2309 goto err_hif_stop;
2310 }
2311
2312 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2313 status = ath10k_htt_connect(&ar->htt);
2314 if (status) {
2315 ath10k_err(ar, "failed to connect htt (%d)\n", status);
2316 goto err_hif_stop;
2317 }
2318 }
2319
2320 status = ath10k_wmi_connect(ar);
2321 if (status) {
2322 ath10k_err(ar, "could not connect wmi: %d\n", status);
2323 goto err_hif_stop;
2324 }
2325
2326 status = ath10k_htc_start(&ar->htc);
2327 if (status) {
2328 ath10k_err(ar, "failed to start htc: %d\n", status);
2329 goto err_hif_stop;
2330 }
2331
2332 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2333 status = ath10k_wmi_wait_for_service_ready(ar);
2334 if (status) {
2335 ath10k_warn(ar, "wmi service ready event not received");
2336 goto err_hif_stop;
2337 }
2338 }
2339
2340 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2341 ar->hw->wiphy->fw_version);
2342
2343 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2344 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2345 val = 0;
2346 if (ath10k_peer_stats_enabled(ar))
2347 val = WMI_10_4_PEER_STATS;
2348
2349 /* Enable vdev stats by default */
2350 val |= WMI_10_4_VDEV_STATS;
2351
2352 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2353 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2354
2355 /* 10.4 firmware supports BT-Coex without reloading firmware
2356 * via pdev param. To support Bluetooth coexistence pdev param,
2357 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2358 * enabled always.
2359 */
2360 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2361 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2362 ar->running_fw->fw_file.fw_features))
2363 val |= WMI_10_4_COEX_GPIO_SUPPORT;
2364
2365 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2366 ar->wmi.svc_map))
2367 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2368
2369 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2370 ar->wmi.svc_map))
2371 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2372
2373 status = ath10k_mac_ext_resource_config(ar, val);
2374 if (status) {
2375 ath10k_err(ar,
2376 "failed to send ext resource cfg command : %d\n",
2377 status);
2378 goto err_hif_stop;
2379 }
2380 }
2381
2382 status = ath10k_wmi_cmd_init(ar);
2383 if (status) {
2384 ath10k_err(ar, "could not send WMI init command (%d)\n",
2385 status);
2386 goto err_hif_stop;
2387 }
2388
2389 status = ath10k_wmi_wait_for_unified_ready(ar);
2390 if (status) {
2391 ath10k_err(ar, "wmi unified ready event not received\n");
2392 goto err_hif_stop;
2393 }
2394
2395 /* Some firmware revisions do not properly set up hardware rx filter
2396 * registers.
2397 *
2398 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2399 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2400 * any frames that matches MAC_PCU_RX_FILTER which is also
2401 * misconfigured to accept anything.
2402 *
2403 * The ADDR1 is programmed using internal firmware structure field and
2404 * can't be (easily/sanely) reached from the driver explicitly. It is
2405 * possible to implicitly make it correct by creating a dummy vdev and
2406 * then deleting it.
2407 */
2408 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2409 status = ath10k_core_reset_rx_filter(ar);
2410 if (status) {
2411 ath10k_err(ar,
2412 "failed to reset rx filter: %d\n", status);
2413 goto err_hif_stop;
2414 }
2415 }
2416
2417 status = ath10k_htt_rx_ring_refill(ar);
2418 if (status) {
2419 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2420 goto err_hif_stop;
2421 }
2422
2423 if (ar->max_num_vdevs >= 64)
2424 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2425 else
2426 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2427
2428 INIT_LIST_HEAD(&ar->arvifs);
2429
2430 /* we don't care about HTT in UTF mode */
2431 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2432 status = ath10k_htt_setup(&ar->htt);
2433 if (status) {
2434 ath10k_err(ar, "failed to setup htt: %d\n", status);
2435 goto err_hif_stop;
2436 }
2437 }
2438
2439 status = ath10k_debug_start(ar);
2440 if (status)
2441 goto err_hif_stop;
2442
2443 return 0;
2444
2445 err_hif_stop:
2446 ath10k_hif_stop(ar);
2447 err_htt_rx_detach:
2448 ath10k_htt_rx_free(&ar->htt);
2449 err_htt_tx_detach:
2450 ath10k_htt_tx_free(&ar->htt);
2451 err_wmi_detach:
2452 ath10k_wmi_detach(ar);
2453 err:
2454 return status;
2455 }
2456 EXPORT_SYMBOL(ath10k_core_start);
2457
ath10k_wait_for_suspend(struct ath10k * ar,u32 suspend_opt)2458 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2459 {
2460 int ret;
2461 unsigned long time_left;
2462
2463 reinit_completion(&ar->target_suspend);
2464
2465 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2466 if (ret) {
2467 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2468 return ret;
2469 }
2470
2471 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2472
2473 if (!time_left) {
2474 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2475 return -ETIMEDOUT;
2476 }
2477
2478 return 0;
2479 }
2480
ath10k_core_stop(struct ath10k * ar)2481 void ath10k_core_stop(struct ath10k *ar)
2482 {
2483 lockdep_assert_held(&ar->conf_mutex);
2484 ath10k_debug_stop(ar);
2485
2486 /* try to suspend target */
2487 if (ar->state != ATH10K_STATE_RESTARTING &&
2488 ar->state != ATH10K_STATE_UTF)
2489 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2490
2491 ath10k_hif_stop(ar);
2492 ath10k_htt_tx_stop(&ar->htt);
2493 ath10k_htt_rx_free(&ar->htt);
2494 ath10k_wmi_detach(ar);
2495 }
2496 EXPORT_SYMBOL(ath10k_core_stop);
2497
2498 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2499 * order to know what hw capabilities should be advertised to mac80211 it is
2500 * necessary to load the firmware (and tear it down immediately since start
2501 * hook will try to init it again) before registering
2502 */
ath10k_core_probe_fw(struct ath10k * ar)2503 static int ath10k_core_probe_fw(struct ath10k *ar)
2504 {
2505 struct bmi_target_info target_info;
2506 int ret = 0;
2507
2508 ret = ath10k_hif_power_up(ar);
2509 if (ret) {
2510 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2511 return ret;
2512 }
2513
2514 switch (ar->hif.bus) {
2515 case ATH10K_BUS_SDIO:
2516 memset(&target_info, 0, sizeof(target_info));
2517 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2518 if (ret) {
2519 ath10k_err(ar, "could not get target info (%d)\n", ret);
2520 goto err_power_down;
2521 }
2522 ar->target_version = target_info.version;
2523 ar->hw->wiphy->hw_version = target_info.version;
2524 break;
2525 case ATH10K_BUS_PCI:
2526 case ATH10K_BUS_AHB:
2527 case ATH10K_BUS_USB:
2528 memset(&target_info, 0, sizeof(target_info));
2529 ret = ath10k_bmi_get_target_info(ar, &target_info);
2530 if (ret) {
2531 ath10k_err(ar, "could not get target info (%d)\n", ret);
2532 goto err_power_down;
2533 }
2534 ar->target_version = target_info.version;
2535 ar->hw->wiphy->hw_version = target_info.version;
2536 break;
2537 case ATH10K_BUS_SNOC:
2538 memset(&target_info, 0, sizeof(target_info));
2539 ret = ath10k_hif_get_target_info(ar, &target_info);
2540 if (ret) {
2541 ath10k_err(ar, "could not get target info (%d)\n", ret);
2542 goto err_power_down;
2543 }
2544 ar->target_version = target_info.version;
2545 ar->hw->wiphy->hw_version = target_info.version;
2546 break;
2547 default:
2548 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2549 }
2550
2551 ret = ath10k_init_hw_params(ar);
2552 if (ret) {
2553 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2554 goto err_power_down;
2555 }
2556
2557 ret = ath10k_core_fetch_firmware_files(ar);
2558 if (ret) {
2559 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2560 goto err_power_down;
2561 }
2562
2563 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2564 sizeof(ar->normal_mode_fw.fw_file.fw_version));
2565 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2566 sizeof(ar->hw->wiphy->fw_version));
2567
2568 ath10k_debug_print_hwfw_info(ar);
2569
2570 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2571 ar->normal_mode_fw.fw_file.fw_features)) {
2572 ret = ath10k_core_pre_cal_download(ar);
2573 if (ret) {
2574 /* pre calibration data download is not necessary
2575 * for all the chipsets. Ignore failures and continue.
2576 */
2577 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2578 "could not load pre cal data: %d\n", ret);
2579 }
2580
2581 ret = ath10k_core_get_board_id_from_otp(ar);
2582 if (ret && ret != -EOPNOTSUPP) {
2583 ath10k_err(ar, "failed to get board id from otp: %d\n",
2584 ret);
2585 goto err_free_firmware_files;
2586 }
2587
2588 ret = ath10k_core_check_smbios(ar);
2589 if (ret)
2590 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
2591
2592 ret = ath10k_core_check_dt(ar);
2593 if (ret)
2594 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
2595
2596 ret = ath10k_core_fetch_board_file(ar);
2597 if (ret) {
2598 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2599 goto err_free_firmware_files;
2600 }
2601
2602 ath10k_debug_print_board_info(ar);
2603 }
2604
2605 ret = ath10k_core_init_firmware_features(ar);
2606 if (ret) {
2607 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2608 ret);
2609 goto err_free_firmware_files;
2610 }
2611
2612 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2613 ar->normal_mode_fw.fw_file.fw_features)) {
2614 ret = ath10k_swap_code_seg_init(ar,
2615 &ar->normal_mode_fw.fw_file);
2616 if (ret) {
2617 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2618 ret);
2619 goto err_free_firmware_files;
2620 }
2621 }
2622
2623 mutex_lock(&ar->conf_mutex);
2624
2625 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2626 &ar->normal_mode_fw);
2627 if (ret) {
2628 ath10k_err(ar, "could not init core (%d)\n", ret);
2629 goto err_unlock;
2630 }
2631
2632 ath10k_debug_print_boot_info(ar);
2633 ath10k_core_stop(ar);
2634
2635 mutex_unlock(&ar->conf_mutex);
2636
2637 ath10k_hif_power_down(ar);
2638 return 0;
2639
2640 err_unlock:
2641 mutex_unlock(&ar->conf_mutex);
2642
2643 err_free_firmware_files:
2644 ath10k_core_free_firmware_files(ar);
2645
2646 err_power_down:
2647 ath10k_hif_power_down(ar);
2648
2649 return ret;
2650 }
2651
ath10k_core_register_work(struct work_struct * work)2652 static void ath10k_core_register_work(struct work_struct *work)
2653 {
2654 struct ath10k *ar = container_of(work, struct ath10k, register_work);
2655 int status;
2656
2657 /* peer stats are enabled by default */
2658 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2659
2660 status = ath10k_core_probe_fw(ar);
2661 if (status) {
2662 ath10k_err(ar, "could not probe fw (%d)\n", status);
2663 goto err;
2664 }
2665
2666 status = ath10k_mac_register(ar);
2667 if (status) {
2668 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2669 goto err_release_fw;
2670 }
2671
2672 status = ath10k_coredump_register(ar);
2673 if (status) {
2674 ath10k_err(ar, "unable to register coredump\n");
2675 goto err_unregister_mac;
2676 }
2677
2678 status = ath10k_debug_register(ar);
2679 if (status) {
2680 ath10k_err(ar, "unable to initialize debugfs\n");
2681 goto err_unregister_coredump;
2682 }
2683
2684 status = ath10k_spectral_create(ar);
2685 if (status) {
2686 ath10k_err(ar, "failed to initialize spectral\n");
2687 goto err_debug_destroy;
2688 }
2689
2690 status = ath10k_thermal_register(ar);
2691 if (status) {
2692 ath10k_err(ar, "could not register thermal device: %d\n",
2693 status);
2694 goto err_spectral_destroy;
2695 }
2696
2697 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2698 return;
2699
2700 err_spectral_destroy:
2701 ath10k_spectral_destroy(ar);
2702 err_debug_destroy:
2703 ath10k_debug_destroy(ar);
2704 err_unregister_coredump:
2705 ath10k_coredump_unregister(ar);
2706 err_unregister_mac:
2707 ath10k_mac_unregister(ar);
2708 err_release_fw:
2709 ath10k_core_free_firmware_files(ar);
2710 err:
2711 /* TODO: It's probably a good idea to release device from the driver
2712 * but calling device_release_driver() here will cause a deadlock.
2713 */
2714 return;
2715 }
2716
ath10k_core_register(struct ath10k * ar,u32 chip_id)2717 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2718 {
2719 ar->chip_id = chip_id;
2720 queue_work(ar->workqueue, &ar->register_work);
2721
2722 return 0;
2723 }
2724 EXPORT_SYMBOL(ath10k_core_register);
2725
ath10k_core_unregister(struct ath10k * ar)2726 void ath10k_core_unregister(struct ath10k *ar)
2727 {
2728 cancel_work_sync(&ar->register_work);
2729
2730 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2731 return;
2732
2733 ath10k_thermal_unregister(ar);
2734 /* Stop spectral before unregistering from mac80211 to remove the
2735 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2736 * would be already be free'd recursively, leading to a double free.
2737 */
2738 ath10k_spectral_destroy(ar);
2739
2740 /* We must unregister from mac80211 before we stop HTC and HIF.
2741 * Otherwise we will fail to submit commands to FW and mac80211 will be
2742 * unhappy about callback failures.
2743 */
2744 ath10k_mac_unregister(ar);
2745
2746 ath10k_testmode_destroy(ar);
2747
2748 ath10k_core_free_firmware_files(ar);
2749 ath10k_core_free_board_files(ar);
2750
2751 ath10k_debug_unregister(ar);
2752 }
2753 EXPORT_SYMBOL(ath10k_core_unregister);
2754
ath10k_core_create(size_t priv_size,struct device * dev,enum ath10k_bus bus,enum ath10k_hw_rev hw_rev,const struct ath10k_hif_ops * hif_ops)2755 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2756 enum ath10k_bus bus,
2757 enum ath10k_hw_rev hw_rev,
2758 const struct ath10k_hif_ops *hif_ops)
2759 {
2760 struct ath10k *ar;
2761 int ret;
2762
2763 ar = ath10k_mac_create(priv_size);
2764 if (!ar)
2765 return NULL;
2766
2767 ar->ath_common.priv = ar;
2768 ar->ath_common.hw = ar->hw;
2769 ar->dev = dev;
2770 ar->hw_rev = hw_rev;
2771 ar->hif.ops = hif_ops;
2772 ar->hif.bus = bus;
2773
2774 switch (hw_rev) {
2775 case ATH10K_HW_QCA988X:
2776 case ATH10K_HW_QCA9887:
2777 ar->regs = &qca988x_regs;
2778 ar->hw_ce_regs = &qcax_ce_regs;
2779 ar->hw_values = &qca988x_values;
2780 break;
2781 case ATH10K_HW_QCA6174:
2782 case ATH10K_HW_QCA9377:
2783 ar->regs = &qca6174_regs;
2784 ar->hw_ce_regs = &qcax_ce_regs;
2785 ar->hw_values = &qca6174_values;
2786 break;
2787 case ATH10K_HW_QCA99X0:
2788 case ATH10K_HW_QCA9984:
2789 ar->regs = &qca99x0_regs;
2790 ar->hw_ce_regs = &qcax_ce_regs;
2791 ar->hw_values = &qca99x0_values;
2792 break;
2793 case ATH10K_HW_QCA9888:
2794 ar->regs = &qca99x0_regs;
2795 ar->hw_ce_regs = &qcax_ce_regs;
2796 ar->hw_values = &qca9888_values;
2797 break;
2798 case ATH10K_HW_QCA4019:
2799 ar->regs = &qca4019_regs;
2800 ar->hw_ce_regs = &qcax_ce_regs;
2801 ar->hw_values = &qca4019_values;
2802 break;
2803 case ATH10K_HW_WCN3990:
2804 ar->regs = &wcn3990_regs;
2805 ar->hw_ce_regs = &wcn3990_ce_regs;
2806 ar->hw_values = &wcn3990_values;
2807 break;
2808 default:
2809 ath10k_err(ar, "unsupported core hardware revision %d\n",
2810 hw_rev);
2811 ret = -ENOTSUPP;
2812 goto err_free_mac;
2813 }
2814
2815 init_completion(&ar->scan.started);
2816 init_completion(&ar->scan.completed);
2817 init_completion(&ar->scan.on_channel);
2818 init_completion(&ar->target_suspend);
2819 init_completion(&ar->wow.wakeup_completed);
2820
2821 init_completion(&ar->install_key_done);
2822 init_completion(&ar->vdev_setup_done);
2823 init_completion(&ar->thermal.wmi_sync);
2824 init_completion(&ar->bss_survey_done);
2825
2826 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2827
2828 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2829 if (!ar->workqueue)
2830 goto err_free_mac;
2831
2832 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2833 if (!ar->workqueue_aux)
2834 goto err_free_wq;
2835
2836 mutex_init(&ar->conf_mutex);
2837 spin_lock_init(&ar->data_lock);
2838 spin_lock_init(&ar->txqs_lock);
2839
2840 INIT_LIST_HEAD(&ar->txqs);
2841 INIT_LIST_HEAD(&ar->peers);
2842 init_waitqueue_head(&ar->peer_mapping_wq);
2843 init_waitqueue_head(&ar->htt.empty_tx_wq);
2844 init_waitqueue_head(&ar->wmi.tx_credits_wq);
2845
2846 init_completion(&ar->offchan_tx_completed);
2847 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2848 skb_queue_head_init(&ar->offchan_tx_queue);
2849
2850 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2851 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2852
2853 INIT_WORK(&ar->register_work, ath10k_core_register_work);
2854 INIT_WORK(&ar->restart_work, ath10k_core_restart);
2855 INIT_WORK(&ar->set_coverage_class_work,
2856 ath10k_core_set_coverage_class_work);
2857
2858 init_dummy_netdev(&ar->napi_dev);
2859
2860 ret = ath10k_coredump_create(ar);
2861 if (ret)
2862 goto err_free_aux_wq;
2863
2864 ret = ath10k_debug_create(ar);
2865 if (ret)
2866 goto err_free_coredump;
2867
2868 return ar;
2869
2870 err_free_coredump:
2871 ath10k_coredump_destroy(ar);
2872
2873 err_free_aux_wq:
2874 destroy_workqueue(ar->workqueue_aux);
2875 err_free_wq:
2876 destroy_workqueue(ar->workqueue);
2877
2878 err_free_mac:
2879 ath10k_mac_destroy(ar);
2880
2881 return NULL;
2882 }
2883 EXPORT_SYMBOL(ath10k_core_create);
2884
ath10k_core_destroy(struct ath10k * ar)2885 void ath10k_core_destroy(struct ath10k *ar)
2886 {
2887 flush_workqueue(ar->workqueue);
2888 destroy_workqueue(ar->workqueue);
2889
2890 flush_workqueue(ar->workqueue_aux);
2891 destroy_workqueue(ar->workqueue_aux);
2892
2893 ath10k_debug_destroy(ar);
2894 ath10k_coredump_destroy(ar);
2895 ath10k_htt_tx_destroy(&ar->htt);
2896 ath10k_wmi_free_host_mem(ar);
2897 ath10k_mac_destroy(ar);
2898 }
2899 EXPORT_SYMBOL(ath10k_core_destroy);
2900
2901 MODULE_AUTHOR("Qualcomm Atheros");
2902 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2903 MODULE_LICENSE("Dual BSD/GPL");
2904
