1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */
7
8 #include "core.h"
9 #include "htc.h"
10 #include "htt.h"
11 #include "txrx.h"
12 #include "debug.h"
13 #include "trace.h"
14 #include "mac.h"
15
16 #include <linux/log2.h>
17 #include <linux/bitfield.h>
18
19 /* when under memory pressure rx ring refill may fail and needs a retry */
20 #define HTT_RX_RING_REFILL_RETRY_MS 50
21
22 #define HTT_RX_RING_REFILL_RESCHED_MS 5
23
24 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
25
26 static struct sk_buff *
ath10k_htt_rx_find_skb_paddr(struct ath10k * ar,u64 paddr)27 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr)
28 {
29 struct ath10k_skb_rxcb *rxcb;
30
31 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
32 if (rxcb->paddr == paddr)
33 return ATH10K_RXCB_SKB(rxcb);
34
35 WARN_ON_ONCE(1);
36 return NULL;
37 }
38
ath10k_htt_rx_ring_free(struct ath10k_htt * htt)39 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
40 {
41 struct sk_buff *skb;
42 struct ath10k_skb_rxcb *rxcb;
43 struct hlist_node *n;
44 int i;
45
46 if (htt->rx_ring.in_ord_rx) {
47 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
48 skb = ATH10K_RXCB_SKB(rxcb);
49 dma_unmap_single(htt->ar->dev, rxcb->paddr,
50 skb->len + skb_tailroom(skb),
51 DMA_FROM_DEVICE);
52 hash_del(&rxcb->hlist);
53 dev_kfree_skb_any(skb);
54 }
55 } else {
56 for (i = 0; i < htt->rx_ring.size; i++) {
57 skb = htt->rx_ring.netbufs_ring[i];
58 if (!skb)
59 continue;
60
61 rxcb = ATH10K_SKB_RXCB(skb);
62 dma_unmap_single(htt->ar->dev, rxcb->paddr,
63 skb->len + skb_tailroom(skb),
64 DMA_FROM_DEVICE);
65 dev_kfree_skb_any(skb);
66 }
67 }
68
69 htt->rx_ring.fill_cnt = 0;
70 hash_init(htt->rx_ring.skb_table);
71 memset(htt->rx_ring.netbufs_ring, 0,
72 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
73 }
74
ath10k_htt_get_rx_ring_size_32(struct ath10k_htt * htt)75 static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt)
76 {
77 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32);
78 }
79
ath10k_htt_get_rx_ring_size_64(struct ath10k_htt * htt)80 static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt)
81 {
82 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64);
83 }
84
ath10k_htt_config_paddrs_ring_32(struct ath10k_htt * htt,void * vaddr)85 static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt,
86 void *vaddr)
87 {
88 htt->rx_ring.paddrs_ring_32 = vaddr;
89 }
90
ath10k_htt_config_paddrs_ring_64(struct ath10k_htt * htt,void * vaddr)91 static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt,
92 void *vaddr)
93 {
94 htt->rx_ring.paddrs_ring_64 = vaddr;
95 }
96
ath10k_htt_set_paddrs_ring_32(struct ath10k_htt * htt,dma_addr_t paddr,int idx)97 static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt,
98 dma_addr_t paddr, int idx)
99 {
100 htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr);
101 }
102
ath10k_htt_set_paddrs_ring_64(struct ath10k_htt * htt,dma_addr_t paddr,int idx)103 static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt,
104 dma_addr_t paddr, int idx)
105 {
106 htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr);
107 }
108
ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt * htt,int idx)109 static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx)
110 {
111 htt->rx_ring.paddrs_ring_32[idx] = 0;
112 }
113
ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt * htt,int idx)114 static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx)
115 {
116 htt->rx_ring.paddrs_ring_64[idx] = 0;
117 }
118
ath10k_htt_get_vaddr_ring_32(struct ath10k_htt * htt)119 static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt)
120 {
121 return (void *)htt->rx_ring.paddrs_ring_32;
122 }
123
ath10k_htt_get_vaddr_ring_64(struct ath10k_htt * htt)124 static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt)
125 {
126 return (void *)htt->rx_ring.paddrs_ring_64;
127 }
128
__ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)129 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
130 {
131 struct htt_rx_desc *rx_desc;
132 struct ath10k_skb_rxcb *rxcb;
133 struct sk_buff *skb;
134 dma_addr_t paddr;
135 int ret = 0, idx;
136
137 /* The Full Rx Reorder firmware has no way of telling the host
138 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
139 * To keep things simple make sure ring is always half empty. This
140 * guarantees there'll be no replenishment overruns possible.
141 */
142 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
143
144 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
145
146 if (idx < 0 || idx >= htt->rx_ring.size) {
147 ath10k_err(htt->ar, "rx ring index is not valid, firmware malfunctioning?\n");
148 idx &= htt->rx_ring.size_mask;
149 ret = -ENOMEM;
150 goto fail;
151 }
152
153 while (num > 0) {
154 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
155 if (!skb) {
156 ret = -ENOMEM;
157 goto fail;
158 }
159
160 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
161 skb_pull(skb,
162 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
163 skb->data);
164
165 /* Clear rx_desc attention word before posting to Rx ring */
166 rx_desc = (struct htt_rx_desc *)skb->data;
167 rx_desc->attention.flags = __cpu_to_le32(0);
168
169 paddr = dma_map_single(htt->ar->dev, skb->data,
170 skb->len + skb_tailroom(skb),
171 DMA_FROM_DEVICE);
172
173 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
174 dev_kfree_skb_any(skb);
175 ret = -ENOMEM;
176 goto fail;
177 }
178
179 rxcb = ATH10K_SKB_RXCB(skb);
180 rxcb->paddr = paddr;
181 htt->rx_ring.netbufs_ring[idx] = skb;
182 ath10k_htt_set_paddrs_ring(htt, paddr, idx);
183 htt->rx_ring.fill_cnt++;
184
185 if (htt->rx_ring.in_ord_rx) {
186 hash_add(htt->rx_ring.skb_table,
187 &ATH10K_SKB_RXCB(skb)->hlist,
188 paddr);
189 }
190
191 num--;
192 idx++;
193 idx &= htt->rx_ring.size_mask;
194 }
195
196 fail:
197 /*
198 * Make sure the rx buffer is updated before available buffer
199 * index to avoid any potential rx ring corruption.
200 */
201 mb();
202 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
203 return ret;
204 }
205
ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)206 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
207 {
208 lockdep_assert_held(&htt->rx_ring.lock);
209 return __ath10k_htt_rx_ring_fill_n(htt, num);
210 }
211
ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt * htt)212 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
213 {
214 int ret, num_deficit, num_to_fill;
215
216 /* Refilling the whole RX ring buffer proves to be a bad idea. The
217 * reason is RX may take up significant amount of CPU cycles and starve
218 * other tasks, e.g. TX on an ethernet device while acting as a bridge
219 * with ath10k wlan interface. This ended up with very poor performance
220 * once CPU the host system was overwhelmed with RX on ath10k.
221 *
222 * By limiting the number of refills the replenishing occurs
223 * progressively. This in turns makes use of the fact tasklets are
224 * processed in FIFO order. This means actual RX processing can starve
225 * out refilling. If there's not enough buffers on RX ring FW will not
226 * report RX until it is refilled with enough buffers. This
227 * automatically balances load wrt to CPU power.
228 *
229 * This probably comes at a cost of lower maximum throughput but
230 * improves the average and stability.
231 */
232 spin_lock_bh(&htt->rx_ring.lock);
233 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
234 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
235 num_deficit -= num_to_fill;
236 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
237 if (ret == -ENOMEM) {
238 /*
239 * Failed to fill it to the desired level -
240 * we'll start a timer and try again next time.
241 * As long as enough buffers are left in the ring for
242 * another A-MPDU rx, no special recovery is needed.
243 */
244 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
245 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
246 } else if (num_deficit > 0) {
247 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
248 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
249 }
250 spin_unlock_bh(&htt->rx_ring.lock);
251 }
252
ath10k_htt_rx_ring_refill_retry(struct timer_list * t)253 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)
254 {
255 struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer);
256
257 ath10k_htt_rx_msdu_buff_replenish(htt);
258 }
259
ath10k_htt_rx_ring_refill(struct ath10k * ar)260 int ath10k_htt_rx_ring_refill(struct ath10k *ar)
261 {
262 struct ath10k_htt *htt = &ar->htt;
263 int ret;
264
265 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
266 return 0;
267
268 spin_lock_bh(&htt->rx_ring.lock);
269 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
270 htt->rx_ring.fill_cnt));
271
272 if (ret)
273 ath10k_htt_rx_ring_free(htt);
274
275 spin_unlock_bh(&htt->rx_ring.lock);
276
277 return ret;
278 }
279
ath10k_htt_rx_free(struct ath10k_htt * htt)280 void ath10k_htt_rx_free(struct ath10k_htt *htt)
281 {
282 if (htt->ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
283 return;
284
285 del_timer_sync(&htt->rx_ring.refill_retry_timer);
286
287 skb_queue_purge(&htt->rx_msdus_q);
288 skb_queue_purge(&htt->rx_in_ord_compl_q);
289 skb_queue_purge(&htt->tx_fetch_ind_q);
290
291 spin_lock_bh(&htt->rx_ring.lock);
292 ath10k_htt_rx_ring_free(htt);
293 spin_unlock_bh(&htt->rx_ring.lock);
294
295 dma_free_coherent(htt->ar->dev,
296 ath10k_htt_get_rx_ring_size(htt),
297 ath10k_htt_get_vaddr_ring(htt),
298 htt->rx_ring.base_paddr);
299
300 dma_free_coherent(htt->ar->dev,
301 sizeof(*htt->rx_ring.alloc_idx.vaddr),
302 htt->rx_ring.alloc_idx.vaddr,
303 htt->rx_ring.alloc_idx.paddr);
304
305 kfree(htt->rx_ring.netbufs_ring);
306 }
307
ath10k_htt_rx_netbuf_pop(struct ath10k_htt * htt)308 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
309 {
310 struct ath10k *ar = htt->ar;
311 int idx;
312 struct sk_buff *msdu;
313
314 lockdep_assert_held(&htt->rx_ring.lock);
315
316 if (htt->rx_ring.fill_cnt == 0) {
317 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
318 return NULL;
319 }
320
321 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
322 msdu = htt->rx_ring.netbufs_ring[idx];
323 htt->rx_ring.netbufs_ring[idx] = NULL;
324 ath10k_htt_reset_paddrs_ring(htt, idx);
325
326 idx++;
327 idx &= htt->rx_ring.size_mask;
328 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
329 htt->rx_ring.fill_cnt--;
330
331 dma_unmap_single(htt->ar->dev,
332 ATH10K_SKB_RXCB(msdu)->paddr,
333 msdu->len + skb_tailroom(msdu),
334 DMA_FROM_DEVICE);
335 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
336 msdu->data, msdu->len + skb_tailroom(msdu));
337
338 return msdu;
339 }
340
341 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
ath10k_htt_rx_amsdu_pop(struct ath10k_htt * htt,struct sk_buff_head * amsdu)342 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
343 struct sk_buff_head *amsdu)
344 {
345 struct ath10k *ar = htt->ar;
346 int msdu_len, msdu_chaining = 0;
347 struct sk_buff *msdu;
348 struct htt_rx_desc *rx_desc;
349
350 lockdep_assert_held(&htt->rx_ring.lock);
351
352 for (;;) {
353 int last_msdu, msdu_len_invalid, msdu_chained;
354
355 msdu = ath10k_htt_rx_netbuf_pop(htt);
356 if (!msdu) {
357 __skb_queue_purge(amsdu);
358 return -ENOENT;
359 }
360
361 __skb_queue_tail(amsdu, msdu);
362
363 rx_desc = (struct htt_rx_desc *)msdu->data;
364
365 /* FIXME: we must report msdu payload since this is what caller
366 * expects now
367 */
368 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
369 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
370
371 /*
372 * Sanity check - confirm the HW is finished filling in the
373 * rx data.
374 * If the HW and SW are working correctly, then it's guaranteed
375 * that the HW's MAC DMA is done before this point in the SW.
376 * To prevent the case that we handle a stale Rx descriptor,
377 * just assert for now until we have a way to recover.
378 */
379 if (!(__le32_to_cpu(rx_desc->attention.flags)
380 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
381 __skb_queue_purge(amsdu);
382 return -EIO;
383 }
384
385 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
386 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
387 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
388 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
389 RX_MSDU_START_INFO0_MSDU_LENGTH);
390 msdu_chained = rx_desc->frag_info.ring2_more_count;
391
392 if (msdu_len_invalid)
393 msdu_len = 0;
394
395 skb_trim(msdu, 0);
396 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
397 msdu_len -= msdu->len;
398
399 /* Note: Chained buffers do not contain rx descriptor */
400 while (msdu_chained--) {
401 msdu = ath10k_htt_rx_netbuf_pop(htt);
402 if (!msdu) {
403 __skb_queue_purge(amsdu);
404 return -ENOENT;
405 }
406
407 __skb_queue_tail(amsdu, msdu);
408 skb_trim(msdu, 0);
409 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
410 msdu_len -= msdu->len;
411 msdu_chaining = 1;
412 }
413
414 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
415 RX_MSDU_END_INFO0_LAST_MSDU;
416
417 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
418 sizeof(*rx_desc) - sizeof(u32));
419
420 if (last_msdu)
421 break;
422 }
423
424 if (skb_queue_empty(amsdu))
425 msdu_chaining = -1;
426
427 /*
428 * Don't refill the ring yet.
429 *
430 * First, the elements popped here are still in use - it is not
431 * safe to overwrite them until the matching call to
432 * mpdu_desc_list_next. Second, for efficiency it is preferable to
433 * refill the rx ring with 1 PPDU's worth of rx buffers (something
434 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
435 * (something like 3 buffers). Consequently, we'll rely on the txrx
436 * SW to tell us when it is done pulling all the PPDU's rx buffers
437 * out of the rx ring, and then refill it just once.
438 */
439
440 return msdu_chaining;
441 }
442
ath10k_htt_rx_pop_paddr(struct ath10k_htt * htt,u64 paddr)443 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
444 u64 paddr)
445 {
446 struct ath10k *ar = htt->ar;
447 struct ath10k_skb_rxcb *rxcb;
448 struct sk_buff *msdu;
449
450 lockdep_assert_held(&htt->rx_ring.lock);
451
452 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
453 if (!msdu)
454 return NULL;
455
456 rxcb = ATH10K_SKB_RXCB(msdu);
457 hash_del(&rxcb->hlist);
458 htt->rx_ring.fill_cnt--;
459
460 dma_unmap_single(htt->ar->dev, rxcb->paddr,
461 msdu->len + skb_tailroom(msdu),
462 DMA_FROM_DEVICE);
463 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
464 msdu->data, msdu->len + skb_tailroom(msdu));
465
466 return msdu;
467 }
468
ath10k_htt_append_frag_list(struct sk_buff * skb_head,struct sk_buff * frag_list,unsigned int frag_len)469 static inline void ath10k_htt_append_frag_list(struct sk_buff *skb_head,
470 struct sk_buff *frag_list,
471 unsigned int frag_len)
472 {
473 skb_shinfo(skb_head)->frag_list = frag_list;
474 skb_head->data_len = frag_len;
475 skb_head->len += skb_head->data_len;
476 }
477
ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt * htt,struct sk_buff * msdu,struct htt_rx_in_ord_msdu_desc ** msdu_desc)478 static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt,
479 struct sk_buff *msdu,
480 struct htt_rx_in_ord_msdu_desc **msdu_desc)
481 {
482 struct ath10k *ar = htt->ar;
483 u32 paddr;
484 struct sk_buff *frag_buf;
485 struct sk_buff *prev_frag_buf;
486 u8 last_frag;
487 struct htt_rx_in_ord_msdu_desc *ind_desc = *msdu_desc;
488 struct htt_rx_desc *rxd;
489 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
490
491 rxd = (void *)msdu->data;
492 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
493
494 skb_put(msdu, sizeof(struct htt_rx_desc));
495 skb_pull(msdu, sizeof(struct htt_rx_desc));
496 skb_put(msdu, min(amsdu_len, HTT_RX_MSDU_SIZE));
497 amsdu_len -= msdu->len;
498
499 last_frag = ind_desc->reserved;
500 if (last_frag) {
501 if (amsdu_len) {
502 ath10k_warn(ar, "invalid amsdu len %u, left %d",
503 __le16_to_cpu(ind_desc->msdu_len),
504 amsdu_len);
505 }
506 return 0;
507 }
508
509 ind_desc++;
510 paddr = __le32_to_cpu(ind_desc->msdu_paddr);
511 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
512 if (!frag_buf) {
513 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%x", paddr);
514 return -ENOENT;
515 }
516
517 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
518 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
519
520 amsdu_len -= frag_buf->len;
521 prev_frag_buf = frag_buf;
522 last_frag = ind_desc->reserved;
523 while (!last_frag) {
524 ind_desc++;
525 paddr = __le32_to_cpu(ind_desc->msdu_paddr);
526 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
527 if (!frag_buf) {
528 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%x",
529 paddr);
530 prev_frag_buf->next = NULL;
531 return -ENOENT;
532 }
533
534 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
535 last_frag = ind_desc->reserved;
536 amsdu_len -= frag_buf->len;
537
538 prev_frag_buf->next = frag_buf;
539 prev_frag_buf = frag_buf;
540 }
541
542 if (amsdu_len) {
543 ath10k_warn(ar, "invalid amsdu len %u, left %d",
544 __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
545 }
546
547 *msdu_desc = ind_desc;
548
549 prev_frag_buf->next = NULL;
550 return 0;
551 }
552
553 static int
ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt * htt,struct sk_buff * msdu,struct htt_rx_in_ord_msdu_desc_ext ** msdu_desc)554 ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt,
555 struct sk_buff *msdu,
556 struct htt_rx_in_ord_msdu_desc_ext **msdu_desc)
557 {
558 struct ath10k *ar = htt->ar;
559 u64 paddr;
560 struct sk_buff *frag_buf;
561 struct sk_buff *prev_frag_buf;
562 u8 last_frag;
563 struct htt_rx_in_ord_msdu_desc_ext *ind_desc = *msdu_desc;
564 struct htt_rx_desc *rxd;
565 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
566
567 rxd = (void *)msdu->data;
568 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
569
570 skb_put(msdu, sizeof(struct htt_rx_desc));
571 skb_pull(msdu, sizeof(struct htt_rx_desc));
572 skb_put(msdu, min(amsdu_len, HTT_RX_MSDU_SIZE));
573 amsdu_len -= msdu->len;
574
575 last_frag = ind_desc->reserved;
576 if (last_frag) {
577 if (amsdu_len) {
578 ath10k_warn(ar, "invalid amsdu len %u, left %d",
579 __le16_to_cpu(ind_desc->msdu_len),
580 amsdu_len);
581 }
582 return 0;
583 }
584
585 ind_desc++;
586 paddr = __le64_to_cpu(ind_desc->msdu_paddr);
587 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
588 if (!frag_buf) {
589 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%llx", paddr);
590 return -ENOENT;
591 }
592
593 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
594 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
595
596 amsdu_len -= frag_buf->len;
597 prev_frag_buf = frag_buf;
598 last_frag = ind_desc->reserved;
599 while (!last_frag) {
600 ind_desc++;
601 paddr = __le64_to_cpu(ind_desc->msdu_paddr);
602 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
603 if (!frag_buf) {
604 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%llx",
605 paddr);
606 prev_frag_buf->next = NULL;
607 return -ENOENT;
608 }
609
610 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
611 last_frag = ind_desc->reserved;
612 amsdu_len -= frag_buf->len;
613
614 prev_frag_buf->next = frag_buf;
615 prev_frag_buf = frag_buf;
616 }
617
618 if (amsdu_len) {
619 ath10k_warn(ar, "invalid amsdu len %u, left %d",
620 __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
621 }
622
623 *msdu_desc = ind_desc;
624
625 prev_frag_buf->next = NULL;
626 return 0;
627 }
628
ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)629 static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt,
630 struct htt_rx_in_ord_ind *ev,
631 struct sk_buff_head *list)
632 {
633 struct ath10k *ar = htt->ar;
634 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32;
635 struct htt_rx_desc *rxd;
636 struct sk_buff *msdu;
637 int msdu_count, ret;
638 bool is_offload;
639 u32 paddr;
640
641 lockdep_assert_held(&htt->rx_ring.lock);
642
643 msdu_count = __le16_to_cpu(ev->msdu_count);
644 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
645
646 while (msdu_count--) {
647 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
648
649 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
650 if (!msdu) {
651 __skb_queue_purge(list);
652 return -ENOENT;
653 }
654
655 if (!is_offload && ar->monitor_arvif) {
656 ret = ath10k_htt_rx_handle_amsdu_mon_32(htt, msdu,
657 &msdu_desc);
658 if (ret) {
659 __skb_queue_purge(list);
660 return ret;
661 }
662 __skb_queue_tail(list, msdu);
663 msdu_desc++;
664 continue;
665 }
666
667 __skb_queue_tail(list, msdu);
668
669 if (!is_offload) {
670 rxd = (void *)msdu->data;
671
672 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
673
674 skb_put(msdu, sizeof(*rxd));
675 skb_pull(msdu, sizeof(*rxd));
676 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
677
678 if (!(__le32_to_cpu(rxd->attention.flags) &
679 RX_ATTENTION_FLAGS_MSDU_DONE)) {
680 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
681 return -EIO;
682 }
683 }
684
685 msdu_desc++;
686 }
687
688 return 0;
689 }
690
ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)691 static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt,
692 struct htt_rx_in_ord_ind *ev,
693 struct sk_buff_head *list)
694 {
695 struct ath10k *ar = htt->ar;
696 struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64;
697 struct htt_rx_desc *rxd;
698 struct sk_buff *msdu;
699 int msdu_count, ret;
700 bool is_offload;
701 u64 paddr;
702
703 lockdep_assert_held(&htt->rx_ring.lock);
704
705 msdu_count = __le16_to_cpu(ev->msdu_count);
706 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
707
708 while (msdu_count--) {
709 paddr = __le64_to_cpu(msdu_desc->msdu_paddr);
710 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
711 if (!msdu) {
712 __skb_queue_purge(list);
713 return -ENOENT;
714 }
715
716 if (!is_offload && ar->monitor_arvif) {
717 ret = ath10k_htt_rx_handle_amsdu_mon_64(htt, msdu,
718 &msdu_desc);
719 if (ret) {
720 __skb_queue_purge(list);
721 return ret;
722 }
723 __skb_queue_tail(list, msdu);
724 msdu_desc++;
725 continue;
726 }
727
728 __skb_queue_tail(list, msdu);
729
730 if (!is_offload) {
731 rxd = (void *)msdu->data;
732
733 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
734
735 skb_put(msdu, sizeof(*rxd));
736 skb_pull(msdu, sizeof(*rxd));
737 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
738
739 if (!(__le32_to_cpu(rxd->attention.flags) &
740 RX_ATTENTION_FLAGS_MSDU_DONE)) {
741 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
742 return -EIO;
743 }
744 }
745
746 msdu_desc++;
747 }
748
749 return 0;
750 }
751
ath10k_htt_rx_alloc(struct ath10k_htt * htt)752 int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
753 {
754 struct ath10k *ar = htt->ar;
755 dma_addr_t paddr;
756 void *vaddr, *vaddr_ring;
757 size_t size;
758 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
759
760 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
761 return 0;
762
763 htt->rx_confused = false;
764
765 /* XXX: The fill level could be changed during runtime in response to
766 * the host processing latency. Is this really worth it?
767 */
768 htt->rx_ring.size = HTT_RX_RING_SIZE;
769 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
770 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;
771
772 if (!is_power_of_2(htt->rx_ring.size)) {
773 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
774 return -EINVAL;
775 }
776
777 htt->rx_ring.netbufs_ring =
778 kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *),
779 GFP_KERNEL);
780 if (!htt->rx_ring.netbufs_ring)
781 goto err_netbuf;
782
783 size = ath10k_htt_get_rx_ring_size(htt);
784
785 vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
786 if (!vaddr_ring)
787 goto err_dma_ring;
788
789 ath10k_htt_config_paddrs_ring(htt, vaddr_ring);
790 htt->rx_ring.base_paddr = paddr;
791
792 vaddr = dma_alloc_coherent(htt->ar->dev,
793 sizeof(*htt->rx_ring.alloc_idx.vaddr),
794 &paddr, GFP_KERNEL);
795 if (!vaddr)
796 goto err_dma_idx;
797
798 htt->rx_ring.alloc_idx.vaddr = vaddr;
799 htt->rx_ring.alloc_idx.paddr = paddr;
800 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
801 *htt->rx_ring.alloc_idx.vaddr = 0;
802
803 /* Initialize the Rx refill retry timer */
804 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0);
805
806 spin_lock_init(&htt->rx_ring.lock);
807
808 htt->rx_ring.fill_cnt = 0;
809 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
810 hash_init(htt->rx_ring.skb_table);
811
812 skb_queue_head_init(&htt->rx_msdus_q);
813 skb_queue_head_init(&htt->rx_in_ord_compl_q);
814 skb_queue_head_init(&htt->tx_fetch_ind_q);
815 atomic_set(&htt->num_mpdus_ready, 0);
816
817 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
818 htt->rx_ring.size, htt->rx_ring.fill_level);
819 return 0;
820
821 err_dma_idx:
822 dma_free_coherent(htt->ar->dev,
823 ath10k_htt_get_rx_ring_size(htt),
824 vaddr_ring,
825 htt->rx_ring.base_paddr);
826 err_dma_ring:
827 kfree(htt->rx_ring.netbufs_ring);
828 err_netbuf:
829 return -ENOMEM;
830 }
831
ath10k_htt_rx_crypto_param_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)832 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
833 enum htt_rx_mpdu_encrypt_type type)
834 {
835 switch (type) {
836 case HTT_RX_MPDU_ENCRYPT_NONE:
837 return 0;
838 case HTT_RX_MPDU_ENCRYPT_WEP40:
839 case HTT_RX_MPDU_ENCRYPT_WEP104:
840 return IEEE80211_WEP_IV_LEN;
841 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
842 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
843 return IEEE80211_TKIP_IV_LEN;
844 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
845 return IEEE80211_CCMP_HDR_LEN;
846 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
847 return IEEE80211_CCMP_256_HDR_LEN;
848 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
849 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
850 return IEEE80211_GCMP_HDR_LEN;
851 case HTT_RX_MPDU_ENCRYPT_WEP128:
852 case HTT_RX_MPDU_ENCRYPT_WAPI:
853 break;
854 }
855
856 ath10k_warn(ar, "unsupported encryption type %d\n", type);
857 return 0;
858 }
859
860 #define MICHAEL_MIC_LEN 8
861
ath10k_htt_rx_crypto_mic_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)862 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar,
863 enum htt_rx_mpdu_encrypt_type type)
864 {
865 switch (type) {
866 case HTT_RX_MPDU_ENCRYPT_NONE:
867 case HTT_RX_MPDU_ENCRYPT_WEP40:
868 case HTT_RX_MPDU_ENCRYPT_WEP104:
869 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
870 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
871 return 0;
872 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
873 return IEEE80211_CCMP_MIC_LEN;
874 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
875 return IEEE80211_CCMP_256_MIC_LEN;
876 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
877 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
878 return IEEE80211_GCMP_MIC_LEN;
879 case HTT_RX_MPDU_ENCRYPT_WEP128:
880 case HTT_RX_MPDU_ENCRYPT_WAPI:
881 break;
882 }
883
884 ath10k_warn(ar, "unsupported encryption type %d\n", type);
885 return 0;
886 }
887
ath10k_htt_rx_crypto_icv_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)888 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar,
889 enum htt_rx_mpdu_encrypt_type type)
890 {
891 switch (type) {
892 case HTT_RX_MPDU_ENCRYPT_NONE:
893 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
894 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
895 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
896 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
897 return 0;
898 case HTT_RX_MPDU_ENCRYPT_WEP40:
899 case HTT_RX_MPDU_ENCRYPT_WEP104:
900 return IEEE80211_WEP_ICV_LEN;
901 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
902 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
903 return IEEE80211_TKIP_ICV_LEN;
904 case HTT_RX_MPDU_ENCRYPT_WEP128:
905 case HTT_RX_MPDU_ENCRYPT_WAPI:
906 break;
907 }
908
909 ath10k_warn(ar, "unsupported encryption type %d\n", type);
910 return 0;
911 }
912
913 struct amsdu_subframe_hdr {
914 u8 dst[ETH_ALEN];
915 u8 src[ETH_ALEN];
916 __be16 len;
917 } __packed;
918
919 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
920
ath10k_bw_to_mac80211_bw(u8 bw)921 static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
922 {
923 u8 ret = 0;
924
925 switch (bw) {
926 case 0:
927 ret = RATE_INFO_BW_20;
928 break;
929 case 1:
930 ret = RATE_INFO_BW_40;
931 break;
932 case 2:
933 ret = RATE_INFO_BW_80;
934 break;
935 case 3:
936 ret = RATE_INFO_BW_160;
937 break;
938 }
939
940 return ret;
941 }
942
ath10k_htt_rx_h_rates(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)943 static void ath10k_htt_rx_h_rates(struct ath10k *ar,
944 struct ieee80211_rx_status *status,
945 struct htt_rx_desc *rxd)
946 {
947 struct ieee80211_supported_band *sband;
948 u8 cck, rate, bw, sgi, mcs, nss;
949 u8 preamble = 0;
950 u8 group_id;
951 u32 info1, info2, info3;
952 u32 stbc, nsts_su;
953
954 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
955 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
956 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
957
958 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
959
960 switch (preamble) {
961 case HTT_RX_LEGACY:
962 /* To get legacy rate index band is required. Since band can't
963 * be undefined check if freq is non-zero.
964 */
965 if (!status->freq)
966 return;
967
968 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
969 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
970 rate &= ~RX_PPDU_START_RATE_FLAG;
971
972 sband = &ar->mac.sbands[status->band];
973 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
974 break;
975 case HTT_RX_HT:
976 case HTT_RX_HT_WITH_TXBF:
977 /* HT-SIG - Table 20-11 in info2 and info3 */
978 mcs = info2 & 0x1F;
979 nss = mcs >> 3;
980 bw = (info2 >> 7) & 1;
981 sgi = (info3 >> 7) & 1;
982
983 status->rate_idx = mcs;
984 status->encoding = RX_ENC_HT;
985 if (sgi)
986 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
987 if (bw)
988 status->bw = RATE_INFO_BW_40;
989 break;
990 case HTT_RX_VHT:
991 case HTT_RX_VHT_WITH_TXBF:
992 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
993 * TODO check this
994 */
995 bw = info2 & 3;
996 sgi = info3 & 1;
997 stbc = (info2 >> 3) & 1;
998 group_id = (info2 >> 4) & 0x3F;
999
1000 if (GROUP_ID_IS_SU_MIMO(group_id)) {
1001 mcs = (info3 >> 4) & 0x0F;
1002 nsts_su = ((info2 >> 10) & 0x07);
1003 if (stbc)
1004 nss = (nsts_su >> 2) + 1;
1005 else
1006 nss = (nsts_su + 1);
1007 } else {
1008 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
1009 * so it's impossible to decode MCS. Also since
1010 * firmware consumes Group Id Management frames host
1011 * has no knowledge regarding group/user position
1012 * mapping so it's impossible to pick the correct Nsts
1013 * from VHT-SIG-A1.
1014 *
1015 * Bandwidth and SGI are valid so report the rateinfo
1016 * on best-effort basis.
1017 */
1018 mcs = 0;
1019 nss = 1;
1020 }
1021
1022 if (mcs > 0x09) {
1023 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
1024 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
1025 __le32_to_cpu(rxd->attention.flags),
1026 __le32_to_cpu(rxd->mpdu_start.info0),
1027 __le32_to_cpu(rxd->mpdu_start.info1),
1028 __le32_to_cpu(rxd->msdu_start.common.info0),
1029 __le32_to_cpu(rxd->msdu_start.common.info1),
1030 rxd->ppdu_start.info0,
1031 __le32_to_cpu(rxd->ppdu_start.info1),
1032 __le32_to_cpu(rxd->ppdu_start.info2),
1033 __le32_to_cpu(rxd->ppdu_start.info3),
1034 __le32_to_cpu(rxd->ppdu_start.info4));
1035
1036 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
1037 __le32_to_cpu(rxd->msdu_end.common.info0),
1038 __le32_to_cpu(rxd->mpdu_end.info0));
1039
1040 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
1041 "rx desc msdu payload: ",
1042 rxd->msdu_payload, 50);
1043 }
1044
1045 status->rate_idx = mcs;
1046 status->nss = nss;
1047
1048 if (sgi)
1049 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1050
1051 status->bw = ath10k_bw_to_mac80211_bw(bw);
1052 status->encoding = RX_ENC_VHT;
1053 break;
1054 default:
1055 break;
1056 }
1057 }
1058
1059 static struct ieee80211_channel *
ath10k_htt_rx_h_peer_channel(struct ath10k * ar,struct htt_rx_desc * rxd)1060 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
1061 {
1062 struct ath10k_peer *peer;
1063 struct ath10k_vif *arvif;
1064 struct cfg80211_chan_def def;
1065 u16 peer_id;
1066
1067 lockdep_assert_held(&ar->data_lock);
1068
1069 if (!rxd)
1070 return NULL;
1071
1072 if (rxd->attention.flags &
1073 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
1074 return NULL;
1075
1076 if (!(rxd->msdu_end.common.info0 &
1077 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
1078 return NULL;
1079
1080 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1081 RX_MPDU_START_INFO0_PEER_IDX);
1082
1083 peer = ath10k_peer_find_by_id(ar, peer_id);
1084 if (!peer)
1085 return NULL;
1086
1087 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1088 if (WARN_ON_ONCE(!arvif))
1089 return NULL;
1090
1091 if (ath10k_mac_vif_chan(arvif->vif, &def))
1092 return NULL;
1093
1094 return def.chan;
1095 }
1096
1097 static struct ieee80211_channel *
ath10k_htt_rx_h_vdev_channel(struct ath10k * ar,u32 vdev_id)1098 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
1099 {
1100 struct ath10k_vif *arvif;
1101 struct cfg80211_chan_def def;
1102
1103 lockdep_assert_held(&ar->data_lock);
1104
1105 list_for_each_entry(arvif, &ar->arvifs, list) {
1106 if (arvif->vdev_id == vdev_id &&
1107 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
1108 return def.chan;
1109 }
1110
1111 return NULL;
1112 }
1113
1114 static void
ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw * hw,struct ieee80211_chanctx_conf * conf,void * data)1115 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
1116 struct ieee80211_chanctx_conf *conf,
1117 void *data)
1118 {
1119 struct cfg80211_chan_def *def = data;
1120
1121 *def = conf->def;
1122 }
1123
1124 static struct ieee80211_channel *
ath10k_htt_rx_h_any_channel(struct ath10k * ar)1125 ath10k_htt_rx_h_any_channel(struct ath10k *ar)
1126 {
1127 struct cfg80211_chan_def def = {};
1128
1129 ieee80211_iter_chan_contexts_atomic(ar->hw,
1130 ath10k_htt_rx_h_any_chan_iter,
1131 &def);
1132
1133 return def.chan;
1134 }
1135
ath10k_htt_rx_h_channel(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd,u32 vdev_id)1136 static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
1137 struct ieee80211_rx_status *status,
1138 struct htt_rx_desc *rxd,
1139 u32 vdev_id)
1140 {
1141 struct ieee80211_channel *ch;
1142
1143 spin_lock_bh(&ar->data_lock);
1144 ch = ar->scan_channel;
1145 if (!ch)
1146 ch = ar->rx_channel;
1147 if (!ch)
1148 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
1149 if (!ch)
1150 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
1151 if (!ch)
1152 ch = ath10k_htt_rx_h_any_channel(ar);
1153 if (!ch)
1154 ch = ar->tgt_oper_chan;
1155 spin_unlock_bh(&ar->data_lock);
1156
1157 if (!ch)
1158 return false;
1159
1160 status->band = ch->band;
1161 status->freq = ch->center_freq;
1162
1163 return true;
1164 }
1165
ath10k_htt_rx_h_signal(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)1166 static void ath10k_htt_rx_h_signal(struct ath10k *ar,
1167 struct ieee80211_rx_status *status,
1168 struct htt_rx_desc *rxd)
1169 {
1170 int i;
1171
1172 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) {
1173 status->chains &= ~BIT(i);
1174
1175 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) {
1176 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR +
1177 rxd->ppdu_start.rssi_chains[i].pri20_mhz;
1178
1179 status->chains |= BIT(i);
1180 }
1181 }
1182
1183 /* FIXME: Get real NF */
1184 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1185 rxd->ppdu_start.rssi_comb;
1186 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
1187 }
1188
ath10k_htt_rx_h_mactime(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)1189 static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
1190 struct ieee80211_rx_status *status,
1191 struct htt_rx_desc *rxd)
1192 {
1193 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
1194 * means all prior MSDUs in a PPDU are reported to mac80211 without the
1195 * TSF. Is it worth holding frames until end of PPDU is known?
1196 *
1197 * FIXME: Can we get/compute 64bit TSF?
1198 */
1199 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
1200 status->flag |= RX_FLAG_MACTIME_END;
1201 }
1202
ath10k_htt_rx_h_ppdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,u32 vdev_id)1203 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
1204 struct sk_buff_head *amsdu,
1205 struct ieee80211_rx_status *status,
1206 u32 vdev_id)
1207 {
1208 struct sk_buff *first;
1209 struct htt_rx_desc *rxd;
1210 bool is_first_ppdu;
1211 bool is_last_ppdu;
1212
1213 if (skb_queue_empty(amsdu))
1214 return;
1215
1216 first = skb_peek(amsdu);
1217 rxd = (void *)first->data - sizeof(*rxd);
1218
1219 is_first_ppdu = !!(rxd->attention.flags &
1220 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
1221 is_last_ppdu = !!(rxd->attention.flags &
1222 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
1223
1224 if (is_first_ppdu) {
1225 /* New PPDU starts so clear out the old per-PPDU status. */
1226 status->freq = 0;
1227 status->rate_idx = 0;
1228 status->nss = 0;
1229 status->encoding = RX_ENC_LEGACY;
1230 status->bw = RATE_INFO_BW_20;
1231
1232 status->flag &= ~RX_FLAG_MACTIME_END;
1233 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1234
1235 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
1236 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
1237 status->ampdu_reference = ar->ampdu_reference;
1238
1239 ath10k_htt_rx_h_signal(ar, status, rxd);
1240 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
1241 ath10k_htt_rx_h_rates(ar, status, rxd);
1242 }
1243
1244 if (is_last_ppdu) {
1245 ath10k_htt_rx_h_mactime(ar, status, rxd);
1246
1247 /* set ampdu last segment flag */
1248 status->flag |= RX_FLAG_AMPDU_IS_LAST;
1249 ar->ampdu_reference++;
1250 }
1251 }
1252
1253 static const char * const tid_to_ac[] = {
1254 "BE",
1255 "BK",
1256 "BK",
1257 "BE",
1258 "VI",
1259 "VI",
1260 "VO",
1261 "VO",
1262 };
1263
ath10k_get_tid(struct ieee80211_hdr * hdr,char * out,size_t size)1264 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
1265 {
1266 u8 *qc;
1267 int tid;
1268
1269 if (!ieee80211_is_data_qos(hdr->frame_control))
1270 return "";
1271
1272 qc = ieee80211_get_qos_ctl(hdr);
1273 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
1274 if (tid < 8)
1275 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
1276 else
1277 snprintf(out, size, "tid %d", tid);
1278
1279 return out;
1280 }
1281
ath10k_htt_rx_h_queue_msdu(struct ath10k * ar,struct ieee80211_rx_status * rx_status,struct sk_buff * skb)1282 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar,
1283 struct ieee80211_rx_status *rx_status,
1284 struct sk_buff *skb)
1285 {
1286 struct ieee80211_rx_status *status;
1287
1288 status = IEEE80211_SKB_RXCB(skb);
1289 *status = *rx_status;
1290
1291 skb_queue_tail(&ar->htt.rx_msdus_q, skb);
1292 }
1293
ath10k_process_rx(struct ath10k * ar,struct sk_buff * skb)1294 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)
1295 {
1296 struct ieee80211_rx_status *status;
1297 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1298 char tid[32];
1299
1300 status = IEEE80211_SKB_RXCB(skb);
1301
1302 if (!(ar->filter_flags & FIF_FCSFAIL) &&
1303 status->flag & RX_FLAG_FAILED_FCS_CRC) {
1304 ar->stats.rx_crc_err_drop++;
1305 dev_kfree_skb_any(skb);
1306 return;
1307 }
1308
1309 ath10k_dbg(ar, ATH10K_DBG_DATA,
1310 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
1311 skb,
1312 skb->len,
1313 ieee80211_get_SA(hdr),
1314 ath10k_get_tid(hdr, tid, sizeof(tid)),
1315 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
1316 "mcast" : "ucast",
1317 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
1318 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
1319 (status->encoding == RX_ENC_HT) ? "ht" : "",
1320 (status->encoding == RX_ENC_VHT) ? "vht" : "",
1321 (status->bw == RATE_INFO_BW_40) ? "40" : "",
1322 (status->bw == RATE_INFO_BW_80) ? "80" : "",
1323 (status->bw == RATE_INFO_BW_160) ? "160" : "",
1324 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
1325 status->rate_idx,
1326 status->nss,
1327 status->freq,
1328 status->band, status->flag,
1329 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
1330 !!(status->flag & RX_FLAG_MMIC_ERROR),
1331 !!(status->flag & RX_FLAG_AMSDU_MORE));
1332 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
1333 skb->data, skb->len);
1334 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1335 trace_ath10k_rx_payload(ar, skb->data, skb->len);
1336
1337 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
1338 }
1339
ath10k_htt_rx_nwifi_hdrlen(struct ath10k * ar,struct ieee80211_hdr * hdr)1340 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1341 struct ieee80211_hdr *hdr)
1342 {
1343 int len = ieee80211_hdrlen(hdr->frame_control);
1344
1345 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1346 ar->running_fw->fw_file.fw_features))
1347 len = round_up(len, 4);
1348
1349 return len;
1350 }
1351
ath10k_htt_rx_h_undecap_raw(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted,const u8 first_hdr[64])1352 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1353 struct sk_buff *msdu,
1354 struct ieee80211_rx_status *status,
1355 enum htt_rx_mpdu_encrypt_type enctype,
1356 bool is_decrypted,
1357 const u8 first_hdr[64])
1358 {
1359 struct ieee80211_hdr *hdr;
1360 struct htt_rx_desc *rxd;
1361 size_t hdr_len;
1362 size_t crypto_len;
1363 bool is_first;
1364 bool is_last;
1365 bool msdu_limit_err;
1366 int bytes_aligned = ar->hw_params.decap_align_bytes;
1367 u8 *qos;
1368
1369 rxd = (void *)msdu->data - sizeof(*rxd);
1370 is_first = !!(rxd->msdu_end.common.info0 &
1371 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1372 is_last = !!(rxd->msdu_end.common.info0 &
1373 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1374
1375 /* Delivered decapped frame:
1376 * [802.11 header]
1377 * [crypto param] <-- can be trimmed if !fcs_err &&
1378 * !decrypt_err && !peer_idx_invalid
1379 * [amsdu header] <-- only if A-MSDU
1380 * [rfc1042/llc]
1381 * [payload]
1382 * [FCS] <-- at end, needs to be trimmed
1383 */
1384
1385 /* Some hardwares(QCA99x0 variants) limit number of msdus in a-msdu when
1386 * deaggregate, so that unwanted MSDU-deaggregation is avoided for
1387 * error packets. If limit exceeds, hw sends all remaining MSDUs as
1388 * a single last MSDU with this msdu limit error set.
1389 */
1390 msdu_limit_err = ath10k_rx_desc_msdu_limit_error(&ar->hw_params, rxd);
1391
1392 /* If MSDU limit error happens, then don't warn on, the partial raw MSDU
1393 * without first MSDU is expected in that case, and handled later here.
1394 */
1395 /* This probably shouldn't happen but warn just in case */
1396 if (WARN_ON_ONCE(!is_first && !msdu_limit_err))
1397 return;
1398
1399 /* This probably shouldn't happen but warn just in case */
1400 if (WARN_ON_ONCE(!(is_first && is_last) && !msdu_limit_err))
1401 return;
1402
1403 skb_trim(msdu, msdu->len - FCS_LEN);
1404
1405 /* Push original 80211 header */
1406 if (unlikely(msdu_limit_err)) {
1407 hdr = (struct ieee80211_hdr *)first_hdr;
1408 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1409 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1410
1411 if (ieee80211_is_data_qos(hdr->frame_control)) {
1412 qos = ieee80211_get_qos_ctl(hdr);
1413 qos[0] |= IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1414 }
1415
1416 if (crypto_len)
1417 memcpy(skb_push(msdu, crypto_len),
1418 (void *)hdr + round_up(hdr_len, bytes_aligned),
1419 crypto_len);
1420
1421 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1422 }
1423
1424 /* In most cases this will be true for sniffed frames. It makes sense
1425 * to deliver them as-is without stripping the crypto param. This is
1426 * necessary for software based decryption.
1427 *
1428 * If there's no error then the frame is decrypted. At least that is
1429 * the case for frames that come in via fragmented rx indication.
1430 */
1431 if (!is_decrypted)
1432 return;
1433
1434 /* The payload is decrypted so strip crypto params. Start from tail
1435 * since hdr is used to compute some stuff.
1436 */
1437
1438 hdr = (void *)msdu->data;
1439
1440 /* Tail */
1441 if (status->flag & RX_FLAG_IV_STRIPPED) {
1442 skb_trim(msdu, msdu->len -
1443 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1444
1445 skb_trim(msdu, msdu->len -
1446 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1447 } else {
1448 /* MIC */
1449 if (status->flag & RX_FLAG_MIC_STRIPPED)
1450 skb_trim(msdu, msdu->len -
1451 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1452
1453 /* ICV */
1454 if (status->flag & RX_FLAG_ICV_STRIPPED)
1455 skb_trim(msdu, msdu->len -
1456 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1457 }
1458
1459 /* MMIC */
1460 if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
1461 !ieee80211_has_morefrags(hdr->frame_control) &&
1462 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1463 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN);
1464
1465 /* Head */
1466 if (status->flag & RX_FLAG_IV_STRIPPED) {
1467 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1468 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1469
1470 memmove((void *)msdu->data + crypto_len,
1471 (void *)msdu->data, hdr_len);
1472 skb_pull(msdu, crypto_len);
1473 }
1474 }
1475
ath10k_htt_rx_h_undecap_nwifi(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1476 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1477 struct sk_buff *msdu,
1478 struct ieee80211_rx_status *status,
1479 const u8 first_hdr[64],
1480 enum htt_rx_mpdu_encrypt_type enctype)
1481 {
1482 struct ieee80211_hdr *hdr;
1483 struct htt_rx_desc *rxd;
1484 size_t hdr_len;
1485 u8 da[ETH_ALEN];
1486 u8 sa[ETH_ALEN];
1487 int l3_pad_bytes;
1488 int bytes_aligned = ar->hw_params.decap_align_bytes;
1489
1490 /* Delivered decapped frame:
1491 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1492 * [rfc1042/llc]
1493 *
1494 * Note: The nwifi header doesn't have QoS Control and is
1495 * (always?) a 3addr frame.
1496 *
1497 * Note2: There's no A-MSDU subframe header. Even if it's part
1498 * of an A-MSDU.
1499 */
1500
1501 /* pull decapped header and copy SA & DA */
1502 rxd = (void *)msdu->data - sizeof(*rxd);
1503
1504 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1505 skb_put(msdu, l3_pad_bytes);
1506
1507 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
1508
1509 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
1510 ether_addr_copy(da, ieee80211_get_DA(hdr));
1511 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1512 skb_pull(msdu, hdr_len);
1513
1514 /* push original 802.11 header */
1515 hdr = (struct ieee80211_hdr *)first_hdr;
1516 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1517
1518 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1519 memcpy(skb_push(msdu,
1520 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1521 (void *)hdr + round_up(hdr_len, bytes_aligned),
1522 ath10k_htt_rx_crypto_param_len(ar, enctype));
1523 }
1524
1525 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1526
1527 /* original 802.11 header has a different DA and in
1528 * case of 4addr it may also have different SA
1529 */
1530 hdr = (struct ieee80211_hdr *)msdu->data;
1531 ether_addr_copy(ieee80211_get_DA(hdr), da);
1532 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1533 }
1534
ath10k_htt_rx_h_find_rfc1042(struct ath10k * ar,struct sk_buff * msdu,enum htt_rx_mpdu_encrypt_type enctype)1535 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1536 struct sk_buff *msdu,
1537 enum htt_rx_mpdu_encrypt_type enctype)
1538 {
1539 struct ieee80211_hdr *hdr;
1540 struct htt_rx_desc *rxd;
1541 size_t hdr_len, crypto_len;
1542 void *rfc1042;
1543 bool is_first, is_last, is_amsdu;
1544 int bytes_aligned = ar->hw_params.decap_align_bytes;
1545
1546 rxd = (void *)msdu->data - sizeof(*rxd);
1547 hdr = (void *)rxd->rx_hdr_status;
1548
1549 is_first = !!(rxd->msdu_end.common.info0 &
1550 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1551 is_last = !!(rxd->msdu_end.common.info0 &
1552 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1553 is_amsdu = !(is_first && is_last);
1554
1555 rfc1042 = hdr;
1556
1557 if (is_first) {
1558 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1559 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1560
1561 rfc1042 += round_up(hdr_len, bytes_aligned) +
1562 round_up(crypto_len, bytes_aligned);
1563 }
1564
1565 if (is_amsdu)
1566 rfc1042 += sizeof(struct amsdu_subframe_hdr);
1567
1568 return rfc1042;
1569 }
1570
ath10k_htt_rx_h_undecap_eth(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1571 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1572 struct sk_buff *msdu,
1573 struct ieee80211_rx_status *status,
1574 const u8 first_hdr[64],
1575 enum htt_rx_mpdu_encrypt_type enctype)
1576 {
1577 struct ieee80211_hdr *hdr;
1578 struct ethhdr *eth;
1579 size_t hdr_len;
1580 void *rfc1042;
1581 u8 da[ETH_ALEN];
1582 u8 sa[ETH_ALEN];
1583 int l3_pad_bytes;
1584 struct htt_rx_desc *rxd;
1585 int bytes_aligned = ar->hw_params.decap_align_bytes;
1586
1587 /* Delivered decapped frame:
1588 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1589 * [payload]
1590 */
1591
1592 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1593 if (WARN_ON_ONCE(!rfc1042))
1594 return;
1595
1596 rxd = (void *)msdu->data - sizeof(*rxd);
1597 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1598 skb_put(msdu, l3_pad_bytes);
1599 skb_pull(msdu, l3_pad_bytes);
1600
1601 /* pull decapped header and copy SA & DA */
1602 eth = (struct ethhdr *)msdu->data;
1603 ether_addr_copy(da, eth->h_dest);
1604 ether_addr_copy(sa, eth->h_source);
1605 skb_pull(msdu, sizeof(struct ethhdr));
1606
1607 /* push rfc1042/llc/snap */
1608 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1609 sizeof(struct rfc1042_hdr));
1610
1611 /* push original 802.11 header */
1612 hdr = (struct ieee80211_hdr *)first_hdr;
1613 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1614
1615 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1616 memcpy(skb_push(msdu,
1617 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1618 (void *)hdr + round_up(hdr_len, bytes_aligned),
1619 ath10k_htt_rx_crypto_param_len(ar, enctype));
1620 }
1621
1622 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1623
1624 /* original 802.11 header has a different DA and in
1625 * case of 4addr it may also have different SA
1626 */
1627 hdr = (struct ieee80211_hdr *)msdu->data;
1628 ether_addr_copy(ieee80211_get_DA(hdr), da);
1629 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1630 }
1631
ath10k_htt_rx_h_undecap_snap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1632 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1633 struct sk_buff *msdu,
1634 struct ieee80211_rx_status *status,
1635 const u8 first_hdr[64],
1636 enum htt_rx_mpdu_encrypt_type enctype)
1637 {
1638 struct ieee80211_hdr *hdr;
1639 size_t hdr_len;
1640 int l3_pad_bytes;
1641 struct htt_rx_desc *rxd;
1642 int bytes_aligned = ar->hw_params.decap_align_bytes;
1643
1644 /* Delivered decapped frame:
1645 * [amsdu header] <-- replaced with 802.11 hdr
1646 * [rfc1042/llc]
1647 * [payload]
1648 */
1649
1650 rxd = (void *)msdu->data - sizeof(*rxd);
1651 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1652
1653 skb_put(msdu, l3_pad_bytes);
1654 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
1655
1656 hdr = (struct ieee80211_hdr *)first_hdr;
1657 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1658
1659 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1660 memcpy(skb_push(msdu,
1661 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1662 (void *)hdr + round_up(hdr_len, bytes_aligned),
1663 ath10k_htt_rx_crypto_param_len(ar, enctype));
1664 }
1665
1666 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1667 }
1668
ath10k_htt_rx_h_undecap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted)1669 static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1670 struct sk_buff *msdu,
1671 struct ieee80211_rx_status *status,
1672 u8 first_hdr[64],
1673 enum htt_rx_mpdu_encrypt_type enctype,
1674 bool is_decrypted)
1675 {
1676 struct htt_rx_desc *rxd;
1677 enum rx_msdu_decap_format decap;
1678
1679 /* First msdu's decapped header:
1680 * [802.11 header] <-- padded to 4 bytes long
1681 * [crypto param] <-- padded to 4 bytes long
1682 * [amsdu header] <-- only if A-MSDU
1683 * [rfc1042/llc]
1684 *
1685 * Other (2nd, 3rd, ..) msdu's decapped header:
1686 * [amsdu header] <-- only if A-MSDU
1687 * [rfc1042/llc]
1688 */
1689
1690 rxd = (void *)msdu->data - sizeof(*rxd);
1691 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
1692 RX_MSDU_START_INFO1_DECAP_FORMAT);
1693
1694 switch (decap) {
1695 case RX_MSDU_DECAP_RAW:
1696 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1697 is_decrypted, first_hdr);
1698 break;
1699 case RX_MSDU_DECAP_NATIVE_WIFI:
1700 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr,
1701 enctype);
1702 break;
1703 case RX_MSDU_DECAP_ETHERNET2_DIX:
1704 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1705 break;
1706 case RX_MSDU_DECAP_8023_SNAP_LLC:
1707 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr,
1708 enctype);
1709 break;
1710 }
1711 }
1712
ath10k_htt_rx_get_csum_state(struct sk_buff * skb)1713 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1714 {
1715 struct htt_rx_desc *rxd;
1716 u32 flags, info;
1717 bool is_ip4, is_ip6;
1718 bool is_tcp, is_udp;
1719 bool ip_csum_ok, tcpudp_csum_ok;
1720
1721 rxd = (void *)skb->data - sizeof(*rxd);
1722 flags = __le32_to_cpu(rxd->attention.flags);
1723 info = __le32_to_cpu(rxd->msdu_start.common.info1);
1724
1725 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1726 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1727 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1728 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1729 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1730 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1731
1732 if (!is_ip4 && !is_ip6)
1733 return CHECKSUM_NONE;
1734 if (!is_tcp && !is_udp)
1735 return CHECKSUM_NONE;
1736 if (!ip_csum_ok)
1737 return CHECKSUM_NONE;
1738 if (!tcpudp_csum_ok)
1739 return CHECKSUM_NONE;
1740
1741 return CHECKSUM_UNNECESSARY;
1742 }
1743
ath10k_htt_rx_h_csum_offload(struct sk_buff * msdu)1744 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1745 {
1746 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1747 }
1748
ath10k_htt_rx_h_mpdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,bool fill_crypt_header,u8 * rx_hdr,enum ath10k_pkt_rx_err * err)1749 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1750 struct sk_buff_head *amsdu,
1751 struct ieee80211_rx_status *status,
1752 bool fill_crypt_header,
1753 u8 *rx_hdr,
1754 enum ath10k_pkt_rx_err *err)
1755 {
1756 struct sk_buff *first;
1757 struct sk_buff *last;
1758 struct sk_buff *msdu;
1759 struct htt_rx_desc *rxd;
1760 struct ieee80211_hdr *hdr;
1761 enum htt_rx_mpdu_encrypt_type enctype;
1762 u8 first_hdr[64];
1763 u8 *qos;
1764 bool has_fcs_err;
1765 bool has_crypto_err;
1766 bool has_tkip_err;
1767 bool has_peer_idx_invalid;
1768 bool is_decrypted;
1769 bool is_mgmt;
1770 u32 attention;
1771
1772 if (skb_queue_empty(amsdu))
1773 return;
1774
1775 first = skb_peek(amsdu);
1776 rxd = (void *)first->data - sizeof(*rxd);
1777
1778 is_mgmt = !!(rxd->attention.flags &
1779 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1780
1781 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1782 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1783
1784 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1785 * decapped header. It'll be used for undecapping of each MSDU.
1786 */
1787 hdr = (void *)rxd->rx_hdr_status;
1788 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1789
1790 if (rx_hdr)
1791 memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1792
1793 /* Each A-MSDU subframe will use the original header as the base and be
1794 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1795 */
1796 hdr = (void *)first_hdr;
1797
1798 if (ieee80211_is_data_qos(hdr->frame_control)) {
1799 qos = ieee80211_get_qos_ctl(hdr);
1800 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1801 }
1802
1803 /* Some attention flags are valid only in the last MSDU. */
1804 last = skb_peek_tail(amsdu);
1805 rxd = (void *)last->data - sizeof(*rxd);
1806 attention = __le32_to_cpu(rxd->attention.flags);
1807
1808 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1809 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1810 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1811 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1812
1813 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1814 * e.g. due to fcs error, missing peer or invalid key data it will
1815 * report the frame as raw.
1816 */
1817 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1818 !has_fcs_err &&
1819 !has_crypto_err &&
1820 !has_peer_idx_invalid);
1821
1822 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1823 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1824 RX_FLAG_MMIC_ERROR |
1825 RX_FLAG_DECRYPTED |
1826 RX_FLAG_IV_STRIPPED |
1827 RX_FLAG_ONLY_MONITOR |
1828 RX_FLAG_MMIC_STRIPPED);
1829
1830 if (has_fcs_err)
1831 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1832
1833 if (has_tkip_err)
1834 status->flag |= RX_FLAG_MMIC_ERROR;
1835
1836 if (err) {
1837 if (has_fcs_err)
1838 *err = ATH10K_PKT_RX_ERR_FCS;
1839 else if (has_tkip_err)
1840 *err = ATH10K_PKT_RX_ERR_TKIP;
1841 else if (has_crypto_err)
1842 *err = ATH10K_PKT_RX_ERR_CRYPT;
1843 else if (has_peer_idx_invalid)
1844 *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL;
1845 }
1846
1847 /* Firmware reports all necessary management frames via WMI already.
1848 * They are not reported to monitor interfaces at all so pass the ones
1849 * coming via HTT to monitor interfaces instead. This simplifies
1850 * matters a lot.
1851 */
1852 if (is_mgmt)
1853 status->flag |= RX_FLAG_ONLY_MONITOR;
1854
1855 if (is_decrypted) {
1856 status->flag |= RX_FLAG_DECRYPTED;
1857
1858 if (likely(!is_mgmt))
1859 status->flag |= RX_FLAG_MMIC_STRIPPED;
1860
1861 if (fill_crypt_header)
1862 status->flag |= RX_FLAG_MIC_STRIPPED |
1863 RX_FLAG_ICV_STRIPPED;
1864 else
1865 status->flag |= RX_FLAG_IV_STRIPPED;
1866 }
1867
1868 skb_queue_walk(amsdu, msdu) {
1869 ath10k_htt_rx_h_csum_offload(msdu);
1870 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1871 is_decrypted);
1872
1873 /* Undecapping involves copying the original 802.11 header back
1874 * to sk_buff. If frame is protected and hardware has decrypted
1875 * it then remove the protected bit.
1876 */
1877 if (!is_decrypted)
1878 continue;
1879 if (is_mgmt)
1880 continue;
1881
1882 if (fill_crypt_header)
1883 continue;
1884
1885 hdr = (void *)msdu->data;
1886 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1887 }
1888 }
1889
ath10k_htt_rx_h_enqueue(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status)1890 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar,
1891 struct sk_buff_head *amsdu,
1892 struct ieee80211_rx_status *status)
1893 {
1894 struct sk_buff *msdu;
1895 struct sk_buff *first_subframe;
1896
1897 first_subframe = skb_peek(amsdu);
1898
1899 while ((msdu = __skb_dequeue(amsdu))) {
1900 /* Setup per-MSDU flags */
1901 if (skb_queue_empty(amsdu))
1902 status->flag &= ~RX_FLAG_AMSDU_MORE;
1903 else
1904 status->flag |= RX_FLAG_AMSDU_MORE;
1905
1906 if (msdu == first_subframe) {
1907 first_subframe = NULL;
1908 status->flag &= ~RX_FLAG_ALLOW_SAME_PN;
1909 } else {
1910 status->flag |= RX_FLAG_ALLOW_SAME_PN;
1911 }
1912
1913 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
1914 }
1915 }
1916
ath10k_unchain_msdu(struct sk_buff_head * amsdu,unsigned long * unchain_cnt)1917 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu,
1918 unsigned long *unchain_cnt)
1919 {
1920 struct sk_buff *skb, *first;
1921 int space;
1922 int total_len = 0;
1923 int amsdu_len = skb_queue_len(amsdu);
1924
1925 /* TODO: Might could optimize this by using
1926 * skb_try_coalesce or similar method to
1927 * decrease copying, or maybe get mac80211 to
1928 * provide a way to just receive a list of
1929 * skb?
1930 */
1931
1932 first = __skb_dequeue(amsdu);
1933
1934 /* Allocate total length all at once. */
1935 skb_queue_walk(amsdu, skb)
1936 total_len += skb->len;
1937
1938 space = total_len - skb_tailroom(first);
1939 if ((space > 0) &&
1940 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
1941 /* TODO: bump some rx-oom error stat */
1942 /* put it back together so we can free the
1943 * whole list at once.
1944 */
1945 __skb_queue_head(amsdu, first);
1946 return -1;
1947 }
1948
1949 /* Walk list again, copying contents into
1950 * msdu_head
1951 */
1952 while ((skb = __skb_dequeue(amsdu))) {
1953 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1954 skb->len);
1955 dev_kfree_skb_any(skb);
1956 }
1957
1958 __skb_queue_head(amsdu, first);
1959
1960 *unchain_cnt += amsdu_len - 1;
1961
1962 return 0;
1963 }
1964
ath10k_htt_rx_h_unchain(struct ath10k * ar,struct sk_buff_head * amsdu,unsigned long * drop_cnt,unsigned long * unchain_cnt)1965 static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1966 struct sk_buff_head *amsdu,
1967 unsigned long *drop_cnt,
1968 unsigned long *unchain_cnt)
1969 {
1970 struct sk_buff *first;
1971 struct htt_rx_desc *rxd;
1972 enum rx_msdu_decap_format decap;
1973
1974 first = skb_peek(amsdu);
1975 rxd = (void *)first->data - sizeof(*rxd);
1976 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
1977 RX_MSDU_START_INFO1_DECAP_FORMAT);
1978
1979 /* FIXME: Current unchaining logic can only handle simple case of raw
1980 * msdu chaining. If decapping is other than raw the chaining may be
1981 * more complex and this isn't handled by the current code. Don't even
1982 * try re-constructing such frames - it'll be pretty much garbage.
1983 */
1984 if (decap != RX_MSDU_DECAP_RAW ||
1985 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1986 *drop_cnt += skb_queue_len(amsdu);
1987 __skb_queue_purge(amsdu);
1988 return;
1989 }
1990
1991 ath10k_unchain_msdu(amsdu, unchain_cnt);
1992 }
1993
ath10k_htt_rx_amsdu_allowed(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status)1994 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1995 struct sk_buff_head *amsdu,
1996 struct ieee80211_rx_status *rx_status)
1997 {
1998 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1999 * invalid/dangerous frames.
2000 */
2001
2002 if (!rx_status->freq) {
2003 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n");
2004 return false;
2005 }
2006
2007 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
2008 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
2009 return false;
2010 }
2011
2012 return true;
2013 }
2014
ath10k_htt_rx_h_filter(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status,unsigned long * drop_cnt)2015 static void ath10k_htt_rx_h_filter(struct ath10k *ar,
2016 struct sk_buff_head *amsdu,
2017 struct ieee80211_rx_status *rx_status,
2018 unsigned long *drop_cnt)
2019 {
2020 if (skb_queue_empty(amsdu))
2021 return;
2022
2023 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
2024 return;
2025
2026 if (drop_cnt)
2027 *drop_cnt += skb_queue_len(amsdu);
2028
2029 __skb_queue_purge(amsdu);
2030 }
2031
ath10k_htt_rx_handle_amsdu(struct ath10k_htt * htt)2032 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
2033 {
2034 struct ath10k *ar = htt->ar;
2035 struct ieee80211_rx_status *rx_status = &htt->rx_status;
2036 struct sk_buff_head amsdu;
2037 int ret;
2038 unsigned long drop_cnt = 0;
2039 unsigned long unchain_cnt = 0;
2040 unsigned long drop_cnt_filter = 0;
2041 unsigned long msdus_to_queue, num_msdus;
2042 enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX;
2043 u8 first_hdr[RX_HTT_HDR_STATUS_LEN];
2044
2045 __skb_queue_head_init(&amsdu);
2046
2047 spin_lock_bh(&htt->rx_ring.lock);
2048 if (htt->rx_confused) {
2049 spin_unlock_bh(&htt->rx_ring.lock);
2050 return -EIO;
2051 }
2052 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
2053 spin_unlock_bh(&htt->rx_ring.lock);
2054
2055 if (ret < 0) {
2056 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
2057 __skb_queue_purge(&amsdu);
2058 /* FIXME: It's probably a good idea to reboot the
2059 * device instead of leaving it inoperable.
2060 */
2061 htt->rx_confused = true;
2062 return ret;
2063 }
2064
2065 num_msdus = skb_queue_len(&amsdu);
2066
2067 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
2068
2069 /* only for ret = 1 indicates chained msdus */
2070 if (ret > 0)
2071 ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt);
2072
2073 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter);
2074 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err);
2075 msdus_to_queue = skb_queue_len(&amsdu);
2076 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status);
2077
2078 ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err,
2079 unchain_cnt, drop_cnt, drop_cnt_filter,
2080 msdus_to_queue);
2081
2082 return 0;
2083 }
2084
ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc * rx_desc,union htt_rx_pn_t * pn,int pn_len_bits)2085 static void ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc *rx_desc,
2086 union htt_rx_pn_t *pn,
2087 int pn_len_bits)
2088 {
2089 switch (pn_len_bits) {
2090 case 48:
2091 pn->pn48 = __le32_to_cpu(rx_desc->pn_31_0) +
2092 ((u64)(__le32_to_cpu(rx_desc->u0.pn_63_32) & 0xFFFF) << 32);
2093 break;
2094 case 24:
2095 pn->pn24 = __le32_to_cpu(rx_desc->pn_31_0);
2096 break;
2097 }
2098 }
2099
ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t * new_pn,union htt_rx_pn_t * old_pn)2100 static bool ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t *new_pn,
2101 union htt_rx_pn_t *old_pn)
2102 {
2103 return ((new_pn->pn48 & 0xffffffffffffULL) <=
2104 (old_pn->pn48 & 0xffffffffffffULL));
2105 }
2106
ath10k_htt_rx_pn_check_replay_hl(struct ath10k * ar,struct ath10k_peer * peer,struct htt_rx_indication_hl * rx)2107 static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar,
2108 struct ath10k_peer *peer,
2109 struct htt_rx_indication_hl *rx)
2110 {
2111 bool last_pn_valid, pn_invalid = false;
2112 enum htt_txrx_sec_cast_type sec_index;
2113 enum htt_security_types sec_type;
2114 union htt_rx_pn_t new_pn = {0};
2115 struct htt_hl_rx_desc *rx_desc;
2116 union htt_rx_pn_t *last_pn;
2117 u32 rx_desc_info, tid;
2118 int num_mpdu_ranges;
2119
2120 lockdep_assert_held(&ar->data_lock);
2121
2122 if (!peer)
2123 return false;
2124
2125 if (!(rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU))
2126 return false;
2127
2128 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2129 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2130
2131 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
2132 rx_desc_info = __le32_to_cpu(rx_desc->info);
2133
2134 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED))
2135 return false;
2136
2137 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2138 last_pn_valid = peer->tids_last_pn_valid[tid];
2139 last_pn = &peer->tids_last_pn[tid];
2140
2141 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
2142 sec_index = HTT_TXRX_SEC_MCAST;
2143 else
2144 sec_index = HTT_TXRX_SEC_UCAST;
2145
2146 sec_type = peer->rx_pn[sec_index].sec_type;
2147 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2148
2149 if (sec_type != HTT_SECURITY_AES_CCMP &&
2150 sec_type != HTT_SECURITY_TKIP &&
2151 sec_type != HTT_SECURITY_TKIP_NOMIC)
2152 return false;
2153
2154 if (last_pn_valid)
2155 pn_invalid = ath10k_htt_rx_pn_cmp48(&new_pn, last_pn);
2156 else
2157 peer->tids_last_pn_valid[tid] = true;
2158
2159 if (!pn_invalid)
2160 last_pn->pn48 = new_pn.pn48;
2161
2162 return pn_invalid;
2163 }
2164
ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt * htt,struct htt_rx_indication_hl * rx,struct sk_buff * skb,enum htt_rx_pn_check_type check_pn_type,enum htt_rx_tkip_demic_type tkip_mic_type)2165 static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt,
2166 struct htt_rx_indication_hl *rx,
2167 struct sk_buff *skb,
2168 enum htt_rx_pn_check_type check_pn_type,
2169 enum htt_rx_tkip_demic_type tkip_mic_type)
2170 {
2171 struct ath10k *ar = htt->ar;
2172 struct ath10k_peer *peer;
2173 struct htt_rx_indication_mpdu_range *mpdu_ranges;
2174 struct fw_rx_desc_hl *fw_desc;
2175 enum htt_txrx_sec_cast_type sec_index;
2176 enum htt_security_types sec_type;
2177 union htt_rx_pn_t new_pn = {0};
2178 struct htt_hl_rx_desc *rx_desc;
2179 struct ieee80211_hdr *hdr;
2180 struct ieee80211_rx_status *rx_status;
2181 u16 peer_id;
2182 u8 rx_desc_len;
2183 int num_mpdu_ranges;
2184 size_t tot_hdr_len;
2185 struct ieee80211_channel *ch;
2186 bool pn_invalid, qos, first_msdu;
2187 u32 tid, rx_desc_info;
2188
2189 peer_id = __le16_to_cpu(rx->hdr.peer_id);
2190 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2191
2192 spin_lock_bh(&ar->data_lock);
2193 peer = ath10k_peer_find_by_id(ar, peer_id);
2194 spin_unlock_bh(&ar->data_lock);
2195 if (!peer && peer_id != HTT_INVALID_PEERID)
2196 ath10k_warn(ar, "Got RX ind from invalid peer: %u\n", peer_id);
2197
2198 if (!peer)
2199 return true;
2200
2201 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2202 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2203 mpdu_ranges = htt_rx_ind_get_mpdu_ranges_hl(rx);
2204 fw_desc = &rx->fw_desc;
2205 rx_desc_len = fw_desc->len;
2206
2207 /* I have not yet seen any case where num_mpdu_ranges > 1.
2208 * qcacld does not seem handle that case either, so we introduce the
2209 * same limitiation here as well.
2210 */
2211 if (num_mpdu_ranges > 1)
2212 ath10k_warn(ar,
2213 "Unsupported number of MPDU ranges: %d, ignoring all but the first\n",
2214 num_mpdu_ranges);
2215
2216 if (mpdu_ranges->mpdu_range_status !=
2217 HTT_RX_IND_MPDU_STATUS_OK &&
2218 mpdu_ranges->mpdu_range_status !=
2219 HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR) {
2220 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt mpdu_range_status %d\n",
2221 mpdu_ranges->mpdu_range_status);
2222 goto err;
2223 }
2224
2225 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
2226 rx_desc_info = __le32_to_cpu(rx_desc->info);
2227
2228 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
2229 sec_index = HTT_TXRX_SEC_MCAST;
2230 else
2231 sec_index = HTT_TXRX_SEC_UCAST;
2232
2233 sec_type = peer->rx_pn[sec_index].sec_type;
2234 first_msdu = rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU;
2235
2236 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2237
2238 if (check_pn_type == HTT_RX_PN_CHECK && tid >= IEEE80211_NUM_TIDS) {
2239 spin_lock_bh(&ar->data_lock);
2240 pn_invalid = ath10k_htt_rx_pn_check_replay_hl(ar, peer, rx);
2241 spin_unlock_bh(&ar->data_lock);
2242
2243 if (pn_invalid)
2244 goto err;
2245 }
2246
2247 /* Strip off all headers before the MAC header before delivery to
2248 * mac80211
2249 */
2250 tot_hdr_len = sizeof(struct htt_resp_hdr) + sizeof(rx->hdr) +
2251 sizeof(rx->ppdu) + sizeof(rx->prefix) +
2252 sizeof(rx->fw_desc) +
2253 sizeof(*mpdu_ranges) * num_mpdu_ranges + rx_desc_len;
2254
2255 skb_pull(skb, tot_hdr_len);
2256
2257 hdr = (struct ieee80211_hdr *)skb->data;
2258 qos = ieee80211_is_data_qos(hdr->frame_control);
2259
2260 rx_status = IEEE80211_SKB_RXCB(skb);
2261 memset(rx_status, 0, sizeof(*rx_status));
2262
2263 if (rx->ppdu.combined_rssi == 0) {
2264 /* SDIO firmware does not provide signal */
2265 rx_status->signal = 0;
2266 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2267 } else {
2268 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
2269 rx->ppdu.combined_rssi;
2270 rx_status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
2271 }
2272
2273 spin_lock_bh(&ar->data_lock);
2274 ch = ar->scan_channel;
2275 if (!ch)
2276 ch = ar->rx_channel;
2277 if (!ch)
2278 ch = ath10k_htt_rx_h_any_channel(ar);
2279 if (!ch)
2280 ch = ar->tgt_oper_chan;
2281 spin_unlock_bh(&ar->data_lock);
2282
2283 if (ch) {
2284 rx_status->band = ch->band;
2285 rx_status->freq = ch->center_freq;
2286 }
2287 if (rx->fw_desc.flags & FW_RX_DESC_FLAGS_LAST_MSDU)
2288 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
2289 else
2290 rx_status->flag |= RX_FLAG_AMSDU_MORE;
2291
2292 /* Not entirely sure about this, but all frames from the chipset has
2293 * the protected flag set even though they have already been decrypted.
2294 * Unmasking this flag is necessary in order for mac80211 not to drop
2295 * the frame.
2296 * TODO: Verify this is always the case or find out a way to check
2297 * if there has been hw decryption.
2298 */
2299 if (ieee80211_has_protected(hdr->frame_control)) {
2300 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2301 rx_status->flag |= RX_FLAG_DECRYPTED |
2302 RX_FLAG_IV_STRIPPED |
2303 RX_FLAG_MMIC_STRIPPED;
2304
2305 if (tid < IEEE80211_NUM_TIDS &&
2306 first_msdu &&
2307 check_pn_type == HTT_RX_PN_CHECK &&
2308 (sec_type == HTT_SECURITY_AES_CCMP ||
2309 sec_type == HTT_SECURITY_TKIP ||
2310 sec_type == HTT_SECURITY_TKIP_NOMIC)) {
2311 u8 offset, *ivp, i;
2312 s8 keyidx = 0;
2313 __le64 pn48 = cpu_to_le64(new_pn.pn48);
2314
2315 hdr = (struct ieee80211_hdr *)skb->data;
2316 offset = ieee80211_hdrlen(hdr->frame_control);
2317 hdr->frame_control |= __cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2318 rx_status->flag &= ~RX_FLAG_IV_STRIPPED;
2319
2320 memmove(skb->data - IEEE80211_CCMP_HDR_LEN,
2321 skb->data, offset);
2322 skb_push(skb, IEEE80211_CCMP_HDR_LEN);
2323 ivp = skb->data + offset;
2324 memset(skb->data + offset, 0, IEEE80211_CCMP_HDR_LEN);
2325 /* Ext IV */
2326 ivp[IEEE80211_WEP_IV_LEN - 1] |= ATH10K_IEEE80211_EXTIV;
2327
2328 for (i = 0; i < ARRAY_SIZE(peer->keys); i++) {
2329 if (peer->keys[i] &&
2330 peer->keys[i]->flags & IEEE80211_KEY_FLAG_PAIRWISE)
2331 keyidx = peer->keys[i]->keyidx;
2332 }
2333
2334 /* Key ID */
2335 ivp[IEEE80211_WEP_IV_LEN - 1] |= keyidx << 6;
2336
2337 if (sec_type == HTT_SECURITY_AES_CCMP) {
2338 rx_status->flag |= RX_FLAG_MIC_STRIPPED;
2339 /* pn 0, pn 1 */
2340 memcpy(skb->data + offset, &pn48, 2);
2341 /* pn 1, pn 3 , pn 34 , pn 5 */
2342 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
2343 } else {
2344 rx_status->flag |= RX_FLAG_ICV_STRIPPED;
2345 /* TSC 0 */
2346 memcpy(skb->data + offset + 2, &pn48, 1);
2347 /* TSC 1 */
2348 memcpy(skb->data + offset, ((u8 *)&pn48) + 1, 1);
2349 /* TSC 2 , TSC 3 , TSC 4 , TSC 5*/
2350 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
2351 }
2352 }
2353 }
2354
2355 if (tkip_mic_type == HTT_RX_TKIP_MIC)
2356 rx_status->flag &= ~RX_FLAG_IV_STRIPPED &
2357 ~RX_FLAG_MMIC_STRIPPED;
2358
2359 if (mpdu_ranges->mpdu_range_status == HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR)
2360 rx_status->flag |= RX_FLAG_MMIC_ERROR;
2361
2362 if (!qos && tid < IEEE80211_NUM_TIDS) {
2363 u8 offset;
2364 __le16 qos_ctrl = 0;
2365
2366 hdr = (struct ieee80211_hdr *)skb->data;
2367 offset = ieee80211_hdrlen(hdr->frame_control);
2368
2369 hdr->frame_control |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
2370 memmove(skb->data - IEEE80211_QOS_CTL_LEN, skb->data, offset);
2371 skb_push(skb, IEEE80211_QOS_CTL_LEN);
2372 qos_ctrl = cpu_to_le16(tid);
2373 memcpy(skb->data + offset, &qos_ctrl, IEEE80211_QOS_CTL_LEN);
2374 }
2375
2376 if (ar->napi.dev)
2377 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
2378 else
2379 ieee80211_rx_ni(ar->hw, skb);
2380
2381 /* We have delivered the skb to the upper layers (mac80211) so we
2382 * must not free it.
2383 */
2384 return false;
2385 err:
2386 /* Tell the caller that it must free the skb since we have not
2387 * consumed it
2388 */
2389 return true;
2390 }
2391
ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff * skb,u16 head_len,u16 hdr_len)2392 static int ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff *skb,
2393 u16 head_len,
2394 u16 hdr_len)
2395 {
2396 u8 *ivp, *orig_hdr;
2397
2398 orig_hdr = skb->data;
2399 ivp = orig_hdr + hdr_len + head_len;
2400
2401 /* the ExtIV bit is always set to 1 for TKIP */
2402 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2403 return -EINVAL;
2404
2405 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
2406 skb_pull(skb, IEEE80211_TKIP_IV_LEN);
2407 skb_trim(skb, skb->len - ATH10K_IEEE80211_TKIP_MICLEN);
2408 return 0;
2409 }
2410
ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff * skb,u16 head_len,u16 hdr_len)2411 static int ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff *skb,
2412 u16 head_len,
2413 u16 hdr_len)
2414 {
2415 u8 *ivp, *orig_hdr;
2416
2417 orig_hdr = skb->data;
2418 ivp = orig_hdr + hdr_len + head_len;
2419
2420 /* the ExtIV bit is always set to 1 for TKIP */
2421 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2422 return -EINVAL;
2423
2424 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
2425 skb_pull(skb, IEEE80211_TKIP_IV_LEN);
2426 skb_trim(skb, skb->len - IEEE80211_TKIP_ICV_LEN);
2427 return 0;
2428 }
2429
ath10k_htt_rx_frag_ccmp_decap(struct sk_buff * skb,u16 head_len,u16 hdr_len)2430 static int ath10k_htt_rx_frag_ccmp_decap(struct sk_buff *skb,
2431 u16 head_len,
2432 u16 hdr_len)
2433 {
2434 u8 *ivp, *orig_hdr;
2435
2436 orig_hdr = skb->data;
2437 ivp = orig_hdr + hdr_len + head_len;
2438
2439 /* the ExtIV bit is always set to 1 for CCMP */
2440 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2441 return -EINVAL;
2442
2443 skb_trim(skb, skb->len - IEEE80211_CCMP_MIC_LEN);
2444 memmove(orig_hdr + IEEE80211_CCMP_HDR_LEN, orig_hdr, head_len + hdr_len);
2445 skb_pull(skb, IEEE80211_CCMP_HDR_LEN);
2446 return 0;
2447 }
2448
ath10k_htt_rx_frag_wep_decap(struct sk_buff * skb,u16 head_len,u16 hdr_len)2449 static int ath10k_htt_rx_frag_wep_decap(struct sk_buff *skb,
2450 u16 head_len,
2451 u16 hdr_len)
2452 {
2453 u8 *orig_hdr;
2454
2455 orig_hdr = skb->data;
2456
2457 memmove(orig_hdr + IEEE80211_WEP_IV_LEN,
2458 orig_hdr, head_len + hdr_len);
2459 skb_pull(skb, IEEE80211_WEP_IV_LEN);
2460 skb_trim(skb, skb->len - IEEE80211_WEP_ICV_LEN);
2461 return 0;
2462 }
2463
ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt * htt,struct htt_rx_fragment_indication * rx,struct sk_buff * skb)2464 static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt,
2465 struct htt_rx_fragment_indication *rx,
2466 struct sk_buff *skb)
2467 {
2468 struct ath10k *ar = htt->ar;
2469 enum htt_rx_tkip_demic_type tkip_mic = HTT_RX_NON_TKIP_MIC;
2470 enum htt_txrx_sec_cast_type sec_index;
2471 struct htt_rx_indication_hl *rx_hl;
2472 enum htt_security_types sec_type;
2473 u32 tid, frag, seq, rx_desc_info;
2474 union htt_rx_pn_t new_pn = {0};
2475 struct htt_hl_rx_desc *rx_desc;
2476 u16 peer_id, sc, hdr_space;
2477 union htt_rx_pn_t *last_pn;
2478 struct ieee80211_hdr *hdr;
2479 int ret, num_mpdu_ranges;
2480 struct ath10k_peer *peer;
2481 struct htt_resp *resp;
2482 size_t tot_hdr_len;
2483
2484 resp = (struct htt_resp *)(skb->data + HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
2485 skb_pull(skb, HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
2486 skb_trim(skb, skb->len - FCS_LEN);
2487
2488 peer_id = __le16_to_cpu(rx->peer_id);
2489 rx_hl = (struct htt_rx_indication_hl *)(&resp->rx_ind_hl);
2490
2491 spin_lock_bh(&ar->data_lock);
2492 peer = ath10k_peer_find_by_id(ar, peer_id);
2493 if (!peer) {
2494 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer: %u\n", peer_id);
2495 goto err;
2496 }
2497
2498 num_mpdu_ranges = MS(__le32_to_cpu(rx_hl->hdr.info1),
2499 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2500
2501 tot_hdr_len = sizeof(struct htt_resp_hdr) +
2502 sizeof(rx_hl->hdr) +
2503 sizeof(rx_hl->ppdu) +
2504 sizeof(rx_hl->prefix) +
2505 sizeof(rx_hl->fw_desc) +
2506 sizeof(struct htt_rx_indication_mpdu_range) * num_mpdu_ranges;
2507
2508 tid = MS(rx_hl->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2509 rx_desc = (struct htt_hl_rx_desc *)(skb->data + tot_hdr_len);
2510 rx_desc_info = __le32_to_cpu(rx_desc->info);
2511
2512 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED)) {
2513 spin_unlock_bh(&ar->data_lock);
2514 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2515 HTT_RX_NON_PN_CHECK,
2516 HTT_RX_NON_TKIP_MIC);
2517 }
2518
2519 hdr = (struct ieee80211_hdr *)((u8 *)rx_desc + rx_hl->fw_desc.len);
2520
2521 if (ieee80211_has_retry(hdr->frame_control))
2522 goto err;
2523
2524 hdr_space = ieee80211_hdrlen(hdr->frame_control);
2525 sc = __le16_to_cpu(hdr->seq_ctrl);
2526 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2527 frag = sc & IEEE80211_SCTL_FRAG;
2528
2529 sec_index = MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST) ?
2530 HTT_TXRX_SEC_MCAST : HTT_TXRX_SEC_UCAST;
2531 sec_type = peer->rx_pn[sec_index].sec_type;
2532 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2533
2534 switch (sec_type) {
2535 case HTT_SECURITY_TKIP:
2536 tkip_mic = HTT_RX_TKIP_MIC;
2537 ret = ath10k_htt_rx_frag_tkip_decap_withmic(skb,
2538 tot_hdr_len +
2539 rx_hl->fw_desc.len,
2540 hdr_space);
2541 if (ret)
2542 goto err;
2543 break;
2544 case HTT_SECURITY_TKIP_NOMIC:
2545 ret = ath10k_htt_rx_frag_tkip_decap_nomic(skb,
2546 tot_hdr_len +
2547 rx_hl->fw_desc.len,
2548 hdr_space);
2549 if (ret)
2550 goto err;
2551 break;
2552 case HTT_SECURITY_AES_CCMP:
2553 ret = ath10k_htt_rx_frag_ccmp_decap(skb,
2554 tot_hdr_len + rx_hl->fw_desc.len,
2555 hdr_space);
2556 if (ret)
2557 goto err;
2558 break;
2559 case HTT_SECURITY_WEP128:
2560 case HTT_SECURITY_WEP104:
2561 case HTT_SECURITY_WEP40:
2562 ret = ath10k_htt_rx_frag_wep_decap(skb,
2563 tot_hdr_len + rx_hl->fw_desc.len,
2564 hdr_space);
2565 if (ret)
2566 goto err;
2567 break;
2568 default:
2569 break;
2570 }
2571
2572 resp = (struct htt_resp *)(skb->data);
2573
2574 if (sec_type != HTT_SECURITY_AES_CCMP &&
2575 sec_type != HTT_SECURITY_TKIP &&
2576 sec_type != HTT_SECURITY_TKIP_NOMIC) {
2577 spin_unlock_bh(&ar->data_lock);
2578 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2579 HTT_RX_NON_PN_CHECK,
2580 HTT_RX_NON_TKIP_MIC);
2581 }
2582
2583 last_pn = &peer->frag_tids_last_pn[tid];
2584
2585 if (frag == 0) {
2586 if (ath10k_htt_rx_pn_check_replay_hl(ar, peer, &resp->rx_ind_hl))
2587 goto err;
2588
2589 last_pn->pn48 = new_pn.pn48;
2590 peer->frag_tids_seq[tid] = seq;
2591 } else if (sec_type == HTT_SECURITY_AES_CCMP) {
2592 if (seq != peer->frag_tids_seq[tid])
2593 goto err;
2594
2595 if (new_pn.pn48 != last_pn->pn48 + 1)
2596 goto err;
2597
2598 last_pn->pn48 = new_pn.pn48;
2599 last_pn = &peer->tids_last_pn[tid];
2600 last_pn->pn48 = new_pn.pn48;
2601 }
2602
2603 spin_unlock_bh(&ar->data_lock);
2604
2605 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2606 HTT_RX_NON_PN_CHECK, tkip_mic);
2607
2608 err:
2609 spin_unlock_bh(&ar->data_lock);
2610
2611 /* Tell the caller that it must free the skb since we have not
2612 * consumed it
2613 */
2614 return true;
2615 }
2616
ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt * htt,struct htt_rx_indication * rx)2617 static void ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt *htt,
2618 struct htt_rx_indication *rx)
2619 {
2620 struct ath10k *ar = htt->ar;
2621 struct htt_rx_indication_mpdu_range *mpdu_ranges;
2622 int num_mpdu_ranges;
2623 int i, mpdu_count = 0;
2624 u16 peer_id;
2625 u8 tid;
2626
2627 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2628 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2629 peer_id = __le16_to_cpu(rx->hdr.peer_id);
2630 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2631
2632 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
2633
2634 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
2635 rx, struct_size(rx, mpdu_ranges, num_mpdu_ranges));
2636
2637 for (i = 0; i < num_mpdu_ranges; i++)
2638 mpdu_count += mpdu_ranges[i].mpdu_count;
2639
2640 atomic_add(mpdu_count, &htt->num_mpdus_ready);
2641
2642 ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges,
2643 num_mpdu_ranges);
2644 }
2645
ath10k_htt_rx_tx_compl_ind(struct ath10k * ar,struct sk_buff * skb)2646 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
2647 struct sk_buff *skb)
2648 {
2649 struct ath10k_htt *htt = &ar->htt;
2650 struct htt_resp *resp = (struct htt_resp *)skb->data;
2651 struct htt_tx_done tx_done = {};
2652 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
2653 __le16 msdu_id, *msdus;
2654 bool rssi_enabled = false;
2655 u8 msdu_count = 0, num_airtime_records, tid;
2656 int i, htt_pad = 0;
2657 struct htt_data_tx_compl_ppdu_dur *ppdu_info;
2658 struct ath10k_peer *peer;
2659 u16 ppdu_info_offset = 0, peer_id;
2660 u32 tx_duration;
2661
2662 switch (status) {
2663 case HTT_DATA_TX_STATUS_NO_ACK:
2664 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
2665 break;
2666 case HTT_DATA_TX_STATUS_OK:
2667 tx_done.status = HTT_TX_COMPL_STATE_ACK;
2668 break;
2669 case HTT_DATA_TX_STATUS_DISCARD:
2670 case HTT_DATA_TX_STATUS_POSTPONE:
2671 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
2672 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2673 break;
2674 default:
2675 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
2676 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2677 break;
2678 }
2679
2680 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
2681 resp->data_tx_completion.num_msdus);
2682
2683 msdu_count = resp->data_tx_completion.num_msdus;
2684 msdus = resp->data_tx_completion.msdus;
2685 rssi_enabled = ath10k_is_rssi_enable(&ar->hw_params, resp);
2686
2687 if (rssi_enabled)
2688 htt_pad = ath10k_tx_data_rssi_get_pad_bytes(&ar->hw_params,
2689 resp);
2690
2691 for (i = 0; i < msdu_count; i++) {
2692 msdu_id = msdus[i];
2693 tx_done.msdu_id = __le16_to_cpu(msdu_id);
2694
2695 if (rssi_enabled) {
2696 /* Total no of MSDUs should be even,
2697 * if odd MSDUs are sent firmware fills
2698 * last msdu id with 0xffff
2699 */
2700 if (msdu_count & 0x01) {
2701 msdu_id = msdus[msdu_count + i + 1 + htt_pad];
2702 tx_done.ack_rssi = __le16_to_cpu(msdu_id);
2703 } else {
2704 msdu_id = msdus[msdu_count + i + htt_pad];
2705 tx_done.ack_rssi = __le16_to_cpu(msdu_id);
2706 }
2707 }
2708
2709 /* kfifo_put: In practice firmware shouldn't fire off per-CE
2710 * interrupt and main interrupt (MSI/-X range case) for the same
2711 * HTC service so it should be safe to use kfifo_put w/o lock.
2712 *
2713 * From kfifo_put() documentation:
2714 * Note that with only one concurrent reader and one concurrent
2715 * writer, you don't need extra locking to use these macro.
2716 */
2717 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
2718 ath10k_txrx_tx_unref(htt, &tx_done);
2719 } else if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
2720 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
2721 tx_done.msdu_id, tx_done.status);
2722 ath10k_txrx_tx_unref(htt, &tx_done);
2723 }
2724 }
2725
2726 if (!(resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT))
2727 return;
2728
2729 ppdu_info_offset = (msdu_count & 0x01) ? msdu_count + 1 : msdu_count;
2730
2731 if (rssi_enabled)
2732 ppdu_info_offset += ppdu_info_offset;
2733
2734 if (resp->data_tx_completion.flags2 &
2735 (HTT_TX_CMPL_FLAG_PPID_PRESENT | HTT_TX_CMPL_FLAG_PA_PRESENT))
2736 ppdu_info_offset += 2;
2737
2738 ppdu_info = (struct htt_data_tx_compl_ppdu_dur *)&msdus[ppdu_info_offset];
2739 num_airtime_records = FIELD_GET(HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK,
2740 __le32_to_cpu(ppdu_info->info0));
2741
2742 for (i = 0; i < num_airtime_records; i++) {
2743 struct htt_data_tx_ppdu_dur *ppdu_dur;
2744 u32 info0;
2745
2746 ppdu_dur = &ppdu_info->ppdu_dur[i];
2747 info0 = __le32_to_cpu(ppdu_dur->info0);
2748
2749 peer_id = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK,
2750 info0);
2751 rcu_read_lock();
2752 spin_lock_bh(&ar->data_lock);
2753
2754 peer = ath10k_peer_find_by_id(ar, peer_id);
2755 if (!peer || !peer->sta) {
2756 spin_unlock_bh(&ar->data_lock);
2757 rcu_read_unlock();
2758 continue;
2759 }
2760
2761 tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) &
2762 IEEE80211_QOS_CTL_TID_MASK;
2763 tx_duration = __le32_to_cpu(ppdu_dur->tx_duration);
2764
2765 ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0);
2766
2767 spin_unlock_bh(&ar->data_lock);
2768 rcu_read_unlock();
2769 }
2770 }
2771
ath10k_htt_rx_addba(struct ath10k * ar,struct htt_resp * resp)2772 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
2773 {
2774 struct htt_rx_addba *ev = &resp->rx_addba;
2775 struct ath10k_peer *peer;
2776 struct ath10k_vif *arvif;
2777 u16 info0, tid, peer_id;
2778
2779 info0 = __le16_to_cpu(ev->info0);
2780 tid = MS(info0, HTT_RX_BA_INFO0_TID);
2781 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
2782
2783 ath10k_dbg(ar, ATH10K_DBG_HTT,
2784 "htt rx addba tid %hu peer_id %hu size %hhu\n",
2785 tid, peer_id, ev->window_size);
2786
2787 spin_lock_bh(&ar->data_lock);
2788 peer = ath10k_peer_find_by_id(ar, peer_id);
2789 if (!peer) {
2790 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
2791 peer_id);
2792 spin_unlock_bh(&ar->data_lock);
2793 return;
2794 }
2795
2796 arvif = ath10k_get_arvif(ar, peer->vdev_id);
2797 if (!arvif) {
2798 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
2799 peer->vdev_id);
2800 spin_unlock_bh(&ar->data_lock);
2801 return;
2802 }
2803
2804 ath10k_dbg(ar, ATH10K_DBG_HTT,
2805 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
2806 peer->addr, tid, ev->window_size);
2807
2808 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
2809 spin_unlock_bh(&ar->data_lock);
2810 }
2811
ath10k_htt_rx_delba(struct ath10k * ar,struct htt_resp * resp)2812 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
2813 {
2814 struct htt_rx_delba *ev = &resp->rx_delba;
2815 struct ath10k_peer *peer;
2816 struct ath10k_vif *arvif;
2817 u16 info0, tid, peer_id;
2818
2819 info0 = __le16_to_cpu(ev->info0);
2820 tid = MS(info0, HTT_RX_BA_INFO0_TID);
2821 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
2822
2823 ath10k_dbg(ar, ATH10K_DBG_HTT,
2824 "htt rx delba tid %hu peer_id %hu\n",
2825 tid, peer_id);
2826
2827 spin_lock_bh(&ar->data_lock);
2828 peer = ath10k_peer_find_by_id(ar, peer_id);
2829 if (!peer) {
2830 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
2831 peer_id);
2832 spin_unlock_bh(&ar->data_lock);
2833 return;
2834 }
2835
2836 arvif = ath10k_get_arvif(ar, peer->vdev_id);
2837 if (!arvif) {
2838 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
2839 peer->vdev_id);
2840 spin_unlock_bh(&ar->data_lock);
2841 return;
2842 }
2843
2844 ath10k_dbg(ar, ATH10K_DBG_HTT,
2845 "htt rx stop rx ba session sta %pM tid %hu\n",
2846 peer->addr, tid);
2847
2848 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
2849 spin_unlock_bh(&ar->data_lock);
2850 }
2851
ath10k_htt_rx_extract_amsdu(struct sk_buff_head * list,struct sk_buff_head * amsdu)2852 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
2853 struct sk_buff_head *amsdu)
2854 {
2855 struct sk_buff *msdu;
2856 struct htt_rx_desc *rxd;
2857
2858 if (skb_queue_empty(list))
2859 return -ENOBUFS;
2860
2861 if (WARN_ON(!skb_queue_empty(amsdu)))
2862 return -EINVAL;
2863
2864 while ((msdu = __skb_dequeue(list))) {
2865 __skb_queue_tail(amsdu, msdu);
2866
2867 rxd = (void *)msdu->data - sizeof(*rxd);
2868 if (rxd->msdu_end.common.info0 &
2869 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
2870 break;
2871 }
2872
2873 msdu = skb_peek_tail(amsdu);
2874 rxd = (void *)msdu->data - sizeof(*rxd);
2875 if (!(rxd->msdu_end.common.info0 &
2876 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
2877 skb_queue_splice_init(amsdu, list);
2878 return -EAGAIN;
2879 }
2880
2881 return 0;
2882 }
2883
ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status * status,struct sk_buff * skb)2884 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
2885 struct sk_buff *skb)
2886 {
2887 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2888
2889 if (!ieee80211_has_protected(hdr->frame_control))
2890 return;
2891
2892 /* Offloaded frames are already decrypted but firmware insists they are
2893 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
2894 * will drop the frame.
2895 */
2896
2897 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2898 status->flag |= RX_FLAG_DECRYPTED |
2899 RX_FLAG_IV_STRIPPED |
2900 RX_FLAG_MMIC_STRIPPED;
2901 }
2902
ath10k_htt_rx_h_rx_offload(struct ath10k * ar,struct sk_buff_head * list)2903 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
2904 struct sk_buff_head *list)
2905 {
2906 struct ath10k_htt *htt = &ar->htt;
2907 struct ieee80211_rx_status *status = &htt->rx_status;
2908 struct htt_rx_offload_msdu *rx;
2909 struct sk_buff *msdu;
2910 size_t offset;
2911
2912 while ((msdu = __skb_dequeue(list))) {
2913 /* Offloaded frames don't have Rx descriptor. Instead they have
2914 * a short meta information header.
2915 */
2916
2917 rx = (void *)msdu->data;
2918
2919 skb_put(msdu, sizeof(*rx));
2920 skb_pull(msdu, sizeof(*rx));
2921
2922 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
2923 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
2924 dev_kfree_skb_any(msdu);
2925 continue;
2926 }
2927
2928 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
2929
2930 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
2931 * actual payload is unaligned. Align the frame. Otherwise
2932 * mac80211 complains. This shouldn't reduce performance much
2933 * because these offloaded frames are rare.
2934 */
2935 offset = 4 - ((unsigned long)msdu->data & 3);
2936 skb_put(msdu, offset);
2937 memmove(msdu->data + offset, msdu->data, msdu->len);
2938 skb_pull(msdu, offset);
2939
2940 /* FIXME: The frame is NWifi. Re-construct QoS Control
2941 * if possible later.
2942 */
2943
2944 memset(status, 0, sizeof(*status));
2945 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2946
2947 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
2948 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
2949 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
2950 }
2951 }
2952
ath10k_htt_rx_in_ord_ind(struct ath10k * ar,struct sk_buff * skb)2953 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
2954 {
2955 struct ath10k_htt *htt = &ar->htt;
2956 struct htt_resp *resp = (void *)skb->data;
2957 struct ieee80211_rx_status *status = &htt->rx_status;
2958 struct sk_buff_head list;
2959 struct sk_buff_head amsdu;
2960 u16 peer_id;
2961 u16 msdu_count;
2962 u8 vdev_id;
2963 u8 tid;
2964 bool offload;
2965 bool frag;
2966 int ret;
2967
2968 lockdep_assert_held(&htt->rx_ring.lock);
2969
2970 if (htt->rx_confused)
2971 return -EIO;
2972
2973 skb_pull(skb, sizeof(resp->hdr));
2974 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
2975
2976 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
2977 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
2978 vdev_id = resp->rx_in_ord_ind.vdev_id;
2979 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
2980 offload = !!(resp->rx_in_ord_ind.info &
2981 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
2982 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
2983
2984 ath10k_dbg(ar, ATH10K_DBG_HTT,
2985 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
2986 vdev_id, peer_id, tid, offload, frag, msdu_count);
2987
2988 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) {
2989 ath10k_warn(ar, "dropping invalid in order rx indication\n");
2990 return -EINVAL;
2991 }
2992
2993 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
2994 * extracted and processed.
2995 */
2996 __skb_queue_head_init(&list);
2997 if (ar->hw_params.target_64bit)
2998 ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind,
2999 &list);
3000 else
3001 ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind,
3002 &list);
3003
3004 if (ret < 0) {
3005 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
3006 htt->rx_confused = true;
3007 return -EIO;
3008 }
3009
3010 /* Offloaded frames are very different and need to be handled
3011 * separately.
3012 */
3013 if (offload)
3014 ath10k_htt_rx_h_rx_offload(ar, &list);
3015
3016 while (!skb_queue_empty(&list)) {
3017 __skb_queue_head_init(&amsdu);
3018 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
3019 switch (ret) {
3020 case 0:
3021 /* Note: The in-order indication may report interleaved
3022 * frames from different PPDUs meaning reported rx rate
3023 * to mac80211 isn't accurate/reliable. It's still
3024 * better to report something than nothing though. This
3025 * should still give an idea about rx rate to the user.
3026 */
3027 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
3028 ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL);
3029 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL,
3030 NULL);
3031 ath10k_htt_rx_h_enqueue(ar, &amsdu, status);
3032 break;
3033 case -EAGAIN:
3034 fallthrough;
3035 default:
3036 /* Should not happen. */
3037 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
3038 htt->rx_confused = true;
3039 __skb_queue_purge(&list);
3040 return -EIO;
3041 }
3042 }
3043 return ret;
3044 }
3045
ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k * ar,const __le32 * resp_ids,int num_resp_ids)3046 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
3047 const __le32 *resp_ids,
3048 int num_resp_ids)
3049 {
3050 int i;
3051 u32 resp_id;
3052
3053 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
3054 num_resp_ids);
3055
3056 for (i = 0; i < num_resp_ids; i++) {
3057 resp_id = le32_to_cpu(resp_ids[i]);
3058
3059 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
3060 resp_id);
3061
3062 /* TODO: free resp_id */
3063 }
3064 }
3065
ath10k_htt_rx_tx_fetch_ind(struct ath10k * ar,struct sk_buff * skb)3066 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
3067 {
3068 struct ieee80211_hw *hw = ar->hw;
3069 struct ieee80211_txq *txq;
3070 struct htt_resp *resp = (struct htt_resp *)skb->data;
3071 struct htt_tx_fetch_record *record;
3072 size_t len;
3073 size_t max_num_bytes;
3074 size_t max_num_msdus;
3075 size_t num_bytes;
3076 size_t num_msdus;
3077 const __le32 *resp_ids;
3078 u16 num_records;
3079 u16 num_resp_ids;
3080 u16 peer_id;
3081 u8 tid;
3082 int ret;
3083 int i;
3084 bool may_tx;
3085
3086 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
3087
3088 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
3089 if (unlikely(skb->len < len)) {
3090 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
3091 return;
3092 }
3093
3094 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
3095 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
3096
3097 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
3098 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
3099
3100 if (unlikely(skb->len < len)) {
3101 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
3102 return;
3103 }
3104
3105 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
3106 num_records, num_resp_ids,
3107 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
3108
3109 if (!ar->htt.tx_q_state.enabled) {
3110 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
3111 return;
3112 }
3113
3114 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
3115 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
3116 return;
3117 }
3118
3119 rcu_read_lock();
3120
3121 for (i = 0; i < num_records; i++) {
3122 record = &resp->tx_fetch_ind.records[i];
3123 peer_id = MS(le16_to_cpu(record->info),
3124 HTT_TX_FETCH_RECORD_INFO_PEER_ID);
3125 tid = MS(le16_to_cpu(record->info),
3126 HTT_TX_FETCH_RECORD_INFO_TID);
3127 max_num_msdus = le16_to_cpu(record->num_msdus);
3128 max_num_bytes = le32_to_cpu(record->num_bytes);
3129
3130 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
3131 i, peer_id, tid, max_num_msdus, max_num_bytes);
3132
3133 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
3134 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
3135 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
3136 peer_id, tid);
3137 continue;
3138 }
3139
3140 spin_lock_bh(&ar->data_lock);
3141 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
3142 spin_unlock_bh(&ar->data_lock);
3143
3144 /* It is okay to release the lock and use txq because RCU read
3145 * lock is held.
3146 */
3147
3148 if (unlikely(!txq)) {
3149 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
3150 peer_id, tid);
3151 continue;
3152 }
3153
3154 num_msdus = 0;
3155 num_bytes = 0;
3156
3157 ieee80211_txq_schedule_start(hw, txq->ac);
3158 may_tx = ieee80211_txq_may_transmit(hw, txq);
3159 while (num_msdus < max_num_msdus &&
3160 num_bytes < max_num_bytes) {
3161 if (!may_tx)
3162 break;
3163
3164 ret = ath10k_mac_tx_push_txq(hw, txq);
3165 if (ret < 0)
3166 break;
3167
3168 num_msdus++;
3169 num_bytes += ret;
3170 }
3171 ieee80211_return_txq(hw, txq, false);
3172 ieee80211_txq_schedule_end(hw, txq->ac);
3173
3174 record->num_msdus = cpu_to_le16(num_msdus);
3175 record->num_bytes = cpu_to_le32(num_bytes);
3176
3177 ath10k_htt_tx_txq_recalc(hw, txq);
3178 }
3179
3180 rcu_read_unlock();
3181
3182 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
3183 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
3184
3185 ret = ath10k_htt_tx_fetch_resp(ar,
3186 resp->tx_fetch_ind.token,
3187 resp->tx_fetch_ind.fetch_seq_num,
3188 resp->tx_fetch_ind.records,
3189 num_records);
3190 if (unlikely(ret)) {
3191 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
3192 le32_to_cpu(resp->tx_fetch_ind.token), ret);
3193 /* FIXME: request fw restart */
3194 }
3195
3196 ath10k_htt_tx_txq_sync(ar);
3197 }
3198
ath10k_htt_rx_tx_fetch_confirm(struct ath10k * ar,struct sk_buff * skb)3199 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
3200 struct sk_buff *skb)
3201 {
3202 const struct htt_resp *resp = (void *)skb->data;
3203 size_t len;
3204 int num_resp_ids;
3205
3206 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
3207
3208 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
3209 if (unlikely(skb->len < len)) {
3210 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
3211 return;
3212 }
3213
3214 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
3215 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
3216
3217 if (unlikely(skb->len < len)) {
3218 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
3219 return;
3220 }
3221
3222 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
3223 resp->tx_fetch_confirm.resp_ids,
3224 num_resp_ids);
3225 }
3226
ath10k_htt_rx_tx_mode_switch_ind(struct ath10k * ar,struct sk_buff * skb)3227 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
3228 struct sk_buff *skb)
3229 {
3230 const struct htt_resp *resp = (void *)skb->data;
3231 const struct htt_tx_mode_switch_record *record;
3232 struct ieee80211_txq *txq;
3233 struct ath10k_txq *artxq;
3234 size_t len;
3235 size_t num_records;
3236 enum htt_tx_mode_switch_mode mode;
3237 bool enable;
3238 u16 info0;
3239 u16 info1;
3240 u16 threshold;
3241 u16 peer_id;
3242 u8 tid;
3243 int i;
3244
3245 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
3246
3247 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
3248 if (unlikely(skb->len < len)) {
3249 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
3250 return;
3251 }
3252
3253 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
3254 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
3255
3256 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
3257 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
3258 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
3259 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
3260
3261 ath10k_dbg(ar, ATH10K_DBG_HTT,
3262 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
3263 info0, info1, enable, num_records, mode, threshold);
3264
3265 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
3266
3267 if (unlikely(skb->len < len)) {
3268 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
3269 return;
3270 }
3271
3272 switch (mode) {
3273 case HTT_TX_MODE_SWITCH_PUSH:
3274 case HTT_TX_MODE_SWITCH_PUSH_PULL:
3275 break;
3276 default:
3277 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
3278 mode);
3279 return;
3280 }
3281
3282 if (!enable)
3283 return;
3284
3285 ar->htt.tx_q_state.enabled = enable;
3286 ar->htt.tx_q_state.mode = mode;
3287 ar->htt.tx_q_state.num_push_allowed = threshold;
3288
3289 rcu_read_lock();
3290
3291 for (i = 0; i < num_records; i++) {
3292 record = &resp->tx_mode_switch_ind.records[i];
3293 info0 = le16_to_cpu(record->info0);
3294 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
3295 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
3296
3297 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
3298 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
3299 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
3300 peer_id, tid);
3301 continue;
3302 }
3303
3304 spin_lock_bh(&ar->data_lock);
3305 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
3306 spin_unlock_bh(&ar->data_lock);
3307
3308 /* It is okay to release the lock and use txq because RCU read
3309 * lock is held.
3310 */
3311
3312 if (unlikely(!txq)) {
3313 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
3314 peer_id, tid);
3315 continue;
3316 }
3317
3318 spin_lock_bh(&ar->htt.tx_lock);
3319 artxq = (void *)txq->drv_priv;
3320 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
3321 spin_unlock_bh(&ar->htt.tx_lock);
3322 }
3323
3324 rcu_read_unlock();
3325
3326 ath10k_mac_tx_push_pending(ar);
3327 }
3328
ath10k_htt_htc_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)3329 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
3330 {
3331 bool release;
3332
3333 release = ath10k_htt_t2h_msg_handler(ar, skb);
3334
3335 /* Free the indication buffer */
3336 if (release)
3337 dev_kfree_skb_any(skb);
3338 }
3339
ath10k_get_legacy_rate_idx(struct ath10k * ar,u8 rate)3340 static inline s8 ath10k_get_legacy_rate_idx(struct ath10k *ar, u8 rate)
3341 {
3342 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
3343 18, 24, 36, 48, 54};
3344 int i;
3345
3346 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
3347 if (rate == legacy_rates[i])
3348 return i;
3349 }
3350
3351 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats", rate);
3352 return -EINVAL;
3353 }
3354
3355 static void
ath10k_accumulate_per_peer_tx_stats(struct ath10k * ar,struct ath10k_sta * arsta,struct ath10k_per_peer_tx_stats * pstats,s8 legacy_rate_idx)3356 ath10k_accumulate_per_peer_tx_stats(struct ath10k *ar,
3357 struct ath10k_sta *arsta,
3358 struct ath10k_per_peer_tx_stats *pstats,
3359 s8 legacy_rate_idx)
3360 {
3361 struct rate_info *txrate = &arsta->txrate;
3362 struct ath10k_htt_tx_stats *tx_stats;
3363 int idx, ht_idx, gi, mcs, bw, nss;
3364 unsigned long flags;
3365
3366 if (!arsta->tx_stats)
3367 return;
3368
3369 tx_stats = arsta->tx_stats;
3370 flags = txrate->flags;
3371 gi = test_bit(ATH10K_RATE_INFO_FLAGS_SGI_BIT, &flags);
3372 mcs = ATH10K_HW_MCS_RATE(pstats->ratecode);
3373 bw = txrate->bw;
3374 nss = txrate->nss;
3375 ht_idx = mcs + (nss - 1) * 8;
3376 idx = mcs * 8 + 8 * 10 * (nss - 1);
3377 idx += bw * 2 + gi;
3378
3379 #define STATS_OP_FMT(name) tx_stats->stats[ATH10K_STATS_TYPE_##name]
3380
3381 if (txrate->flags & RATE_INFO_FLAGS_VHT_MCS) {
3382 STATS_OP_FMT(SUCC).vht[0][mcs] += pstats->succ_bytes;
3383 STATS_OP_FMT(SUCC).vht[1][mcs] += pstats->succ_pkts;
3384 STATS_OP_FMT(FAIL).vht[0][mcs] += pstats->failed_bytes;
3385 STATS_OP_FMT(FAIL).vht[1][mcs] += pstats->failed_pkts;
3386 STATS_OP_FMT(RETRY).vht[0][mcs] += pstats->retry_bytes;
3387 STATS_OP_FMT(RETRY).vht[1][mcs] += pstats->retry_pkts;
3388 } else if (txrate->flags & RATE_INFO_FLAGS_MCS) {
3389 STATS_OP_FMT(SUCC).ht[0][ht_idx] += pstats->succ_bytes;
3390 STATS_OP_FMT(SUCC).ht[1][ht_idx] += pstats->succ_pkts;
3391 STATS_OP_FMT(FAIL).ht[0][ht_idx] += pstats->failed_bytes;
3392 STATS_OP_FMT(FAIL).ht[1][ht_idx] += pstats->failed_pkts;
3393 STATS_OP_FMT(RETRY).ht[0][ht_idx] += pstats->retry_bytes;
3394 STATS_OP_FMT(RETRY).ht[1][ht_idx] += pstats->retry_pkts;
3395 } else {
3396 mcs = legacy_rate_idx;
3397
3398 STATS_OP_FMT(SUCC).legacy[0][mcs] += pstats->succ_bytes;
3399 STATS_OP_FMT(SUCC).legacy[1][mcs] += pstats->succ_pkts;
3400 STATS_OP_FMT(FAIL).legacy[0][mcs] += pstats->failed_bytes;
3401 STATS_OP_FMT(FAIL).legacy[1][mcs] += pstats->failed_pkts;
3402 STATS_OP_FMT(RETRY).legacy[0][mcs] += pstats->retry_bytes;
3403 STATS_OP_FMT(RETRY).legacy[1][mcs] += pstats->retry_pkts;
3404 }
3405
3406 if (ATH10K_HW_AMPDU(pstats->flags)) {
3407 tx_stats->ba_fails += ATH10K_HW_BA_FAIL(pstats->flags);
3408
3409 if (txrate->flags & RATE_INFO_FLAGS_MCS) {
3410 STATS_OP_FMT(AMPDU).ht[0][ht_idx] +=
3411 pstats->succ_bytes + pstats->retry_bytes;
3412 STATS_OP_FMT(AMPDU).ht[1][ht_idx] +=
3413 pstats->succ_pkts + pstats->retry_pkts;
3414 } else {
3415 STATS_OP_FMT(AMPDU).vht[0][mcs] +=
3416 pstats->succ_bytes + pstats->retry_bytes;
3417 STATS_OP_FMT(AMPDU).vht[1][mcs] +=
3418 pstats->succ_pkts + pstats->retry_pkts;
3419 }
3420 STATS_OP_FMT(AMPDU).bw[0][bw] +=
3421 pstats->succ_bytes + pstats->retry_bytes;
3422 STATS_OP_FMT(AMPDU).nss[0][nss - 1] +=
3423 pstats->succ_bytes + pstats->retry_bytes;
3424 STATS_OP_FMT(AMPDU).gi[0][gi] +=
3425 pstats->succ_bytes + pstats->retry_bytes;
3426 STATS_OP_FMT(AMPDU).rate_table[0][idx] +=
3427 pstats->succ_bytes + pstats->retry_bytes;
3428 STATS_OP_FMT(AMPDU).bw[1][bw] +=
3429 pstats->succ_pkts + pstats->retry_pkts;
3430 STATS_OP_FMT(AMPDU).nss[1][nss - 1] +=
3431 pstats->succ_pkts + pstats->retry_pkts;
3432 STATS_OP_FMT(AMPDU).gi[1][gi] +=
3433 pstats->succ_pkts + pstats->retry_pkts;
3434 STATS_OP_FMT(AMPDU).rate_table[1][idx] +=
3435 pstats->succ_pkts + pstats->retry_pkts;
3436 } else {
3437 tx_stats->ack_fails +=
3438 ATH10K_HW_BA_FAIL(pstats->flags);
3439 }
3440
3441 STATS_OP_FMT(SUCC).bw[0][bw] += pstats->succ_bytes;
3442 STATS_OP_FMT(SUCC).nss[0][nss - 1] += pstats->succ_bytes;
3443 STATS_OP_FMT(SUCC).gi[0][gi] += pstats->succ_bytes;
3444
3445 STATS_OP_FMT(SUCC).bw[1][bw] += pstats->succ_pkts;
3446 STATS_OP_FMT(SUCC).nss[1][nss - 1] += pstats->succ_pkts;
3447 STATS_OP_FMT(SUCC).gi[1][gi] += pstats->succ_pkts;
3448
3449 STATS_OP_FMT(FAIL).bw[0][bw] += pstats->failed_bytes;
3450 STATS_OP_FMT(FAIL).nss[0][nss - 1] += pstats->failed_bytes;
3451 STATS_OP_FMT(FAIL).gi[0][gi] += pstats->failed_bytes;
3452
3453 STATS_OP_FMT(FAIL).bw[1][bw] += pstats->failed_pkts;
3454 STATS_OP_FMT(FAIL).nss[1][nss - 1] += pstats->failed_pkts;
3455 STATS_OP_FMT(FAIL).gi[1][gi] += pstats->failed_pkts;
3456
3457 STATS_OP_FMT(RETRY).bw[0][bw] += pstats->retry_bytes;
3458 STATS_OP_FMT(RETRY).nss[0][nss - 1] += pstats->retry_bytes;
3459 STATS_OP_FMT(RETRY).gi[0][gi] += pstats->retry_bytes;
3460
3461 STATS_OP_FMT(RETRY).bw[1][bw] += pstats->retry_pkts;
3462 STATS_OP_FMT(RETRY).nss[1][nss - 1] += pstats->retry_pkts;
3463 STATS_OP_FMT(RETRY).gi[1][gi] += pstats->retry_pkts;
3464
3465 if (txrate->flags >= RATE_INFO_FLAGS_MCS) {
3466 STATS_OP_FMT(SUCC).rate_table[0][idx] += pstats->succ_bytes;
3467 STATS_OP_FMT(SUCC).rate_table[1][idx] += pstats->succ_pkts;
3468 STATS_OP_FMT(FAIL).rate_table[0][idx] += pstats->failed_bytes;
3469 STATS_OP_FMT(FAIL).rate_table[1][idx] += pstats->failed_pkts;
3470 STATS_OP_FMT(RETRY).rate_table[0][idx] += pstats->retry_bytes;
3471 STATS_OP_FMT(RETRY).rate_table[1][idx] += pstats->retry_pkts;
3472 }
3473
3474 tx_stats->tx_duration += pstats->duration;
3475 }
3476
3477 static void
ath10k_update_per_peer_tx_stats(struct ath10k * ar,struct ieee80211_sta * sta,struct ath10k_per_peer_tx_stats * peer_stats)3478 ath10k_update_per_peer_tx_stats(struct ath10k *ar,
3479 struct ieee80211_sta *sta,
3480 struct ath10k_per_peer_tx_stats *peer_stats)
3481 {
3482 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
3483 struct ieee80211_chanctx_conf *conf = NULL;
3484 u8 rate = 0, sgi;
3485 s8 rate_idx = 0;
3486 bool skip_auto_rate;
3487 struct rate_info txrate;
3488
3489 lockdep_assert_held(&ar->data_lock);
3490
3491 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
3492 txrate.bw = ATH10K_HW_BW(peer_stats->flags);
3493 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
3494 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
3495 sgi = ATH10K_HW_GI(peer_stats->flags);
3496 skip_auto_rate = ATH10K_FW_SKIPPED_RATE_CTRL(peer_stats->flags);
3497
3498 /* Firmware's rate control skips broadcast/management frames,
3499 * if host has configure fixed rates and in some other special cases.
3500 */
3501 if (skip_auto_rate)
3502 return;
3503
3504 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) {
3505 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs);
3506 return;
3507 }
3508
3509 if (txrate.flags == WMI_RATE_PREAMBLE_HT &&
3510 (txrate.mcs > 7 || txrate.nss < 1)) {
3511 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats",
3512 txrate.mcs, txrate.nss);
3513 return;
3514 }
3515
3516 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
3517 memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status));
3518 if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
3519 txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
3520 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
3521 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
3522 if (rate == 6 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
3523 rate = 5;
3524 rate_idx = ath10k_get_legacy_rate_idx(ar, rate);
3525 if (rate_idx < 0)
3526 return;
3527 arsta->txrate.legacy = rate;
3528 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
3529 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
3530 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1);
3531 } else {
3532 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
3533 arsta->txrate.mcs = txrate.mcs;
3534 }
3535
3536 switch (txrate.flags) {
3537 case WMI_RATE_PREAMBLE_OFDM:
3538 if (arsta->arvif && arsta->arvif->vif)
3539 conf = rcu_dereference(arsta->arvif->vif->chanctx_conf);
3540 if (conf && conf->def.chan->band == NL80211_BAND_5GHZ)
3541 arsta->tx_info.status.rates[0].idx = rate_idx - 4;
3542 break;
3543 case WMI_RATE_PREAMBLE_CCK:
3544 arsta->tx_info.status.rates[0].idx = rate_idx;
3545 if (sgi)
3546 arsta->tx_info.status.rates[0].flags |=
3547 (IEEE80211_TX_RC_USE_SHORT_PREAMBLE |
3548 IEEE80211_TX_RC_SHORT_GI);
3549 break;
3550 case WMI_RATE_PREAMBLE_HT:
3551 arsta->tx_info.status.rates[0].idx =
3552 txrate.mcs + ((txrate.nss - 1) * 8);
3553 if (sgi)
3554 arsta->tx_info.status.rates[0].flags |=
3555 IEEE80211_TX_RC_SHORT_GI;
3556 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS;
3557 break;
3558 case WMI_RATE_PREAMBLE_VHT:
3559 ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0],
3560 txrate.mcs, txrate.nss);
3561 if (sgi)
3562 arsta->tx_info.status.rates[0].flags |=
3563 IEEE80211_TX_RC_SHORT_GI;
3564 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS;
3565 break;
3566 }
3567
3568 arsta->txrate.nss = txrate.nss;
3569 arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw);
3570 arsta->last_tx_bitrate = cfg80211_calculate_bitrate(&arsta->txrate);
3571 if (sgi)
3572 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
3573
3574 switch (arsta->txrate.bw) {
3575 case RATE_INFO_BW_40:
3576 arsta->tx_info.status.rates[0].flags |=
3577 IEEE80211_TX_RC_40_MHZ_WIDTH;
3578 break;
3579 case RATE_INFO_BW_80:
3580 arsta->tx_info.status.rates[0].flags |=
3581 IEEE80211_TX_RC_80_MHZ_WIDTH;
3582 break;
3583 }
3584
3585 if (peer_stats->succ_pkts) {
3586 arsta->tx_info.flags = IEEE80211_TX_STAT_ACK;
3587 arsta->tx_info.status.rates[0].count = 1;
3588 ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info);
3589 }
3590
3591 if (ar->htt.disable_tx_comp) {
3592 arsta->tx_failed += peer_stats->failed_pkts;
3593 ath10k_dbg(ar, ATH10K_DBG_HTT, "tx failed %d\n",
3594 arsta->tx_failed);
3595 }
3596
3597 arsta->tx_retries += peer_stats->retry_pkts;
3598 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx retries %d", arsta->tx_retries);
3599
3600 if (ath10k_debug_is_extd_tx_stats_enabled(ar))
3601 ath10k_accumulate_per_peer_tx_stats(ar, arsta, peer_stats,
3602 rate_idx);
3603 }
3604
ath10k_htt_fetch_peer_stats(struct ath10k * ar,struct sk_buff * skb)3605 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
3606 struct sk_buff *skb)
3607 {
3608 struct htt_resp *resp = (struct htt_resp *)skb->data;
3609 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
3610 struct htt_per_peer_tx_stats_ind *tx_stats;
3611 struct ieee80211_sta *sta;
3612 struct ath10k_peer *peer;
3613 int peer_id, i;
3614 u8 ppdu_len, num_ppdu;
3615
3616 num_ppdu = resp->peer_tx_stats.num_ppdu;
3617 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
3618
3619 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
3620 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
3621 return;
3622 }
3623
3624 tx_stats = (struct htt_per_peer_tx_stats_ind *)
3625 (resp->peer_tx_stats.payload);
3626 peer_id = __le16_to_cpu(tx_stats->peer_id);
3627
3628 rcu_read_lock();
3629 spin_lock_bh(&ar->data_lock);
3630 peer = ath10k_peer_find_by_id(ar, peer_id);
3631 if (!peer || !peer->sta) {
3632 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
3633 peer_id);
3634 goto out;
3635 }
3636
3637 sta = peer->sta;
3638 for (i = 0; i < num_ppdu; i++) {
3639 tx_stats = (struct htt_per_peer_tx_stats_ind *)
3640 (resp->peer_tx_stats.payload + i * ppdu_len);
3641
3642 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
3643 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
3644 p_tx_stats->failed_bytes =
3645 __le32_to_cpu(tx_stats->failed_bytes);
3646 p_tx_stats->ratecode = tx_stats->ratecode;
3647 p_tx_stats->flags = tx_stats->flags;
3648 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
3649 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
3650 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
3651 p_tx_stats->duration = __le16_to_cpu(tx_stats->tx_duration);
3652
3653 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
3654 }
3655
3656 out:
3657 spin_unlock_bh(&ar->data_lock);
3658 rcu_read_unlock();
3659 }
3660
ath10k_fetch_10_2_tx_stats(struct ath10k * ar,u8 * data)3661 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data)
3662 {
3663 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data;
3664 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
3665 struct ath10k_10_2_peer_tx_stats *tx_stats;
3666 struct ieee80211_sta *sta;
3667 struct ath10k_peer *peer;
3668 u16 log_type = __le16_to_cpu(hdr->log_type);
3669 u32 peer_id = 0, i;
3670
3671 if (log_type != ATH_PKTLOG_TYPE_TX_STAT)
3672 return;
3673
3674 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) +
3675 ATH10K_10_2_TX_STATS_OFFSET);
3676
3677 if (!tx_stats->tx_ppdu_cnt)
3678 return;
3679
3680 peer_id = tx_stats->peer_id;
3681
3682 rcu_read_lock();
3683 spin_lock_bh(&ar->data_lock);
3684 peer = ath10k_peer_find_by_id(ar, peer_id);
3685 if (!peer || !peer->sta) {
3686 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n",
3687 peer_id);
3688 goto out;
3689 }
3690
3691 sta = peer->sta;
3692 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) {
3693 p_tx_stats->succ_bytes =
3694 __le16_to_cpu(tx_stats->success_bytes[i]);
3695 p_tx_stats->retry_bytes =
3696 __le16_to_cpu(tx_stats->retry_bytes[i]);
3697 p_tx_stats->failed_bytes =
3698 __le16_to_cpu(tx_stats->failed_bytes[i]);
3699 p_tx_stats->ratecode = tx_stats->ratecode[i];
3700 p_tx_stats->flags = tx_stats->flags[i];
3701 p_tx_stats->succ_pkts = tx_stats->success_pkts[i];
3702 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i];
3703 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i];
3704
3705 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
3706 }
3707 spin_unlock_bh(&ar->data_lock);
3708 rcu_read_unlock();
3709
3710 return;
3711
3712 out:
3713 spin_unlock_bh(&ar->data_lock);
3714 rcu_read_unlock();
3715 }
3716
ath10k_htt_rx_pn_len(enum htt_security_types sec_type)3717 static int ath10k_htt_rx_pn_len(enum htt_security_types sec_type)
3718 {
3719 switch (sec_type) {
3720 case HTT_SECURITY_TKIP:
3721 case HTT_SECURITY_TKIP_NOMIC:
3722 case HTT_SECURITY_AES_CCMP:
3723 return 48;
3724 default:
3725 return 0;
3726 }
3727 }
3728
ath10k_htt_rx_sec_ind_handler(struct ath10k * ar,struct htt_security_indication * ev)3729 static void ath10k_htt_rx_sec_ind_handler(struct ath10k *ar,
3730 struct htt_security_indication *ev)
3731 {
3732 enum htt_txrx_sec_cast_type sec_index;
3733 enum htt_security_types sec_type;
3734 struct ath10k_peer *peer;
3735
3736 spin_lock_bh(&ar->data_lock);
3737
3738 peer = ath10k_peer_find_by_id(ar, __le16_to_cpu(ev->peer_id));
3739 if (!peer) {
3740 ath10k_warn(ar, "failed to find peer id %d for security indication",
3741 __le16_to_cpu(ev->peer_id));
3742 goto out;
3743 }
3744
3745 sec_type = MS(ev->flags, HTT_SECURITY_TYPE);
3746
3747 if (ev->flags & HTT_SECURITY_IS_UNICAST)
3748 sec_index = HTT_TXRX_SEC_UCAST;
3749 else
3750 sec_index = HTT_TXRX_SEC_MCAST;
3751
3752 peer->rx_pn[sec_index].sec_type = sec_type;
3753 peer->rx_pn[sec_index].pn_len = ath10k_htt_rx_pn_len(sec_type);
3754
3755 memset(peer->tids_last_pn_valid, 0, sizeof(peer->tids_last_pn_valid));
3756 memset(peer->tids_last_pn, 0, sizeof(peer->tids_last_pn));
3757
3758 out:
3759 spin_unlock_bh(&ar->data_lock);
3760 }
3761
ath10k_htt_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)3762 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
3763 {
3764 struct ath10k_htt *htt = &ar->htt;
3765 struct htt_resp *resp = (struct htt_resp *)skb->data;
3766 enum htt_t2h_msg_type type;
3767
3768 /* confirm alignment */
3769 if (!IS_ALIGNED((unsigned long)skb->data, 4))
3770 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
3771
3772 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
3773 resp->hdr.msg_type);
3774
3775 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
3776 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
3777 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
3778 return true;
3779 }
3780 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
3781
3782 switch (type) {
3783 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
3784 htt->target_version_major = resp->ver_resp.major;
3785 htt->target_version_minor = resp->ver_resp.minor;
3786 complete(&htt->target_version_received);
3787 break;
3788 }
3789 case HTT_T2H_MSG_TYPE_RX_IND:
3790 if (ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) {
3791 ath10k_htt_rx_proc_rx_ind_ll(htt, &resp->rx_ind);
3792 } else {
3793 skb_queue_tail(&htt->rx_indication_head, skb);
3794 return false;
3795 }
3796 break;
3797 case HTT_T2H_MSG_TYPE_PEER_MAP: {
3798 struct htt_peer_map_event ev = {
3799 .vdev_id = resp->peer_map.vdev_id,
3800 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
3801 };
3802 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
3803 ath10k_peer_map_event(htt, &ev);
3804 break;
3805 }
3806 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
3807 struct htt_peer_unmap_event ev = {
3808 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
3809 };
3810 ath10k_peer_unmap_event(htt, &ev);
3811 break;
3812 }
3813 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
3814 struct htt_tx_done tx_done = {};
3815 struct ath10k_htt *htt = &ar->htt;
3816 struct ath10k_htc *htc = &ar->htc;
3817 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
3818 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
3819 int info = __le32_to_cpu(resp->mgmt_tx_completion.info);
3820
3821 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
3822
3823 switch (status) {
3824 case HTT_MGMT_TX_STATUS_OK:
3825 tx_done.status = HTT_TX_COMPL_STATE_ACK;
3826 if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
3827 ar->wmi.svc_map) &&
3828 (resp->mgmt_tx_completion.flags &
3829 HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) {
3830 tx_done.ack_rssi =
3831 FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK,
3832 info);
3833 }
3834 break;
3835 case HTT_MGMT_TX_STATUS_RETRY:
3836 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
3837 break;
3838 case HTT_MGMT_TX_STATUS_DROP:
3839 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
3840 break;
3841 }
3842
3843 if (htt->disable_tx_comp) {
3844 spin_lock_bh(&htc->tx_lock);
3845 ep->tx_credits++;
3846 spin_unlock_bh(&htc->tx_lock);
3847 }
3848
3849 status = ath10k_txrx_tx_unref(htt, &tx_done);
3850 if (!status) {
3851 spin_lock_bh(&htt->tx_lock);
3852 ath10k_htt_tx_mgmt_dec_pending(htt);
3853 spin_unlock_bh(&htt->tx_lock);
3854 }
3855 break;
3856 }
3857 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
3858 ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
3859 break;
3860 case HTT_T2H_MSG_TYPE_SEC_IND: {
3861 struct ath10k *ar = htt->ar;
3862 struct htt_security_indication *ev = &resp->security_indication;
3863
3864 ath10k_htt_rx_sec_ind_handler(ar, ev);
3865 ath10k_dbg(ar, ATH10K_DBG_HTT,
3866 "sec ind peer_id %d unicast %d type %d\n",
3867 __le16_to_cpu(ev->peer_id),
3868 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
3869 MS(ev->flags, HTT_SECURITY_TYPE));
3870 complete(&ar->install_key_done);
3871 break;
3872 }
3873 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
3874 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
3875 skb->data, skb->len);
3876 atomic_inc(&htt->num_mpdus_ready);
3877
3878 return ath10k_htt_rx_proc_rx_frag_ind(htt,
3879 &resp->rx_frag_ind,
3880 skb);
3881 break;
3882 }
3883 case HTT_T2H_MSG_TYPE_TEST:
3884 break;
3885 case HTT_T2H_MSG_TYPE_STATS_CONF:
3886 trace_ath10k_htt_stats(ar, skb->data, skb->len);
3887 break;
3888 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
3889 /* Firmware can return tx frames if it's unable to fully
3890 * process them and suspects host may be able to fix it. ath10k
3891 * sends all tx frames as already inspected so this shouldn't
3892 * happen unless fw has a bug.
3893 */
3894 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
3895 break;
3896 case HTT_T2H_MSG_TYPE_RX_ADDBA:
3897 ath10k_htt_rx_addba(ar, resp);
3898 break;
3899 case HTT_T2H_MSG_TYPE_RX_DELBA:
3900 ath10k_htt_rx_delba(ar, resp);
3901 break;
3902 case HTT_T2H_MSG_TYPE_PKTLOG: {
3903 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
3904 skb->len -
3905 offsetof(struct htt_resp,
3906 pktlog_msg.payload));
3907
3908 if (ath10k_peer_stats_enabled(ar))
3909 ath10k_fetch_10_2_tx_stats(ar,
3910 resp->pktlog_msg.payload);
3911 break;
3912 }
3913 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
3914 /* Ignore this event because mac80211 takes care of Rx
3915 * aggregation reordering.
3916 */
3917 break;
3918 }
3919 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
3920 skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
3921 return false;
3922 }
3923 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: {
3924 struct ath10k_htt *htt = &ar->htt;
3925 struct ath10k_htc *htc = &ar->htc;
3926 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
3927 u32 msg_word = __le32_to_cpu(*(__le32 *)resp);
3928 int htt_credit_delta;
3929
3930 htt_credit_delta = HTT_TX_CREDIT_DELTA_ABS_GET(msg_word);
3931 if (HTT_TX_CREDIT_SIGN_BIT_GET(msg_word))
3932 htt_credit_delta = -htt_credit_delta;
3933
3934 ath10k_dbg(ar, ATH10K_DBG_HTT,
3935 "htt credit update delta %d\n",
3936 htt_credit_delta);
3937
3938 if (htt->disable_tx_comp) {
3939 spin_lock_bh(&htc->tx_lock);
3940 ep->tx_credits += htt_credit_delta;
3941 spin_unlock_bh(&htc->tx_lock);
3942 ath10k_dbg(ar, ATH10K_DBG_HTT,
3943 "htt credit total %d\n",
3944 ep->tx_credits);
3945 ep->ep_ops.ep_tx_credits(htc->ar);
3946 }
3947 break;
3948 }
3949 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
3950 u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
3951 u32 freq = __le32_to_cpu(resp->chan_change.freq);
3952
3953 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
3954 ath10k_dbg(ar, ATH10K_DBG_HTT,
3955 "htt chan change freq %u phymode %s\n",
3956 freq, ath10k_wmi_phymode_str(phymode));
3957 break;
3958 }
3959 case HTT_T2H_MSG_TYPE_AGGR_CONF:
3960 break;
3961 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
3962 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
3963
3964 if (!tx_fetch_ind) {
3965 ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
3966 break;
3967 }
3968 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
3969 break;
3970 }
3971 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
3972 ath10k_htt_rx_tx_fetch_confirm(ar, skb);
3973 break;
3974 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
3975 ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
3976 break;
3977 case HTT_T2H_MSG_TYPE_PEER_STATS:
3978 ath10k_htt_fetch_peer_stats(ar, skb);
3979 break;
3980 case HTT_T2H_MSG_TYPE_EN_STATS:
3981 default:
3982 ath10k_warn(ar, "htt event (%d) not handled\n",
3983 resp->hdr.msg_type);
3984 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
3985 skb->data, skb->len);
3986 break;
3987 }
3988 return true;
3989 }
3990 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
3991
ath10k_htt_rx_pktlog_completion_handler(struct ath10k * ar,struct sk_buff * skb)3992 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
3993 struct sk_buff *skb)
3994 {
3995 trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
3996 dev_kfree_skb_any(skb);
3997 }
3998 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
3999
ath10k_htt_rx_deliver_msdu(struct ath10k * ar,int quota,int budget)4000 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget)
4001 {
4002 struct sk_buff *skb;
4003
4004 while (quota < budget) {
4005 if (skb_queue_empty(&ar->htt.rx_msdus_q))
4006 break;
4007
4008 skb = skb_dequeue(&ar->htt.rx_msdus_q);
4009 if (!skb)
4010 break;
4011 ath10k_process_rx(ar, skb);
4012 quota++;
4013 }
4014
4015 return quota;
4016 }
4017
ath10k_htt_rx_hl_indication(struct ath10k * ar,int budget)4018 int ath10k_htt_rx_hl_indication(struct ath10k *ar, int budget)
4019 {
4020 struct htt_resp *resp;
4021 struct ath10k_htt *htt = &ar->htt;
4022 struct sk_buff *skb;
4023 bool release;
4024 int quota;
4025
4026 for (quota = 0; quota < budget; quota++) {
4027 skb = skb_dequeue(&htt->rx_indication_head);
4028 if (!skb)
4029 break;
4030
4031 resp = (struct htt_resp *)skb->data;
4032
4033 release = ath10k_htt_rx_proc_rx_ind_hl(htt,
4034 &resp->rx_ind_hl,
4035 skb,
4036 HTT_RX_PN_CHECK,
4037 HTT_RX_NON_TKIP_MIC);
4038
4039 if (release)
4040 dev_kfree_skb_any(skb);
4041
4042 ath10k_dbg(ar, ATH10K_DBG_HTT, "rx indication poll pending count:%d\n",
4043 skb_queue_len(&htt->rx_indication_head));
4044 }
4045 return quota;
4046 }
4047 EXPORT_SYMBOL(ath10k_htt_rx_hl_indication);
4048
ath10k_htt_txrx_compl_task(struct ath10k * ar,int budget)4049 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
4050 {
4051 struct ath10k_htt *htt = &ar->htt;
4052 struct htt_tx_done tx_done = {};
4053 struct sk_buff_head tx_ind_q;
4054 struct sk_buff *skb;
4055 unsigned long flags;
4056 int quota = 0, done, ret;
4057 bool resched_napi = false;
4058
4059 __skb_queue_head_init(&tx_ind_q);
4060
4061 /* Process pending frames before dequeuing more data
4062 * from hardware.
4063 */
4064 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
4065 if (quota == budget) {
4066 resched_napi = true;
4067 goto exit;
4068 }
4069
4070 while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) {
4071 spin_lock_bh(&htt->rx_ring.lock);
4072 ret = ath10k_htt_rx_in_ord_ind(ar, skb);
4073 spin_unlock_bh(&htt->rx_ring.lock);
4074
4075 dev_kfree_skb_any(skb);
4076 if (ret == -EIO) {
4077 resched_napi = true;
4078 goto exit;
4079 }
4080 }
4081
4082 while (atomic_read(&htt->num_mpdus_ready)) {
4083 ret = ath10k_htt_rx_handle_amsdu(htt);
4084 if (ret == -EIO) {
4085 resched_napi = true;
4086 goto exit;
4087 }
4088 atomic_dec(&htt->num_mpdus_ready);
4089 }
4090
4091 /* Deliver received data after processing data from hardware */
4092 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
4093
4094 /* From NAPI documentation:
4095 * The napi poll() function may also process TX completions, in which
4096 * case if it processes the entire TX ring then it should count that
4097 * work as the rest of the budget.
4098 */
4099 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
4100 quota = budget;
4101
4102 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
4103 * From kfifo_get() documentation:
4104 * Note that with only one concurrent reader and one concurrent writer,
4105 * you don't need extra locking to use these macro.
4106 */
4107 while (kfifo_get(&htt->txdone_fifo, &tx_done))
4108 ath10k_txrx_tx_unref(htt, &tx_done);
4109
4110 ath10k_mac_tx_push_pending(ar);
4111
4112 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
4113 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
4114 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
4115
4116 while ((skb = __skb_dequeue(&tx_ind_q))) {
4117 ath10k_htt_rx_tx_fetch_ind(ar, skb);
4118 dev_kfree_skb_any(skb);
4119 }
4120
4121 exit:
4122 ath10k_htt_rx_msdu_buff_replenish(htt);
4123 /* In case of rx failure or more data to read, report budget
4124 * to reschedule NAPI poll
4125 */
4126 done = resched_napi ? budget : quota;
4127
4128 return done;
4129 }
4130 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
4131
4132 static const struct ath10k_htt_rx_ops htt_rx_ops_32 = {
4133 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32,
4134 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32,
4135 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32,
4136 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32,
4137 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32,
4138 };
4139
4140 static const struct ath10k_htt_rx_ops htt_rx_ops_64 = {
4141 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64,
4142 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64,
4143 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64,
4144 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64,
4145 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64,
4146 };
4147
4148 static const struct ath10k_htt_rx_ops htt_rx_ops_hl = {
4149 .htt_rx_proc_rx_frag_ind = ath10k_htt_rx_proc_rx_frag_ind_hl,
4150 };
4151
ath10k_htt_set_rx_ops(struct ath10k_htt * htt)4152 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt)
4153 {
4154 struct ath10k *ar = htt->ar;
4155
4156 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
4157 htt->rx_ops = &htt_rx_ops_hl;
4158 else if (ar->hw_params.target_64bit)
4159 htt->rx_ops = &htt_rx_ops_64;
4160 else
4161 htt->rx_ops = &htt_rx_ops_32;
4162 }
4163