1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #include "core.h"
20 #include "htc.h"
21 #include "htt.h"
22 #include "txrx.h"
23 #include "debug.h"
24 #include "trace.h"
25 #include "mac.h"
26
27 #include <linux/log2.h>
28 #include <linux/bitfield.h>
29
30 /* when under memory pressure rx ring refill may fail and needs a retry */
31 #define HTT_RX_RING_REFILL_RETRY_MS 50
32
33 #define HTT_RX_RING_REFILL_RESCHED_MS 5
34
35 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
36
37 static struct sk_buff *
ath10k_htt_rx_find_skb_paddr(struct ath10k * ar,u64 paddr)38 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr)
39 {
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48 }
49
ath10k_htt_rx_ring_free(struct ath10k_htt * htt)50 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51 {
52 struct sk_buff *skb;
53 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
55 int i;
56
57 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
78 }
79
80 htt->rx_ring.fill_cnt = 0;
81 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
84 }
85
ath10k_htt_get_rx_ring_size_32(struct ath10k_htt * htt)86 static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt)
87 {
88 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32);
89 }
90
ath10k_htt_get_rx_ring_size_64(struct ath10k_htt * htt)91 static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt)
92 {
93 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64);
94 }
95
ath10k_htt_config_paddrs_ring_32(struct ath10k_htt * htt,void * vaddr)96 static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt,
97 void *vaddr)
98 {
99 htt->rx_ring.paddrs_ring_32 = vaddr;
100 }
101
ath10k_htt_config_paddrs_ring_64(struct ath10k_htt * htt,void * vaddr)102 static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt,
103 void *vaddr)
104 {
105 htt->rx_ring.paddrs_ring_64 = vaddr;
106 }
107
ath10k_htt_set_paddrs_ring_32(struct ath10k_htt * htt,dma_addr_t paddr,int idx)108 static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt,
109 dma_addr_t paddr, int idx)
110 {
111 htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr);
112 }
113
ath10k_htt_set_paddrs_ring_64(struct ath10k_htt * htt,dma_addr_t paddr,int idx)114 static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt,
115 dma_addr_t paddr, int idx)
116 {
117 htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr);
118 }
119
ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt * htt,int idx)120 static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx)
121 {
122 htt->rx_ring.paddrs_ring_32[idx] = 0;
123 }
124
ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt * htt,int idx)125 static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx)
126 {
127 htt->rx_ring.paddrs_ring_64[idx] = 0;
128 }
129
ath10k_htt_get_vaddr_ring_32(struct ath10k_htt * htt)130 static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt)
131 {
132 return (void *)htt->rx_ring.paddrs_ring_32;
133 }
134
ath10k_htt_get_vaddr_ring_64(struct ath10k_htt * htt)135 static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt)
136 {
137 return (void *)htt->rx_ring.paddrs_ring_64;
138 }
139
__ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)140 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
141 {
142 struct htt_rx_desc *rx_desc;
143 struct ath10k_skb_rxcb *rxcb;
144 struct sk_buff *skb;
145 dma_addr_t paddr;
146 int ret = 0, idx;
147
148 /* The Full Rx Reorder firmware has no way of telling the host
149 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
150 * To keep things simple make sure ring is always half empty. This
151 * guarantees there'll be no replenishment overruns possible.
152 */
153 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
154
155 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
156 while (num > 0) {
157 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
158 if (!skb) {
159 ret = -ENOMEM;
160 goto fail;
161 }
162
163 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
164 skb_pull(skb,
165 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
166 skb->data);
167
168 /* Clear rx_desc attention word before posting to Rx ring */
169 rx_desc = (struct htt_rx_desc *)skb->data;
170 rx_desc->attention.flags = __cpu_to_le32(0);
171
172 paddr = dma_map_single(htt->ar->dev, skb->data,
173 skb->len + skb_tailroom(skb),
174 DMA_FROM_DEVICE);
175
176 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
177 dev_kfree_skb_any(skb);
178 ret = -ENOMEM;
179 goto fail;
180 }
181
182 rxcb = ATH10K_SKB_RXCB(skb);
183 rxcb->paddr = paddr;
184 htt->rx_ring.netbufs_ring[idx] = skb;
185 ath10k_htt_set_paddrs_ring(htt, paddr, idx);
186 htt->rx_ring.fill_cnt++;
187
188 if (htt->rx_ring.in_ord_rx) {
189 hash_add(htt->rx_ring.skb_table,
190 &ATH10K_SKB_RXCB(skb)->hlist,
191 paddr);
192 }
193
194 num--;
195 idx++;
196 idx &= htt->rx_ring.size_mask;
197 }
198
199 fail:
200 /*
201 * Make sure the rx buffer is updated before available buffer
202 * index to avoid any potential rx ring corruption.
203 */
204 mb();
205 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
206 return ret;
207 }
208
ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)209 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
210 {
211 lockdep_assert_held(&htt->rx_ring.lock);
212 return __ath10k_htt_rx_ring_fill_n(htt, num);
213 }
214
ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt * htt)215 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
216 {
217 int ret, num_deficit, num_to_fill;
218
219 /* Refilling the whole RX ring buffer proves to be a bad idea. The
220 * reason is RX may take up significant amount of CPU cycles and starve
221 * other tasks, e.g. TX on an ethernet device while acting as a bridge
222 * with ath10k wlan interface. This ended up with very poor performance
223 * once CPU the host system was overwhelmed with RX on ath10k.
224 *
225 * By limiting the number of refills the replenishing occurs
226 * progressively. This in turns makes use of the fact tasklets are
227 * processed in FIFO order. This means actual RX processing can starve
228 * out refilling. If there's not enough buffers on RX ring FW will not
229 * report RX until it is refilled with enough buffers. This
230 * automatically balances load wrt to CPU power.
231 *
232 * This probably comes at a cost of lower maximum throughput but
233 * improves the average and stability.
234 */
235 spin_lock_bh(&htt->rx_ring.lock);
236 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
237 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
238 num_deficit -= num_to_fill;
239 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
240 if (ret == -ENOMEM) {
241 /*
242 * Failed to fill it to the desired level -
243 * we'll start a timer and try again next time.
244 * As long as enough buffers are left in the ring for
245 * another A-MPDU rx, no special recovery is needed.
246 */
247 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
248 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
249 } else if (num_deficit > 0) {
250 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
251 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
252 }
253 spin_unlock_bh(&htt->rx_ring.lock);
254 }
255
ath10k_htt_rx_ring_refill_retry(struct timer_list * t)256 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)
257 {
258 struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer);
259
260 ath10k_htt_rx_msdu_buff_replenish(htt);
261 }
262
ath10k_htt_rx_ring_refill(struct ath10k * ar)263 int ath10k_htt_rx_ring_refill(struct ath10k *ar)
264 {
265 struct ath10k_htt *htt = &ar->htt;
266 int ret;
267
268 spin_lock_bh(&htt->rx_ring.lock);
269 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
270 htt->rx_ring.fill_cnt));
271
272 if (ret)
273 ath10k_htt_rx_ring_free(htt);
274
275 spin_unlock_bh(&htt->rx_ring.lock);
276
277 return ret;
278 }
279
ath10k_htt_rx_free(struct ath10k_htt * htt)280 void ath10k_htt_rx_free(struct ath10k_htt *htt)
281 {
282 del_timer_sync(&htt->rx_ring.refill_retry_timer);
283
284 skb_queue_purge(&htt->rx_msdus_q);
285 skb_queue_purge(&htt->rx_in_ord_compl_q);
286 skb_queue_purge(&htt->tx_fetch_ind_q);
287
288 spin_lock_bh(&htt->rx_ring.lock);
289 ath10k_htt_rx_ring_free(htt);
290 spin_unlock_bh(&htt->rx_ring.lock);
291
292 dma_free_coherent(htt->ar->dev,
293 ath10k_htt_get_rx_ring_size(htt),
294 ath10k_htt_get_vaddr_ring(htt),
295 htt->rx_ring.base_paddr);
296
297 dma_free_coherent(htt->ar->dev,
298 sizeof(*htt->rx_ring.alloc_idx.vaddr),
299 htt->rx_ring.alloc_idx.vaddr,
300 htt->rx_ring.alloc_idx.paddr);
301
302 kfree(htt->rx_ring.netbufs_ring);
303 }
304
ath10k_htt_rx_netbuf_pop(struct ath10k_htt * htt)305 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
306 {
307 struct ath10k *ar = htt->ar;
308 int idx;
309 struct sk_buff *msdu;
310
311 lockdep_assert_held(&htt->rx_ring.lock);
312
313 if (htt->rx_ring.fill_cnt == 0) {
314 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
315 return NULL;
316 }
317
318 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
319 msdu = htt->rx_ring.netbufs_ring[idx];
320 htt->rx_ring.netbufs_ring[idx] = NULL;
321 ath10k_htt_reset_paddrs_ring(htt, idx);
322
323 idx++;
324 idx &= htt->rx_ring.size_mask;
325 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
326 htt->rx_ring.fill_cnt--;
327
328 dma_unmap_single(htt->ar->dev,
329 ATH10K_SKB_RXCB(msdu)->paddr,
330 msdu->len + skb_tailroom(msdu),
331 DMA_FROM_DEVICE);
332 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
333 msdu->data, msdu->len + skb_tailroom(msdu));
334
335 return msdu;
336 }
337
338 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
ath10k_htt_rx_amsdu_pop(struct ath10k_htt * htt,struct sk_buff_head * amsdu)339 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
340 struct sk_buff_head *amsdu)
341 {
342 struct ath10k *ar = htt->ar;
343 int msdu_len, msdu_chaining = 0;
344 struct sk_buff *msdu;
345 struct htt_rx_desc *rx_desc;
346
347 lockdep_assert_held(&htt->rx_ring.lock);
348
349 for (;;) {
350 int last_msdu, msdu_len_invalid, msdu_chained;
351
352 msdu = ath10k_htt_rx_netbuf_pop(htt);
353 if (!msdu) {
354 __skb_queue_purge(amsdu);
355 return -ENOENT;
356 }
357
358 __skb_queue_tail(amsdu, msdu);
359
360 rx_desc = (struct htt_rx_desc *)msdu->data;
361
362 /* FIXME: we must report msdu payload since this is what caller
363 * expects now
364 */
365 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
366 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
367
368 /*
369 * Sanity check - confirm the HW is finished filling in the
370 * rx data.
371 * If the HW and SW are working correctly, then it's guaranteed
372 * that the HW's MAC DMA is done before this point in the SW.
373 * To prevent the case that we handle a stale Rx descriptor,
374 * just assert for now until we have a way to recover.
375 */
376 if (!(__le32_to_cpu(rx_desc->attention.flags)
377 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
378 __skb_queue_purge(amsdu);
379 return -EIO;
380 }
381
382 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
383 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
384 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
385 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
386 RX_MSDU_START_INFO0_MSDU_LENGTH);
387 msdu_chained = rx_desc->frag_info.ring2_more_count;
388
389 if (msdu_len_invalid)
390 msdu_len = 0;
391
392 skb_trim(msdu, 0);
393 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
394 msdu_len -= msdu->len;
395
396 /* Note: Chained buffers do not contain rx descriptor */
397 while (msdu_chained--) {
398 msdu = ath10k_htt_rx_netbuf_pop(htt);
399 if (!msdu) {
400 __skb_queue_purge(amsdu);
401 return -ENOENT;
402 }
403
404 __skb_queue_tail(amsdu, msdu);
405 skb_trim(msdu, 0);
406 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
407 msdu_len -= msdu->len;
408 msdu_chaining = 1;
409 }
410
411 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
412 RX_MSDU_END_INFO0_LAST_MSDU;
413
414 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
415 sizeof(*rx_desc) - sizeof(u32));
416
417 if (last_msdu)
418 break;
419 }
420
421 if (skb_queue_empty(amsdu))
422 msdu_chaining = -1;
423
424 /*
425 * Don't refill the ring yet.
426 *
427 * First, the elements popped here are still in use - it is not
428 * safe to overwrite them until the matching call to
429 * mpdu_desc_list_next. Second, for efficiency it is preferable to
430 * refill the rx ring with 1 PPDU's worth of rx buffers (something
431 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
432 * (something like 3 buffers). Consequently, we'll rely on the txrx
433 * SW to tell us when it is done pulling all the PPDU's rx buffers
434 * out of the rx ring, and then refill it just once.
435 */
436
437 return msdu_chaining;
438 }
439
ath10k_htt_rx_pop_paddr(struct ath10k_htt * htt,u64 paddr)440 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
441 u64 paddr)
442 {
443 struct ath10k *ar = htt->ar;
444 struct ath10k_skb_rxcb *rxcb;
445 struct sk_buff *msdu;
446
447 lockdep_assert_held(&htt->rx_ring.lock);
448
449 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
450 if (!msdu)
451 return NULL;
452
453 rxcb = ATH10K_SKB_RXCB(msdu);
454 hash_del(&rxcb->hlist);
455 htt->rx_ring.fill_cnt--;
456
457 dma_unmap_single(htt->ar->dev, rxcb->paddr,
458 msdu->len + skb_tailroom(msdu),
459 DMA_FROM_DEVICE);
460 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
461 msdu->data, msdu->len + skb_tailroom(msdu));
462
463 return msdu;
464 }
465
ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)466 static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt,
467 struct htt_rx_in_ord_ind *ev,
468 struct sk_buff_head *list)
469 {
470 struct ath10k *ar = htt->ar;
471 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32;
472 struct htt_rx_desc *rxd;
473 struct sk_buff *msdu;
474 int msdu_count;
475 bool is_offload;
476 u32 paddr;
477
478 lockdep_assert_held(&htt->rx_ring.lock);
479
480 msdu_count = __le16_to_cpu(ev->msdu_count);
481 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
482
483 while (msdu_count--) {
484 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
485
486 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
487 if (!msdu) {
488 __skb_queue_purge(list);
489 return -ENOENT;
490 }
491
492 __skb_queue_tail(list, msdu);
493
494 if (!is_offload) {
495 rxd = (void *)msdu->data;
496
497 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
498
499 skb_put(msdu, sizeof(*rxd));
500 skb_pull(msdu, sizeof(*rxd));
501 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
502
503 if (!(__le32_to_cpu(rxd->attention.flags) &
504 RX_ATTENTION_FLAGS_MSDU_DONE)) {
505 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
506 return -EIO;
507 }
508 }
509
510 msdu_desc++;
511 }
512
513 return 0;
514 }
515
ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)516 static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt,
517 struct htt_rx_in_ord_ind *ev,
518 struct sk_buff_head *list)
519 {
520 struct ath10k *ar = htt->ar;
521 struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64;
522 struct htt_rx_desc *rxd;
523 struct sk_buff *msdu;
524 int msdu_count;
525 bool is_offload;
526 u64 paddr;
527
528 lockdep_assert_held(&htt->rx_ring.lock);
529
530 msdu_count = __le16_to_cpu(ev->msdu_count);
531 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
532
533 while (msdu_count--) {
534 paddr = __le64_to_cpu(msdu_desc->msdu_paddr);
535 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
536 if (!msdu) {
537 __skb_queue_purge(list);
538 return -ENOENT;
539 }
540
541 __skb_queue_tail(list, msdu);
542
543 if (!is_offload) {
544 rxd = (void *)msdu->data;
545
546 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
547
548 skb_put(msdu, sizeof(*rxd));
549 skb_pull(msdu, sizeof(*rxd));
550 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
551
552 if (!(__le32_to_cpu(rxd->attention.flags) &
553 RX_ATTENTION_FLAGS_MSDU_DONE)) {
554 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
555 return -EIO;
556 }
557 }
558
559 msdu_desc++;
560 }
561
562 return 0;
563 }
564
ath10k_htt_rx_alloc(struct ath10k_htt * htt)565 int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
566 {
567 struct ath10k *ar = htt->ar;
568 dma_addr_t paddr;
569 void *vaddr, *vaddr_ring;
570 size_t size;
571 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
572
573 htt->rx_confused = false;
574
575 /* XXX: The fill level could be changed during runtime in response to
576 * the host processing latency. Is this really worth it?
577 */
578 htt->rx_ring.size = HTT_RX_RING_SIZE;
579 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
580 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;
581
582 if (!is_power_of_2(htt->rx_ring.size)) {
583 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
584 return -EINVAL;
585 }
586
587 htt->rx_ring.netbufs_ring =
588 kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *),
589 GFP_KERNEL);
590 if (!htt->rx_ring.netbufs_ring)
591 goto err_netbuf;
592
593 size = ath10k_htt_get_rx_ring_size(htt);
594
595 vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
596 if (!vaddr_ring)
597 goto err_dma_ring;
598
599 ath10k_htt_config_paddrs_ring(htt, vaddr_ring);
600 htt->rx_ring.base_paddr = paddr;
601
602 vaddr = dma_alloc_coherent(htt->ar->dev,
603 sizeof(*htt->rx_ring.alloc_idx.vaddr),
604 &paddr, GFP_KERNEL);
605 if (!vaddr)
606 goto err_dma_idx;
607
608 htt->rx_ring.alloc_idx.vaddr = vaddr;
609 htt->rx_ring.alloc_idx.paddr = paddr;
610 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
611 *htt->rx_ring.alloc_idx.vaddr = 0;
612
613 /* Initialize the Rx refill retry timer */
614 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0);
615
616 spin_lock_init(&htt->rx_ring.lock);
617
618 htt->rx_ring.fill_cnt = 0;
619 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
620 hash_init(htt->rx_ring.skb_table);
621
622 skb_queue_head_init(&htt->rx_msdus_q);
623 skb_queue_head_init(&htt->rx_in_ord_compl_q);
624 skb_queue_head_init(&htt->tx_fetch_ind_q);
625 atomic_set(&htt->num_mpdus_ready, 0);
626
627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
628 htt->rx_ring.size, htt->rx_ring.fill_level);
629 return 0;
630
631 err_dma_idx:
632 dma_free_coherent(htt->ar->dev,
633 ath10k_htt_get_rx_ring_size(htt),
634 vaddr_ring,
635 htt->rx_ring.base_paddr);
636 err_dma_ring:
637 kfree(htt->rx_ring.netbufs_ring);
638 err_netbuf:
639 return -ENOMEM;
640 }
641
ath10k_htt_rx_crypto_param_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)642 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
643 enum htt_rx_mpdu_encrypt_type type)
644 {
645 switch (type) {
646 case HTT_RX_MPDU_ENCRYPT_NONE:
647 return 0;
648 case HTT_RX_MPDU_ENCRYPT_WEP40:
649 case HTT_RX_MPDU_ENCRYPT_WEP104:
650 return IEEE80211_WEP_IV_LEN;
651 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
652 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
653 return IEEE80211_TKIP_IV_LEN;
654 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
655 return IEEE80211_CCMP_HDR_LEN;
656 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
657 return IEEE80211_CCMP_256_HDR_LEN;
658 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
659 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
660 return IEEE80211_GCMP_HDR_LEN;
661 case HTT_RX_MPDU_ENCRYPT_WEP128:
662 case HTT_RX_MPDU_ENCRYPT_WAPI:
663 break;
664 }
665
666 ath10k_warn(ar, "unsupported encryption type %d\n", type);
667 return 0;
668 }
669
670 #define MICHAEL_MIC_LEN 8
671
ath10k_htt_rx_crypto_mic_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)672 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar,
673 enum htt_rx_mpdu_encrypt_type type)
674 {
675 switch (type) {
676 case HTT_RX_MPDU_ENCRYPT_NONE:
677 case HTT_RX_MPDU_ENCRYPT_WEP40:
678 case HTT_RX_MPDU_ENCRYPT_WEP104:
679 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
680 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
681 return 0;
682 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
683 return IEEE80211_CCMP_MIC_LEN;
684 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
685 return IEEE80211_CCMP_256_MIC_LEN;
686 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
687 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
688 return IEEE80211_GCMP_MIC_LEN;
689 case HTT_RX_MPDU_ENCRYPT_WEP128:
690 case HTT_RX_MPDU_ENCRYPT_WAPI:
691 break;
692 }
693
694 ath10k_warn(ar, "unsupported encryption type %d\n", type);
695 return 0;
696 }
697
ath10k_htt_rx_crypto_icv_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)698 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar,
699 enum htt_rx_mpdu_encrypt_type type)
700 {
701 switch (type) {
702 case HTT_RX_MPDU_ENCRYPT_NONE:
703 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
704 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
705 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
706 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
707 return 0;
708 case HTT_RX_MPDU_ENCRYPT_WEP40:
709 case HTT_RX_MPDU_ENCRYPT_WEP104:
710 return IEEE80211_WEP_ICV_LEN;
711 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
712 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
713 return IEEE80211_TKIP_ICV_LEN;
714 case HTT_RX_MPDU_ENCRYPT_WEP128:
715 case HTT_RX_MPDU_ENCRYPT_WAPI:
716 break;
717 }
718
719 ath10k_warn(ar, "unsupported encryption type %d\n", type);
720 return 0;
721 }
722
723 struct amsdu_subframe_hdr {
724 u8 dst[ETH_ALEN];
725 u8 src[ETH_ALEN];
726 __be16 len;
727 } __packed;
728
729 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
730
ath10k_bw_to_mac80211_bw(u8 bw)731 static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
732 {
733 u8 ret = 0;
734
735 switch (bw) {
736 case 0:
737 ret = RATE_INFO_BW_20;
738 break;
739 case 1:
740 ret = RATE_INFO_BW_40;
741 break;
742 case 2:
743 ret = RATE_INFO_BW_80;
744 break;
745 case 3:
746 ret = RATE_INFO_BW_160;
747 break;
748 }
749
750 return ret;
751 }
752
ath10k_htt_rx_h_rates(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)753 static void ath10k_htt_rx_h_rates(struct ath10k *ar,
754 struct ieee80211_rx_status *status,
755 struct htt_rx_desc *rxd)
756 {
757 struct ieee80211_supported_band *sband;
758 u8 cck, rate, bw, sgi, mcs, nss;
759 u8 preamble = 0;
760 u8 group_id;
761 u32 info1, info2, info3;
762
763 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
764 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
765 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
766
767 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
768
769 switch (preamble) {
770 case HTT_RX_LEGACY:
771 /* To get legacy rate index band is required. Since band can't
772 * be undefined check if freq is non-zero.
773 */
774 if (!status->freq)
775 return;
776
777 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
778 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
779 rate &= ~RX_PPDU_START_RATE_FLAG;
780
781 sband = &ar->mac.sbands[status->band];
782 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
783 break;
784 case HTT_RX_HT:
785 case HTT_RX_HT_WITH_TXBF:
786 /* HT-SIG - Table 20-11 in info2 and info3 */
787 mcs = info2 & 0x1F;
788 nss = mcs >> 3;
789 bw = (info2 >> 7) & 1;
790 sgi = (info3 >> 7) & 1;
791
792 status->rate_idx = mcs;
793 status->encoding = RX_ENC_HT;
794 if (sgi)
795 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
796 if (bw)
797 status->bw = RATE_INFO_BW_40;
798 break;
799 case HTT_RX_VHT:
800 case HTT_RX_VHT_WITH_TXBF:
801 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
802 * TODO check this
803 */
804 bw = info2 & 3;
805 sgi = info3 & 1;
806 group_id = (info2 >> 4) & 0x3F;
807
808 if (GROUP_ID_IS_SU_MIMO(group_id)) {
809 mcs = (info3 >> 4) & 0x0F;
810 nss = ((info2 >> 10) & 0x07) + 1;
811 } else {
812 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
813 * so it's impossible to decode MCS. Also since
814 * firmware consumes Group Id Management frames host
815 * has no knowledge regarding group/user position
816 * mapping so it's impossible to pick the correct Nsts
817 * from VHT-SIG-A1.
818 *
819 * Bandwidth and SGI are valid so report the rateinfo
820 * on best-effort basis.
821 */
822 mcs = 0;
823 nss = 1;
824 }
825
826 if (mcs > 0x09) {
827 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
828 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
829 __le32_to_cpu(rxd->attention.flags),
830 __le32_to_cpu(rxd->mpdu_start.info0),
831 __le32_to_cpu(rxd->mpdu_start.info1),
832 __le32_to_cpu(rxd->msdu_start.common.info0),
833 __le32_to_cpu(rxd->msdu_start.common.info1),
834 rxd->ppdu_start.info0,
835 __le32_to_cpu(rxd->ppdu_start.info1),
836 __le32_to_cpu(rxd->ppdu_start.info2),
837 __le32_to_cpu(rxd->ppdu_start.info3),
838 __le32_to_cpu(rxd->ppdu_start.info4));
839
840 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
841 __le32_to_cpu(rxd->msdu_end.common.info0),
842 __le32_to_cpu(rxd->mpdu_end.info0));
843
844 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
845 "rx desc msdu payload: ",
846 rxd->msdu_payload, 50);
847 }
848
849 status->rate_idx = mcs;
850 status->nss = nss;
851
852 if (sgi)
853 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
854
855 status->bw = ath10k_bw_to_mac80211_bw(bw);
856 status->encoding = RX_ENC_VHT;
857 break;
858 default:
859 break;
860 }
861 }
862
863 static struct ieee80211_channel *
ath10k_htt_rx_h_peer_channel(struct ath10k * ar,struct htt_rx_desc * rxd)864 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
865 {
866 struct ath10k_peer *peer;
867 struct ath10k_vif *arvif;
868 struct cfg80211_chan_def def;
869 u16 peer_id;
870
871 lockdep_assert_held(&ar->data_lock);
872
873 if (!rxd)
874 return NULL;
875
876 if (rxd->attention.flags &
877 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
878 return NULL;
879
880 if (!(rxd->msdu_end.common.info0 &
881 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
882 return NULL;
883
884 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
885 RX_MPDU_START_INFO0_PEER_IDX);
886
887 peer = ath10k_peer_find_by_id(ar, peer_id);
888 if (!peer)
889 return NULL;
890
891 arvif = ath10k_get_arvif(ar, peer->vdev_id);
892 if (WARN_ON_ONCE(!arvif))
893 return NULL;
894
895 if (ath10k_mac_vif_chan(arvif->vif, &def))
896 return NULL;
897
898 return def.chan;
899 }
900
901 static struct ieee80211_channel *
ath10k_htt_rx_h_vdev_channel(struct ath10k * ar,u32 vdev_id)902 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
903 {
904 struct ath10k_vif *arvif;
905 struct cfg80211_chan_def def;
906
907 lockdep_assert_held(&ar->data_lock);
908
909 list_for_each_entry(arvif, &ar->arvifs, list) {
910 if (arvif->vdev_id == vdev_id &&
911 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
912 return def.chan;
913 }
914
915 return NULL;
916 }
917
918 static void
ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw * hw,struct ieee80211_chanctx_conf * conf,void * data)919 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
920 struct ieee80211_chanctx_conf *conf,
921 void *data)
922 {
923 struct cfg80211_chan_def *def = data;
924
925 *def = conf->def;
926 }
927
928 static struct ieee80211_channel *
ath10k_htt_rx_h_any_channel(struct ath10k * ar)929 ath10k_htt_rx_h_any_channel(struct ath10k *ar)
930 {
931 struct cfg80211_chan_def def = {};
932
933 ieee80211_iter_chan_contexts_atomic(ar->hw,
934 ath10k_htt_rx_h_any_chan_iter,
935 &def);
936
937 return def.chan;
938 }
939
ath10k_htt_rx_h_channel(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd,u32 vdev_id)940 static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
941 struct ieee80211_rx_status *status,
942 struct htt_rx_desc *rxd,
943 u32 vdev_id)
944 {
945 struct ieee80211_channel *ch;
946
947 spin_lock_bh(&ar->data_lock);
948 ch = ar->scan_channel;
949 if (!ch)
950 ch = ar->rx_channel;
951 if (!ch)
952 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
953 if (!ch)
954 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
955 if (!ch)
956 ch = ath10k_htt_rx_h_any_channel(ar);
957 if (!ch)
958 ch = ar->tgt_oper_chan;
959 spin_unlock_bh(&ar->data_lock);
960
961 if (!ch)
962 return false;
963
964 status->band = ch->band;
965 status->freq = ch->center_freq;
966
967 return true;
968 }
969
ath10k_htt_rx_h_signal(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)970 static void ath10k_htt_rx_h_signal(struct ath10k *ar,
971 struct ieee80211_rx_status *status,
972 struct htt_rx_desc *rxd)
973 {
974 int i;
975
976 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) {
977 status->chains &= ~BIT(i);
978
979 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) {
980 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR +
981 rxd->ppdu_start.rssi_chains[i].pri20_mhz;
982
983 status->chains |= BIT(i);
984 }
985 }
986
987 /* FIXME: Get real NF */
988 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
989 rxd->ppdu_start.rssi_comb;
990 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
991 }
992
ath10k_htt_rx_h_mactime(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)993 static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
994 struct ieee80211_rx_status *status,
995 struct htt_rx_desc *rxd)
996 {
997 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
998 * means all prior MSDUs in a PPDU are reported to mac80211 without the
999 * TSF. Is it worth holding frames until end of PPDU is known?
1000 *
1001 * FIXME: Can we get/compute 64bit TSF?
1002 */
1003 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
1004 status->flag |= RX_FLAG_MACTIME_END;
1005 }
1006
ath10k_htt_rx_h_ppdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,u32 vdev_id)1007 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
1008 struct sk_buff_head *amsdu,
1009 struct ieee80211_rx_status *status,
1010 u32 vdev_id)
1011 {
1012 struct sk_buff *first;
1013 struct htt_rx_desc *rxd;
1014 bool is_first_ppdu;
1015 bool is_last_ppdu;
1016
1017 if (skb_queue_empty(amsdu))
1018 return;
1019
1020 first = skb_peek(amsdu);
1021 rxd = (void *)first->data - sizeof(*rxd);
1022
1023 is_first_ppdu = !!(rxd->attention.flags &
1024 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
1025 is_last_ppdu = !!(rxd->attention.flags &
1026 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
1027
1028 if (is_first_ppdu) {
1029 /* New PPDU starts so clear out the old per-PPDU status. */
1030 status->freq = 0;
1031 status->rate_idx = 0;
1032 status->nss = 0;
1033 status->encoding = RX_ENC_LEGACY;
1034 status->bw = RATE_INFO_BW_20;
1035
1036 status->flag &= ~RX_FLAG_MACTIME_END;
1037 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1038
1039 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
1040 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
1041 status->ampdu_reference = ar->ampdu_reference;
1042
1043 ath10k_htt_rx_h_signal(ar, status, rxd);
1044 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
1045 ath10k_htt_rx_h_rates(ar, status, rxd);
1046 }
1047
1048 if (is_last_ppdu) {
1049 ath10k_htt_rx_h_mactime(ar, status, rxd);
1050
1051 /* set ampdu last segment flag */
1052 status->flag |= RX_FLAG_AMPDU_IS_LAST;
1053 ar->ampdu_reference++;
1054 }
1055 }
1056
1057 static const char * const tid_to_ac[] = {
1058 "BE",
1059 "BK",
1060 "BK",
1061 "BE",
1062 "VI",
1063 "VI",
1064 "VO",
1065 "VO",
1066 };
1067
ath10k_get_tid(struct ieee80211_hdr * hdr,char * out,size_t size)1068 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
1069 {
1070 u8 *qc;
1071 int tid;
1072
1073 if (!ieee80211_is_data_qos(hdr->frame_control))
1074 return "";
1075
1076 qc = ieee80211_get_qos_ctl(hdr);
1077 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
1078 if (tid < 8)
1079 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
1080 else
1081 snprintf(out, size, "tid %d", tid);
1082
1083 return out;
1084 }
1085
ath10k_htt_rx_h_queue_msdu(struct ath10k * ar,struct ieee80211_rx_status * rx_status,struct sk_buff * skb)1086 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar,
1087 struct ieee80211_rx_status *rx_status,
1088 struct sk_buff *skb)
1089 {
1090 struct ieee80211_rx_status *status;
1091
1092 status = IEEE80211_SKB_RXCB(skb);
1093 *status = *rx_status;
1094
1095 skb_queue_tail(&ar->htt.rx_msdus_q, skb);
1096 }
1097
ath10k_process_rx(struct ath10k * ar,struct sk_buff * skb)1098 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)
1099 {
1100 struct ieee80211_rx_status *status;
1101 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1102 char tid[32];
1103
1104 status = IEEE80211_SKB_RXCB(skb);
1105
1106 ath10k_dbg(ar, ATH10K_DBG_DATA,
1107 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
1108 skb,
1109 skb->len,
1110 ieee80211_get_SA(hdr),
1111 ath10k_get_tid(hdr, tid, sizeof(tid)),
1112 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
1113 "mcast" : "ucast",
1114 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
1115 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
1116 (status->encoding == RX_ENC_HT) ? "ht" : "",
1117 (status->encoding == RX_ENC_VHT) ? "vht" : "",
1118 (status->bw == RATE_INFO_BW_40) ? "40" : "",
1119 (status->bw == RATE_INFO_BW_80) ? "80" : "",
1120 (status->bw == RATE_INFO_BW_160) ? "160" : "",
1121 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
1122 status->rate_idx,
1123 status->nss,
1124 status->freq,
1125 status->band, status->flag,
1126 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
1127 !!(status->flag & RX_FLAG_MMIC_ERROR),
1128 !!(status->flag & RX_FLAG_AMSDU_MORE));
1129 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
1130 skb->data, skb->len);
1131 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1132 trace_ath10k_rx_payload(ar, skb->data, skb->len);
1133
1134 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
1135 }
1136
ath10k_htt_rx_nwifi_hdrlen(struct ath10k * ar,struct ieee80211_hdr * hdr)1137 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1138 struct ieee80211_hdr *hdr)
1139 {
1140 int len = ieee80211_hdrlen(hdr->frame_control);
1141
1142 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1143 ar->running_fw->fw_file.fw_features))
1144 len = round_up(len, 4);
1145
1146 return len;
1147 }
1148
ath10k_htt_rx_h_undecap_raw(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted)1149 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1150 struct sk_buff *msdu,
1151 struct ieee80211_rx_status *status,
1152 enum htt_rx_mpdu_encrypt_type enctype,
1153 bool is_decrypted)
1154 {
1155 struct ieee80211_hdr *hdr;
1156 struct htt_rx_desc *rxd;
1157 size_t hdr_len;
1158 size_t crypto_len;
1159 bool is_first;
1160 bool is_last;
1161
1162 rxd = (void *)msdu->data - sizeof(*rxd);
1163 is_first = !!(rxd->msdu_end.common.info0 &
1164 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1165 is_last = !!(rxd->msdu_end.common.info0 &
1166 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1167
1168 /* Delivered decapped frame:
1169 * [802.11 header]
1170 * [crypto param] <-- can be trimmed if !fcs_err &&
1171 * !decrypt_err && !peer_idx_invalid
1172 * [amsdu header] <-- only if A-MSDU
1173 * [rfc1042/llc]
1174 * [payload]
1175 * [FCS] <-- at end, needs to be trimmed
1176 */
1177
1178 /* This probably shouldn't happen but warn just in case */
1179 if (unlikely(WARN_ON_ONCE(!is_first)))
1180 return;
1181
1182 /* This probably shouldn't happen but warn just in case */
1183 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
1184 return;
1185
1186 skb_trim(msdu, msdu->len - FCS_LEN);
1187
1188 /* In most cases this will be true for sniffed frames. It makes sense
1189 * to deliver them as-is without stripping the crypto param. This is
1190 * necessary for software based decryption.
1191 *
1192 * If there's no error then the frame is decrypted. At least that is
1193 * the case for frames that come in via fragmented rx indication.
1194 */
1195 if (!is_decrypted)
1196 return;
1197
1198 /* The payload is decrypted so strip crypto params. Start from tail
1199 * since hdr is used to compute some stuff.
1200 */
1201
1202 hdr = (void *)msdu->data;
1203
1204 /* Tail */
1205 if (status->flag & RX_FLAG_IV_STRIPPED) {
1206 skb_trim(msdu, msdu->len -
1207 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1208
1209 skb_trim(msdu, msdu->len -
1210 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1211 } else {
1212 /* MIC */
1213 if (status->flag & RX_FLAG_MIC_STRIPPED)
1214 skb_trim(msdu, msdu->len -
1215 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1216
1217 /* ICV */
1218 if (status->flag & RX_FLAG_ICV_STRIPPED)
1219 skb_trim(msdu, msdu->len -
1220 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1221 }
1222
1223 /* MMIC */
1224 if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
1225 !ieee80211_has_morefrags(hdr->frame_control) &&
1226 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1227 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN);
1228
1229 /* Head */
1230 if (status->flag & RX_FLAG_IV_STRIPPED) {
1231 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1232 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1233
1234 memmove((void *)msdu->data + crypto_len,
1235 (void *)msdu->data, hdr_len);
1236 skb_pull(msdu, crypto_len);
1237 }
1238 }
1239
ath10k_htt_rx_h_undecap_nwifi(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1240 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1241 struct sk_buff *msdu,
1242 struct ieee80211_rx_status *status,
1243 const u8 first_hdr[64],
1244 enum htt_rx_mpdu_encrypt_type enctype)
1245 {
1246 struct ieee80211_hdr *hdr;
1247 struct htt_rx_desc *rxd;
1248 size_t hdr_len;
1249 u8 da[ETH_ALEN];
1250 u8 sa[ETH_ALEN];
1251 int l3_pad_bytes;
1252 int bytes_aligned = ar->hw_params.decap_align_bytes;
1253
1254 /* Delivered decapped frame:
1255 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1256 * [rfc1042/llc]
1257 *
1258 * Note: The nwifi header doesn't have QoS Control and is
1259 * (always?) a 3addr frame.
1260 *
1261 * Note2: There's no A-MSDU subframe header. Even if it's part
1262 * of an A-MSDU.
1263 */
1264
1265 /* pull decapped header and copy SA & DA */
1266 rxd = (void *)msdu->data - sizeof(*rxd);
1267
1268 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1269 skb_put(msdu, l3_pad_bytes);
1270
1271 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
1272
1273 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
1274 ether_addr_copy(da, ieee80211_get_DA(hdr));
1275 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1276 skb_pull(msdu, hdr_len);
1277
1278 /* push original 802.11 header */
1279 hdr = (struct ieee80211_hdr *)first_hdr;
1280 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1281
1282 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1283 memcpy(skb_push(msdu,
1284 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1285 (void *)hdr + round_up(hdr_len, bytes_aligned),
1286 ath10k_htt_rx_crypto_param_len(ar, enctype));
1287 }
1288
1289 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1290
1291 /* original 802.11 header has a different DA and in
1292 * case of 4addr it may also have different SA
1293 */
1294 hdr = (struct ieee80211_hdr *)msdu->data;
1295 ether_addr_copy(ieee80211_get_DA(hdr), da);
1296 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1297 }
1298
ath10k_htt_rx_h_find_rfc1042(struct ath10k * ar,struct sk_buff * msdu,enum htt_rx_mpdu_encrypt_type enctype)1299 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1300 struct sk_buff *msdu,
1301 enum htt_rx_mpdu_encrypt_type enctype)
1302 {
1303 struct ieee80211_hdr *hdr;
1304 struct htt_rx_desc *rxd;
1305 size_t hdr_len, crypto_len;
1306 void *rfc1042;
1307 bool is_first, is_last, is_amsdu;
1308 int bytes_aligned = ar->hw_params.decap_align_bytes;
1309
1310 rxd = (void *)msdu->data - sizeof(*rxd);
1311 hdr = (void *)rxd->rx_hdr_status;
1312
1313 is_first = !!(rxd->msdu_end.common.info0 &
1314 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1315 is_last = !!(rxd->msdu_end.common.info0 &
1316 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1317 is_amsdu = !(is_first && is_last);
1318
1319 rfc1042 = hdr;
1320
1321 if (is_first) {
1322 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1323 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1324
1325 rfc1042 += round_up(hdr_len, bytes_aligned) +
1326 round_up(crypto_len, bytes_aligned);
1327 }
1328
1329 if (is_amsdu)
1330 rfc1042 += sizeof(struct amsdu_subframe_hdr);
1331
1332 return rfc1042;
1333 }
1334
ath10k_htt_rx_h_undecap_eth(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1335 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1336 struct sk_buff *msdu,
1337 struct ieee80211_rx_status *status,
1338 const u8 first_hdr[64],
1339 enum htt_rx_mpdu_encrypt_type enctype)
1340 {
1341 struct ieee80211_hdr *hdr;
1342 struct ethhdr *eth;
1343 size_t hdr_len;
1344 void *rfc1042;
1345 u8 da[ETH_ALEN];
1346 u8 sa[ETH_ALEN];
1347 int l3_pad_bytes;
1348 struct htt_rx_desc *rxd;
1349 int bytes_aligned = ar->hw_params.decap_align_bytes;
1350
1351 /* Delivered decapped frame:
1352 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1353 * [payload]
1354 */
1355
1356 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1357 if (WARN_ON_ONCE(!rfc1042))
1358 return;
1359
1360 rxd = (void *)msdu->data - sizeof(*rxd);
1361 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1362 skb_put(msdu, l3_pad_bytes);
1363 skb_pull(msdu, l3_pad_bytes);
1364
1365 /* pull decapped header and copy SA & DA */
1366 eth = (struct ethhdr *)msdu->data;
1367 ether_addr_copy(da, eth->h_dest);
1368 ether_addr_copy(sa, eth->h_source);
1369 skb_pull(msdu, sizeof(struct ethhdr));
1370
1371 /* push rfc1042/llc/snap */
1372 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1373 sizeof(struct rfc1042_hdr));
1374
1375 /* push original 802.11 header */
1376 hdr = (struct ieee80211_hdr *)first_hdr;
1377 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1378
1379 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1380 memcpy(skb_push(msdu,
1381 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1382 (void *)hdr + round_up(hdr_len, bytes_aligned),
1383 ath10k_htt_rx_crypto_param_len(ar, enctype));
1384 }
1385
1386 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1387
1388 /* original 802.11 header has a different DA and in
1389 * case of 4addr it may also have different SA
1390 */
1391 hdr = (struct ieee80211_hdr *)msdu->data;
1392 ether_addr_copy(ieee80211_get_DA(hdr), da);
1393 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1394 }
1395
ath10k_htt_rx_h_undecap_snap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1396 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1397 struct sk_buff *msdu,
1398 struct ieee80211_rx_status *status,
1399 const u8 first_hdr[64],
1400 enum htt_rx_mpdu_encrypt_type enctype)
1401 {
1402 struct ieee80211_hdr *hdr;
1403 size_t hdr_len;
1404 int l3_pad_bytes;
1405 struct htt_rx_desc *rxd;
1406 int bytes_aligned = ar->hw_params.decap_align_bytes;
1407
1408 /* Delivered decapped frame:
1409 * [amsdu header] <-- replaced with 802.11 hdr
1410 * [rfc1042/llc]
1411 * [payload]
1412 */
1413
1414 rxd = (void *)msdu->data - sizeof(*rxd);
1415 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1416
1417 skb_put(msdu, l3_pad_bytes);
1418 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
1419
1420 hdr = (struct ieee80211_hdr *)first_hdr;
1421 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1422
1423 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1424 memcpy(skb_push(msdu,
1425 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1426 (void *)hdr + round_up(hdr_len, bytes_aligned),
1427 ath10k_htt_rx_crypto_param_len(ar, enctype));
1428 }
1429
1430 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1431 }
1432
ath10k_htt_rx_h_undecap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted)1433 static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1434 struct sk_buff *msdu,
1435 struct ieee80211_rx_status *status,
1436 u8 first_hdr[64],
1437 enum htt_rx_mpdu_encrypt_type enctype,
1438 bool is_decrypted)
1439 {
1440 struct htt_rx_desc *rxd;
1441 enum rx_msdu_decap_format decap;
1442
1443 /* First msdu's decapped header:
1444 * [802.11 header] <-- padded to 4 bytes long
1445 * [crypto param] <-- padded to 4 bytes long
1446 * [amsdu header] <-- only if A-MSDU
1447 * [rfc1042/llc]
1448 *
1449 * Other (2nd, 3rd, ..) msdu's decapped header:
1450 * [amsdu header] <-- only if A-MSDU
1451 * [rfc1042/llc]
1452 */
1453
1454 rxd = (void *)msdu->data - sizeof(*rxd);
1455 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
1456 RX_MSDU_START_INFO1_DECAP_FORMAT);
1457
1458 switch (decap) {
1459 case RX_MSDU_DECAP_RAW:
1460 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1461 is_decrypted);
1462 break;
1463 case RX_MSDU_DECAP_NATIVE_WIFI:
1464 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr,
1465 enctype);
1466 break;
1467 case RX_MSDU_DECAP_ETHERNET2_DIX:
1468 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1469 break;
1470 case RX_MSDU_DECAP_8023_SNAP_LLC:
1471 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr,
1472 enctype);
1473 break;
1474 }
1475 }
1476
ath10k_htt_rx_get_csum_state(struct sk_buff * skb)1477 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1478 {
1479 struct htt_rx_desc *rxd;
1480 u32 flags, info;
1481 bool is_ip4, is_ip6;
1482 bool is_tcp, is_udp;
1483 bool ip_csum_ok, tcpudp_csum_ok;
1484
1485 rxd = (void *)skb->data - sizeof(*rxd);
1486 flags = __le32_to_cpu(rxd->attention.flags);
1487 info = __le32_to_cpu(rxd->msdu_start.common.info1);
1488
1489 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1490 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1491 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1492 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1493 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1494 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1495
1496 if (!is_ip4 && !is_ip6)
1497 return CHECKSUM_NONE;
1498 if (!is_tcp && !is_udp)
1499 return CHECKSUM_NONE;
1500 if (!ip_csum_ok)
1501 return CHECKSUM_NONE;
1502 if (!tcpudp_csum_ok)
1503 return CHECKSUM_NONE;
1504
1505 return CHECKSUM_UNNECESSARY;
1506 }
1507
ath10k_htt_rx_h_csum_offload(struct sk_buff * msdu)1508 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1509 {
1510 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1511 }
1512
ath10k_htt_rx_h_mpdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,bool fill_crypt_header,u8 * rx_hdr,enum ath10k_pkt_rx_err * err)1513 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1514 struct sk_buff_head *amsdu,
1515 struct ieee80211_rx_status *status,
1516 bool fill_crypt_header,
1517 u8 *rx_hdr,
1518 enum ath10k_pkt_rx_err *err)
1519 {
1520 struct sk_buff *first;
1521 struct sk_buff *last;
1522 struct sk_buff *msdu;
1523 struct htt_rx_desc *rxd;
1524 struct ieee80211_hdr *hdr;
1525 enum htt_rx_mpdu_encrypt_type enctype;
1526 u8 first_hdr[64];
1527 u8 *qos;
1528 bool has_fcs_err;
1529 bool has_crypto_err;
1530 bool has_tkip_err;
1531 bool has_peer_idx_invalid;
1532 bool is_decrypted;
1533 bool is_mgmt;
1534 u32 attention;
1535
1536 if (skb_queue_empty(amsdu))
1537 return;
1538
1539 first = skb_peek(amsdu);
1540 rxd = (void *)first->data - sizeof(*rxd);
1541
1542 is_mgmt = !!(rxd->attention.flags &
1543 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1544
1545 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1546 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1547
1548 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1549 * decapped header. It'll be used for undecapping of each MSDU.
1550 */
1551 hdr = (void *)rxd->rx_hdr_status;
1552 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1553
1554 if (rx_hdr)
1555 memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1556
1557 /* Each A-MSDU subframe will use the original header as the base and be
1558 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1559 */
1560 hdr = (void *)first_hdr;
1561
1562 if (ieee80211_is_data_qos(hdr->frame_control)) {
1563 qos = ieee80211_get_qos_ctl(hdr);
1564 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1565 }
1566
1567 /* Some attention flags are valid only in the last MSDU. */
1568 last = skb_peek_tail(amsdu);
1569 rxd = (void *)last->data - sizeof(*rxd);
1570 attention = __le32_to_cpu(rxd->attention.flags);
1571
1572 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1573 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1574 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1575 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1576
1577 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1578 * e.g. due to fcs error, missing peer or invalid key data it will
1579 * report the frame as raw.
1580 */
1581 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1582 !has_fcs_err &&
1583 !has_crypto_err &&
1584 !has_peer_idx_invalid);
1585
1586 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1587 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1588 RX_FLAG_MMIC_ERROR |
1589 RX_FLAG_DECRYPTED |
1590 RX_FLAG_IV_STRIPPED |
1591 RX_FLAG_ONLY_MONITOR |
1592 RX_FLAG_MMIC_STRIPPED);
1593
1594 if (has_fcs_err)
1595 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1596
1597 if (has_tkip_err)
1598 status->flag |= RX_FLAG_MMIC_ERROR;
1599
1600 if (err) {
1601 if (has_fcs_err)
1602 *err = ATH10K_PKT_RX_ERR_FCS;
1603 else if (has_tkip_err)
1604 *err = ATH10K_PKT_RX_ERR_TKIP;
1605 else if (has_crypto_err)
1606 *err = ATH10K_PKT_RX_ERR_CRYPT;
1607 else if (has_peer_idx_invalid)
1608 *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL;
1609 }
1610
1611 /* Firmware reports all necessary management frames via WMI already.
1612 * They are not reported to monitor interfaces at all so pass the ones
1613 * coming via HTT to monitor interfaces instead. This simplifies
1614 * matters a lot.
1615 */
1616 if (is_mgmt)
1617 status->flag |= RX_FLAG_ONLY_MONITOR;
1618
1619 if (is_decrypted) {
1620 status->flag |= RX_FLAG_DECRYPTED;
1621
1622 if (likely(!is_mgmt))
1623 status->flag |= RX_FLAG_MMIC_STRIPPED;
1624
1625 if (fill_crypt_header)
1626 status->flag |= RX_FLAG_MIC_STRIPPED |
1627 RX_FLAG_ICV_STRIPPED;
1628 else
1629 status->flag |= RX_FLAG_IV_STRIPPED;
1630 }
1631
1632 skb_queue_walk(amsdu, msdu) {
1633 ath10k_htt_rx_h_csum_offload(msdu);
1634 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1635 is_decrypted);
1636
1637 /* Undecapping involves copying the original 802.11 header back
1638 * to sk_buff. If frame is protected and hardware has decrypted
1639 * it then remove the protected bit.
1640 */
1641 if (!is_decrypted)
1642 continue;
1643 if (is_mgmt)
1644 continue;
1645
1646 if (fill_crypt_header)
1647 continue;
1648
1649 hdr = (void *)msdu->data;
1650 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1651 }
1652 }
1653
ath10k_htt_rx_h_enqueue(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status)1654 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar,
1655 struct sk_buff_head *amsdu,
1656 struct ieee80211_rx_status *status)
1657 {
1658 struct sk_buff *msdu;
1659 struct sk_buff *first_subframe;
1660
1661 first_subframe = skb_peek(amsdu);
1662
1663 while ((msdu = __skb_dequeue(amsdu))) {
1664 /* Setup per-MSDU flags */
1665 if (skb_queue_empty(amsdu))
1666 status->flag &= ~RX_FLAG_AMSDU_MORE;
1667 else
1668 status->flag |= RX_FLAG_AMSDU_MORE;
1669
1670 if (msdu == first_subframe) {
1671 first_subframe = NULL;
1672 status->flag &= ~RX_FLAG_ALLOW_SAME_PN;
1673 } else {
1674 status->flag |= RX_FLAG_ALLOW_SAME_PN;
1675 }
1676
1677 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
1678 }
1679 }
1680
ath10k_unchain_msdu(struct sk_buff_head * amsdu,unsigned long int * unchain_cnt)1681 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu,
1682 unsigned long int *unchain_cnt)
1683 {
1684 struct sk_buff *skb, *first;
1685 int space;
1686 int total_len = 0;
1687 int amsdu_len = skb_queue_len(amsdu);
1688
1689 /* TODO: Might could optimize this by using
1690 * skb_try_coalesce or similar method to
1691 * decrease copying, or maybe get mac80211 to
1692 * provide a way to just receive a list of
1693 * skb?
1694 */
1695
1696 first = __skb_dequeue(amsdu);
1697
1698 /* Allocate total length all at once. */
1699 skb_queue_walk(amsdu, skb)
1700 total_len += skb->len;
1701
1702 space = total_len - skb_tailroom(first);
1703 if ((space > 0) &&
1704 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
1705 /* TODO: bump some rx-oom error stat */
1706 /* put it back together so we can free the
1707 * whole list at once.
1708 */
1709 __skb_queue_head(amsdu, first);
1710 return -1;
1711 }
1712
1713 /* Walk list again, copying contents into
1714 * msdu_head
1715 */
1716 while ((skb = __skb_dequeue(amsdu))) {
1717 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1718 skb->len);
1719 dev_kfree_skb_any(skb);
1720 }
1721
1722 __skb_queue_head(amsdu, first);
1723
1724 *unchain_cnt += amsdu_len - 1;
1725
1726 return 0;
1727 }
1728
ath10k_htt_rx_h_unchain(struct ath10k * ar,struct sk_buff_head * amsdu,unsigned long int * drop_cnt,unsigned long int * unchain_cnt)1729 static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1730 struct sk_buff_head *amsdu,
1731 unsigned long int *drop_cnt,
1732 unsigned long int *unchain_cnt)
1733 {
1734 struct sk_buff *first;
1735 struct htt_rx_desc *rxd;
1736 enum rx_msdu_decap_format decap;
1737
1738 first = skb_peek(amsdu);
1739 rxd = (void *)first->data - sizeof(*rxd);
1740 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
1741 RX_MSDU_START_INFO1_DECAP_FORMAT);
1742
1743 /* FIXME: Current unchaining logic can only handle simple case of raw
1744 * msdu chaining. If decapping is other than raw the chaining may be
1745 * more complex and this isn't handled by the current code. Don't even
1746 * try re-constructing such frames - it'll be pretty much garbage.
1747 */
1748 if (decap != RX_MSDU_DECAP_RAW ||
1749 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1750 *drop_cnt += skb_queue_len(amsdu);
1751 __skb_queue_purge(amsdu);
1752 return;
1753 }
1754
1755 ath10k_unchain_msdu(amsdu, unchain_cnt);
1756 }
1757
ath10k_htt_rx_amsdu_allowed(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status)1758 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1759 struct sk_buff_head *amsdu,
1760 struct ieee80211_rx_status *rx_status)
1761 {
1762 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1763 * invalid/dangerous frames.
1764 */
1765
1766 if (!rx_status->freq) {
1767 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n");
1768 return false;
1769 }
1770
1771 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1772 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
1773 return false;
1774 }
1775
1776 return true;
1777 }
1778
ath10k_htt_rx_h_filter(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status,unsigned long int * drop_cnt)1779 static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1780 struct sk_buff_head *amsdu,
1781 struct ieee80211_rx_status *rx_status,
1782 unsigned long int *drop_cnt)
1783 {
1784 if (skb_queue_empty(amsdu))
1785 return;
1786
1787 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1788 return;
1789
1790 if (drop_cnt)
1791 *drop_cnt += skb_queue_len(amsdu);
1792
1793 __skb_queue_purge(amsdu);
1794 }
1795
ath10k_htt_rx_handle_amsdu(struct ath10k_htt * htt)1796 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
1797 {
1798 struct ath10k *ar = htt->ar;
1799 struct ieee80211_rx_status *rx_status = &htt->rx_status;
1800 struct sk_buff_head amsdu;
1801 int ret;
1802 unsigned long int drop_cnt = 0;
1803 unsigned long int unchain_cnt = 0;
1804 unsigned long int drop_cnt_filter = 0;
1805 unsigned long int msdus_to_queue, num_msdus;
1806 enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX;
1807 u8 first_hdr[RX_HTT_HDR_STATUS_LEN];
1808
1809 __skb_queue_head_init(&amsdu);
1810
1811 spin_lock_bh(&htt->rx_ring.lock);
1812 if (htt->rx_confused) {
1813 spin_unlock_bh(&htt->rx_ring.lock);
1814 return -EIO;
1815 }
1816 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
1817 spin_unlock_bh(&htt->rx_ring.lock);
1818
1819 if (ret < 0) {
1820 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
1821 __skb_queue_purge(&amsdu);
1822 /* FIXME: It's probably a good idea to reboot the
1823 * device instead of leaving it inoperable.
1824 */
1825 htt->rx_confused = true;
1826 return ret;
1827 }
1828
1829 num_msdus = skb_queue_len(&amsdu);
1830
1831 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
1832
1833 /* only for ret = 1 indicates chained msdus */
1834 if (ret > 0)
1835 ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt);
1836
1837 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter);
1838 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err);
1839 msdus_to_queue = skb_queue_len(&amsdu);
1840 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status);
1841
1842 ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err,
1843 unchain_cnt, drop_cnt, drop_cnt_filter,
1844 msdus_to_queue);
1845
1846 return 0;
1847 }
1848
ath10k_htt_rx_proc_rx_ind(struct ath10k_htt * htt,struct htt_rx_indication * rx)1849 static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
1850 struct htt_rx_indication *rx)
1851 {
1852 struct ath10k *ar = htt->ar;
1853 struct htt_rx_indication_mpdu_range *mpdu_ranges;
1854 int num_mpdu_ranges;
1855 int i, mpdu_count = 0;
1856 u16 peer_id;
1857 u8 tid;
1858
1859 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1860 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1861 peer_id = __le16_to_cpu(rx->hdr.peer_id);
1862 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
1863
1864 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1865
1866 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1867 rx, sizeof(*rx) +
1868 (sizeof(struct htt_rx_indication_mpdu_range) *
1869 num_mpdu_ranges));
1870
1871 for (i = 0; i < num_mpdu_ranges; i++)
1872 mpdu_count += mpdu_ranges[i].mpdu_count;
1873
1874 atomic_add(mpdu_count, &htt->num_mpdus_ready);
1875
1876 ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges,
1877 num_mpdu_ranges);
1878 }
1879
ath10k_htt_rx_tx_compl_ind(struct ath10k * ar,struct sk_buff * skb)1880 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
1881 struct sk_buff *skb)
1882 {
1883 struct ath10k_htt *htt = &ar->htt;
1884 struct htt_resp *resp = (struct htt_resp *)skb->data;
1885 struct htt_tx_done tx_done = {};
1886 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1887 __le16 msdu_id;
1888 int i;
1889
1890 switch (status) {
1891 case HTT_DATA_TX_STATUS_NO_ACK:
1892 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
1893 break;
1894 case HTT_DATA_TX_STATUS_OK:
1895 tx_done.status = HTT_TX_COMPL_STATE_ACK;
1896 break;
1897 case HTT_DATA_TX_STATUS_DISCARD:
1898 case HTT_DATA_TX_STATUS_POSTPONE:
1899 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1900 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
1901 break;
1902 default:
1903 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
1904 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
1905 break;
1906 }
1907
1908 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1909 resp->data_tx_completion.num_msdus);
1910
1911 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1912 msdu_id = resp->data_tx_completion.msdus[i];
1913 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1914
1915 /* kfifo_put: In practice firmware shouldn't fire off per-CE
1916 * interrupt and main interrupt (MSI/-X range case) for the same
1917 * HTC service so it should be safe to use kfifo_put w/o lock.
1918 *
1919 * From kfifo_put() documentation:
1920 * Note that with only one concurrent reader and one concurrent
1921 * writer, you don't need extra locking to use these macro.
1922 */
1923 if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
1924 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
1925 tx_done.msdu_id, tx_done.status);
1926 ath10k_txrx_tx_unref(htt, &tx_done);
1927 }
1928 }
1929 }
1930
ath10k_htt_rx_addba(struct ath10k * ar,struct htt_resp * resp)1931 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1932 {
1933 struct htt_rx_addba *ev = &resp->rx_addba;
1934 struct ath10k_peer *peer;
1935 struct ath10k_vif *arvif;
1936 u16 info0, tid, peer_id;
1937
1938 info0 = __le16_to_cpu(ev->info0);
1939 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1940 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1941
1942 ath10k_dbg(ar, ATH10K_DBG_HTT,
1943 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1944 tid, peer_id, ev->window_size);
1945
1946 spin_lock_bh(&ar->data_lock);
1947 peer = ath10k_peer_find_by_id(ar, peer_id);
1948 if (!peer) {
1949 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
1950 peer_id);
1951 spin_unlock_bh(&ar->data_lock);
1952 return;
1953 }
1954
1955 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1956 if (!arvif) {
1957 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
1958 peer->vdev_id);
1959 spin_unlock_bh(&ar->data_lock);
1960 return;
1961 }
1962
1963 ath10k_dbg(ar, ATH10K_DBG_HTT,
1964 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1965 peer->addr, tid, ev->window_size);
1966
1967 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1968 spin_unlock_bh(&ar->data_lock);
1969 }
1970
ath10k_htt_rx_delba(struct ath10k * ar,struct htt_resp * resp)1971 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1972 {
1973 struct htt_rx_delba *ev = &resp->rx_delba;
1974 struct ath10k_peer *peer;
1975 struct ath10k_vif *arvif;
1976 u16 info0, tid, peer_id;
1977
1978 info0 = __le16_to_cpu(ev->info0);
1979 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1980 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1981
1982 ath10k_dbg(ar, ATH10K_DBG_HTT,
1983 "htt rx delba tid %hu peer_id %hu\n",
1984 tid, peer_id);
1985
1986 spin_lock_bh(&ar->data_lock);
1987 peer = ath10k_peer_find_by_id(ar, peer_id);
1988 if (!peer) {
1989 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
1990 peer_id);
1991 spin_unlock_bh(&ar->data_lock);
1992 return;
1993 }
1994
1995 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1996 if (!arvif) {
1997 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
1998 peer->vdev_id);
1999 spin_unlock_bh(&ar->data_lock);
2000 return;
2001 }
2002
2003 ath10k_dbg(ar, ATH10K_DBG_HTT,
2004 "htt rx stop rx ba session sta %pM tid %hu\n",
2005 peer->addr, tid);
2006
2007 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
2008 spin_unlock_bh(&ar->data_lock);
2009 }
2010
ath10k_htt_rx_extract_amsdu(struct sk_buff_head * list,struct sk_buff_head * amsdu)2011 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
2012 struct sk_buff_head *amsdu)
2013 {
2014 struct sk_buff *msdu;
2015 struct htt_rx_desc *rxd;
2016
2017 if (skb_queue_empty(list))
2018 return -ENOBUFS;
2019
2020 if (WARN_ON(!skb_queue_empty(amsdu)))
2021 return -EINVAL;
2022
2023 while ((msdu = __skb_dequeue(list))) {
2024 __skb_queue_tail(amsdu, msdu);
2025
2026 rxd = (void *)msdu->data - sizeof(*rxd);
2027 if (rxd->msdu_end.common.info0 &
2028 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
2029 break;
2030 }
2031
2032 msdu = skb_peek_tail(amsdu);
2033 rxd = (void *)msdu->data - sizeof(*rxd);
2034 if (!(rxd->msdu_end.common.info0 &
2035 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
2036 skb_queue_splice_init(amsdu, list);
2037 return -EAGAIN;
2038 }
2039
2040 return 0;
2041 }
2042
ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status * status,struct sk_buff * skb)2043 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
2044 struct sk_buff *skb)
2045 {
2046 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2047
2048 if (!ieee80211_has_protected(hdr->frame_control))
2049 return;
2050
2051 /* Offloaded frames are already decrypted but firmware insists they are
2052 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
2053 * will drop the frame.
2054 */
2055
2056 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2057 status->flag |= RX_FLAG_DECRYPTED |
2058 RX_FLAG_IV_STRIPPED |
2059 RX_FLAG_MMIC_STRIPPED;
2060 }
2061
ath10k_htt_rx_h_rx_offload(struct ath10k * ar,struct sk_buff_head * list)2062 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
2063 struct sk_buff_head *list)
2064 {
2065 struct ath10k_htt *htt = &ar->htt;
2066 struct ieee80211_rx_status *status = &htt->rx_status;
2067 struct htt_rx_offload_msdu *rx;
2068 struct sk_buff *msdu;
2069 size_t offset;
2070
2071 while ((msdu = __skb_dequeue(list))) {
2072 /* Offloaded frames don't have Rx descriptor. Instead they have
2073 * a short meta information header.
2074 */
2075
2076 rx = (void *)msdu->data;
2077
2078 skb_put(msdu, sizeof(*rx));
2079 skb_pull(msdu, sizeof(*rx));
2080
2081 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
2082 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
2083 dev_kfree_skb_any(msdu);
2084 continue;
2085 }
2086
2087 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
2088
2089 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
2090 * actual payload is unaligned. Align the frame. Otherwise
2091 * mac80211 complains. This shouldn't reduce performance much
2092 * because these offloaded frames are rare.
2093 */
2094 offset = 4 - ((unsigned long)msdu->data & 3);
2095 skb_put(msdu, offset);
2096 memmove(msdu->data + offset, msdu->data, msdu->len);
2097 skb_pull(msdu, offset);
2098
2099 /* FIXME: The frame is NWifi. Re-construct QoS Control
2100 * if possible later.
2101 */
2102
2103 memset(status, 0, sizeof(*status));
2104 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2105
2106 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
2107 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
2108 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
2109 }
2110 }
2111
ath10k_htt_rx_in_ord_ind(struct ath10k * ar,struct sk_buff * skb)2112 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
2113 {
2114 struct ath10k_htt *htt = &ar->htt;
2115 struct htt_resp *resp = (void *)skb->data;
2116 struct ieee80211_rx_status *status = &htt->rx_status;
2117 struct sk_buff_head list;
2118 struct sk_buff_head amsdu;
2119 u16 peer_id;
2120 u16 msdu_count;
2121 u8 vdev_id;
2122 u8 tid;
2123 bool offload;
2124 bool frag;
2125 int ret;
2126
2127 lockdep_assert_held(&htt->rx_ring.lock);
2128
2129 if (htt->rx_confused)
2130 return -EIO;
2131
2132 skb_pull(skb, sizeof(resp->hdr));
2133 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
2134
2135 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
2136 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
2137 vdev_id = resp->rx_in_ord_ind.vdev_id;
2138 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
2139 offload = !!(resp->rx_in_ord_ind.info &
2140 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
2141 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
2142
2143 ath10k_dbg(ar, ATH10K_DBG_HTT,
2144 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
2145 vdev_id, peer_id, tid, offload, frag, msdu_count);
2146
2147 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) {
2148 ath10k_warn(ar, "dropping invalid in order rx indication\n");
2149 return -EINVAL;
2150 }
2151
2152 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
2153 * extracted and processed.
2154 */
2155 __skb_queue_head_init(&list);
2156 if (ar->hw_params.target_64bit)
2157 ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind,
2158 &list);
2159 else
2160 ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind,
2161 &list);
2162
2163 if (ret < 0) {
2164 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
2165 htt->rx_confused = true;
2166 return -EIO;
2167 }
2168
2169 /* Offloaded frames are very different and need to be handled
2170 * separately.
2171 */
2172 if (offload)
2173 ath10k_htt_rx_h_rx_offload(ar, &list);
2174
2175 while (!skb_queue_empty(&list)) {
2176 __skb_queue_head_init(&amsdu);
2177 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
2178 switch (ret) {
2179 case 0:
2180 /* Note: The in-order indication may report interleaved
2181 * frames from different PPDUs meaning reported rx rate
2182 * to mac80211 isn't accurate/reliable. It's still
2183 * better to report something than nothing though. This
2184 * should still give an idea about rx rate to the user.
2185 */
2186 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
2187 ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL);
2188 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL,
2189 NULL);
2190 ath10k_htt_rx_h_enqueue(ar, &amsdu, status);
2191 break;
2192 case -EAGAIN:
2193 /* fall through */
2194 default:
2195 /* Should not happen. */
2196 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
2197 htt->rx_confused = true;
2198 __skb_queue_purge(&list);
2199 return -EIO;
2200 }
2201 }
2202 return ret;
2203 }
2204
ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k * ar,const __le32 * resp_ids,int num_resp_ids)2205 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
2206 const __le32 *resp_ids,
2207 int num_resp_ids)
2208 {
2209 int i;
2210 u32 resp_id;
2211
2212 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
2213 num_resp_ids);
2214
2215 for (i = 0; i < num_resp_ids; i++) {
2216 resp_id = le32_to_cpu(resp_ids[i]);
2217
2218 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
2219 resp_id);
2220
2221 /* TODO: free resp_id */
2222 }
2223 }
2224
ath10k_htt_rx_tx_fetch_ind(struct ath10k * ar,struct sk_buff * skb)2225 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
2226 {
2227 struct ieee80211_hw *hw = ar->hw;
2228 struct ieee80211_txq *txq;
2229 struct htt_resp *resp = (struct htt_resp *)skb->data;
2230 struct htt_tx_fetch_record *record;
2231 size_t len;
2232 size_t max_num_bytes;
2233 size_t max_num_msdus;
2234 size_t num_bytes;
2235 size_t num_msdus;
2236 const __le32 *resp_ids;
2237 u16 num_records;
2238 u16 num_resp_ids;
2239 u16 peer_id;
2240 u8 tid;
2241 int ret;
2242 int i;
2243
2244 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
2245
2246 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
2247 if (unlikely(skb->len < len)) {
2248 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
2249 return;
2250 }
2251
2252 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
2253 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
2254
2255 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
2256 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
2257
2258 if (unlikely(skb->len < len)) {
2259 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
2260 return;
2261 }
2262
2263 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
2264 num_records, num_resp_ids,
2265 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
2266
2267 if (!ar->htt.tx_q_state.enabled) {
2268 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
2269 return;
2270 }
2271
2272 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
2273 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
2274 return;
2275 }
2276
2277 rcu_read_lock();
2278
2279 for (i = 0; i < num_records; i++) {
2280 record = &resp->tx_fetch_ind.records[i];
2281 peer_id = MS(le16_to_cpu(record->info),
2282 HTT_TX_FETCH_RECORD_INFO_PEER_ID);
2283 tid = MS(le16_to_cpu(record->info),
2284 HTT_TX_FETCH_RECORD_INFO_TID);
2285 max_num_msdus = le16_to_cpu(record->num_msdus);
2286 max_num_bytes = le32_to_cpu(record->num_bytes);
2287
2288 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
2289 i, peer_id, tid, max_num_msdus, max_num_bytes);
2290
2291 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
2292 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
2293 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
2294 peer_id, tid);
2295 continue;
2296 }
2297
2298 spin_lock_bh(&ar->data_lock);
2299 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
2300 spin_unlock_bh(&ar->data_lock);
2301
2302 /* It is okay to release the lock and use txq because RCU read
2303 * lock is held.
2304 */
2305
2306 if (unlikely(!txq)) {
2307 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
2308 peer_id, tid);
2309 continue;
2310 }
2311
2312 num_msdus = 0;
2313 num_bytes = 0;
2314
2315 while (num_msdus < max_num_msdus &&
2316 num_bytes < max_num_bytes) {
2317 ret = ath10k_mac_tx_push_txq(hw, txq);
2318 if (ret < 0)
2319 break;
2320
2321 num_msdus++;
2322 num_bytes += ret;
2323 }
2324
2325 record->num_msdus = cpu_to_le16(num_msdus);
2326 record->num_bytes = cpu_to_le32(num_bytes);
2327
2328 ath10k_htt_tx_txq_recalc(hw, txq);
2329 }
2330
2331 rcu_read_unlock();
2332
2333 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
2334 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
2335
2336 ret = ath10k_htt_tx_fetch_resp(ar,
2337 resp->tx_fetch_ind.token,
2338 resp->tx_fetch_ind.fetch_seq_num,
2339 resp->tx_fetch_ind.records,
2340 num_records);
2341 if (unlikely(ret)) {
2342 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
2343 le32_to_cpu(resp->tx_fetch_ind.token), ret);
2344 /* FIXME: request fw restart */
2345 }
2346
2347 ath10k_htt_tx_txq_sync(ar);
2348 }
2349
ath10k_htt_rx_tx_fetch_confirm(struct ath10k * ar,struct sk_buff * skb)2350 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
2351 struct sk_buff *skb)
2352 {
2353 const struct htt_resp *resp = (void *)skb->data;
2354 size_t len;
2355 int num_resp_ids;
2356
2357 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
2358
2359 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
2360 if (unlikely(skb->len < len)) {
2361 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
2362 return;
2363 }
2364
2365 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
2366 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
2367
2368 if (unlikely(skb->len < len)) {
2369 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
2370 return;
2371 }
2372
2373 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
2374 resp->tx_fetch_confirm.resp_ids,
2375 num_resp_ids);
2376 }
2377
ath10k_htt_rx_tx_mode_switch_ind(struct ath10k * ar,struct sk_buff * skb)2378 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
2379 struct sk_buff *skb)
2380 {
2381 const struct htt_resp *resp = (void *)skb->data;
2382 const struct htt_tx_mode_switch_record *record;
2383 struct ieee80211_txq *txq;
2384 struct ath10k_txq *artxq;
2385 size_t len;
2386 size_t num_records;
2387 enum htt_tx_mode_switch_mode mode;
2388 bool enable;
2389 u16 info0;
2390 u16 info1;
2391 u16 threshold;
2392 u16 peer_id;
2393 u8 tid;
2394 int i;
2395
2396 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
2397
2398 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
2399 if (unlikely(skb->len < len)) {
2400 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
2401 return;
2402 }
2403
2404 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
2405 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
2406
2407 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
2408 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
2409 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
2410 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
2411
2412 ath10k_dbg(ar, ATH10K_DBG_HTT,
2413 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
2414 info0, info1, enable, num_records, mode, threshold);
2415
2416 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
2417
2418 if (unlikely(skb->len < len)) {
2419 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
2420 return;
2421 }
2422
2423 switch (mode) {
2424 case HTT_TX_MODE_SWITCH_PUSH:
2425 case HTT_TX_MODE_SWITCH_PUSH_PULL:
2426 break;
2427 default:
2428 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
2429 mode);
2430 return;
2431 }
2432
2433 if (!enable)
2434 return;
2435
2436 ar->htt.tx_q_state.enabled = enable;
2437 ar->htt.tx_q_state.mode = mode;
2438 ar->htt.tx_q_state.num_push_allowed = threshold;
2439
2440 rcu_read_lock();
2441
2442 for (i = 0; i < num_records; i++) {
2443 record = &resp->tx_mode_switch_ind.records[i];
2444 info0 = le16_to_cpu(record->info0);
2445 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
2446 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
2447
2448 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
2449 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
2450 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
2451 peer_id, tid);
2452 continue;
2453 }
2454
2455 spin_lock_bh(&ar->data_lock);
2456 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
2457 spin_unlock_bh(&ar->data_lock);
2458
2459 /* It is okay to release the lock and use txq because RCU read
2460 * lock is held.
2461 */
2462
2463 if (unlikely(!txq)) {
2464 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
2465 peer_id, tid);
2466 continue;
2467 }
2468
2469 spin_lock_bh(&ar->htt.tx_lock);
2470 artxq = (void *)txq->drv_priv;
2471 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
2472 spin_unlock_bh(&ar->htt.tx_lock);
2473 }
2474
2475 rcu_read_unlock();
2476
2477 ath10k_mac_tx_push_pending(ar);
2478 }
2479
ath10k_htt_htc_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)2480 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
2481 {
2482 bool release;
2483
2484 release = ath10k_htt_t2h_msg_handler(ar, skb);
2485
2486 /* Free the indication buffer */
2487 if (release)
2488 dev_kfree_skb_any(skb);
2489 }
2490
is_valid_legacy_rate(u8 rate)2491 static inline bool is_valid_legacy_rate(u8 rate)
2492 {
2493 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
2494 18, 24, 36, 48, 54};
2495 int i;
2496
2497 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
2498 if (rate == legacy_rates[i])
2499 return true;
2500 }
2501
2502 return false;
2503 }
2504
2505 static void
ath10k_update_per_peer_tx_stats(struct ath10k * ar,struct ieee80211_sta * sta,struct ath10k_per_peer_tx_stats * peer_stats)2506 ath10k_update_per_peer_tx_stats(struct ath10k *ar,
2507 struct ieee80211_sta *sta,
2508 struct ath10k_per_peer_tx_stats *peer_stats)
2509 {
2510 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
2511 u8 rate = 0, sgi;
2512 struct rate_info txrate;
2513
2514 lockdep_assert_held(&ar->data_lock);
2515
2516 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
2517 txrate.bw = ATH10K_HW_BW(peer_stats->flags);
2518 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
2519 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
2520 sgi = ATH10K_HW_GI(peer_stats->flags);
2521
2522 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) {
2523 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs);
2524 return;
2525 }
2526
2527 if (txrate.flags == WMI_RATE_PREAMBLE_HT &&
2528 (txrate.mcs > 7 || txrate.nss < 1)) {
2529 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats",
2530 txrate.mcs, txrate.nss);
2531 return;
2532 }
2533
2534 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
2535
2536 if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
2537 txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
2538 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
2539
2540 if (!is_valid_legacy_rate(rate)) {
2541 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats",
2542 rate);
2543 return;
2544 }
2545
2546 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
2547 rate *= 10;
2548 if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
2549 rate = rate - 5;
2550 arsta->txrate.legacy = rate;
2551 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
2552 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
2553 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1);
2554 } else {
2555 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
2556 arsta->txrate.mcs = txrate.mcs;
2557 }
2558
2559 if (sgi)
2560 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
2561
2562 arsta->txrate.nss = txrate.nss;
2563 arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw);
2564 }
2565
ath10k_htt_fetch_peer_stats(struct ath10k * ar,struct sk_buff * skb)2566 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
2567 struct sk_buff *skb)
2568 {
2569 struct htt_resp *resp = (struct htt_resp *)skb->data;
2570 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
2571 struct htt_per_peer_tx_stats_ind *tx_stats;
2572 struct ieee80211_sta *sta;
2573 struct ath10k_peer *peer;
2574 int peer_id, i;
2575 u8 ppdu_len, num_ppdu;
2576
2577 num_ppdu = resp->peer_tx_stats.num_ppdu;
2578 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
2579
2580 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
2581 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
2582 return;
2583 }
2584
2585 tx_stats = (struct htt_per_peer_tx_stats_ind *)
2586 (resp->peer_tx_stats.payload);
2587 peer_id = __le16_to_cpu(tx_stats->peer_id);
2588
2589 rcu_read_lock();
2590 spin_lock_bh(&ar->data_lock);
2591 peer = ath10k_peer_find_by_id(ar, peer_id);
2592 if (!peer) {
2593 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
2594 peer_id);
2595 goto out;
2596 }
2597
2598 sta = peer->sta;
2599 for (i = 0; i < num_ppdu; i++) {
2600 tx_stats = (struct htt_per_peer_tx_stats_ind *)
2601 (resp->peer_tx_stats.payload + i * ppdu_len);
2602
2603 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
2604 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
2605 p_tx_stats->failed_bytes =
2606 __le32_to_cpu(tx_stats->failed_bytes);
2607 p_tx_stats->ratecode = tx_stats->ratecode;
2608 p_tx_stats->flags = tx_stats->flags;
2609 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
2610 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
2611 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
2612
2613 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
2614 }
2615
2616 out:
2617 spin_unlock_bh(&ar->data_lock);
2618 rcu_read_unlock();
2619 }
2620
ath10k_fetch_10_2_tx_stats(struct ath10k * ar,u8 * data)2621 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data)
2622 {
2623 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data;
2624 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
2625 struct ath10k_10_2_peer_tx_stats *tx_stats;
2626 struct ieee80211_sta *sta;
2627 struct ath10k_peer *peer;
2628 u16 log_type = __le16_to_cpu(hdr->log_type);
2629 u32 peer_id = 0, i;
2630
2631 if (log_type != ATH_PKTLOG_TYPE_TX_STAT)
2632 return;
2633
2634 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) +
2635 ATH10K_10_2_TX_STATS_OFFSET);
2636
2637 if (!tx_stats->tx_ppdu_cnt)
2638 return;
2639
2640 peer_id = tx_stats->peer_id;
2641
2642 rcu_read_lock();
2643 spin_lock_bh(&ar->data_lock);
2644 peer = ath10k_peer_find_by_id(ar, peer_id);
2645 if (!peer) {
2646 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n",
2647 peer_id);
2648 goto out;
2649 }
2650
2651 sta = peer->sta;
2652 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) {
2653 p_tx_stats->succ_bytes =
2654 __le16_to_cpu(tx_stats->success_bytes[i]);
2655 p_tx_stats->retry_bytes =
2656 __le16_to_cpu(tx_stats->retry_bytes[i]);
2657 p_tx_stats->failed_bytes =
2658 __le16_to_cpu(tx_stats->failed_bytes[i]);
2659 p_tx_stats->ratecode = tx_stats->ratecode[i];
2660 p_tx_stats->flags = tx_stats->flags[i];
2661 p_tx_stats->succ_pkts = tx_stats->success_pkts[i];
2662 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i];
2663 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i];
2664
2665 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
2666 }
2667 spin_unlock_bh(&ar->data_lock);
2668 rcu_read_unlock();
2669
2670 return;
2671
2672 out:
2673 spin_unlock_bh(&ar->data_lock);
2674 rcu_read_unlock();
2675 }
2676
ath10k_htt_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)2677 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
2678 {
2679 struct ath10k_htt *htt = &ar->htt;
2680 struct htt_resp *resp = (struct htt_resp *)skb->data;
2681 enum htt_t2h_msg_type type;
2682
2683 /* confirm alignment */
2684 if (!IS_ALIGNED((unsigned long)skb->data, 4))
2685 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
2686
2687 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
2688 resp->hdr.msg_type);
2689
2690 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
2691 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
2692 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
2693 return true;
2694 }
2695 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
2696
2697 switch (type) {
2698 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
2699 htt->target_version_major = resp->ver_resp.major;
2700 htt->target_version_minor = resp->ver_resp.minor;
2701 complete(&htt->target_version_received);
2702 break;
2703 }
2704 case HTT_T2H_MSG_TYPE_RX_IND:
2705 ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind);
2706 break;
2707 case HTT_T2H_MSG_TYPE_PEER_MAP: {
2708 struct htt_peer_map_event ev = {
2709 .vdev_id = resp->peer_map.vdev_id,
2710 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
2711 };
2712 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
2713 ath10k_peer_map_event(htt, &ev);
2714 break;
2715 }
2716 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
2717 struct htt_peer_unmap_event ev = {
2718 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
2719 };
2720 ath10k_peer_unmap_event(htt, &ev);
2721 break;
2722 }
2723 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
2724 struct htt_tx_done tx_done = {};
2725 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
2726 int info = __le32_to_cpu(resp->mgmt_tx_completion.info);
2727
2728 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
2729
2730 switch (status) {
2731 case HTT_MGMT_TX_STATUS_OK:
2732 tx_done.status = HTT_TX_COMPL_STATE_ACK;
2733 if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
2734 ar->wmi.svc_map) &&
2735 (resp->mgmt_tx_completion.flags &
2736 HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) {
2737 tx_done.ack_rssi =
2738 FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK,
2739 info);
2740 }
2741 break;
2742 case HTT_MGMT_TX_STATUS_RETRY:
2743 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
2744 break;
2745 case HTT_MGMT_TX_STATUS_DROP:
2746 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2747 break;
2748 }
2749
2750 status = ath10k_txrx_tx_unref(htt, &tx_done);
2751 if (!status) {
2752 spin_lock_bh(&htt->tx_lock);
2753 ath10k_htt_tx_mgmt_dec_pending(htt);
2754 spin_unlock_bh(&htt->tx_lock);
2755 }
2756 break;
2757 }
2758 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
2759 ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
2760 break;
2761 case HTT_T2H_MSG_TYPE_SEC_IND: {
2762 struct ath10k *ar = htt->ar;
2763 struct htt_security_indication *ev = &resp->security_indication;
2764
2765 ath10k_dbg(ar, ATH10K_DBG_HTT,
2766 "sec ind peer_id %d unicast %d type %d\n",
2767 __le16_to_cpu(ev->peer_id),
2768 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
2769 MS(ev->flags, HTT_SECURITY_TYPE));
2770 complete(&ar->install_key_done);
2771 break;
2772 }
2773 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
2774 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
2775 skb->data, skb->len);
2776 atomic_inc(&htt->num_mpdus_ready);
2777 break;
2778 }
2779 case HTT_T2H_MSG_TYPE_TEST:
2780 break;
2781 case HTT_T2H_MSG_TYPE_STATS_CONF:
2782 trace_ath10k_htt_stats(ar, skb->data, skb->len);
2783 break;
2784 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
2785 /* Firmware can return tx frames if it's unable to fully
2786 * process them and suspects host may be able to fix it. ath10k
2787 * sends all tx frames as already inspected so this shouldn't
2788 * happen unless fw has a bug.
2789 */
2790 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
2791 break;
2792 case HTT_T2H_MSG_TYPE_RX_ADDBA:
2793 ath10k_htt_rx_addba(ar, resp);
2794 break;
2795 case HTT_T2H_MSG_TYPE_RX_DELBA:
2796 ath10k_htt_rx_delba(ar, resp);
2797 break;
2798 case HTT_T2H_MSG_TYPE_PKTLOG: {
2799 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2800 skb->len -
2801 offsetof(struct htt_resp,
2802 pktlog_msg.payload));
2803
2804 if (ath10k_peer_stats_enabled(ar))
2805 ath10k_fetch_10_2_tx_stats(ar,
2806 resp->pktlog_msg.payload);
2807 break;
2808 }
2809 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2810 /* Ignore this event because mac80211 takes care of Rx
2811 * aggregation reordering.
2812 */
2813 break;
2814 }
2815 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
2816 skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
2817 return false;
2818 }
2819 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
2820 break;
2821 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
2822 u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
2823 u32 freq = __le32_to_cpu(resp->chan_change.freq);
2824
2825 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
2826 ath10k_dbg(ar, ATH10K_DBG_HTT,
2827 "htt chan change freq %u phymode %s\n",
2828 freq, ath10k_wmi_phymode_str(phymode));
2829 break;
2830 }
2831 case HTT_T2H_MSG_TYPE_AGGR_CONF:
2832 break;
2833 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
2834 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
2835
2836 if (!tx_fetch_ind) {
2837 ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
2838 break;
2839 }
2840 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
2841 break;
2842 }
2843 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
2844 ath10k_htt_rx_tx_fetch_confirm(ar, skb);
2845 break;
2846 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
2847 ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
2848 break;
2849 case HTT_T2H_MSG_TYPE_PEER_STATS:
2850 ath10k_htt_fetch_peer_stats(ar, skb);
2851 break;
2852 case HTT_T2H_MSG_TYPE_EN_STATS:
2853 default:
2854 ath10k_warn(ar, "htt event (%d) not handled\n",
2855 resp->hdr.msg_type);
2856 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
2857 skb->data, skb->len);
2858 break;
2859 }
2860 return true;
2861 }
2862 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
2863
ath10k_htt_rx_pktlog_completion_handler(struct ath10k * ar,struct sk_buff * skb)2864 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
2865 struct sk_buff *skb)
2866 {
2867 trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
2868 dev_kfree_skb_any(skb);
2869 }
2870 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
2871
ath10k_htt_rx_deliver_msdu(struct ath10k * ar,int quota,int budget)2872 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget)
2873 {
2874 struct sk_buff *skb;
2875
2876 while (quota < budget) {
2877 if (skb_queue_empty(&ar->htt.rx_msdus_q))
2878 break;
2879
2880 skb = skb_dequeue(&ar->htt.rx_msdus_q);
2881 if (!skb)
2882 break;
2883 ath10k_process_rx(ar, skb);
2884 quota++;
2885 }
2886
2887 return quota;
2888 }
2889
ath10k_htt_txrx_compl_task(struct ath10k * ar,int budget)2890 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
2891 {
2892 struct ath10k_htt *htt = &ar->htt;
2893 struct htt_tx_done tx_done = {};
2894 struct sk_buff_head tx_ind_q;
2895 struct sk_buff *skb;
2896 unsigned long flags;
2897 int quota = 0, done, ret;
2898 bool resched_napi = false;
2899
2900 __skb_queue_head_init(&tx_ind_q);
2901
2902 /* Process pending frames before dequeuing more data
2903 * from hardware.
2904 */
2905 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
2906 if (quota == budget) {
2907 resched_napi = true;
2908 goto exit;
2909 }
2910
2911 while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) {
2912 spin_lock_bh(&htt->rx_ring.lock);
2913 ret = ath10k_htt_rx_in_ord_ind(ar, skb);
2914 spin_unlock_bh(&htt->rx_ring.lock);
2915
2916 dev_kfree_skb_any(skb);
2917 if (ret == -EIO) {
2918 resched_napi = true;
2919 goto exit;
2920 }
2921 }
2922
2923 while (atomic_read(&htt->num_mpdus_ready)) {
2924 ret = ath10k_htt_rx_handle_amsdu(htt);
2925 if (ret == -EIO) {
2926 resched_napi = true;
2927 goto exit;
2928 }
2929 atomic_dec(&htt->num_mpdus_ready);
2930 }
2931
2932 /* Deliver received data after processing data from hardware */
2933 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
2934
2935 /* From NAPI documentation:
2936 * The napi poll() function may also process TX completions, in which
2937 * case if it processes the entire TX ring then it should count that
2938 * work as the rest of the budget.
2939 */
2940 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
2941 quota = budget;
2942
2943 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
2944 * From kfifo_get() documentation:
2945 * Note that with only one concurrent reader and one concurrent writer,
2946 * you don't need extra locking to use these macro.
2947 */
2948 while (kfifo_get(&htt->txdone_fifo, &tx_done))
2949 ath10k_txrx_tx_unref(htt, &tx_done);
2950
2951 ath10k_mac_tx_push_pending(ar);
2952
2953 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
2954 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
2955 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
2956
2957 while ((skb = __skb_dequeue(&tx_ind_q))) {
2958 ath10k_htt_rx_tx_fetch_ind(ar, skb);
2959 dev_kfree_skb_any(skb);
2960 }
2961
2962 exit:
2963 ath10k_htt_rx_msdu_buff_replenish(htt);
2964 /* In case of rx failure or more data to read, report budget
2965 * to reschedule NAPI poll
2966 */
2967 done = resched_napi ? budget : quota;
2968
2969 return done;
2970 }
2971 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
2972
2973 static const struct ath10k_htt_rx_ops htt_rx_ops_32 = {
2974 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32,
2975 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32,
2976 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32,
2977 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32,
2978 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32,
2979 };
2980
2981 static const struct ath10k_htt_rx_ops htt_rx_ops_64 = {
2982 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64,
2983 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64,
2984 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64,
2985 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64,
2986 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64,
2987 };
2988
ath10k_htt_set_rx_ops(struct ath10k_htt * htt)2989 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt)
2990 {
2991 struct ath10k *ar = htt->ar;
2992
2993 if (ar->hw_params.target_64bit)
2994 htt->rx_ops = &htt_rx_ops_64;
2995 else
2996 htt->rx_ops = &htt_rx_ops_32;
2997 }
2998