1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #ifndef _HIF_H_
19 #define _HIF_H_
20
21 #include <linux/kernel.h>
22 #include "core.h"
23 #include "bmi.h"
24 #include "debug.h"
25
26 struct ath10k_hif_sg_item {
27 u16 transfer_id;
28 void *transfer_context; /* NULL = tx completion callback not called */
29 void *vaddr; /* for debugging mostly */
30 dma_addr_t paddr;
31 u16 len;
32 };
33
34 struct ath10k_hif_ops {
35 /* send a scatter-gather list to the target */
36 int (*tx_sg)(struct ath10k *ar, u8 pipe_id,
37 struct ath10k_hif_sg_item *items, int n_items);
38
39 /* read firmware memory through the diagnose interface */
40 int (*diag_read)(struct ath10k *ar, u32 address, void *buf,
41 size_t buf_len);
42
43 int (*diag_write)(struct ath10k *ar, u32 address, const void *data,
44 int nbytes);
45 /*
46 * API to handle HIF-specific BMI message exchanges, this API is
47 * synchronous and only allowed to be called from a context that
48 * can block (sleep)
49 */
50 int (*exchange_bmi_msg)(struct ath10k *ar,
51 void *request, u32 request_len,
52 void *response, u32 *response_len);
53
54 /* Post BMI phase, after FW is loaded. Starts regular operation */
55 int (*start)(struct ath10k *ar);
56
57 /* Clean up what start() did. This does not revert to BMI phase. If
58 * desired so, call power_down() and power_up()
59 */
60 void (*stop)(struct ath10k *ar);
61
62 int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id,
63 u8 *ul_pipe, u8 *dl_pipe);
64
65 void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe);
66
67 /*
68 * Check if prior sends have completed.
69 *
70 * Check whether the pipe in question has any completed
71 * sends that have not yet been processed.
72 * This function is only relevant for HIF pipes that are configured
73 * to be polled rather than interrupt-driven.
74 */
75 void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force);
76
77 u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id);
78
79 u32 (*read32)(struct ath10k *ar, u32 address);
80
81 void (*write32)(struct ath10k *ar, u32 address, u32 value);
82
83 /* Power up the device and enter BMI transfer mode for FW download */
84 int (*power_up)(struct ath10k *ar);
85
86 /* Power down the device and free up resources. stop() must be called
87 * before this if start() was called earlier
88 */
89 void (*power_down)(struct ath10k *ar);
90
91 int (*suspend)(struct ath10k *ar);
92 int (*resume)(struct ath10k *ar);
93
94 /* fetch calibration data from target eeprom */
95 int (*fetch_cal_eeprom)(struct ath10k *ar, void **data,
96 size_t *data_len);
97
98 int (*get_target_info)(struct ath10k *ar,
99 struct bmi_target_info *target_info);
100 };
101
ath10k_hif_tx_sg(struct ath10k * ar,u8 pipe_id,struct ath10k_hif_sg_item * items,int n_items)102 static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
103 struct ath10k_hif_sg_item *items,
104 int n_items)
105 {
106 return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items);
107 }
108
ath10k_hif_diag_read(struct ath10k * ar,u32 address,void * buf,size_t buf_len)109 static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
110 size_t buf_len)
111 {
112 return ar->hif.ops->diag_read(ar, address, buf, buf_len);
113 }
114
ath10k_hif_diag_write(struct ath10k * ar,u32 address,const void * data,int nbytes)115 static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address,
116 const void *data, int nbytes)
117 {
118 if (!ar->hif.ops->diag_write)
119 return -EOPNOTSUPP;
120
121 return ar->hif.ops->diag_write(ar, address, data, nbytes);
122 }
123
ath10k_hif_exchange_bmi_msg(struct ath10k * ar,void * request,u32 request_len,void * response,u32 * response_len)124 static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar,
125 void *request, u32 request_len,
126 void *response, u32 *response_len)
127 {
128 return ar->hif.ops->exchange_bmi_msg(ar, request, request_len,
129 response, response_len);
130 }
131
ath10k_hif_start(struct ath10k * ar)132 static inline int ath10k_hif_start(struct ath10k *ar)
133 {
134 return ar->hif.ops->start(ar);
135 }
136
ath10k_hif_stop(struct ath10k * ar)137 static inline void ath10k_hif_stop(struct ath10k *ar)
138 {
139 return ar->hif.ops->stop(ar);
140 }
141
ath10k_hif_map_service_to_pipe(struct ath10k * ar,u16 service_id,u8 * ul_pipe,u8 * dl_pipe)142 static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar,
143 u16 service_id,
144 u8 *ul_pipe, u8 *dl_pipe)
145 {
146 return ar->hif.ops->map_service_to_pipe(ar, service_id,
147 ul_pipe, dl_pipe);
148 }
149
ath10k_hif_get_default_pipe(struct ath10k * ar,u8 * ul_pipe,u8 * dl_pipe)150 static inline void ath10k_hif_get_default_pipe(struct ath10k *ar,
151 u8 *ul_pipe, u8 *dl_pipe)
152 {
153 ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe);
154 }
155
ath10k_hif_send_complete_check(struct ath10k * ar,u8 pipe_id,int force)156 static inline void ath10k_hif_send_complete_check(struct ath10k *ar,
157 u8 pipe_id, int force)
158 {
159 ar->hif.ops->send_complete_check(ar, pipe_id, force);
160 }
161
ath10k_hif_get_free_queue_number(struct ath10k * ar,u8 pipe_id)162 static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar,
163 u8 pipe_id)
164 {
165 return ar->hif.ops->get_free_queue_number(ar, pipe_id);
166 }
167
ath10k_hif_power_up(struct ath10k * ar)168 static inline int ath10k_hif_power_up(struct ath10k *ar)
169 {
170 return ar->hif.ops->power_up(ar);
171 }
172
ath10k_hif_power_down(struct ath10k * ar)173 static inline void ath10k_hif_power_down(struct ath10k *ar)
174 {
175 ar->hif.ops->power_down(ar);
176 }
177
ath10k_hif_suspend(struct ath10k * ar)178 static inline int ath10k_hif_suspend(struct ath10k *ar)
179 {
180 if (!ar->hif.ops->suspend)
181 return -EOPNOTSUPP;
182
183 return ar->hif.ops->suspend(ar);
184 }
185
ath10k_hif_resume(struct ath10k * ar)186 static inline int ath10k_hif_resume(struct ath10k *ar)
187 {
188 if (!ar->hif.ops->resume)
189 return -EOPNOTSUPP;
190
191 return ar->hif.ops->resume(ar);
192 }
193
ath10k_hif_read32(struct ath10k * ar,u32 address)194 static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address)
195 {
196 if (!ar->hif.ops->read32) {
197 ath10k_warn(ar, "hif read32 not supported\n");
198 return 0xdeaddead;
199 }
200
201 return ar->hif.ops->read32(ar, address);
202 }
203
ath10k_hif_write32(struct ath10k * ar,u32 address,u32 data)204 static inline void ath10k_hif_write32(struct ath10k *ar,
205 u32 address, u32 data)
206 {
207 if (!ar->hif.ops->write32) {
208 ath10k_warn(ar, "hif write32 not supported\n");
209 return;
210 }
211
212 ar->hif.ops->write32(ar, address, data);
213 }
214
ath10k_hif_fetch_cal_eeprom(struct ath10k * ar,void ** data,size_t * data_len)215 static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar,
216 void **data,
217 size_t *data_len)
218 {
219 if (!ar->hif.ops->fetch_cal_eeprom)
220 return -EOPNOTSUPP;
221
222 return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len);
223 }
224
ath10k_hif_get_target_info(struct ath10k * ar,struct bmi_target_info * tgt_info)225 static inline int ath10k_hif_get_target_info(struct ath10k *ar,
226 struct bmi_target_info *tgt_info)
227 {
228 if (!ar->hif.ops->get_target_info)
229 return -EOPNOTSUPP;
230
231 return ar->hif.ops->get_target_info(ar, tgt_info);
232 }
233
234 #endif /* _HIF_H_ */
235