1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 */
7
8 #include <linux/module.h>
9 #include <linux/firmware.h>
10 #include <linux/of.h>
11 #include <linux/property.h>
12 #include <linux/dmi.h>
13 #include <linux/ctype.h>
14 #include <asm/byteorder.h>
15
16 #include "core.h"
17 #include "mac.h"
18 #include "htc.h"
19 #include "hif.h"
20 #include "wmi.h"
21 #include "bmi.h"
22 #include "debug.h"
23 #include "htt.h"
24 #include "testmode.h"
25 #include "wmi-ops.h"
26 #include "coredump.h"
27
28 unsigned int ath10k_debug_mask;
29 EXPORT_SYMBOL(ath10k_debug_mask);
30
31 static unsigned int ath10k_cryptmode_param;
32 static bool uart_print;
33 static bool skip_otp;
34 static bool rawmode;
35 static bool fw_diag_log;
36
37 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
38 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
39
40 /* FIXME: most of these should be readonly */
41 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
42 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
43 module_param(uart_print, bool, 0644);
44 module_param(skip_otp, bool, 0644);
45 module_param(rawmode, bool, 0644);
46 module_param(fw_diag_log, bool, 0644);
47 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
48
49 MODULE_PARM_DESC(debug_mask, "Debugging mask");
50 MODULE_PARM_DESC(uart_print, "Uart target debugging");
51 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
52 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
53 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
54 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
55 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
56
57 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
58 {
59 .id = QCA988X_HW_2_0_VERSION,
60 .dev_id = QCA988X_2_0_DEVICE_ID,
61 .bus = ATH10K_BUS_PCI,
62 .name = "qca988x hw2.0",
63 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
64 .uart_pin = 7,
65 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
66 .otp_exe_param = 0,
67 .channel_counters_freq_hz = 88000,
68 .max_probe_resp_desc_thres = 0,
69 .cal_data_len = 2116,
70 .fw = {
71 .dir = QCA988X_HW_2_0_FW_DIR,
72 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
73 .board_size = QCA988X_BOARD_DATA_SZ,
74 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
75 },
76 .hw_ops = &qca988x_ops,
77 .decap_align_bytes = 4,
78 .spectral_bin_discard = 0,
79 .spectral_bin_offset = 0,
80 .vht160_mcs_rx_highest = 0,
81 .vht160_mcs_tx_highest = 0,
82 .n_cipher_suites = 8,
83 .ast_skid_limit = 0x10,
84 .num_wds_entries = 0x20,
85 .target_64bit = false,
86 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
87 .shadow_reg_support = false,
88 .rri_on_ddr = false,
89 .hw_filter_reset_required = true,
90 .fw_diag_ce_download = false,
91 .tx_stats_over_pktlog = true,
92 },
93 {
94 .id = QCA988X_HW_2_0_VERSION,
95 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
96 .name = "qca988x hw2.0 ubiquiti",
97 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
98 .uart_pin = 7,
99 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
100 .otp_exe_param = 0,
101 .channel_counters_freq_hz = 88000,
102 .max_probe_resp_desc_thres = 0,
103 .cal_data_len = 2116,
104 .fw = {
105 .dir = QCA988X_HW_2_0_FW_DIR,
106 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
107 .board_size = QCA988X_BOARD_DATA_SZ,
108 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
109 },
110 .hw_ops = &qca988x_ops,
111 .decap_align_bytes = 4,
112 .spectral_bin_discard = 0,
113 .spectral_bin_offset = 0,
114 .vht160_mcs_rx_highest = 0,
115 .vht160_mcs_tx_highest = 0,
116 .n_cipher_suites = 8,
117 .ast_skid_limit = 0x10,
118 .num_wds_entries = 0x20,
119 .target_64bit = false,
120 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
121 .per_ce_irq = false,
122 .shadow_reg_support = false,
123 .rri_on_ddr = false,
124 .hw_filter_reset_required = true,
125 .fw_diag_ce_download = false,
126 .tx_stats_over_pktlog = true,
127 },
128 {
129 .id = QCA9887_HW_1_0_VERSION,
130 .dev_id = QCA9887_1_0_DEVICE_ID,
131 .bus = ATH10K_BUS_PCI,
132 .name = "qca9887 hw1.0",
133 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
134 .uart_pin = 7,
135 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
136 .otp_exe_param = 0,
137 .channel_counters_freq_hz = 88000,
138 .max_probe_resp_desc_thres = 0,
139 .cal_data_len = 2116,
140 .fw = {
141 .dir = QCA9887_HW_1_0_FW_DIR,
142 .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
143 .board_size = QCA9887_BOARD_DATA_SZ,
144 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
145 },
146 .hw_ops = &qca988x_ops,
147 .decap_align_bytes = 4,
148 .spectral_bin_discard = 0,
149 .spectral_bin_offset = 0,
150 .vht160_mcs_rx_highest = 0,
151 .vht160_mcs_tx_highest = 0,
152 .n_cipher_suites = 8,
153 .ast_skid_limit = 0x10,
154 .num_wds_entries = 0x20,
155 .target_64bit = false,
156 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
157 .per_ce_irq = false,
158 .shadow_reg_support = false,
159 .rri_on_ddr = false,
160 .hw_filter_reset_required = true,
161 .fw_diag_ce_download = false,
162 .tx_stats_over_pktlog = false,
163 },
164 {
165 .id = QCA6174_HW_3_2_VERSION,
166 .dev_id = QCA6174_3_2_DEVICE_ID,
167 .bus = ATH10K_BUS_SDIO,
168 .name = "qca6174 hw3.2 sdio",
169 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
170 .uart_pin = 19,
171 .otp_exe_param = 0,
172 .channel_counters_freq_hz = 88000,
173 .max_probe_resp_desc_thres = 0,
174 .cal_data_len = 0,
175 .fw = {
176 .dir = QCA6174_HW_3_0_FW_DIR,
177 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
178 .board_size = QCA6174_BOARD_DATA_SZ,
179 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
180 },
181 .hw_ops = &qca6174_sdio_ops,
182 .hw_clk = qca6174_clk,
183 .target_cpu_freq = 176000000,
184 .decap_align_bytes = 4,
185 .n_cipher_suites = 8,
186 .num_peers = 10,
187 .ast_skid_limit = 0x10,
188 .num_wds_entries = 0x20,
189 .uart_pin_workaround = true,
190 .tx_stats_over_pktlog = false,
191 },
192 {
193 .id = QCA6174_HW_2_1_VERSION,
194 .dev_id = QCA6164_2_1_DEVICE_ID,
195 .bus = ATH10K_BUS_PCI,
196 .name = "qca6164 hw2.1",
197 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
198 .uart_pin = 6,
199 .otp_exe_param = 0,
200 .channel_counters_freq_hz = 88000,
201 .max_probe_resp_desc_thres = 0,
202 .cal_data_len = 8124,
203 .fw = {
204 .dir = QCA6174_HW_2_1_FW_DIR,
205 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
206 .board_size = QCA6174_BOARD_DATA_SZ,
207 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
208 },
209 .hw_ops = &qca988x_ops,
210 .decap_align_bytes = 4,
211 .spectral_bin_discard = 0,
212 .spectral_bin_offset = 0,
213 .vht160_mcs_rx_highest = 0,
214 .vht160_mcs_tx_highest = 0,
215 .n_cipher_suites = 8,
216 .ast_skid_limit = 0x10,
217 .num_wds_entries = 0x20,
218 .target_64bit = false,
219 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
220 .per_ce_irq = false,
221 .shadow_reg_support = false,
222 .rri_on_ddr = false,
223 .hw_filter_reset_required = true,
224 .fw_diag_ce_download = false,
225 .tx_stats_over_pktlog = false,
226 },
227 {
228 .id = QCA6174_HW_2_1_VERSION,
229 .dev_id = QCA6174_2_1_DEVICE_ID,
230 .bus = ATH10K_BUS_PCI,
231 .name = "qca6174 hw2.1",
232 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
233 .uart_pin = 6,
234 .otp_exe_param = 0,
235 .channel_counters_freq_hz = 88000,
236 .max_probe_resp_desc_thres = 0,
237 .cal_data_len = 8124,
238 .fw = {
239 .dir = QCA6174_HW_2_1_FW_DIR,
240 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
241 .board_size = QCA6174_BOARD_DATA_SZ,
242 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
243 },
244 .hw_ops = &qca988x_ops,
245 .decap_align_bytes = 4,
246 .spectral_bin_discard = 0,
247 .spectral_bin_offset = 0,
248 .vht160_mcs_rx_highest = 0,
249 .vht160_mcs_tx_highest = 0,
250 .n_cipher_suites = 8,
251 .ast_skid_limit = 0x10,
252 .num_wds_entries = 0x20,
253 .target_64bit = false,
254 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
255 .per_ce_irq = false,
256 .shadow_reg_support = false,
257 .rri_on_ddr = false,
258 .hw_filter_reset_required = true,
259 .fw_diag_ce_download = false,
260 .tx_stats_over_pktlog = false,
261 },
262 {
263 .id = QCA6174_HW_3_0_VERSION,
264 .dev_id = QCA6174_2_1_DEVICE_ID,
265 .bus = ATH10K_BUS_PCI,
266 .name = "qca6174 hw3.0",
267 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
268 .uart_pin = 6,
269 .otp_exe_param = 0,
270 .channel_counters_freq_hz = 88000,
271 .max_probe_resp_desc_thres = 0,
272 .cal_data_len = 8124,
273 .fw = {
274 .dir = QCA6174_HW_3_0_FW_DIR,
275 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
276 .board_size = QCA6174_BOARD_DATA_SZ,
277 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
278 },
279 .hw_ops = &qca988x_ops,
280 .decap_align_bytes = 4,
281 .spectral_bin_discard = 0,
282 .spectral_bin_offset = 0,
283 .vht160_mcs_rx_highest = 0,
284 .vht160_mcs_tx_highest = 0,
285 .n_cipher_suites = 8,
286 .ast_skid_limit = 0x10,
287 .num_wds_entries = 0x20,
288 .target_64bit = false,
289 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
290 .per_ce_irq = false,
291 .shadow_reg_support = false,
292 .rri_on_ddr = false,
293 .hw_filter_reset_required = true,
294 .fw_diag_ce_download = false,
295 .tx_stats_over_pktlog = false,
296 },
297 {
298 .id = QCA6174_HW_3_2_VERSION,
299 .dev_id = QCA6174_2_1_DEVICE_ID,
300 .bus = ATH10K_BUS_PCI,
301 .name = "qca6174 hw3.2",
302 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
303 .uart_pin = 6,
304 .otp_exe_param = 0,
305 .channel_counters_freq_hz = 88000,
306 .max_probe_resp_desc_thres = 0,
307 .cal_data_len = 8124,
308 .fw = {
309 /* uses same binaries as hw3.0 */
310 .dir = QCA6174_HW_3_0_FW_DIR,
311 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
312 .board_size = QCA6174_BOARD_DATA_SZ,
313 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
314 },
315 .hw_ops = &qca6174_ops,
316 .hw_clk = qca6174_clk,
317 .target_cpu_freq = 176000000,
318 .decap_align_bytes = 4,
319 .spectral_bin_discard = 0,
320 .spectral_bin_offset = 0,
321 .vht160_mcs_rx_highest = 0,
322 .vht160_mcs_tx_highest = 0,
323 .n_cipher_suites = 8,
324 .ast_skid_limit = 0x10,
325 .num_wds_entries = 0x20,
326 .target_64bit = false,
327 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
328 .per_ce_irq = false,
329 .shadow_reg_support = false,
330 .rri_on_ddr = false,
331 .hw_filter_reset_required = true,
332 .fw_diag_ce_download = true,
333 .tx_stats_over_pktlog = false,
334 },
335 {
336 .id = QCA99X0_HW_2_0_DEV_VERSION,
337 .dev_id = QCA99X0_2_0_DEVICE_ID,
338 .bus = ATH10K_BUS_PCI,
339 .name = "qca99x0 hw2.0",
340 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
341 .uart_pin = 7,
342 .otp_exe_param = 0x00000700,
343 .continuous_frag_desc = true,
344 .cck_rate_map_rev2 = true,
345 .channel_counters_freq_hz = 150000,
346 .max_probe_resp_desc_thres = 24,
347 .tx_chain_mask = 0xf,
348 .rx_chain_mask = 0xf,
349 .max_spatial_stream = 4,
350 .cal_data_len = 12064,
351 .fw = {
352 .dir = QCA99X0_HW_2_0_FW_DIR,
353 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
354 .board_size = QCA99X0_BOARD_DATA_SZ,
355 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
356 },
357 .sw_decrypt_mcast_mgmt = true,
358 .hw_ops = &qca99x0_ops,
359 .decap_align_bytes = 1,
360 .spectral_bin_discard = 4,
361 .spectral_bin_offset = 0,
362 .vht160_mcs_rx_highest = 0,
363 .vht160_mcs_tx_highest = 0,
364 .n_cipher_suites = 11,
365 .ast_skid_limit = 0x10,
366 .num_wds_entries = 0x20,
367 .target_64bit = false,
368 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
369 .per_ce_irq = false,
370 .shadow_reg_support = false,
371 .rri_on_ddr = false,
372 .hw_filter_reset_required = true,
373 .fw_diag_ce_download = false,
374 .tx_stats_over_pktlog = false,
375 },
376 {
377 .id = QCA9984_HW_1_0_DEV_VERSION,
378 .dev_id = QCA9984_1_0_DEVICE_ID,
379 .bus = ATH10K_BUS_PCI,
380 .name = "qca9984/qca9994 hw1.0",
381 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
382 .uart_pin = 7,
383 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
384 .otp_exe_param = 0x00000700,
385 .continuous_frag_desc = true,
386 .cck_rate_map_rev2 = true,
387 .channel_counters_freq_hz = 150000,
388 .max_probe_resp_desc_thres = 24,
389 .tx_chain_mask = 0xf,
390 .rx_chain_mask = 0xf,
391 .max_spatial_stream = 4,
392 .cal_data_len = 12064,
393 .fw = {
394 .dir = QCA9984_HW_1_0_FW_DIR,
395 .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
396 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
397 .board_size = QCA99X0_BOARD_DATA_SZ,
398 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
399 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
400 },
401 .sw_decrypt_mcast_mgmt = true,
402 .hw_ops = &qca99x0_ops,
403 .decap_align_bytes = 1,
404 .spectral_bin_discard = 12,
405 .spectral_bin_offset = 8,
406
407 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
408 * or 2x2 160Mhz, long-guard-interval.
409 */
410 .vht160_mcs_rx_highest = 1560,
411 .vht160_mcs_tx_highest = 1560,
412 .n_cipher_suites = 11,
413 .ast_skid_limit = 0x10,
414 .num_wds_entries = 0x20,
415 .target_64bit = false,
416 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
417 .per_ce_irq = false,
418 .shadow_reg_support = false,
419 .rri_on_ddr = false,
420 .hw_filter_reset_required = true,
421 .fw_diag_ce_download = false,
422 .tx_stats_over_pktlog = false,
423 },
424 {
425 .id = QCA9888_HW_2_0_DEV_VERSION,
426 .dev_id = QCA9888_2_0_DEVICE_ID,
427 .bus = ATH10K_BUS_PCI,
428 .name = "qca9888 hw2.0",
429 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
430 .uart_pin = 7,
431 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
432 .otp_exe_param = 0x00000700,
433 .continuous_frag_desc = true,
434 .channel_counters_freq_hz = 150000,
435 .max_probe_resp_desc_thres = 24,
436 .tx_chain_mask = 3,
437 .rx_chain_mask = 3,
438 .max_spatial_stream = 2,
439 .cal_data_len = 12064,
440 .fw = {
441 .dir = QCA9888_HW_2_0_FW_DIR,
442 .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
443 .board_size = QCA99X0_BOARD_DATA_SZ,
444 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
445 },
446 .sw_decrypt_mcast_mgmt = true,
447 .hw_ops = &qca99x0_ops,
448 .decap_align_bytes = 1,
449 .spectral_bin_discard = 12,
450 .spectral_bin_offset = 8,
451
452 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
453 * 1x1 160Mhz, long-guard-interval.
454 */
455 .vht160_mcs_rx_highest = 780,
456 .vht160_mcs_tx_highest = 780,
457 .n_cipher_suites = 11,
458 .ast_skid_limit = 0x10,
459 .num_wds_entries = 0x20,
460 .target_64bit = false,
461 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
462 .per_ce_irq = false,
463 .shadow_reg_support = false,
464 .rri_on_ddr = false,
465 .hw_filter_reset_required = true,
466 .fw_diag_ce_download = false,
467 .tx_stats_over_pktlog = false,
468 },
469 {
470 .id = QCA9377_HW_1_0_DEV_VERSION,
471 .dev_id = QCA9377_1_0_DEVICE_ID,
472 .bus = ATH10K_BUS_PCI,
473 .name = "qca9377 hw1.0",
474 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
475 .uart_pin = 6,
476 .otp_exe_param = 0,
477 .channel_counters_freq_hz = 88000,
478 .max_probe_resp_desc_thres = 0,
479 .cal_data_len = 8124,
480 .fw = {
481 .dir = QCA9377_HW_1_0_FW_DIR,
482 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
483 .board_size = QCA9377_BOARD_DATA_SZ,
484 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
485 },
486 .hw_ops = &qca988x_ops,
487 .decap_align_bytes = 4,
488 .spectral_bin_discard = 0,
489 .spectral_bin_offset = 0,
490 .vht160_mcs_rx_highest = 0,
491 .vht160_mcs_tx_highest = 0,
492 .n_cipher_suites = 8,
493 .ast_skid_limit = 0x10,
494 .num_wds_entries = 0x20,
495 .target_64bit = false,
496 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
497 .per_ce_irq = false,
498 .shadow_reg_support = false,
499 .rri_on_ddr = false,
500 .hw_filter_reset_required = true,
501 .fw_diag_ce_download = false,
502 .tx_stats_over_pktlog = false,
503 },
504 {
505 .id = QCA9377_HW_1_1_DEV_VERSION,
506 .dev_id = QCA9377_1_0_DEVICE_ID,
507 .bus = ATH10K_BUS_PCI,
508 .name = "qca9377 hw1.1",
509 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
510 .uart_pin = 6,
511 .otp_exe_param = 0,
512 .channel_counters_freq_hz = 88000,
513 .max_probe_resp_desc_thres = 0,
514 .cal_data_len = 8124,
515 .fw = {
516 .dir = QCA9377_HW_1_0_FW_DIR,
517 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
518 .board_size = QCA9377_BOARD_DATA_SZ,
519 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
520 },
521 .hw_ops = &qca6174_ops,
522 .hw_clk = qca6174_clk,
523 .target_cpu_freq = 176000000,
524 .decap_align_bytes = 4,
525 .spectral_bin_discard = 0,
526 .spectral_bin_offset = 0,
527 .vht160_mcs_rx_highest = 0,
528 .vht160_mcs_tx_highest = 0,
529 .n_cipher_suites = 8,
530 .ast_skid_limit = 0x10,
531 .num_wds_entries = 0x20,
532 .target_64bit = false,
533 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
534 .per_ce_irq = false,
535 .shadow_reg_support = false,
536 .rri_on_ddr = false,
537 .hw_filter_reset_required = true,
538 .fw_diag_ce_download = true,
539 .tx_stats_over_pktlog = false,
540 },
541 {
542 .id = QCA4019_HW_1_0_DEV_VERSION,
543 .dev_id = 0,
544 .bus = ATH10K_BUS_AHB,
545 .name = "qca4019 hw1.0",
546 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
547 .uart_pin = 7,
548 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
549 .otp_exe_param = 0x0010000,
550 .continuous_frag_desc = true,
551 .cck_rate_map_rev2 = true,
552 .channel_counters_freq_hz = 125000,
553 .max_probe_resp_desc_thres = 24,
554 .tx_chain_mask = 0x3,
555 .rx_chain_mask = 0x3,
556 .max_spatial_stream = 2,
557 .cal_data_len = 12064,
558 .fw = {
559 .dir = QCA4019_HW_1_0_FW_DIR,
560 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
561 .board_size = QCA4019_BOARD_DATA_SZ,
562 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
563 },
564 .sw_decrypt_mcast_mgmt = true,
565 .hw_ops = &qca99x0_ops,
566 .decap_align_bytes = 1,
567 .spectral_bin_discard = 4,
568 .spectral_bin_offset = 0,
569 .vht160_mcs_rx_highest = 0,
570 .vht160_mcs_tx_highest = 0,
571 .n_cipher_suites = 11,
572 .ast_skid_limit = 0x10,
573 .num_wds_entries = 0x20,
574 .target_64bit = false,
575 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
576 .per_ce_irq = false,
577 .shadow_reg_support = false,
578 .rri_on_ddr = false,
579 .hw_filter_reset_required = true,
580 .fw_diag_ce_download = false,
581 .tx_stats_over_pktlog = false,
582 },
583 {
584 .id = WCN3990_HW_1_0_DEV_VERSION,
585 .dev_id = 0,
586 .bus = ATH10K_BUS_SNOC,
587 .name = "wcn3990 hw1.0",
588 .continuous_frag_desc = true,
589 .tx_chain_mask = 0x7,
590 .rx_chain_mask = 0x7,
591 .max_spatial_stream = 4,
592 .fw = {
593 .dir = WCN3990_HW_1_0_FW_DIR,
594 },
595 .sw_decrypt_mcast_mgmt = true,
596 .hw_ops = &wcn3990_ops,
597 .decap_align_bytes = 1,
598 .num_peers = TARGET_HL_TLV_NUM_PEERS,
599 .n_cipher_suites = 11,
600 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
601 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
602 .target_64bit = true,
603 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
604 .per_ce_irq = true,
605 .shadow_reg_support = true,
606 .rri_on_ddr = true,
607 .hw_filter_reset_required = false,
608 .fw_diag_ce_download = false,
609 .tx_stats_over_pktlog = false,
610 },
611 };
612
613 static const char *const ath10k_core_fw_feature_str[] = {
614 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
615 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
616 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
617 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
618 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
619 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
620 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
621 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
622 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
623 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
624 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
625 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
626 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
627 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
628 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
629 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
630 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
631 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
632 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
633 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
634 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
635 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
636 };
637
ath10k_core_get_fw_feature_str(char * buf,size_t buf_len,enum ath10k_fw_features feat)638 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
639 size_t buf_len,
640 enum ath10k_fw_features feat)
641 {
642 /* make sure that ath10k_core_fw_feature_str[] gets updated */
643 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
644 ATH10K_FW_FEATURE_COUNT);
645
646 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
647 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
648 return scnprintf(buf, buf_len, "bit%d", feat);
649 }
650
651 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
652 }
653
ath10k_core_get_fw_features_str(struct ath10k * ar,char * buf,size_t buf_len)654 void ath10k_core_get_fw_features_str(struct ath10k *ar,
655 char *buf,
656 size_t buf_len)
657 {
658 size_t len = 0;
659 int i;
660
661 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
662 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
663 if (len > 0)
664 len += scnprintf(buf + len, buf_len - len, ",");
665
666 len += ath10k_core_get_fw_feature_str(buf + len,
667 buf_len - len,
668 i);
669 }
670 }
671 }
672
ath10k_send_suspend_complete(struct ath10k * ar)673 static void ath10k_send_suspend_complete(struct ath10k *ar)
674 {
675 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
676
677 complete(&ar->target_suspend);
678 }
679
ath10k_init_sdio(struct ath10k * ar,enum ath10k_firmware_mode mode)680 static void ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
681 {
682 u32 param = 0;
683
684 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
685 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
686 ath10k_bmi_read32(ar, hi_acs_flags, ¶m);
687
688 /* Data transfer is not initiated, when reduced Tx completion
689 * is used for SDIO. disable it until fixed
690 */
691 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
692
693 /* Alternate credit size of 1544 as used by SDIO firmware is
694 * not big enough for mac80211 / native wifi frames. disable it
695 */
696 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
697
698 if (mode == ATH10K_FIRMWARE_MODE_UTF)
699 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
700 else
701 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
702
703 ath10k_bmi_write32(ar, hi_acs_flags, param);
704
705 /* Explicitly set fwlog prints to zero as target may turn it on
706 * based on scratch registers.
707 */
708 ath10k_bmi_read32(ar, hi_option_flag, ¶m);
709 param |= HI_OPTION_DISABLE_DBGLOG;
710 ath10k_bmi_write32(ar, hi_option_flag, param);
711 }
712
ath10k_init_configure_target(struct ath10k * ar)713 static int ath10k_init_configure_target(struct ath10k *ar)
714 {
715 u32 param_host;
716 int ret;
717
718 /* tell target which HTC version it is used*/
719 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
720 HTC_PROTOCOL_VERSION);
721 if (ret) {
722 ath10k_err(ar, "settings HTC version failed\n");
723 return ret;
724 }
725
726 /* set the firmware mode to STA/IBSS/AP */
727 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
728 if (ret) {
729 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
730 return ret;
731 }
732
733 /* TODO following parameters need to be re-visited. */
734 /* num_device */
735 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
736 /* Firmware mode */
737 /* FIXME: Why FW_MODE_AP ??.*/
738 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
739 /* mac_addr_method */
740 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
741 /* firmware_bridge */
742 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
743 /* fwsubmode */
744 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
745
746 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
747 if (ret) {
748 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
749 return ret;
750 }
751
752 /* We do all byte-swapping on the host */
753 ret = ath10k_bmi_write32(ar, hi_be, 0);
754 if (ret) {
755 ath10k_err(ar, "setting host CPU BE mode failed\n");
756 return ret;
757 }
758
759 /* FW descriptor/Data swap flags */
760 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
761
762 if (ret) {
763 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
764 return ret;
765 }
766
767 /* Some devices have a special sanity check that verifies the PCI
768 * Device ID is written to this host interest var. It is known to be
769 * required to boot QCA6164.
770 */
771 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
772 ar->dev_id);
773 if (ret) {
774 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
775 return ret;
776 }
777
778 return 0;
779 }
780
ath10k_fetch_fw_file(struct ath10k * ar,const char * dir,const char * file)781 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
782 const char *dir,
783 const char *file)
784 {
785 char filename[100];
786 const struct firmware *fw;
787 int ret;
788
789 if (file == NULL)
790 return ERR_PTR(-ENOENT);
791
792 if (dir == NULL)
793 dir = ".";
794
795 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
796 ret = firmware_request_nowarn(&fw, filename, ar->dev);
797 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
798 filename, ret);
799
800 if (ret)
801 return ERR_PTR(ret);
802
803 return fw;
804 }
805
ath10k_push_board_ext_data(struct ath10k * ar,const void * data,size_t data_len)806 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
807 size_t data_len)
808 {
809 u32 board_data_size = ar->hw_params.fw.board_size;
810 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
811 u32 board_ext_data_addr;
812 int ret;
813
814 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
815 if (ret) {
816 ath10k_err(ar, "could not read board ext data addr (%d)\n",
817 ret);
818 return ret;
819 }
820
821 ath10k_dbg(ar, ATH10K_DBG_BOOT,
822 "boot push board extended data addr 0x%x\n",
823 board_ext_data_addr);
824
825 if (board_ext_data_addr == 0)
826 return 0;
827
828 if (data_len != (board_data_size + board_ext_data_size)) {
829 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
830 data_len, board_data_size, board_ext_data_size);
831 return -EINVAL;
832 }
833
834 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
835 data + board_data_size,
836 board_ext_data_size);
837 if (ret) {
838 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
839 return ret;
840 }
841
842 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
843 (board_ext_data_size << 16) | 1);
844 if (ret) {
845 ath10k_err(ar, "could not write board ext data bit (%d)\n",
846 ret);
847 return ret;
848 }
849
850 return 0;
851 }
852
ath10k_core_get_board_id_from_otp(struct ath10k * ar)853 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
854 {
855 u32 result, address;
856 u8 board_id, chip_id;
857 bool ext_bid_support;
858 int ret, bmi_board_id_param;
859
860 address = ar->hw_params.patch_load_addr;
861
862 if (!ar->normal_mode_fw.fw_file.otp_data ||
863 !ar->normal_mode_fw.fw_file.otp_len) {
864 ath10k_warn(ar,
865 "failed to retrieve board id because of invalid otp\n");
866 return -ENODATA;
867 }
868
869 ath10k_dbg(ar, ATH10K_DBG_BOOT,
870 "boot upload otp to 0x%x len %zd for board id\n",
871 address, ar->normal_mode_fw.fw_file.otp_len);
872
873 ret = ath10k_bmi_fast_download(ar, address,
874 ar->normal_mode_fw.fw_file.otp_data,
875 ar->normal_mode_fw.fw_file.otp_len);
876 if (ret) {
877 ath10k_err(ar, "could not write otp for board id check: %d\n",
878 ret);
879 return ret;
880 }
881
882 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
883 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
884 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
885 else
886 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
887
888 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
889 if (ret) {
890 ath10k_err(ar, "could not execute otp for board id check: %d\n",
891 ret);
892 return ret;
893 }
894
895 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
896 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
897 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
898
899 ath10k_dbg(ar, ATH10K_DBG_BOOT,
900 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
901 result, board_id, chip_id, ext_bid_support);
902
903 ar->id.ext_bid_supported = ext_bid_support;
904
905 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
906 (board_id == 0)) {
907 ath10k_dbg(ar, ATH10K_DBG_BOOT,
908 "board id does not exist in otp, ignore it\n");
909 return -EOPNOTSUPP;
910 }
911
912 ar->id.bmi_ids_valid = true;
913 ar->id.bmi_board_id = board_id;
914 ar->id.bmi_chip_id = chip_id;
915
916 return 0;
917 }
918
ath10k_core_check_bdfext(const struct dmi_header * hdr,void * data)919 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
920 {
921 struct ath10k *ar = data;
922 const char *bdf_ext;
923 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
924 u8 bdf_enabled;
925 int i;
926
927 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
928 return;
929
930 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
931 ath10k_dbg(ar, ATH10K_DBG_BOOT,
932 "wrong smbios bdf ext type length (%d).\n",
933 hdr->length);
934 return;
935 }
936
937 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
938 if (!bdf_enabled) {
939 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
940 return;
941 }
942
943 /* Only one string exists (per spec) */
944 bdf_ext = (char *)hdr + hdr->length;
945
946 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
947 ath10k_dbg(ar, ATH10K_DBG_BOOT,
948 "bdf variant magic does not match.\n");
949 return;
950 }
951
952 for (i = 0; i < strlen(bdf_ext); i++) {
953 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
954 ath10k_dbg(ar, ATH10K_DBG_BOOT,
955 "bdf variant name contains non ascii chars.\n");
956 return;
957 }
958 }
959
960 /* Copy extension name without magic suffix */
961 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
962 sizeof(ar->id.bdf_ext)) < 0) {
963 ath10k_dbg(ar, ATH10K_DBG_BOOT,
964 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
965 bdf_ext);
966 return;
967 }
968
969 ath10k_dbg(ar, ATH10K_DBG_BOOT,
970 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
971 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
972 }
973
ath10k_core_check_smbios(struct ath10k * ar)974 static int ath10k_core_check_smbios(struct ath10k *ar)
975 {
976 ar->id.bdf_ext[0] = '\0';
977 dmi_walk(ath10k_core_check_bdfext, ar);
978
979 if (ar->id.bdf_ext[0] == '\0')
980 return -ENODATA;
981
982 return 0;
983 }
984
ath10k_core_check_dt(struct ath10k * ar)985 static int ath10k_core_check_dt(struct ath10k *ar)
986 {
987 struct device_node *node;
988 const char *variant = NULL;
989
990 node = ar->dev->of_node;
991 if (!node)
992 return -ENOENT;
993
994 of_property_read_string(node, "qcom,ath10k-calibration-variant",
995 &variant);
996 if (!variant)
997 return -ENODATA;
998
999 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1000 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1001 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1002 variant);
1003
1004 return 0;
1005 }
1006
ath10k_download_fw(struct ath10k * ar)1007 static int ath10k_download_fw(struct ath10k *ar)
1008 {
1009 u32 address, data_len;
1010 const void *data;
1011 int ret;
1012
1013 address = ar->hw_params.patch_load_addr;
1014
1015 data = ar->running_fw->fw_file.firmware_data;
1016 data_len = ar->running_fw->fw_file.firmware_len;
1017
1018 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1019 if (ret) {
1020 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1021 ret);
1022 return ret;
1023 }
1024
1025 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1026 "boot uploading firmware image %pK len %d\n",
1027 data, data_len);
1028
1029 /* Check if device supports to download firmware via
1030 * diag copy engine. Downloading firmware via diag CE
1031 * greatly reduces the time to download firmware.
1032 */
1033 if (ar->hw_params.fw_diag_ce_download) {
1034 ret = ath10k_hw_diag_fast_download(ar, address,
1035 data, data_len);
1036 if (ret == 0)
1037 /* firmware upload via diag ce was successful */
1038 return 0;
1039
1040 ath10k_warn(ar,
1041 "failed to upload firmware via diag ce, trying BMI: %d",
1042 ret);
1043 }
1044
1045 return ath10k_bmi_fast_download(ar, address,
1046 data, data_len);
1047 }
1048
ath10k_core_free_board_files(struct ath10k * ar)1049 void ath10k_core_free_board_files(struct ath10k *ar)
1050 {
1051 if (!IS_ERR(ar->normal_mode_fw.board))
1052 release_firmware(ar->normal_mode_fw.board);
1053
1054 if (!IS_ERR(ar->normal_mode_fw.ext_board))
1055 release_firmware(ar->normal_mode_fw.ext_board);
1056
1057 ar->normal_mode_fw.board = NULL;
1058 ar->normal_mode_fw.board_data = NULL;
1059 ar->normal_mode_fw.board_len = 0;
1060 ar->normal_mode_fw.ext_board = NULL;
1061 ar->normal_mode_fw.ext_board_data = NULL;
1062 ar->normal_mode_fw.ext_board_len = 0;
1063 }
1064 EXPORT_SYMBOL(ath10k_core_free_board_files);
1065
ath10k_core_free_firmware_files(struct ath10k * ar)1066 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1067 {
1068 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1069 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1070
1071 if (!IS_ERR(ar->cal_file))
1072 release_firmware(ar->cal_file);
1073
1074 if (!IS_ERR(ar->pre_cal_file))
1075 release_firmware(ar->pre_cal_file);
1076
1077 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1078
1079 ar->normal_mode_fw.fw_file.otp_data = NULL;
1080 ar->normal_mode_fw.fw_file.otp_len = 0;
1081
1082 ar->normal_mode_fw.fw_file.firmware = NULL;
1083 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1084 ar->normal_mode_fw.fw_file.firmware_len = 0;
1085
1086 ar->cal_file = NULL;
1087 ar->pre_cal_file = NULL;
1088 }
1089
ath10k_fetch_cal_file(struct ath10k * ar)1090 static int ath10k_fetch_cal_file(struct ath10k *ar)
1091 {
1092 char filename[100];
1093
1094 /* pre-cal-<bus>-<id>.bin */
1095 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1096 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1097
1098 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1099 if (!IS_ERR(ar->pre_cal_file))
1100 goto success;
1101
1102 /* cal-<bus>-<id>.bin */
1103 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1104 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1105
1106 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1107 if (IS_ERR(ar->cal_file))
1108 /* calibration file is optional, don't print any warnings */
1109 return PTR_ERR(ar->cal_file);
1110 success:
1111 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1112 ATH10K_FW_DIR, filename);
1113
1114 return 0;
1115 }
1116
ath10k_core_fetch_board_data_api_1(struct ath10k * ar,int bd_ie_type)1117 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1118 {
1119 const struct firmware *fw;
1120
1121 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1122 if (!ar->hw_params.fw.board) {
1123 ath10k_err(ar, "failed to find board file fw entry\n");
1124 return -EINVAL;
1125 }
1126
1127 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1128 ar->hw_params.fw.dir,
1129 ar->hw_params.fw.board);
1130 if (IS_ERR(ar->normal_mode_fw.board))
1131 return PTR_ERR(ar->normal_mode_fw.board);
1132
1133 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1134 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1135 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1136 if (!ar->hw_params.fw.eboard) {
1137 ath10k_err(ar, "failed to find eboard file fw entry\n");
1138 return -EINVAL;
1139 }
1140
1141 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1142 ar->hw_params.fw.eboard);
1143 ar->normal_mode_fw.ext_board = fw;
1144 if (IS_ERR(ar->normal_mode_fw.ext_board))
1145 return PTR_ERR(ar->normal_mode_fw.ext_board);
1146
1147 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1148 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1149 }
1150
1151 return 0;
1152 }
1153
ath10k_core_parse_bd_ie_board(struct ath10k * ar,const void * buf,size_t buf_len,const char * boardname,int bd_ie_type)1154 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1155 const void *buf, size_t buf_len,
1156 const char *boardname,
1157 int bd_ie_type)
1158 {
1159 const struct ath10k_fw_ie *hdr;
1160 bool name_match_found;
1161 int ret, board_ie_id;
1162 size_t board_ie_len;
1163 const void *board_ie_data;
1164
1165 name_match_found = false;
1166
1167 /* go through ATH10K_BD_IE_BOARD_ elements */
1168 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1169 hdr = buf;
1170 board_ie_id = le32_to_cpu(hdr->id);
1171 board_ie_len = le32_to_cpu(hdr->len);
1172 board_ie_data = hdr->data;
1173
1174 buf_len -= sizeof(*hdr);
1175 buf += sizeof(*hdr);
1176
1177 if (buf_len < ALIGN(board_ie_len, 4)) {
1178 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1179 buf_len, ALIGN(board_ie_len, 4));
1180 ret = -EINVAL;
1181 goto out;
1182 }
1183
1184 switch (board_ie_id) {
1185 case ATH10K_BD_IE_BOARD_NAME:
1186 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1187 board_ie_data, board_ie_len);
1188
1189 if (board_ie_len != strlen(boardname))
1190 break;
1191
1192 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1193 if (ret)
1194 break;
1195
1196 name_match_found = true;
1197 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1198 "boot found match for name '%s'",
1199 boardname);
1200 break;
1201 case ATH10K_BD_IE_BOARD_DATA:
1202 if (!name_match_found)
1203 /* no match found */
1204 break;
1205
1206 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1207 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1208 "boot found board data for '%s'",
1209 boardname);
1210
1211 ar->normal_mode_fw.board_data = board_ie_data;
1212 ar->normal_mode_fw.board_len = board_ie_len;
1213 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1214 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1215 "boot found eboard data for '%s'",
1216 boardname);
1217
1218 ar->normal_mode_fw.ext_board_data = board_ie_data;
1219 ar->normal_mode_fw.ext_board_len = board_ie_len;
1220 }
1221
1222 ret = 0;
1223 goto out;
1224 default:
1225 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1226 board_ie_id);
1227 break;
1228 }
1229
1230 /* jump over the padding */
1231 board_ie_len = ALIGN(board_ie_len, 4);
1232
1233 buf_len -= board_ie_len;
1234 buf += board_ie_len;
1235 }
1236
1237 /* no match found */
1238 ret = -ENOENT;
1239
1240 out:
1241 return ret;
1242 }
1243
ath10k_core_search_bd(struct ath10k * ar,const char * boardname,const u8 * data,size_t len)1244 static int ath10k_core_search_bd(struct ath10k *ar,
1245 const char *boardname,
1246 const u8 *data,
1247 size_t len)
1248 {
1249 size_t ie_len;
1250 struct ath10k_fw_ie *hdr;
1251 int ret = -ENOENT, ie_id;
1252
1253 while (len > sizeof(struct ath10k_fw_ie)) {
1254 hdr = (struct ath10k_fw_ie *)data;
1255 ie_id = le32_to_cpu(hdr->id);
1256 ie_len = le32_to_cpu(hdr->len);
1257
1258 len -= sizeof(*hdr);
1259 data = hdr->data;
1260
1261 if (len < ALIGN(ie_len, 4)) {
1262 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1263 ie_id, ie_len, len);
1264 return -EINVAL;
1265 }
1266
1267 switch (ie_id) {
1268 case ATH10K_BD_IE_BOARD:
1269 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1270 boardname,
1271 ATH10K_BD_IE_BOARD);
1272 if (ret == -ENOENT)
1273 /* no match found, continue */
1274 break;
1275
1276 /* either found or error, so stop searching */
1277 goto out;
1278 case ATH10K_BD_IE_BOARD_EXT:
1279 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1280 boardname,
1281 ATH10K_BD_IE_BOARD_EXT);
1282 if (ret == -ENOENT)
1283 /* no match found, continue */
1284 break;
1285
1286 /* either found or error, so stop searching */
1287 goto out;
1288 }
1289
1290 /* jump over the padding */
1291 ie_len = ALIGN(ie_len, 4);
1292
1293 len -= ie_len;
1294 data += ie_len;
1295 }
1296
1297 out:
1298 /* return result of parse_bd_ie_board() or -ENOENT */
1299 return ret;
1300 }
1301
ath10k_core_fetch_board_data_api_n(struct ath10k * ar,const char * boardname,const char * fallback_boardname,const char * filename)1302 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1303 const char *boardname,
1304 const char *fallback_boardname,
1305 const char *filename)
1306 {
1307 size_t len, magic_len;
1308 const u8 *data;
1309 int ret;
1310
1311 /* Skip if already fetched during board data download */
1312 if (!ar->normal_mode_fw.board)
1313 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1314 ar->hw_params.fw.dir,
1315 filename);
1316 if (IS_ERR(ar->normal_mode_fw.board))
1317 return PTR_ERR(ar->normal_mode_fw.board);
1318
1319 data = ar->normal_mode_fw.board->data;
1320 len = ar->normal_mode_fw.board->size;
1321
1322 /* magic has extra null byte padded */
1323 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1324 if (len < magic_len) {
1325 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1326 ar->hw_params.fw.dir, filename, len);
1327 ret = -EINVAL;
1328 goto err;
1329 }
1330
1331 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1332 ath10k_err(ar, "found invalid board magic\n");
1333 ret = -EINVAL;
1334 goto err;
1335 }
1336
1337 /* magic is padded to 4 bytes */
1338 magic_len = ALIGN(magic_len, 4);
1339 if (len < magic_len) {
1340 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1341 ar->hw_params.fw.dir, filename, len);
1342 ret = -EINVAL;
1343 goto err;
1344 }
1345
1346 data += magic_len;
1347 len -= magic_len;
1348
1349 /* attempt to find boardname in the IE list */
1350 ret = ath10k_core_search_bd(ar, boardname, data, len);
1351
1352 /* if we didn't find it and have a fallback name, try that */
1353 if (ret == -ENOENT && fallback_boardname)
1354 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1355
1356 if (ret == -ENOENT) {
1357 ath10k_err(ar,
1358 "failed to fetch board data for %s from %s/%s\n",
1359 boardname, ar->hw_params.fw.dir, filename);
1360 ret = -ENODATA;
1361 }
1362
1363 if (ret)
1364 goto err;
1365
1366 return 0;
1367
1368 err:
1369 ath10k_core_free_board_files(ar);
1370 return ret;
1371 }
1372
ath10k_core_create_board_name(struct ath10k * ar,char * name,size_t name_len,bool with_variant)1373 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1374 size_t name_len, bool with_variant)
1375 {
1376 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1377 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1378
1379 if (with_variant && ar->id.bdf_ext[0] != '\0')
1380 scnprintf(variant, sizeof(variant), ",variant=%s",
1381 ar->id.bdf_ext);
1382
1383 if (ar->id.bmi_ids_valid) {
1384 scnprintf(name, name_len,
1385 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1386 ath10k_bus_str(ar->hif.bus),
1387 ar->id.bmi_chip_id,
1388 ar->id.bmi_board_id, variant);
1389 goto out;
1390 }
1391
1392 if (ar->id.qmi_ids_valid) {
1393 scnprintf(name, name_len,
1394 "bus=%s,qmi-board-id=%x",
1395 ath10k_bus_str(ar->hif.bus),
1396 ar->id.qmi_board_id);
1397 goto out;
1398 }
1399
1400 scnprintf(name, name_len,
1401 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1402 ath10k_bus_str(ar->hif.bus),
1403 ar->id.vendor, ar->id.device,
1404 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1405 out:
1406 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1407
1408 return 0;
1409 }
1410
ath10k_core_create_eboard_name(struct ath10k * ar,char * name,size_t name_len)1411 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1412 size_t name_len)
1413 {
1414 if (ar->id.bmi_ids_valid) {
1415 scnprintf(name, name_len,
1416 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1417 ath10k_bus_str(ar->hif.bus),
1418 ar->id.bmi_chip_id,
1419 ar->id.bmi_eboard_id);
1420
1421 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1422 return 0;
1423 }
1424 /* Fallback if returned board id is zero */
1425 return -1;
1426 }
1427
ath10k_core_fetch_board_file(struct ath10k * ar,int bd_ie_type)1428 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1429 {
1430 char boardname[100], fallback_boardname[100];
1431 int ret;
1432
1433 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1434 ret = ath10k_core_create_board_name(ar, boardname,
1435 sizeof(boardname), true);
1436 if (ret) {
1437 ath10k_err(ar, "failed to create board name: %d", ret);
1438 return ret;
1439 }
1440
1441 ret = ath10k_core_create_board_name(ar, fallback_boardname,
1442 sizeof(boardname), false);
1443 if (ret) {
1444 ath10k_err(ar, "failed to create fallback board name: %d", ret);
1445 return ret;
1446 }
1447 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1448 ret = ath10k_core_create_eboard_name(ar, boardname,
1449 sizeof(boardname));
1450 if (ret) {
1451 ath10k_err(ar, "fallback to eboard.bin since board id 0");
1452 goto fallback;
1453 }
1454 }
1455
1456 ar->bd_api = 2;
1457 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1458 fallback_boardname,
1459 ATH10K_BOARD_API2_FILE);
1460 if (!ret)
1461 goto success;
1462
1463 fallback:
1464 ar->bd_api = 1;
1465 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1466 if (ret) {
1467 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1468 ar->hw_params.fw.dir);
1469 return ret;
1470 }
1471
1472 success:
1473 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1474 return 0;
1475 }
1476 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1477
ath10k_core_get_ext_board_id_from_otp(struct ath10k * ar)1478 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1479 {
1480 u32 result, address;
1481 u8 ext_board_id;
1482 int ret;
1483
1484 address = ar->hw_params.patch_load_addr;
1485
1486 if (!ar->normal_mode_fw.fw_file.otp_data ||
1487 !ar->normal_mode_fw.fw_file.otp_len) {
1488 ath10k_warn(ar,
1489 "failed to retrieve extended board id due to otp binary missing\n");
1490 return -ENODATA;
1491 }
1492
1493 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1494 "boot upload otp to 0x%x len %zd for ext board id\n",
1495 address, ar->normal_mode_fw.fw_file.otp_len);
1496
1497 ret = ath10k_bmi_fast_download(ar, address,
1498 ar->normal_mode_fw.fw_file.otp_data,
1499 ar->normal_mode_fw.fw_file.otp_len);
1500 if (ret) {
1501 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1502 ret);
1503 return ret;
1504 }
1505
1506 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1507 if (ret) {
1508 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1509 ret);
1510 return ret;
1511 }
1512
1513 if (!result) {
1514 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1515 "ext board id does not exist in otp, ignore it\n");
1516 return -EOPNOTSUPP;
1517 }
1518
1519 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1520
1521 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1522 "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1523 result, ext_board_id);
1524
1525 ar->id.bmi_eboard_id = ext_board_id;
1526
1527 return 0;
1528 }
1529
ath10k_download_board_data(struct ath10k * ar,const void * data,size_t data_len)1530 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1531 size_t data_len)
1532 {
1533 u32 board_data_size = ar->hw_params.fw.board_size;
1534 u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1535 u32 board_address;
1536 u32 ext_board_address;
1537 int ret;
1538
1539 ret = ath10k_push_board_ext_data(ar, data, data_len);
1540 if (ret) {
1541 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1542 goto exit;
1543 }
1544
1545 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1546 if (ret) {
1547 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1548 goto exit;
1549 }
1550
1551 ret = ath10k_bmi_write_memory(ar, board_address, data,
1552 min_t(u32, board_data_size,
1553 data_len));
1554 if (ret) {
1555 ath10k_err(ar, "could not write board data (%d)\n", ret);
1556 goto exit;
1557 }
1558
1559 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1560 if (ret) {
1561 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1562 goto exit;
1563 }
1564
1565 if (!ar->id.ext_bid_supported)
1566 goto exit;
1567
1568 /* Extended board data download */
1569 ret = ath10k_core_get_ext_board_id_from_otp(ar);
1570 if (ret == -EOPNOTSUPP) {
1571 /* Not fetching ext_board_data if ext board id is 0 */
1572 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1573 return 0;
1574 } else if (ret) {
1575 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1576 goto exit;
1577 }
1578
1579 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1580 if (ret)
1581 goto exit;
1582
1583 if (ar->normal_mode_fw.ext_board_data) {
1584 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1585 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1586 "boot writing ext board data to addr 0x%x",
1587 ext_board_address);
1588 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1589 ar->normal_mode_fw.ext_board_data,
1590 min_t(u32, eboard_data_size, data_len));
1591 if (ret)
1592 ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1593 }
1594
1595 exit:
1596 return ret;
1597 }
1598
ath10k_download_and_run_otp(struct ath10k * ar)1599 static int ath10k_download_and_run_otp(struct ath10k *ar)
1600 {
1601 u32 result, address = ar->hw_params.patch_load_addr;
1602 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1603 int ret;
1604
1605 ret = ath10k_download_board_data(ar,
1606 ar->running_fw->board_data,
1607 ar->running_fw->board_len);
1608 if (ret) {
1609 ath10k_err(ar, "failed to download board data: %d\n", ret);
1610 return ret;
1611 }
1612
1613 /* OTP is optional */
1614
1615 if (!ar->running_fw->fw_file.otp_data ||
1616 !ar->running_fw->fw_file.otp_len) {
1617 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1618 ar->running_fw->fw_file.otp_data,
1619 ar->running_fw->fw_file.otp_len);
1620 return 0;
1621 }
1622
1623 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1624 address, ar->running_fw->fw_file.otp_len);
1625
1626 ret = ath10k_bmi_fast_download(ar, address,
1627 ar->running_fw->fw_file.otp_data,
1628 ar->running_fw->fw_file.otp_len);
1629 if (ret) {
1630 ath10k_err(ar, "could not write otp (%d)\n", ret);
1631 return ret;
1632 }
1633
1634 /* As of now pre-cal is valid for 10_4 variants */
1635 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1636 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1637 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1638
1639 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1640 if (ret) {
1641 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1642 return ret;
1643 }
1644
1645 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1646
1647 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1648 ar->running_fw->fw_file.fw_features)) &&
1649 result != 0) {
1650 ath10k_err(ar, "otp calibration failed: %d", result);
1651 return -EINVAL;
1652 }
1653
1654 return 0;
1655 }
1656
ath10k_download_cal_file(struct ath10k * ar,const struct firmware * file)1657 static int ath10k_download_cal_file(struct ath10k *ar,
1658 const struct firmware *file)
1659 {
1660 int ret;
1661
1662 if (!file)
1663 return -ENOENT;
1664
1665 if (IS_ERR(file))
1666 return PTR_ERR(file);
1667
1668 ret = ath10k_download_board_data(ar, file->data, file->size);
1669 if (ret) {
1670 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1671 return ret;
1672 }
1673
1674 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1675
1676 return 0;
1677 }
1678
ath10k_download_cal_dt(struct ath10k * ar,const char * dt_name)1679 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1680 {
1681 struct device_node *node;
1682 int data_len;
1683 void *data;
1684 int ret;
1685
1686 node = ar->dev->of_node;
1687 if (!node)
1688 /* Device Tree is optional, don't print any warnings if
1689 * there's no node for ath10k.
1690 */
1691 return -ENOENT;
1692
1693 if (!of_get_property(node, dt_name, &data_len)) {
1694 /* The calibration data node is optional */
1695 return -ENOENT;
1696 }
1697
1698 if (data_len != ar->hw_params.cal_data_len) {
1699 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1700 data_len);
1701 ret = -EMSGSIZE;
1702 goto out;
1703 }
1704
1705 data = kmalloc(data_len, GFP_KERNEL);
1706 if (!data) {
1707 ret = -ENOMEM;
1708 goto out;
1709 }
1710
1711 ret = of_property_read_u8_array(node, dt_name, data, data_len);
1712 if (ret) {
1713 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1714 ret);
1715 goto out_free;
1716 }
1717
1718 ret = ath10k_download_board_data(ar, data, data_len);
1719 if (ret) {
1720 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1721 ret);
1722 goto out_free;
1723 }
1724
1725 ret = 0;
1726
1727 out_free:
1728 kfree(data);
1729
1730 out:
1731 return ret;
1732 }
1733
ath10k_download_cal_eeprom(struct ath10k * ar)1734 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1735 {
1736 size_t data_len;
1737 void *data = NULL;
1738 int ret;
1739
1740 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1741 if (ret) {
1742 if (ret != -EOPNOTSUPP)
1743 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1744 ret);
1745 goto out_free;
1746 }
1747
1748 ret = ath10k_download_board_data(ar, data, data_len);
1749 if (ret) {
1750 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1751 ret);
1752 goto out_free;
1753 }
1754
1755 ret = 0;
1756
1757 out_free:
1758 kfree(data);
1759
1760 return ret;
1761 }
1762
ath10k_core_fetch_firmware_api_n(struct ath10k * ar,const char * name,struct ath10k_fw_file * fw_file)1763 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1764 struct ath10k_fw_file *fw_file)
1765 {
1766 size_t magic_len, len, ie_len;
1767 int ie_id, i, index, bit, ret;
1768 struct ath10k_fw_ie *hdr;
1769 const u8 *data;
1770 __le32 *timestamp, *version;
1771
1772 /* first fetch the firmware file (firmware-*.bin) */
1773 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1774 name);
1775 if (IS_ERR(fw_file->firmware))
1776 return PTR_ERR(fw_file->firmware);
1777
1778 data = fw_file->firmware->data;
1779 len = fw_file->firmware->size;
1780
1781 /* magic also includes the null byte, check that as well */
1782 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1783
1784 if (len < magic_len) {
1785 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1786 ar->hw_params.fw.dir, name, len);
1787 ret = -EINVAL;
1788 goto err;
1789 }
1790
1791 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1792 ath10k_err(ar, "invalid firmware magic\n");
1793 ret = -EINVAL;
1794 goto err;
1795 }
1796
1797 /* jump over the padding */
1798 magic_len = ALIGN(magic_len, 4);
1799
1800 len -= magic_len;
1801 data += magic_len;
1802
1803 /* loop elements */
1804 while (len > sizeof(struct ath10k_fw_ie)) {
1805 hdr = (struct ath10k_fw_ie *)data;
1806
1807 ie_id = le32_to_cpu(hdr->id);
1808 ie_len = le32_to_cpu(hdr->len);
1809
1810 len -= sizeof(*hdr);
1811 data += sizeof(*hdr);
1812
1813 if (len < ie_len) {
1814 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1815 ie_id, len, ie_len);
1816 ret = -EINVAL;
1817 goto err;
1818 }
1819
1820 switch (ie_id) {
1821 case ATH10K_FW_IE_FW_VERSION:
1822 if (ie_len > sizeof(fw_file->fw_version) - 1)
1823 break;
1824
1825 memcpy(fw_file->fw_version, data, ie_len);
1826 fw_file->fw_version[ie_len] = '\0';
1827
1828 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1829 "found fw version %s\n",
1830 fw_file->fw_version);
1831 break;
1832 case ATH10K_FW_IE_TIMESTAMP:
1833 if (ie_len != sizeof(u32))
1834 break;
1835
1836 timestamp = (__le32 *)data;
1837
1838 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1839 le32_to_cpup(timestamp));
1840 break;
1841 case ATH10K_FW_IE_FEATURES:
1842 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1843 "found firmware features ie (%zd B)\n",
1844 ie_len);
1845
1846 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1847 index = i / 8;
1848 bit = i % 8;
1849
1850 if (index == ie_len)
1851 break;
1852
1853 if (data[index] & (1 << bit)) {
1854 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1855 "Enabling feature bit: %i\n",
1856 i);
1857 __set_bit(i, fw_file->fw_features);
1858 }
1859 }
1860
1861 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1862 fw_file->fw_features,
1863 sizeof(fw_file->fw_features));
1864 break;
1865 case ATH10K_FW_IE_FW_IMAGE:
1866 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1867 "found fw image ie (%zd B)\n",
1868 ie_len);
1869
1870 fw_file->firmware_data = data;
1871 fw_file->firmware_len = ie_len;
1872
1873 break;
1874 case ATH10K_FW_IE_OTP_IMAGE:
1875 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1876 "found otp image ie (%zd B)\n",
1877 ie_len);
1878
1879 fw_file->otp_data = data;
1880 fw_file->otp_len = ie_len;
1881
1882 break;
1883 case ATH10K_FW_IE_WMI_OP_VERSION:
1884 if (ie_len != sizeof(u32))
1885 break;
1886
1887 version = (__le32 *)data;
1888
1889 fw_file->wmi_op_version = le32_to_cpup(version);
1890
1891 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1892 fw_file->wmi_op_version);
1893 break;
1894 case ATH10K_FW_IE_HTT_OP_VERSION:
1895 if (ie_len != sizeof(u32))
1896 break;
1897
1898 version = (__le32 *)data;
1899
1900 fw_file->htt_op_version = le32_to_cpup(version);
1901
1902 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1903 fw_file->htt_op_version);
1904 break;
1905 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1906 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1907 "found fw code swap image ie (%zd B)\n",
1908 ie_len);
1909 fw_file->codeswap_data = data;
1910 fw_file->codeswap_len = ie_len;
1911 break;
1912 default:
1913 ath10k_warn(ar, "Unknown FW IE: %u\n",
1914 le32_to_cpu(hdr->id));
1915 break;
1916 }
1917
1918 /* jump over the padding */
1919 ie_len = ALIGN(ie_len, 4);
1920
1921 len -= ie_len;
1922 data += ie_len;
1923 }
1924
1925 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1926 (!fw_file->firmware_data || !fw_file->firmware_len)) {
1927 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1928 ar->hw_params.fw.dir, name);
1929 ret = -ENOMEDIUM;
1930 goto err;
1931 }
1932
1933 return 0;
1934
1935 err:
1936 ath10k_core_free_firmware_files(ar);
1937 return ret;
1938 }
1939
ath10k_core_get_fw_name(struct ath10k * ar,char * fw_name,size_t fw_name_len,int fw_api)1940 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1941 size_t fw_name_len, int fw_api)
1942 {
1943 switch (ar->hif.bus) {
1944 case ATH10K_BUS_SDIO:
1945 case ATH10K_BUS_USB:
1946 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1947 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1948 fw_api);
1949 break;
1950 case ATH10K_BUS_PCI:
1951 case ATH10K_BUS_AHB:
1952 case ATH10K_BUS_SNOC:
1953 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
1954 ATH10K_FW_FILE_BASE, fw_api);
1955 break;
1956 }
1957 }
1958
ath10k_core_fetch_firmware_files(struct ath10k * ar)1959 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1960 {
1961 int ret, i;
1962 char fw_name[100];
1963
1964 /* calibration file is optional, don't check for any errors */
1965 ath10k_fetch_cal_file(ar);
1966
1967 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1968 ar->fw_api = i;
1969 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1970 ar->fw_api);
1971
1972 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1973 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1974 &ar->normal_mode_fw.fw_file);
1975 if (!ret)
1976 goto success;
1977 }
1978
1979 /* we end up here if we couldn't fetch any firmware */
1980
1981 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1982 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1983 ret);
1984
1985 return ret;
1986
1987 success:
1988 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1989
1990 return 0;
1991 }
1992
ath10k_core_pre_cal_download(struct ath10k * ar)1993 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1994 {
1995 int ret;
1996
1997 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1998 if (ret == 0) {
1999 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2000 goto success;
2001 }
2002
2003 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2004 "boot did not find a pre calibration file, try DT next: %d\n",
2005 ret);
2006
2007 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2008 if (ret) {
2009 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2010 "unable to load pre cal data from DT: %d\n", ret);
2011 return ret;
2012 }
2013 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2014
2015 success:
2016 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2017 ath10k_cal_mode_str(ar->cal_mode));
2018
2019 return 0;
2020 }
2021
ath10k_core_pre_cal_config(struct ath10k * ar)2022 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2023 {
2024 int ret;
2025
2026 ret = ath10k_core_pre_cal_download(ar);
2027 if (ret) {
2028 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2029 "failed to load pre cal data: %d\n", ret);
2030 return ret;
2031 }
2032
2033 ret = ath10k_core_get_board_id_from_otp(ar);
2034 if (ret) {
2035 ath10k_err(ar, "failed to get board id: %d\n", ret);
2036 return ret;
2037 }
2038
2039 ret = ath10k_download_and_run_otp(ar);
2040 if (ret) {
2041 ath10k_err(ar, "failed to run otp: %d\n", ret);
2042 return ret;
2043 }
2044
2045 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2046 "pre cal configuration done successfully\n");
2047
2048 return 0;
2049 }
2050
ath10k_download_cal_data(struct ath10k * ar)2051 static int ath10k_download_cal_data(struct ath10k *ar)
2052 {
2053 int ret;
2054
2055 ret = ath10k_core_pre_cal_config(ar);
2056 if (ret == 0)
2057 return 0;
2058
2059 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2060 "pre cal download procedure failed, try cal file: %d\n",
2061 ret);
2062
2063 ret = ath10k_download_cal_file(ar, ar->cal_file);
2064 if (ret == 0) {
2065 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2066 goto done;
2067 }
2068
2069 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2070 "boot did not find a calibration file, try DT next: %d\n",
2071 ret);
2072
2073 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2074 if (ret == 0) {
2075 ar->cal_mode = ATH10K_CAL_MODE_DT;
2076 goto done;
2077 }
2078
2079 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2080 "boot did not find DT entry, try target EEPROM next: %d\n",
2081 ret);
2082
2083 ret = ath10k_download_cal_eeprom(ar);
2084 if (ret == 0) {
2085 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2086 goto done;
2087 }
2088
2089 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2090 "boot did not find target EEPROM entry, try OTP next: %d\n",
2091 ret);
2092
2093 ret = ath10k_download_and_run_otp(ar);
2094 if (ret) {
2095 ath10k_err(ar, "failed to run otp: %d\n", ret);
2096 return ret;
2097 }
2098
2099 ar->cal_mode = ATH10K_CAL_MODE_OTP;
2100
2101 done:
2102 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2103 ath10k_cal_mode_str(ar->cal_mode));
2104 return 0;
2105 }
2106
ath10k_init_uart(struct ath10k * ar)2107 static int ath10k_init_uart(struct ath10k *ar)
2108 {
2109 int ret;
2110
2111 /*
2112 * Explicitly setting UART prints to zero as target turns it on
2113 * based on scratch registers.
2114 */
2115 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2116 if (ret) {
2117 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2118 return ret;
2119 }
2120
2121 if (!uart_print) {
2122 if (ar->hw_params.uart_pin_workaround) {
2123 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2124 ar->hw_params.uart_pin);
2125 if (ret) {
2126 ath10k_warn(ar, "failed to set UART TX pin: %d",
2127 ret);
2128 return ret;
2129 }
2130 }
2131
2132 return 0;
2133 }
2134
2135 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2136 if (ret) {
2137 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2138 return ret;
2139 }
2140
2141 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2142 if (ret) {
2143 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2144 return ret;
2145 }
2146
2147 /* Set the UART baud rate to 19200. */
2148 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2149 if (ret) {
2150 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2151 return ret;
2152 }
2153
2154 ath10k_info(ar, "UART prints enabled\n");
2155 return 0;
2156 }
2157
ath10k_init_hw_params(struct ath10k * ar)2158 static int ath10k_init_hw_params(struct ath10k *ar)
2159 {
2160 const struct ath10k_hw_params *uninitialized_var(hw_params);
2161 int i;
2162
2163 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2164 hw_params = &ath10k_hw_params_list[i];
2165
2166 if (hw_params->bus == ar->hif.bus &&
2167 hw_params->id == ar->target_version &&
2168 hw_params->dev_id == ar->dev_id)
2169 break;
2170 }
2171
2172 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2173 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2174 ar->target_version);
2175 return -EINVAL;
2176 }
2177
2178 ar->hw_params = *hw_params;
2179
2180 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2181 ar->hw_params.name, ar->target_version);
2182
2183 return 0;
2184 }
2185
ath10k_core_restart(struct work_struct * work)2186 static void ath10k_core_restart(struct work_struct *work)
2187 {
2188 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2189 int ret;
2190
2191 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2192
2193 /* Place a barrier to make sure the compiler doesn't reorder
2194 * CRASH_FLUSH and calling other functions.
2195 */
2196 barrier();
2197
2198 ieee80211_stop_queues(ar->hw);
2199 ath10k_drain_tx(ar);
2200 complete(&ar->scan.started);
2201 complete(&ar->scan.completed);
2202 complete(&ar->scan.on_channel);
2203 complete(&ar->offchan_tx_completed);
2204 complete(&ar->install_key_done);
2205 complete(&ar->vdev_setup_done);
2206 complete(&ar->vdev_delete_done);
2207 complete(&ar->thermal.wmi_sync);
2208 complete(&ar->bss_survey_done);
2209 wake_up(&ar->htt.empty_tx_wq);
2210 wake_up(&ar->wmi.tx_credits_wq);
2211 wake_up(&ar->peer_mapping_wq);
2212
2213 /* TODO: We can have one instance of cancelling coverage_class_work by
2214 * moving it to ath10k_halt(), so that both stop() and restart() would
2215 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2216 * with conf_mutex it will deadlock.
2217 */
2218 cancel_work_sync(&ar->set_coverage_class_work);
2219
2220 mutex_lock(&ar->conf_mutex);
2221
2222 switch (ar->state) {
2223 case ATH10K_STATE_ON:
2224 ar->state = ATH10K_STATE_RESTARTING;
2225 ath10k_halt(ar);
2226 ath10k_scan_finish(ar);
2227 ieee80211_restart_hw(ar->hw);
2228 break;
2229 case ATH10K_STATE_OFF:
2230 /* this can happen if driver is being unloaded
2231 * or if the crash happens during FW probing
2232 */
2233 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2234 break;
2235 case ATH10K_STATE_RESTARTING:
2236 /* hw restart might be requested from multiple places */
2237 break;
2238 case ATH10K_STATE_RESTARTED:
2239 ar->state = ATH10K_STATE_WEDGED;
2240 /* fall through */
2241 case ATH10K_STATE_WEDGED:
2242 ath10k_warn(ar, "device is wedged, will not restart\n");
2243 break;
2244 case ATH10K_STATE_UTF:
2245 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2246 break;
2247 }
2248
2249 mutex_unlock(&ar->conf_mutex);
2250
2251 ret = ath10k_coredump_submit(ar);
2252 if (ret)
2253 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2254 ret);
2255
2256 complete(&ar->driver_recovery);
2257 }
2258
ath10k_core_set_coverage_class_work(struct work_struct * work)2259 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2260 {
2261 struct ath10k *ar = container_of(work, struct ath10k,
2262 set_coverage_class_work);
2263
2264 if (ar->hw_params.hw_ops->set_coverage_class)
2265 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2266 }
2267
ath10k_core_init_firmware_features(struct ath10k * ar)2268 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2269 {
2270 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2271 int max_num_peers;
2272
2273 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2274 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2275 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2276 return -EINVAL;
2277 }
2278
2279 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2280 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2281 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2282 return -EINVAL;
2283 }
2284
2285 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2286 switch (ath10k_cryptmode_param) {
2287 case ATH10K_CRYPT_MODE_HW:
2288 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2289 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2290 break;
2291 case ATH10K_CRYPT_MODE_SW:
2292 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2293 fw_file->fw_features)) {
2294 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2295 return -EINVAL;
2296 }
2297
2298 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2299 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2300 break;
2301 default:
2302 ath10k_info(ar, "invalid cryptmode: %d\n",
2303 ath10k_cryptmode_param);
2304 return -EINVAL;
2305 }
2306
2307 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2308 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2309
2310 if (rawmode) {
2311 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2312 fw_file->fw_features)) {
2313 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2314 return -EINVAL;
2315 }
2316 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2317 }
2318
2319 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2320 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2321
2322 /* Workaround:
2323 *
2324 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2325 * and causes enormous performance issues (malformed frames,
2326 * etc).
2327 *
2328 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2329 * albeit a bit slower compared to regular operation.
2330 */
2331 ar->htt.max_num_amsdu = 1;
2332 }
2333
2334 /* Backwards compatibility for firmwares without
2335 * ATH10K_FW_IE_WMI_OP_VERSION.
2336 */
2337 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2338 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2339 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2340 fw_file->fw_features))
2341 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2342 else
2343 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2344 } else {
2345 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2346 }
2347 }
2348
2349 switch (fw_file->wmi_op_version) {
2350 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2351 max_num_peers = TARGET_NUM_PEERS;
2352 ar->max_num_stations = TARGET_NUM_STATIONS;
2353 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2354 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2355 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2356 WMI_STAT_PEER;
2357 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2358 break;
2359 case ATH10K_FW_WMI_OP_VERSION_10_1:
2360 case ATH10K_FW_WMI_OP_VERSION_10_2:
2361 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2362 if (ath10k_peer_stats_enabled(ar)) {
2363 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2364 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2365 } else {
2366 max_num_peers = TARGET_10X_NUM_PEERS;
2367 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2368 }
2369 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2370 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2371 ar->fw_stats_req_mask = WMI_STAT_PEER;
2372 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2373 break;
2374 case ATH10K_FW_WMI_OP_VERSION_TLV:
2375 max_num_peers = TARGET_TLV_NUM_PEERS;
2376 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2377 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2378 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2379 if (ar->hif.bus == ATH10K_BUS_SDIO)
2380 ar->htt.max_num_pending_tx =
2381 TARGET_TLV_NUM_MSDU_DESC_HL;
2382 else
2383 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2384 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2385 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2386 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2387 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2388 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2389 break;
2390 case ATH10K_FW_WMI_OP_VERSION_10_4:
2391 max_num_peers = TARGET_10_4_NUM_PEERS;
2392 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2393 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2394 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2395 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2396 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2397 WMI_10_4_STAT_PEER_EXTD |
2398 WMI_10_4_STAT_VDEV_EXTD;
2399 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2400 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2401
2402 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2403 fw_file->fw_features))
2404 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2405 else
2406 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2407 break;
2408 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2409 case ATH10K_FW_WMI_OP_VERSION_MAX:
2410 default:
2411 WARN_ON(1);
2412 return -EINVAL;
2413 }
2414
2415 if (ar->hw_params.num_peers)
2416 ar->max_num_peers = ar->hw_params.num_peers;
2417 else
2418 ar->max_num_peers = max_num_peers;
2419
2420 /* Backwards compatibility for firmwares without
2421 * ATH10K_FW_IE_HTT_OP_VERSION.
2422 */
2423 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2424 switch (fw_file->wmi_op_version) {
2425 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2426 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2427 break;
2428 case ATH10K_FW_WMI_OP_VERSION_10_1:
2429 case ATH10K_FW_WMI_OP_VERSION_10_2:
2430 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2431 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2432 break;
2433 case ATH10K_FW_WMI_OP_VERSION_TLV:
2434 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2435 break;
2436 case ATH10K_FW_WMI_OP_VERSION_10_4:
2437 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2438 case ATH10K_FW_WMI_OP_VERSION_MAX:
2439 ath10k_err(ar, "htt op version not found from fw meta data");
2440 return -EINVAL;
2441 }
2442 }
2443
2444 return 0;
2445 }
2446
ath10k_core_reset_rx_filter(struct ath10k * ar)2447 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2448 {
2449 int ret;
2450 int vdev_id;
2451 int vdev_type;
2452 int vdev_subtype;
2453 const u8 *vdev_addr;
2454
2455 vdev_id = 0;
2456 vdev_type = WMI_VDEV_TYPE_STA;
2457 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2458 vdev_addr = ar->mac_addr;
2459
2460 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2461 vdev_addr);
2462 if (ret) {
2463 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2464 return ret;
2465 }
2466
2467 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2468 if (ret) {
2469 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2470 return ret;
2471 }
2472
2473 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2474 * serialized properly implicitly.
2475 *
2476 * Moreover (most) WMI commands have no explicit acknowledges. It is
2477 * possible to infer it implicitly by poking firmware with echo
2478 * command - getting a reply means all preceding comments have been
2479 * (mostly) processed.
2480 *
2481 * In case of vdev create/delete this is sufficient.
2482 *
2483 * Without this it's possible to end up with a race when HTT Rx ring is
2484 * started before vdev create/delete hack is complete allowing a short
2485 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2486 */
2487 ret = ath10k_wmi_barrier(ar);
2488 if (ret) {
2489 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2490 return ret;
2491 }
2492
2493 return 0;
2494 }
2495
ath10k_core_compat_services(struct ath10k * ar)2496 static int ath10k_core_compat_services(struct ath10k *ar)
2497 {
2498 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2499
2500 /* all 10.x firmware versions support thermal throttling but don't
2501 * advertise the support via service flags so we have to hardcode
2502 * it here
2503 */
2504 switch (fw_file->wmi_op_version) {
2505 case ATH10K_FW_WMI_OP_VERSION_10_1:
2506 case ATH10K_FW_WMI_OP_VERSION_10_2:
2507 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2508 case ATH10K_FW_WMI_OP_VERSION_10_4:
2509 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2510 break;
2511 default:
2512 break;
2513 }
2514
2515 return 0;
2516 }
2517
ath10k_core_start(struct ath10k * ar,enum ath10k_firmware_mode mode,const struct ath10k_fw_components * fw)2518 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2519 const struct ath10k_fw_components *fw)
2520 {
2521 int status;
2522 u32 val;
2523
2524 lockdep_assert_held(&ar->conf_mutex);
2525
2526 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2527
2528 ar->running_fw = fw;
2529
2530 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2531 ar->running_fw->fw_file.fw_features)) {
2532 ath10k_bmi_start(ar);
2533
2534 if (ath10k_init_configure_target(ar)) {
2535 status = -EINVAL;
2536 goto err;
2537 }
2538
2539 status = ath10k_download_cal_data(ar);
2540 if (status)
2541 goto err;
2542
2543 /* Some of of qca988x solutions are having global reset issue
2544 * during target initialization. Bypassing PLL setting before
2545 * downloading firmware and letting the SoC run on REF_CLK is
2546 * fixing the problem. Corresponding firmware change is also
2547 * needed to set the clock source once the target is
2548 * initialized.
2549 */
2550 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2551 ar->running_fw->fw_file.fw_features)) {
2552 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2553 if (status) {
2554 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2555 status);
2556 goto err;
2557 }
2558 }
2559
2560 status = ath10k_download_fw(ar);
2561 if (status)
2562 goto err;
2563
2564 status = ath10k_init_uart(ar);
2565 if (status)
2566 goto err;
2567
2568 if (ar->hif.bus == ATH10K_BUS_SDIO)
2569 ath10k_init_sdio(ar, mode);
2570 }
2571
2572 ar->htc.htc_ops.target_send_suspend_complete =
2573 ath10k_send_suspend_complete;
2574
2575 status = ath10k_htc_init(ar);
2576 if (status) {
2577 ath10k_err(ar, "could not init HTC (%d)\n", status);
2578 goto err;
2579 }
2580
2581 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2582 ar->running_fw->fw_file.fw_features)) {
2583 status = ath10k_bmi_done(ar);
2584 if (status)
2585 goto err;
2586 }
2587
2588 status = ath10k_wmi_attach(ar);
2589 if (status) {
2590 ath10k_err(ar, "WMI attach failed: %d\n", status);
2591 goto err;
2592 }
2593
2594 status = ath10k_htt_init(ar);
2595 if (status) {
2596 ath10k_err(ar, "failed to init htt: %d\n", status);
2597 goto err_wmi_detach;
2598 }
2599
2600 status = ath10k_htt_tx_start(&ar->htt);
2601 if (status) {
2602 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2603 goto err_wmi_detach;
2604 }
2605
2606 /* If firmware indicates Full Rx Reorder support it must be used in a
2607 * slightly different manner. Let HTT code know.
2608 */
2609 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2610 ar->wmi.svc_map));
2611
2612 status = ath10k_htt_rx_alloc(&ar->htt);
2613 if (status) {
2614 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2615 goto err_htt_tx_detach;
2616 }
2617
2618 status = ath10k_hif_start(ar);
2619 if (status) {
2620 ath10k_err(ar, "could not start HIF: %d\n", status);
2621 goto err_htt_rx_detach;
2622 }
2623
2624 status = ath10k_htc_wait_target(&ar->htc);
2625 if (status) {
2626 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2627 goto err_hif_stop;
2628 }
2629
2630 status = ath10k_hif_swap_mailbox(ar);
2631 if (status) {
2632 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2633 goto err_hif_stop;
2634 }
2635
2636 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2637 status = ath10k_htt_connect(&ar->htt);
2638 if (status) {
2639 ath10k_err(ar, "failed to connect htt (%d)\n", status);
2640 goto err_hif_stop;
2641 }
2642 }
2643
2644 status = ath10k_wmi_connect(ar);
2645 if (status) {
2646 ath10k_err(ar, "could not connect wmi: %d\n", status);
2647 goto err_hif_stop;
2648 }
2649
2650 status = ath10k_htc_start(&ar->htc);
2651 if (status) {
2652 ath10k_err(ar, "failed to start htc: %d\n", status);
2653 goto err_hif_stop;
2654 }
2655
2656 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2657 status = ath10k_wmi_wait_for_service_ready(ar);
2658 if (status) {
2659 ath10k_warn(ar, "wmi service ready event not received");
2660 goto err_hif_stop;
2661 }
2662 }
2663
2664 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2665 ar->hw->wiphy->fw_version);
2666
2667 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2668 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2669 val = 0;
2670 if (ath10k_peer_stats_enabled(ar))
2671 val = WMI_10_4_PEER_STATS;
2672
2673 /* Enable vdev stats by default */
2674 val |= WMI_10_4_VDEV_STATS;
2675
2676 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2677 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2678
2679 /* 10.4 firmware supports BT-Coex without reloading firmware
2680 * via pdev param. To support Bluetooth coexistence pdev param,
2681 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2682 * enabled always.
2683 */
2684 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2685 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2686 ar->running_fw->fw_file.fw_features))
2687 val |= WMI_10_4_COEX_GPIO_SUPPORT;
2688
2689 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2690 ar->wmi.svc_map))
2691 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2692
2693 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2694 ar->wmi.svc_map))
2695 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2696
2697 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2698 ar->wmi.svc_map))
2699 val |= WMI_10_4_TX_DATA_ACK_RSSI;
2700
2701 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2702 val |= WMI_10_4_REPORT_AIRTIME;
2703
2704 status = ath10k_mac_ext_resource_config(ar, val);
2705 if (status) {
2706 ath10k_err(ar,
2707 "failed to send ext resource cfg command : %d\n",
2708 status);
2709 goto err_hif_stop;
2710 }
2711 }
2712
2713 status = ath10k_wmi_cmd_init(ar);
2714 if (status) {
2715 ath10k_err(ar, "could not send WMI init command (%d)\n",
2716 status);
2717 goto err_hif_stop;
2718 }
2719
2720 status = ath10k_wmi_wait_for_unified_ready(ar);
2721 if (status) {
2722 ath10k_err(ar, "wmi unified ready event not received\n");
2723 goto err_hif_stop;
2724 }
2725
2726 status = ath10k_core_compat_services(ar);
2727 if (status) {
2728 ath10k_err(ar, "compat services failed: %d\n", status);
2729 goto err_hif_stop;
2730 }
2731
2732 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2733 if (status && status != -EOPNOTSUPP) {
2734 ath10k_err(ar,
2735 "failed to set base mac address: %d\n", status);
2736 goto err_hif_stop;
2737 }
2738
2739 /* Some firmware revisions do not properly set up hardware rx filter
2740 * registers.
2741 *
2742 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2743 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2744 * any frames that matches MAC_PCU_RX_FILTER which is also
2745 * misconfigured to accept anything.
2746 *
2747 * The ADDR1 is programmed using internal firmware structure field and
2748 * can't be (easily/sanely) reached from the driver explicitly. It is
2749 * possible to implicitly make it correct by creating a dummy vdev and
2750 * then deleting it.
2751 */
2752 if (ar->hw_params.hw_filter_reset_required &&
2753 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2754 status = ath10k_core_reset_rx_filter(ar);
2755 if (status) {
2756 ath10k_err(ar,
2757 "failed to reset rx filter: %d\n", status);
2758 goto err_hif_stop;
2759 }
2760 }
2761
2762 status = ath10k_htt_rx_ring_refill(ar);
2763 if (status) {
2764 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2765 goto err_hif_stop;
2766 }
2767
2768 if (ar->max_num_vdevs >= 64)
2769 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2770 else
2771 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2772
2773 INIT_LIST_HEAD(&ar->arvifs);
2774
2775 /* we don't care about HTT in UTF mode */
2776 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2777 status = ath10k_htt_setup(&ar->htt);
2778 if (status) {
2779 ath10k_err(ar, "failed to setup htt: %d\n", status);
2780 goto err_hif_stop;
2781 }
2782 }
2783
2784 status = ath10k_debug_start(ar);
2785 if (status)
2786 goto err_hif_stop;
2787
2788 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
2789 if (status && status != -EOPNOTSUPP) {
2790 ath10k_warn(ar, "set traget log mode faileds: %d\n", status);
2791 goto err_hif_stop;
2792 }
2793
2794 return 0;
2795
2796 err_hif_stop:
2797 ath10k_hif_stop(ar);
2798 err_htt_rx_detach:
2799 ath10k_htt_rx_free(&ar->htt);
2800 err_htt_tx_detach:
2801 ath10k_htt_tx_free(&ar->htt);
2802 err_wmi_detach:
2803 ath10k_wmi_detach(ar);
2804 err:
2805 return status;
2806 }
2807 EXPORT_SYMBOL(ath10k_core_start);
2808
ath10k_wait_for_suspend(struct ath10k * ar,u32 suspend_opt)2809 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2810 {
2811 int ret;
2812 unsigned long time_left;
2813
2814 reinit_completion(&ar->target_suspend);
2815
2816 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2817 if (ret) {
2818 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2819 return ret;
2820 }
2821
2822 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2823
2824 if (!time_left) {
2825 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2826 return -ETIMEDOUT;
2827 }
2828
2829 return 0;
2830 }
2831
ath10k_core_stop(struct ath10k * ar)2832 void ath10k_core_stop(struct ath10k *ar)
2833 {
2834 lockdep_assert_held(&ar->conf_mutex);
2835 ath10k_debug_stop(ar);
2836
2837 /* try to suspend target */
2838 if (ar->state != ATH10K_STATE_RESTARTING &&
2839 ar->state != ATH10K_STATE_UTF)
2840 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2841
2842 ath10k_hif_stop(ar);
2843 ath10k_htt_tx_stop(&ar->htt);
2844 ath10k_htt_rx_free(&ar->htt);
2845 ath10k_wmi_detach(ar);
2846 }
2847 EXPORT_SYMBOL(ath10k_core_stop);
2848
2849 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2850 * order to know what hw capabilities should be advertised to mac80211 it is
2851 * necessary to load the firmware (and tear it down immediately since start
2852 * hook will try to init it again) before registering
2853 */
ath10k_core_probe_fw(struct ath10k * ar)2854 static int ath10k_core_probe_fw(struct ath10k *ar)
2855 {
2856 struct bmi_target_info target_info;
2857 int ret = 0;
2858
2859 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
2860 if (ret) {
2861 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2862 return ret;
2863 }
2864
2865 switch (ar->hif.bus) {
2866 case ATH10K_BUS_SDIO:
2867 memset(&target_info, 0, sizeof(target_info));
2868 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2869 if (ret) {
2870 ath10k_err(ar, "could not get target info (%d)\n", ret);
2871 goto err_power_down;
2872 }
2873 ar->target_version = target_info.version;
2874 ar->hw->wiphy->hw_version = target_info.version;
2875 break;
2876 case ATH10K_BUS_PCI:
2877 case ATH10K_BUS_AHB:
2878 case ATH10K_BUS_USB:
2879 memset(&target_info, 0, sizeof(target_info));
2880 ret = ath10k_bmi_get_target_info(ar, &target_info);
2881 if (ret) {
2882 ath10k_err(ar, "could not get target info (%d)\n", ret);
2883 goto err_power_down;
2884 }
2885 ar->target_version = target_info.version;
2886 ar->hw->wiphy->hw_version = target_info.version;
2887 break;
2888 case ATH10K_BUS_SNOC:
2889 memset(&target_info, 0, sizeof(target_info));
2890 ret = ath10k_hif_get_target_info(ar, &target_info);
2891 if (ret) {
2892 ath10k_err(ar, "could not get target info (%d)\n", ret);
2893 goto err_power_down;
2894 }
2895 ar->target_version = target_info.version;
2896 ar->hw->wiphy->hw_version = target_info.version;
2897 break;
2898 default:
2899 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2900 }
2901
2902 ret = ath10k_init_hw_params(ar);
2903 if (ret) {
2904 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2905 goto err_power_down;
2906 }
2907
2908 ret = ath10k_core_fetch_firmware_files(ar);
2909 if (ret) {
2910 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2911 goto err_power_down;
2912 }
2913
2914 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2915 sizeof(ar->normal_mode_fw.fw_file.fw_version));
2916 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2917 sizeof(ar->hw->wiphy->fw_version));
2918
2919 ath10k_debug_print_hwfw_info(ar);
2920
2921 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2922 ar->normal_mode_fw.fw_file.fw_features)) {
2923 ret = ath10k_core_pre_cal_download(ar);
2924 if (ret) {
2925 /* pre calibration data download is not necessary
2926 * for all the chipsets. Ignore failures and continue.
2927 */
2928 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2929 "could not load pre cal data: %d\n", ret);
2930 }
2931
2932 ret = ath10k_core_get_board_id_from_otp(ar);
2933 if (ret && ret != -EOPNOTSUPP) {
2934 ath10k_err(ar, "failed to get board id from otp: %d\n",
2935 ret);
2936 goto err_free_firmware_files;
2937 }
2938
2939 ret = ath10k_core_check_smbios(ar);
2940 if (ret)
2941 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
2942
2943 ret = ath10k_core_check_dt(ar);
2944 if (ret)
2945 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
2946
2947 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
2948 if (ret) {
2949 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2950 goto err_free_firmware_files;
2951 }
2952
2953 ath10k_debug_print_board_info(ar);
2954 }
2955
2956 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
2957
2958 ret = ath10k_core_init_firmware_features(ar);
2959 if (ret) {
2960 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2961 ret);
2962 goto err_free_firmware_files;
2963 }
2964
2965 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2966 ar->normal_mode_fw.fw_file.fw_features)) {
2967 ret = ath10k_swap_code_seg_init(ar,
2968 &ar->normal_mode_fw.fw_file);
2969 if (ret) {
2970 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2971 ret);
2972 goto err_free_firmware_files;
2973 }
2974 }
2975
2976 mutex_lock(&ar->conf_mutex);
2977
2978 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2979 &ar->normal_mode_fw);
2980 if (ret) {
2981 ath10k_err(ar, "could not init core (%d)\n", ret);
2982 goto err_unlock;
2983 }
2984
2985 ath10k_debug_print_boot_info(ar);
2986 ath10k_core_stop(ar);
2987
2988 mutex_unlock(&ar->conf_mutex);
2989
2990 ath10k_hif_power_down(ar);
2991 return 0;
2992
2993 err_unlock:
2994 mutex_unlock(&ar->conf_mutex);
2995
2996 err_free_firmware_files:
2997 ath10k_core_free_firmware_files(ar);
2998
2999 err_power_down:
3000 ath10k_hif_power_down(ar);
3001
3002 return ret;
3003 }
3004
ath10k_core_register_work(struct work_struct * work)3005 static void ath10k_core_register_work(struct work_struct *work)
3006 {
3007 struct ath10k *ar = container_of(work, struct ath10k, register_work);
3008 int status;
3009
3010 /* peer stats are enabled by default */
3011 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3012
3013 status = ath10k_core_probe_fw(ar);
3014 if (status) {
3015 ath10k_err(ar, "could not probe fw (%d)\n", status);
3016 goto err;
3017 }
3018
3019 status = ath10k_mac_register(ar);
3020 if (status) {
3021 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3022 goto err_release_fw;
3023 }
3024
3025 status = ath10k_coredump_register(ar);
3026 if (status) {
3027 ath10k_err(ar, "unable to register coredump\n");
3028 goto err_unregister_mac;
3029 }
3030
3031 status = ath10k_debug_register(ar);
3032 if (status) {
3033 ath10k_err(ar, "unable to initialize debugfs\n");
3034 goto err_unregister_coredump;
3035 }
3036
3037 status = ath10k_spectral_create(ar);
3038 if (status) {
3039 ath10k_err(ar, "failed to initialize spectral\n");
3040 goto err_debug_destroy;
3041 }
3042
3043 status = ath10k_thermal_register(ar);
3044 if (status) {
3045 ath10k_err(ar, "could not register thermal device: %d\n",
3046 status);
3047 goto err_spectral_destroy;
3048 }
3049
3050 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3051 return;
3052
3053 err_spectral_destroy:
3054 ath10k_spectral_destroy(ar);
3055 err_debug_destroy:
3056 ath10k_debug_destroy(ar);
3057 err_unregister_coredump:
3058 ath10k_coredump_unregister(ar);
3059 err_unregister_mac:
3060 ath10k_mac_unregister(ar);
3061 err_release_fw:
3062 ath10k_core_free_firmware_files(ar);
3063 err:
3064 /* TODO: It's probably a good idea to release device from the driver
3065 * but calling device_release_driver() here will cause a deadlock.
3066 */
3067 return;
3068 }
3069
ath10k_core_register(struct ath10k * ar,const struct ath10k_bus_params * bus_params)3070 int ath10k_core_register(struct ath10k *ar,
3071 const struct ath10k_bus_params *bus_params)
3072 {
3073 ar->bus_param = *bus_params;
3074
3075 queue_work(ar->workqueue, &ar->register_work);
3076
3077 return 0;
3078 }
3079 EXPORT_SYMBOL(ath10k_core_register);
3080
ath10k_core_unregister(struct ath10k * ar)3081 void ath10k_core_unregister(struct ath10k *ar)
3082 {
3083 cancel_work_sync(&ar->register_work);
3084
3085 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3086 return;
3087
3088 ath10k_thermal_unregister(ar);
3089 /* Stop spectral before unregistering from mac80211 to remove the
3090 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3091 * would be already be free'd recursively, leading to a double free.
3092 */
3093 ath10k_spectral_destroy(ar);
3094
3095 /* We must unregister from mac80211 before we stop HTC and HIF.
3096 * Otherwise we will fail to submit commands to FW and mac80211 will be
3097 * unhappy about callback failures.
3098 */
3099 ath10k_mac_unregister(ar);
3100
3101 ath10k_testmode_destroy(ar);
3102
3103 ath10k_core_free_firmware_files(ar);
3104 ath10k_core_free_board_files(ar);
3105
3106 ath10k_debug_unregister(ar);
3107 }
3108 EXPORT_SYMBOL(ath10k_core_unregister);
3109
ath10k_core_create(size_t priv_size,struct device * dev,enum ath10k_bus bus,enum ath10k_hw_rev hw_rev,const struct ath10k_hif_ops * hif_ops)3110 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3111 enum ath10k_bus bus,
3112 enum ath10k_hw_rev hw_rev,
3113 const struct ath10k_hif_ops *hif_ops)
3114 {
3115 struct ath10k *ar;
3116 int ret;
3117
3118 ar = ath10k_mac_create(priv_size);
3119 if (!ar)
3120 return NULL;
3121
3122 ar->ath_common.priv = ar;
3123 ar->ath_common.hw = ar->hw;
3124 ar->dev = dev;
3125 ar->hw_rev = hw_rev;
3126 ar->hif.ops = hif_ops;
3127 ar->hif.bus = bus;
3128
3129 switch (hw_rev) {
3130 case ATH10K_HW_QCA988X:
3131 case ATH10K_HW_QCA9887:
3132 ar->regs = &qca988x_regs;
3133 ar->hw_ce_regs = &qcax_ce_regs;
3134 ar->hw_values = &qca988x_values;
3135 break;
3136 case ATH10K_HW_QCA6174:
3137 case ATH10K_HW_QCA9377:
3138 ar->regs = &qca6174_regs;
3139 ar->hw_ce_regs = &qcax_ce_regs;
3140 ar->hw_values = &qca6174_values;
3141 break;
3142 case ATH10K_HW_QCA99X0:
3143 case ATH10K_HW_QCA9984:
3144 ar->regs = &qca99x0_regs;
3145 ar->hw_ce_regs = &qcax_ce_regs;
3146 ar->hw_values = &qca99x0_values;
3147 break;
3148 case ATH10K_HW_QCA9888:
3149 ar->regs = &qca99x0_regs;
3150 ar->hw_ce_regs = &qcax_ce_regs;
3151 ar->hw_values = &qca9888_values;
3152 break;
3153 case ATH10K_HW_QCA4019:
3154 ar->regs = &qca4019_regs;
3155 ar->hw_ce_regs = &qcax_ce_regs;
3156 ar->hw_values = &qca4019_values;
3157 break;
3158 case ATH10K_HW_WCN3990:
3159 ar->regs = &wcn3990_regs;
3160 ar->hw_ce_regs = &wcn3990_ce_regs;
3161 ar->hw_values = &wcn3990_values;
3162 break;
3163 default:
3164 ath10k_err(ar, "unsupported core hardware revision %d\n",
3165 hw_rev);
3166 ret = -ENOTSUPP;
3167 goto err_free_mac;
3168 }
3169
3170 init_completion(&ar->scan.started);
3171 init_completion(&ar->scan.completed);
3172 init_completion(&ar->scan.on_channel);
3173 init_completion(&ar->target_suspend);
3174 init_completion(&ar->driver_recovery);
3175 init_completion(&ar->wow.wakeup_completed);
3176
3177 init_completion(&ar->install_key_done);
3178 init_completion(&ar->vdev_setup_done);
3179 init_completion(&ar->vdev_delete_done);
3180 init_completion(&ar->thermal.wmi_sync);
3181 init_completion(&ar->bss_survey_done);
3182 init_completion(&ar->peer_delete_done);
3183
3184 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3185
3186 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3187 if (!ar->workqueue)
3188 goto err_free_mac;
3189
3190 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3191 if (!ar->workqueue_aux)
3192 goto err_free_wq;
3193
3194 mutex_init(&ar->conf_mutex);
3195 mutex_init(&ar->dump_mutex);
3196 spin_lock_init(&ar->data_lock);
3197
3198 INIT_LIST_HEAD(&ar->peers);
3199 init_waitqueue_head(&ar->peer_mapping_wq);
3200 init_waitqueue_head(&ar->htt.empty_tx_wq);
3201 init_waitqueue_head(&ar->wmi.tx_credits_wq);
3202
3203 init_completion(&ar->offchan_tx_completed);
3204 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3205 skb_queue_head_init(&ar->offchan_tx_queue);
3206
3207 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3208 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3209
3210 INIT_WORK(&ar->register_work, ath10k_core_register_work);
3211 INIT_WORK(&ar->restart_work, ath10k_core_restart);
3212 INIT_WORK(&ar->set_coverage_class_work,
3213 ath10k_core_set_coverage_class_work);
3214
3215 init_dummy_netdev(&ar->napi_dev);
3216
3217 ret = ath10k_coredump_create(ar);
3218 if (ret)
3219 goto err_free_aux_wq;
3220
3221 ret = ath10k_debug_create(ar);
3222 if (ret)
3223 goto err_free_coredump;
3224
3225 return ar;
3226
3227 err_free_coredump:
3228 ath10k_coredump_destroy(ar);
3229
3230 err_free_aux_wq:
3231 destroy_workqueue(ar->workqueue_aux);
3232 err_free_wq:
3233 destroy_workqueue(ar->workqueue);
3234
3235 err_free_mac:
3236 ath10k_mac_destroy(ar);
3237
3238 return NULL;
3239 }
3240 EXPORT_SYMBOL(ath10k_core_create);
3241
ath10k_core_destroy(struct ath10k * ar)3242 void ath10k_core_destroy(struct ath10k *ar)
3243 {
3244 flush_workqueue(ar->workqueue);
3245 destroy_workqueue(ar->workqueue);
3246
3247 flush_workqueue(ar->workqueue_aux);
3248 destroy_workqueue(ar->workqueue_aux);
3249
3250 ath10k_debug_destroy(ar);
3251 ath10k_coredump_destroy(ar);
3252 ath10k_htt_tx_destroy(&ar->htt);
3253 ath10k_wmi_free_host_mem(ar);
3254 ath10k_mac_destroy(ar);
3255 }
3256 EXPORT_SYMBOL(ath10k_core_destroy);
3257
3258 MODULE_AUTHOR("Qualcomm Atheros");
3259 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3260 MODULE_LICENSE("Dual BSD/GPL");
3261
