1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Atmel AT93C46 serial eeprom driver 4 * 5 * Brian Murphy <brian.murphy@eicon.com> 6 * 7 */ 8 #include <linux/kernel.h> 9 #include <linux/delay.h> 10 #include <asm/lasat/lasat.h> 11 12 #include "at93c.h" 13 14 #define AT93C_ADDR_SHIFT 7 15 #define AT93C_ADDR_MAX ((1 << AT93C_ADDR_SHIFT) - 1) 16 #define AT93C_RCMD (0x6 << AT93C_ADDR_SHIFT) 17 #define AT93C_WCMD (0x5 << AT93C_ADDR_SHIFT) 18 #define AT93C_WENCMD 0x260 19 #define AT93C_WDSCMD 0x200 20 21 struct at93c_defs *at93c; 22 at93c_reg_write(u32 val)23static void at93c_reg_write(u32 val) 24 { 25 *at93c->reg = val; 26 } 27 at93c_reg_read(void)28static u32 at93c_reg_read(void) 29 { 30 u32 tmp = *at93c->reg; 31 return tmp; 32 } 33 at93c_datareg_read(void)34static u32 at93c_datareg_read(void) 35 { 36 u32 tmp = *at93c->rdata_reg; 37 return tmp; 38 } 39 at93c_cycle_clk(u32 data)40static void at93c_cycle_clk(u32 data) 41 { 42 at93c_reg_write(data | at93c->clk); 43 lasat_ndelay(250); 44 at93c_reg_write(data & ~at93c->clk); 45 lasat_ndelay(250); 46 } 47 at93c_write_databit(u8 bit)48static void at93c_write_databit(u8 bit) 49 { 50 u32 data = at93c_reg_read(); 51 if (bit) 52 data |= 1 << at93c->wdata_shift; 53 else 54 data &= ~(1 << at93c->wdata_shift); 55 56 at93c_reg_write(data); 57 lasat_ndelay(100); 58 at93c_cycle_clk(data); 59 } 60 at93c_read_databit(void)61static unsigned int at93c_read_databit(void) 62 { 63 u32 data; 64 65 at93c_cycle_clk(at93c_reg_read()); 66 data = (at93c_datareg_read() >> at93c->rdata_shift) & 1; 67 return data; 68 } 69 at93c_read_byte(void)70static u8 at93c_read_byte(void) 71 { 72 int i; 73 u8 data = 0; 74 75 for (i = 0; i <= 7; i++) { 76 data <<= 1; 77 data |= at93c_read_databit(); 78 } 79 return data; 80 } 81 at93c_write_bits(u32 data,int size)82static void at93c_write_bits(u32 data, int size) 83 { 84 int i; 85 int shift = size - 1; 86 u32 mask = (1 << shift); 87 88 for (i = 0; i < size; i++) { 89 at93c_write_databit((data & mask) >> shift); 90 data <<= 1; 91 } 92 } 93 at93c_init_op(void)94static void at93c_init_op(void) 95 { 96 at93c_reg_write((at93c_reg_read() | at93c->cs) & 97 ~at93c->clk & ~(1 << at93c->rdata_shift)); 98 lasat_ndelay(50); 99 } 100 at93c_end_op(void)101static void at93c_end_op(void) 102 { 103 at93c_reg_write(at93c_reg_read() & ~at93c->cs); 104 lasat_ndelay(250); 105 } 106 at93c_wait(void)107static void at93c_wait(void) 108 { 109 at93c_init_op(); 110 while (!at93c_read_databit()) 111 ; 112 at93c_end_op(); 113 }; 114 at93c_disable_wp(void)115static void at93c_disable_wp(void) 116 { 117 at93c_init_op(); 118 at93c_write_bits(AT93C_WENCMD, 10); 119 at93c_end_op(); 120 } 121 at93c_enable_wp(void)122static void at93c_enable_wp(void) 123 { 124 at93c_init_op(); 125 at93c_write_bits(AT93C_WDSCMD, 10); 126 at93c_end_op(); 127 } 128 at93c_read(u8 addr)129u8 at93c_read(u8 addr) 130 { 131 u8 byte; 132 at93c_init_op(); 133 at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_RCMD, 10); 134 byte = at93c_read_byte(); 135 at93c_end_op(); 136 return byte; 137 } 138 at93c_write(u8 addr,u8 data)139void at93c_write(u8 addr, u8 data) 140 { 141 at93c_disable_wp(); 142 at93c_init_op(); 143 at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_WCMD, 10); 144 at93c_write_bits(data, 8); 145 at93c_end_op(); 146 at93c_wait(); 147 at93c_enable_wp(); 148 } 149