1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Aic94xx SAS/SATA driver access to shared data structures and memory
4 * maps.
5 *
6 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
7 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
8 */
9
10 #include <linux/pci.h>
11 #include <linux/slab.h>
12 #include <linux/delay.h>
13
14 #include "aic94xx.h"
15 #include "aic94xx_reg.h"
16 #include "aic94xx_sds.h"
17
18 /* ---------- OCM stuff ---------- */
19
20 struct asd_ocm_dir_ent {
21 u8 type;
22 u8 offs[3];
23 u8 _r1;
24 u8 size[3];
25 } __attribute__ ((packed));
26
27 struct asd_ocm_dir {
28 char sig[2];
29 u8 _r1[2];
30 u8 major; /* 0 */
31 u8 minor; /* 0 */
32 u8 _r2;
33 u8 num_de;
34 struct asd_ocm_dir_ent entry[15];
35 } __attribute__ ((packed));
36
37 #define OCM_DE_OCM_DIR 0x00
38 #define OCM_DE_WIN_DRVR 0x01
39 #define OCM_DE_BIOS_CHIM 0x02
40 #define OCM_DE_RAID_ENGN 0x03
41 #define OCM_DE_BIOS_INTL 0x04
42 #define OCM_DE_BIOS_CHIM_OSM 0x05
43 #define OCM_DE_BIOS_CHIM_DYNAMIC 0x06
44 #define OCM_DE_ADDC2C_RES0 0x07
45 #define OCM_DE_ADDC2C_RES1 0x08
46 #define OCM_DE_ADDC2C_RES2 0x09
47 #define OCM_DE_ADDC2C_RES3 0x0A
48
49 #define OCM_INIT_DIR_ENTRIES 5
50 /***************************************************************************
51 * OCM directory default
52 ***************************************************************************/
53 static struct asd_ocm_dir OCMDirInit =
54 {
55 .sig = {0x4D, 0x4F}, /* signature */
56 .num_de = OCM_INIT_DIR_ENTRIES, /* no. of directory entries */
57 };
58
59 /***************************************************************************
60 * OCM directory Entries default
61 ***************************************************************************/
62 static struct asd_ocm_dir_ent OCMDirEntriesInit[OCM_INIT_DIR_ENTRIES] =
63 {
64 {
65 .type = (OCM_DE_ADDC2C_RES0), /* Entry type */
66 .offs = {128}, /* Offset */
67 .size = {0, 4}, /* size */
68 },
69 {
70 .type = (OCM_DE_ADDC2C_RES1), /* Entry type */
71 .offs = {128, 4}, /* Offset */
72 .size = {0, 4}, /* size */
73 },
74 {
75 .type = (OCM_DE_ADDC2C_RES2), /* Entry type */
76 .offs = {128, 8}, /* Offset */
77 .size = {0, 4}, /* size */
78 },
79 {
80 .type = (OCM_DE_ADDC2C_RES3), /* Entry type */
81 .offs = {128, 12}, /* Offset */
82 .size = {0, 4}, /* size */
83 },
84 {
85 .type = (OCM_DE_WIN_DRVR), /* Entry type */
86 .offs = {128, 16}, /* Offset */
87 .size = {128, 235, 1}, /* size */
88 },
89 };
90
91 struct asd_bios_chim_struct {
92 char sig[4];
93 u8 major; /* 1 */
94 u8 minor; /* 0 */
95 u8 bios_major;
96 u8 bios_minor;
97 __le32 bios_build;
98 u8 flags;
99 u8 pci_slot;
100 __le16 ue_num;
101 __le16 ue_size;
102 u8 _r[14];
103 /* The unit element array is right here.
104 */
105 } __attribute__ ((packed));
106
107 /**
108 * asd_read_ocm_seg - read an on chip memory (OCM) segment
109 * @asd_ha: pointer to the host adapter structure
110 * @buffer: where to write the read data
111 * @offs: offset into OCM where to read from
112 * @size: how many bytes to read
113 *
114 * Return the number of bytes not read. Return 0 on success.
115 */
asd_read_ocm_seg(struct asd_ha_struct * asd_ha,void * buffer,u32 offs,int size)116 static int asd_read_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer,
117 u32 offs, int size)
118 {
119 u8 *p = buffer;
120 if (unlikely(asd_ha->iospace))
121 asd_read_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size);
122 else {
123 for ( ; size > 0; size--, offs++, p++)
124 *p = asd_read_ocm_byte(asd_ha, offs);
125 }
126 return size;
127 }
128
asd_read_ocm_dir(struct asd_ha_struct * asd_ha,struct asd_ocm_dir * dir,u32 offs)129 static int asd_read_ocm_dir(struct asd_ha_struct *asd_ha,
130 struct asd_ocm_dir *dir, u32 offs)
131 {
132 int err = asd_read_ocm_seg(asd_ha, dir, offs, sizeof(*dir));
133 if (err) {
134 ASD_DPRINTK("couldn't read ocm segment\n");
135 return err;
136 }
137
138 if (dir->sig[0] != 'M' || dir->sig[1] != 'O') {
139 ASD_DPRINTK("no valid dir signature(%c%c) at start of OCM\n",
140 dir->sig[0], dir->sig[1]);
141 return -ENOENT;
142 }
143 if (dir->major != 0) {
144 asd_printk("unsupported major version of ocm dir:0x%x\n",
145 dir->major);
146 return -ENOENT;
147 }
148 dir->num_de &= 0xf;
149 return 0;
150 }
151
152 /**
153 * asd_write_ocm_seg - write an on chip memory (OCM) segment
154 * @asd_ha: pointer to the host adapter structure
155 * @buffer: where to read the write data
156 * @offs: offset into OCM to write to
157 * @size: how many bytes to write
158 *
159 * Return the number of bytes not written. Return 0 on success.
160 */
asd_write_ocm_seg(struct asd_ha_struct * asd_ha,void * buffer,u32 offs,int size)161 static void asd_write_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer,
162 u32 offs, int size)
163 {
164 u8 *p = buffer;
165 if (unlikely(asd_ha->iospace))
166 asd_write_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size);
167 else {
168 for ( ; size > 0; size--, offs++, p++)
169 asd_write_ocm_byte(asd_ha, offs, *p);
170 }
171 return;
172 }
173
174 #define THREE_TO_NUM(X) ((X)[0] | ((X)[1] << 8) | ((X)[2] << 16))
175
asd_find_dir_entry(struct asd_ocm_dir * dir,u8 type,u32 * offs,u32 * size)176 static int asd_find_dir_entry(struct asd_ocm_dir *dir, u8 type,
177 u32 *offs, u32 *size)
178 {
179 int i;
180 struct asd_ocm_dir_ent *ent;
181
182 for (i = 0; i < dir->num_de; i++) {
183 if (dir->entry[i].type == type)
184 break;
185 }
186 if (i >= dir->num_de)
187 return -ENOENT;
188 ent = &dir->entry[i];
189 *offs = (u32) THREE_TO_NUM(ent->offs);
190 *size = (u32) THREE_TO_NUM(ent->size);
191 return 0;
192 }
193
194 #define OCM_BIOS_CHIM_DE 2
195 #define BC_BIOS_PRESENT 1
196
asd_get_bios_chim(struct asd_ha_struct * asd_ha,struct asd_ocm_dir * dir)197 static int asd_get_bios_chim(struct asd_ha_struct *asd_ha,
198 struct asd_ocm_dir *dir)
199 {
200 int err;
201 struct asd_bios_chim_struct *bc_struct;
202 u32 offs, size;
203
204 err = asd_find_dir_entry(dir, OCM_BIOS_CHIM_DE, &offs, &size);
205 if (err) {
206 ASD_DPRINTK("couldn't find BIOS_CHIM dir ent\n");
207 goto out;
208 }
209 err = -ENOMEM;
210 bc_struct = kmalloc(sizeof(*bc_struct), GFP_KERNEL);
211 if (!bc_struct) {
212 asd_printk("no memory for bios_chim struct\n");
213 goto out;
214 }
215 err = asd_read_ocm_seg(asd_ha, (void *)bc_struct, offs,
216 sizeof(*bc_struct));
217 if (err) {
218 ASD_DPRINTK("couldn't read ocm segment\n");
219 goto out2;
220 }
221 if (strncmp(bc_struct->sig, "SOIB", 4)
222 && strncmp(bc_struct->sig, "IPSA", 4)) {
223 ASD_DPRINTK("BIOS_CHIM entry has no valid sig(%c%c%c%c)\n",
224 bc_struct->sig[0], bc_struct->sig[1],
225 bc_struct->sig[2], bc_struct->sig[3]);
226 err = -ENOENT;
227 goto out2;
228 }
229 if (bc_struct->major != 1) {
230 asd_printk("BIOS_CHIM unsupported major version:0x%x\n",
231 bc_struct->major);
232 err = -ENOENT;
233 goto out2;
234 }
235 if (bc_struct->flags & BC_BIOS_PRESENT) {
236 asd_ha->hw_prof.bios.present = 1;
237 asd_ha->hw_prof.bios.maj = bc_struct->bios_major;
238 asd_ha->hw_prof.bios.min = bc_struct->bios_minor;
239 asd_ha->hw_prof.bios.bld = le32_to_cpu(bc_struct->bios_build);
240 ASD_DPRINTK("BIOS present (%d,%d), %d\n",
241 asd_ha->hw_prof.bios.maj,
242 asd_ha->hw_prof.bios.min,
243 asd_ha->hw_prof.bios.bld);
244 }
245 asd_ha->hw_prof.ue.num = le16_to_cpu(bc_struct->ue_num);
246 asd_ha->hw_prof.ue.size= le16_to_cpu(bc_struct->ue_size);
247 ASD_DPRINTK("ue num:%d, ue size:%d\n", asd_ha->hw_prof.ue.num,
248 asd_ha->hw_prof.ue.size);
249 size = asd_ha->hw_prof.ue.num * asd_ha->hw_prof.ue.size;
250 if (size > 0) {
251 err = -ENOMEM;
252 asd_ha->hw_prof.ue.area = kmalloc(size, GFP_KERNEL);
253 if (!asd_ha->hw_prof.ue.area)
254 goto out2;
255 err = asd_read_ocm_seg(asd_ha, (void *)asd_ha->hw_prof.ue.area,
256 offs + sizeof(*bc_struct), size);
257 if (err) {
258 kfree(asd_ha->hw_prof.ue.area);
259 asd_ha->hw_prof.ue.area = NULL;
260 asd_ha->hw_prof.ue.num = 0;
261 asd_ha->hw_prof.ue.size = 0;
262 ASD_DPRINTK("couldn't read ue entries(%d)\n", err);
263 }
264 }
265 out2:
266 kfree(bc_struct);
267 out:
268 return err;
269 }
270
271 static void
asd_hwi_initialize_ocm_dir(struct asd_ha_struct * asd_ha)272 asd_hwi_initialize_ocm_dir (struct asd_ha_struct *asd_ha)
273 {
274 int i;
275
276 /* Zero OCM */
277 for (i = 0; i < OCM_MAX_SIZE; i += 4)
278 asd_write_ocm_dword(asd_ha, i, 0);
279
280 /* Write Dir */
281 asd_write_ocm_seg(asd_ha, &OCMDirInit, 0,
282 sizeof(struct asd_ocm_dir));
283
284 /* Write Dir Entries */
285 for (i = 0; i < OCM_INIT_DIR_ENTRIES; i++)
286 asd_write_ocm_seg(asd_ha, &OCMDirEntriesInit[i],
287 sizeof(struct asd_ocm_dir) +
288 (i * sizeof(struct asd_ocm_dir_ent))
289 , sizeof(struct asd_ocm_dir_ent));
290
291 }
292
293 static int
asd_hwi_check_ocm_access(struct asd_ha_struct * asd_ha)294 asd_hwi_check_ocm_access (struct asd_ha_struct *asd_ha)
295 {
296 struct pci_dev *pcidev = asd_ha->pcidev;
297 u32 reg;
298 int err = 0;
299 u32 v;
300
301 /* check if OCM has been initialized by BIOS */
302 reg = asd_read_reg_dword(asd_ha, EXSICNFGR);
303
304 if (!(reg & OCMINITIALIZED)) {
305 err = pci_read_config_dword(pcidev, PCIC_INTRPT_STAT, &v);
306 if (err) {
307 asd_printk("couldn't access PCIC_INTRPT_STAT of %s\n",
308 pci_name(pcidev));
309 goto out;
310 }
311
312 printk(KERN_INFO "OCM is not initialized by BIOS,"
313 "reinitialize it and ignore it, current IntrptStatus"
314 "is 0x%x\n", v);
315
316 if (v)
317 err = pci_write_config_dword(pcidev,
318 PCIC_INTRPT_STAT, v);
319 if (err) {
320 asd_printk("couldn't write PCIC_INTRPT_STAT of %s\n",
321 pci_name(pcidev));
322 goto out;
323 }
324
325 asd_hwi_initialize_ocm_dir(asd_ha);
326
327 }
328 out:
329 return err;
330 }
331
332 /**
333 * asd_read_ocm - read on chip memory (OCM)
334 * @asd_ha: pointer to the host adapter structure
335 */
asd_read_ocm(struct asd_ha_struct * asd_ha)336 int asd_read_ocm(struct asd_ha_struct *asd_ha)
337 {
338 int err;
339 struct asd_ocm_dir *dir;
340
341 if (asd_hwi_check_ocm_access(asd_ha))
342 return -1;
343
344 dir = kmalloc(sizeof(*dir), GFP_KERNEL);
345 if (!dir) {
346 asd_printk("no memory for ocm dir\n");
347 return -ENOMEM;
348 }
349
350 err = asd_read_ocm_dir(asd_ha, dir, 0);
351 if (err)
352 goto out;
353
354 err = asd_get_bios_chim(asd_ha, dir);
355 out:
356 kfree(dir);
357 return err;
358 }
359
360 /* ---------- FLASH stuff ---------- */
361
362 #define FLASH_RESET 0xF0
363
364 #define ASD_FLASH_SIZE 0x200000
365 #define FLASH_DIR_COOKIE "*** ADAPTEC FLASH DIRECTORY *** "
366 #define FLASH_NEXT_ENTRY_OFFS 0x2000
367 #define FLASH_MAX_DIR_ENTRIES 32
368
369 #define FLASH_DE_TYPE_MASK 0x3FFFFFFF
370 #define FLASH_DE_MS 0x120
371 #define FLASH_DE_CTRL_A_USER 0xE0
372
373 struct asd_flash_de {
374 __le32 type;
375 __le32 offs;
376 __le32 pad_size;
377 __le32 image_size;
378 __le32 chksum;
379 u8 _r[12];
380 u8 version[32];
381 } __attribute__ ((packed));
382
383 struct asd_flash_dir {
384 u8 cookie[32];
385 __le32 rev; /* 2 */
386 __le32 chksum;
387 __le32 chksum_antidote;
388 __le32 bld;
389 u8 bld_id[32]; /* build id data */
390 u8 ver_data[32]; /* date and time of build */
391 __le32 ae_mask;
392 __le32 v_mask;
393 __le32 oc_mask;
394 u8 _r[20];
395 struct asd_flash_de dir_entry[FLASH_MAX_DIR_ENTRIES];
396 } __attribute__ ((packed));
397
398 struct asd_manuf_sec {
399 char sig[2]; /* 'S', 'M' */
400 u16 offs_next;
401 u8 maj; /* 0 */
402 u8 min; /* 0 */
403 u16 chksum;
404 u16 size;
405 u8 _r[6];
406 u8 sas_addr[SAS_ADDR_SIZE];
407 u8 pcba_sn[ASD_PCBA_SN_SIZE];
408 /* Here start the other segments */
409 u8 linked_list[];
410 } __attribute__ ((packed));
411
412 struct asd_manuf_phy_desc {
413 u8 state; /* low 4 bits */
414 #define MS_PHY_STATE_ENABLED 0
415 #define MS_PHY_STATE_REPORTED 1
416 #define MS_PHY_STATE_HIDDEN 2
417 u8 phy_id;
418 u16 _r;
419 u8 phy_control_0; /* mode 5 reg 0x160 */
420 u8 phy_control_1; /* mode 5 reg 0x161 */
421 u8 phy_control_2; /* mode 5 reg 0x162 */
422 u8 phy_control_3; /* mode 5 reg 0x163 */
423 } __attribute__ ((packed));
424
425 struct asd_manuf_phy_param {
426 char sig[2]; /* 'P', 'M' */
427 u16 next;
428 u8 maj; /* 0 */
429 u8 min; /* 2 */
430 u8 num_phy_desc; /* 8 */
431 u8 phy_desc_size; /* 8 */
432 u8 _r[3];
433 u8 usage_model_id;
434 u32 _r2;
435 struct asd_manuf_phy_desc phy_desc[ASD_MAX_PHYS];
436 } __attribute__ ((packed));
437
438 #if 0
439 static const char *asd_sb_type[] = {
440 "unknown",
441 "SGPIO",
442 [2 ... 0x7F] = "unknown",
443 [0x80] = "ADPT_I2C",
444 [0x81 ... 0xFF] = "VENDOR_UNIQUExx"
445 };
446 #endif
447
448 struct asd_ms_sb_desc {
449 u8 type;
450 u8 node_desc_index;
451 u8 conn_desc_index;
452 u8 _recvd[];
453 } __attribute__ ((packed));
454
455 #if 0
456 static const char *asd_conn_type[] = {
457 [0 ... 7] = "unknown",
458 "SFF8470",
459 "SFF8482",
460 "SFF8484",
461 [0x80] = "PCIX_DAUGHTER0",
462 [0x81] = "SAS_DAUGHTER0",
463 [0x82 ... 0xFF] = "VENDOR_UNIQUExx"
464 };
465
466 static const char *asd_conn_location[] = {
467 "unknown",
468 "internal",
469 "external",
470 "board_to_board",
471 };
472 #endif
473
474 struct asd_ms_conn_desc {
475 u8 type;
476 u8 location;
477 u8 num_sideband_desc;
478 u8 size_sideband_desc;
479 u32 _resvd;
480 u8 name[16];
481 struct asd_ms_sb_desc sb_desc[];
482 } __attribute__ ((packed));
483
484 struct asd_nd_phy_desc {
485 u8 vp_attch_type;
486 u8 attch_specific[];
487 } __attribute__ ((packed));
488
489 #if 0
490 static const char *asd_node_type[] = {
491 "IOP",
492 "IO_CONTROLLER",
493 "EXPANDER",
494 "PORT_MULTIPLIER",
495 "PORT_MULTIPLEXER",
496 "MULTI_DROP_I2C_BUS",
497 };
498 #endif
499
500 struct asd_ms_node_desc {
501 u8 type;
502 u8 num_phy_desc;
503 u8 size_phy_desc;
504 u8 _resvd;
505 u8 name[16];
506 struct asd_nd_phy_desc phy_desc[];
507 } __attribute__ ((packed));
508
509 struct asd_ms_conn_map {
510 char sig[2]; /* 'M', 'C' */
511 __le16 next;
512 u8 maj; /* 0 */
513 u8 min; /* 0 */
514 __le16 cm_size; /* size of this struct */
515 u8 num_conn;
516 u8 conn_size;
517 u8 num_nodes;
518 u8 usage_model_id;
519 u32 _resvd;
520 struct asd_ms_conn_desc conn_desc[0];
521 struct asd_ms_node_desc node_desc[];
522 } __attribute__ ((packed));
523
524 struct asd_ctrla_phy_entry {
525 u8 sas_addr[SAS_ADDR_SIZE];
526 u8 sas_link_rates; /* max in hi bits, min in low bits */
527 u8 flags;
528 u8 sata_link_rates;
529 u8 _r[5];
530 } __attribute__ ((packed));
531
532 struct asd_ctrla_phy_settings {
533 u8 id0; /* P'h'y */
534 u8 _r;
535 u16 next;
536 u8 num_phys; /* number of PHYs in the PCI function */
537 u8 _r2[3];
538 struct asd_ctrla_phy_entry phy_ent[ASD_MAX_PHYS];
539 } __attribute__ ((packed));
540
541 struct asd_ll_el {
542 u8 id0;
543 u8 id1;
544 __le16 next;
545 u8 something_here[];
546 } __attribute__ ((packed));
547
asd_poll_flash(struct asd_ha_struct * asd_ha)548 static int asd_poll_flash(struct asd_ha_struct *asd_ha)
549 {
550 int c;
551 u8 d;
552
553 for (c = 5000; c > 0; c--) {
554 d = asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar);
555 d ^= asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar);
556 if (!d)
557 return 0;
558 udelay(5);
559 }
560 return -ENOENT;
561 }
562
asd_reset_flash(struct asd_ha_struct * asd_ha)563 static int asd_reset_flash(struct asd_ha_struct *asd_ha)
564 {
565 int err;
566
567 err = asd_poll_flash(asd_ha);
568 if (err)
569 return err;
570 asd_write_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar, FLASH_RESET);
571 err = asd_poll_flash(asd_ha);
572
573 return err;
574 }
575
asd_read_flash_seg(struct asd_ha_struct * asd_ha,void * buffer,u32 offs,int size)576 static int asd_read_flash_seg(struct asd_ha_struct *asd_ha,
577 void *buffer, u32 offs, int size)
578 {
579 asd_read_reg_string(asd_ha, buffer, asd_ha->hw_prof.flash.bar+offs,
580 size);
581 return 0;
582 }
583
584 /**
585 * asd_find_flash_dir - finds and reads the flash directory
586 * @asd_ha: pointer to the host adapter structure
587 * @flash_dir: pointer to flash directory structure
588 *
589 * If found, the flash directory segment will be copied to
590 * @flash_dir. Return 1 if found, 0 if not.
591 */
asd_find_flash_dir(struct asd_ha_struct * asd_ha,struct asd_flash_dir * flash_dir)592 static int asd_find_flash_dir(struct asd_ha_struct *asd_ha,
593 struct asd_flash_dir *flash_dir)
594 {
595 u32 v;
596 for (v = 0; v < ASD_FLASH_SIZE; v += FLASH_NEXT_ENTRY_OFFS) {
597 asd_read_flash_seg(asd_ha, flash_dir, v,
598 sizeof(FLASH_DIR_COOKIE)-1);
599 if (memcmp(flash_dir->cookie, FLASH_DIR_COOKIE,
600 sizeof(FLASH_DIR_COOKIE)-1) == 0) {
601 asd_ha->hw_prof.flash.dir_offs = v;
602 asd_read_flash_seg(asd_ha, flash_dir, v,
603 sizeof(*flash_dir));
604 return 1;
605 }
606 }
607 return 0;
608 }
609
asd_flash_getid(struct asd_ha_struct * asd_ha)610 static int asd_flash_getid(struct asd_ha_struct *asd_ha)
611 {
612 int err = 0;
613 u32 reg;
614
615 reg = asd_read_reg_dword(asd_ha, EXSICNFGR);
616
617 if (pci_read_config_dword(asd_ha->pcidev, PCI_CONF_FLSH_BAR,
618 &asd_ha->hw_prof.flash.bar)) {
619 asd_printk("couldn't read PCI_CONF_FLSH_BAR of %s\n",
620 pci_name(asd_ha->pcidev));
621 return -ENOENT;
622 }
623 asd_ha->hw_prof.flash.present = 1;
624 asd_ha->hw_prof.flash.wide = reg & FLASHW ? 1 : 0;
625 err = asd_reset_flash(asd_ha);
626 if (err) {
627 ASD_DPRINTK("couldn't reset flash(%d)\n", err);
628 return err;
629 }
630 return 0;
631 }
632
asd_calc_flash_chksum(u16 * p,int size)633 static u16 asd_calc_flash_chksum(u16 *p, int size)
634 {
635 u16 chksum = 0;
636
637 while (size-- > 0)
638 chksum += *p++;
639
640 return chksum;
641 }
642
643
asd_find_flash_de(struct asd_flash_dir * flash_dir,u32 entry_type,u32 * offs,u32 * size)644 static int asd_find_flash_de(struct asd_flash_dir *flash_dir, u32 entry_type,
645 u32 *offs, u32 *size)
646 {
647 int i;
648 struct asd_flash_de *de;
649
650 for (i = 0; i < FLASH_MAX_DIR_ENTRIES; i++) {
651 u32 type = le32_to_cpu(flash_dir->dir_entry[i].type);
652
653 type &= FLASH_DE_TYPE_MASK;
654 if (type == entry_type)
655 break;
656 }
657 if (i >= FLASH_MAX_DIR_ENTRIES)
658 return -ENOENT;
659 de = &flash_dir->dir_entry[i];
660 *offs = le32_to_cpu(de->offs);
661 *size = le32_to_cpu(de->pad_size);
662 return 0;
663 }
664
asd_validate_ms(struct asd_manuf_sec * ms)665 static int asd_validate_ms(struct asd_manuf_sec *ms)
666 {
667 if (ms->sig[0] != 'S' || ms->sig[1] != 'M') {
668 ASD_DPRINTK("manuf sec: no valid sig(%c%c)\n",
669 ms->sig[0], ms->sig[1]);
670 return -ENOENT;
671 }
672 if (ms->maj != 0) {
673 asd_printk("unsupported manuf. sector. major version:%x\n",
674 ms->maj);
675 return -ENOENT;
676 }
677 ms->offs_next = le16_to_cpu((__force __le16) ms->offs_next);
678 ms->chksum = le16_to_cpu((__force __le16) ms->chksum);
679 ms->size = le16_to_cpu((__force __le16) ms->size);
680
681 if (asd_calc_flash_chksum((u16 *)ms, ms->size/2)) {
682 asd_printk("failed manuf sector checksum\n");
683 }
684
685 return 0;
686 }
687
asd_ms_get_sas_addr(struct asd_ha_struct * asd_ha,struct asd_manuf_sec * ms)688 static int asd_ms_get_sas_addr(struct asd_ha_struct *asd_ha,
689 struct asd_manuf_sec *ms)
690 {
691 memcpy(asd_ha->hw_prof.sas_addr, ms->sas_addr, SAS_ADDR_SIZE);
692 return 0;
693 }
694
asd_ms_get_pcba_sn(struct asd_ha_struct * asd_ha,struct asd_manuf_sec * ms)695 static int asd_ms_get_pcba_sn(struct asd_ha_struct *asd_ha,
696 struct asd_manuf_sec *ms)
697 {
698 memcpy(asd_ha->hw_prof.pcba_sn, ms->pcba_sn, ASD_PCBA_SN_SIZE);
699 asd_ha->hw_prof.pcba_sn[ASD_PCBA_SN_SIZE] = '\0';
700 return 0;
701 }
702
703 /**
704 * asd_find_ll_by_id - find a linked list entry by its id
705 * @start: void pointer to the first element in the linked list
706 * @id0: the first byte of the id (offs 0)
707 * @id1: the second byte of the id (offs 1)
708 *
709 * @start has to be the _base_ element start, since the
710 * linked list entries's offset is from this pointer.
711 * Some linked list entries use only the first id, in which case
712 * you can pass 0xFF for the second.
713 */
asd_find_ll_by_id(void * const start,const u8 id0,const u8 id1)714 static void *asd_find_ll_by_id(void * const start, const u8 id0, const u8 id1)
715 {
716 struct asd_ll_el *el = start;
717
718 do {
719 switch (id1) {
720 default:
721 if (el->id1 == id1) {
722 fallthrough;
723 case 0xFF:
724 if (el->id0 == id0)
725 return el;
726 }
727 }
728 el = start + le16_to_cpu(el->next);
729 } while (el != start);
730
731 return NULL;
732 }
733
734 /**
735 * asd_ms_get_phy_params - get phy parameters from the manufacturing sector
736 * @asd_ha: pointer to the host adapter structure
737 * @manuf_sec: pointer to the manufacturing sector
738 *
739 * The manufacturing sector contans also the linked list of sub-segments,
740 * since when it was read, its size was taken from the flash directory,
741 * not from the structure size.
742 *
743 * HIDDEN phys do not count in the total count. REPORTED phys cannot
744 * be enabled but are reported and counted towards the total.
745 * ENABLED phys are enabled by default and count towards the total.
746 * The absolute total phy number is ASD_MAX_PHYS. hw_prof->num_phys
747 * merely specifies the number of phys the host adapter decided to
748 * report. E.g., it is possible for phys 0, 1 and 2 to be HIDDEN,
749 * phys 3, 4 and 5 to be REPORTED and phys 6 and 7 to be ENABLED.
750 * In this case ASD_MAX_PHYS is 8, hw_prof->num_phys is 5, and only 2
751 * are actually enabled (enabled by default, max number of phys
752 * enableable in this case).
753 */
asd_ms_get_phy_params(struct asd_ha_struct * asd_ha,struct asd_manuf_sec * manuf_sec)754 static int asd_ms_get_phy_params(struct asd_ha_struct *asd_ha,
755 struct asd_manuf_sec *manuf_sec)
756 {
757 int i;
758 int en_phys = 0;
759 int rep_phys = 0;
760 struct asd_manuf_phy_param *phy_param;
761 struct asd_manuf_phy_param dflt_phy_param;
762
763 phy_param = asd_find_ll_by_id(manuf_sec, 'P', 'M');
764 if (!phy_param) {
765 ASD_DPRINTK("ms: no phy parameters found\n");
766 ASD_DPRINTK("ms: Creating default phy parameters\n");
767 dflt_phy_param.sig[0] = 'P';
768 dflt_phy_param.sig[1] = 'M';
769 dflt_phy_param.maj = 0;
770 dflt_phy_param.min = 2;
771 dflt_phy_param.num_phy_desc = 8;
772 dflt_phy_param.phy_desc_size = sizeof(struct asd_manuf_phy_desc);
773 for (i =0; i < ASD_MAX_PHYS; i++) {
774 dflt_phy_param.phy_desc[i].state = 0;
775 dflt_phy_param.phy_desc[i].phy_id = i;
776 dflt_phy_param.phy_desc[i].phy_control_0 = 0xf6;
777 dflt_phy_param.phy_desc[i].phy_control_1 = 0x10;
778 dflt_phy_param.phy_desc[i].phy_control_2 = 0x43;
779 dflt_phy_param.phy_desc[i].phy_control_3 = 0xeb;
780 }
781
782 phy_param = &dflt_phy_param;
783
784 }
785
786 if (phy_param->maj != 0) {
787 asd_printk("unsupported manuf. phy param major version:0x%x\n",
788 phy_param->maj);
789 return -ENOENT;
790 }
791
792 ASD_DPRINTK("ms: num_phy_desc: %d\n", phy_param->num_phy_desc);
793 asd_ha->hw_prof.enabled_phys = 0;
794 for (i = 0; i < phy_param->num_phy_desc; i++) {
795 struct asd_manuf_phy_desc *pd = &phy_param->phy_desc[i];
796 switch (pd->state & 0xF) {
797 case MS_PHY_STATE_HIDDEN:
798 ASD_DPRINTK("ms: phy%d: HIDDEN\n", i);
799 continue;
800 case MS_PHY_STATE_REPORTED:
801 ASD_DPRINTK("ms: phy%d: REPORTED\n", i);
802 asd_ha->hw_prof.enabled_phys &= ~(1 << i);
803 rep_phys++;
804 continue;
805 case MS_PHY_STATE_ENABLED:
806 ASD_DPRINTK("ms: phy%d: ENABLED\n", i);
807 asd_ha->hw_prof.enabled_phys |= (1 << i);
808 en_phys++;
809 break;
810 }
811 asd_ha->hw_prof.phy_desc[i].phy_control_0 = pd->phy_control_0;
812 asd_ha->hw_prof.phy_desc[i].phy_control_1 = pd->phy_control_1;
813 asd_ha->hw_prof.phy_desc[i].phy_control_2 = pd->phy_control_2;
814 asd_ha->hw_prof.phy_desc[i].phy_control_3 = pd->phy_control_3;
815 }
816 asd_ha->hw_prof.max_phys = rep_phys + en_phys;
817 asd_ha->hw_prof.num_phys = en_phys;
818 ASD_DPRINTK("ms: max_phys:0x%x, num_phys:0x%x\n",
819 asd_ha->hw_prof.max_phys, asd_ha->hw_prof.num_phys);
820 ASD_DPRINTK("ms: enabled_phys:0x%x\n", asd_ha->hw_prof.enabled_phys);
821 return 0;
822 }
823
asd_ms_get_connector_map(struct asd_ha_struct * asd_ha,struct asd_manuf_sec * manuf_sec)824 static int asd_ms_get_connector_map(struct asd_ha_struct *asd_ha,
825 struct asd_manuf_sec *manuf_sec)
826 {
827 struct asd_ms_conn_map *cm;
828
829 cm = asd_find_ll_by_id(manuf_sec, 'M', 'C');
830 if (!cm) {
831 ASD_DPRINTK("ms: no connector map found\n");
832 return 0;
833 }
834
835 if (cm->maj != 0) {
836 ASD_DPRINTK("ms: unsupported: connector map major version 0x%x"
837 "\n", cm->maj);
838 return -ENOENT;
839 }
840
841 /* XXX */
842
843 return 0;
844 }
845
846
847 /**
848 * asd_process_ms - find and extract information from the manufacturing sector
849 * @asd_ha: pointer to the host adapter structure
850 * @flash_dir: pointer to the flash directory
851 */
asd_process_ms(struct asd_ha_struct * asd_ha,struct asd_flash_dir * flash_dir)852 static int asd_process_ms(struct asd_ha_struct *asd_ha,
853 struct asd_flash_dir *flash_dir)
854 {
855 int err;
856 struct asd_manuf_sec *manuf_sec;
857 u32 offs, size;
858
859 err = asd_find_flash_de(flash_dir, FLASH_DE_MS, &offs, &size);
860 if (err) {
861 ASD_DPRINTK("Couldn't find the manuf. sector\n");
862 goto out;
863 }
864
865 if (size == 0)
866 goto out;
867
868 err = -ENOMEM;
869 manuf_sec = kmalloc(size, GFP_KERNEL);
870 if (!manuf_sec) {
871 ASD_DPRINTK("no mem for manuf sector\n");
872 goto out;
873 }
874
875 err = asd_read_flash_seg(asd_ha, (void *)manuf_sec, offs, size);
876 if (err) {
877 ASD_DPRINTK("couldn't read manuf sector at 0x%x, size 0x%x\n",
878 offs, size);
879 goto out2;
880 }
881
882 err = asd_validate_ms(manuf_sec);
883 if (err) {
884 ASD_DPRINTK("couldn't validate manuf sector\n");
885 goto out2;
886 }
887
888 err = asd_ms_get_sas_addr(asd_ha, manuf_sec);
889 if (err) {
890 ASD_DPRINTK("couldn't read the SAS_ADDR\n");
891 goto out2;
892 }
893 ASD_DPRINTK("manuf sect SAS_ADDR %llx\n",
894 SAS_ADDR(asd_ha->hw_prof.sas_addr));
895
896 err = asd_ms_get_pcba_sn(asd_ha, manuf_sec);
897 if (err) {
898 ASD_DPRINTK("couldn't read the PCBA SN\n");
899 goto out2;
900 }
901 ASD_DPRINTK("manuf sect PCBA SN %s\n", asd_ha->hw_prof.pcba_sn);
902
903 err = asd_ms_get_phy_params(asd_ha, manuf_sec);
904 if (err) {
905 ASD_DPRINTK("ms: couldn't get phy parameters\n");
906 goto out2;
907 }
908
909 err = asd_ms_get_connector_map(asd_ha, manuf_sec);
910 if (err) {
911 ASD_DPRINTK("ms: couldn't get connector map\n");
912 goto out2;
913 }
914
915 out2:
916 kfree(manuf_sec);
917 out:
918 return err;
919 }
920
asd_process_ctrla_phy_settings(struct asd_ha_struct * asd_ha,struct asd_ctrla_phy_settings * ps)921 static int asd_process_ctrla_phy_settings(struct asd_ha_struct *asd_ha,
922 struct asd_ctrla_phy_settings *ps)
923 {
924 int i;
925 for (i = 0; i < ps->num_phys; i++) {
926 struct asd_ctrla_phy_entry *pe = &ps->phy_ent[i];
927
928 if (!PHY_ENABLED(asd_ha, i))
929 continue;
930 if (*(u64 *)pe->sas_addr == 0) {
931 asd_ha->hw_prof.enabled_phys &= ~(1 << i);
932 continue;
933 }
934 /* This is the SAS address which should be sent in IDENTIFY. */
935 memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr, pe->sas_addr,
936 SAS_ADDR_SIZE);
937 asd_ha->hw_prof.phy_desc[i].max_sas_lrate =
938 (pe->sas_link_rates & 0xF0) >> 4;
939 asd_ha->hw_prof.phy_desc[i].min_sas_lrate =
940 (pe->sas_link_rates & 0x0F);
941 asd_ha->hw_prof.phy_desc[i].max_sata_lrate =
942 (pe->sata_link_rates & 0xF0) >> 4;
943 asd_ha->hw_prof.phy_desc[i].min_sata_lrate =
944 (pe->sata_link_rates & 0x0F);
945 asd_ha->hw_prof.phy_desc[i].flags = pe->flags;
946 ASD_DPRINTK("ctrla: phy%d: sas_addr: %llx, sas rate:0x%x-0x%x,"
947 " sata rate:0x%x-0x%x, flags:0x%x\n",
948 i,
949 SAS_ADDR(asd_ha->hw_prof.phy_desc[i].sas_addr),
950 asd_ha->hw_prof.phy_desc[i].max_sas_lrate,
951 asd_ha->hw_prof.phy_desc[i].min_sas_lrate,
952 asd_ha->hw_prof.phy_desc[i].max_sata_lrate,
953 asd_ha->hw_prof.phy_desc[i].min_sata_lrate,
954 asd_ha->hw_prof.phy_desc[i].flags);
955 }
956
957 return 0;
958 }
959
960 /**
961 * asd_process_ctrl_a_user - process CTRL-A user settings
962 * @asd_ha: pointer to the host adapter structure
963 * @flash_dir: pointer to the flash directory
964 */
asd_process_ctrl_a_user(struct asd_ha_struct * asd_ha,struct asd_flash_dir * flash_dir)965 static int asd_process_ctrl_a_user(struct asd_ha_struct *asd_ha,
966 struct asd_flash_dir *flash_dir)
967 {
968 int err, i;
969 u32 offs, size;
970 struct asd_ll_el *el = NULL;
971 struct asd_ctrla_phy_settings *ps;
972 struct asd_ctrla_phy_settings dflt_ps;
973
974 err = asd_find_flash_de(flash_dir, FLASH_DE_CTRL_A_USER, &offs, &size);
975 if (err) {
976 ASD_DPRINTK("couldn't find CTRL-A user settings section\n");
977 ASD_DPRINTK("Creating default CTRL-A user settings section\n");
978
979 dflt_ps.id0 = 'h';
980 dflt_ps.num_phys = 8;
981 for (i =0; i < ASD_MAX_PHYS; i++) {
982 memcpy(dflt_ps.phy_ent[i].sas_addr,
983 asd_ha->hw_prof.sas_addr, SAS_ADDR_SIZE);
984 dflt_ps.phy_ent[i].sas_link_rates = 0x98;
985 dflt_ps.phy_ent[i].flags = 0x0;
986 dflt_ps.phy_ent[i].sata_link_rates = 0x0;
987 }
988
989 size = sizeof(struct asd_ctrla_phy_settings);
990 ps = &dflt_ps;
991 goto out_process;
992 }
993
994 if (size == 0)
995 goto out;
996
997 err = -ENOMEM;
998 el = kmalloc(size, GFP_KERNEL);
999 if (!el) {
1000 ASD_DPRINTK("no mem for ctrla user settings section\n");
1001 goto out;
1002 }
1003
1004 err = asd_read_flash_seg(asd_ha, (void *)el, offs, size);
1005 if (err) {
1006 ASD_DPRINTK("couldn't read ctrla phy settings section\n");
1007 goto out2;
1008 }
1009
1010 err = -ENOENT;
1011 ps = asd_find_ll_by_id(el, 'h', 0xFF);
1012 if (!ps) {
1013 ASD_DPRINTK("couldn't find ctrla phy settings struct\n");
1014 goto out2;
1015 }
1016 out_process:
1017 err = asd_process_ctrla_phy_settings(asd_ha, ps);
1018 if (err) {
1019 ASD_DPRINTK("couldn't process ctrla phy settings\n");
1020 goto out2;
1021 }
1022 out2:
1023 kfree(el);
1024 out:
1025 return err;
1026 }
1027
1028 /**
1029 * asd_read_flash - read flash memory
1030 * @asd_ha: pointer to the host adapter structure
1031 */
asd_read_flash(struct asd_ha_struct * asd_ha)1032 int asd_read_flash(struct asd_ha_struct *asd_ha)
1033 {
1034 int err;
1035 struct asd_flash_dir *flash_dir;
1036
1037 err = asd_flash_getid(asd_ha);
1038 if (err)
1039 return err;
1040
1041 flash_dir = kmalloc(sizeof(*flash_dir), GFP_KERNEL);
1042 if (!flash_dir)
1043 return -ENOMEM;
1044
1045 err = -ENOENT;
1046 if (!asd_find_flash_dir(asd_ha, flash_dir)) {
1047 ASD_DPRINTK("couldn't find flash directory\n");
1048 goto out;
1049 }
1050
1051 if (le32_to_cpu(flash_dir->rev) != 2) {
1052 asd_printk("unsupported flash dir version:0x%x\n",
1053 le32_to_cpu(flash_dir->rev));
1054 goto out;
1055 }
1056
1057 err = asd_process_ms(asd_ha, flash_dir);
1058 if (err) {
1059 ASD_DPRINTK("couldn't process manuf sector settings\n");
1060 goto out;
1061 }
1062
1063 err = asd_process_ctrl_a_user(asd_ha, flash_dir);
1064 if (err) {
1065 ASD_DPRINTK("couldn't process CTRL-A user settings\n");
1066 goto out;
1067 }
1068
1069 out:
1070 kfree(flash_dir);
1071 return err;
1072 }
1073
1074 /**
1075 * asd_verify_flash_seg - verify data with flash memory
1076 * @asd_ha: pointer to the host adapter structure
1077 * @src: pointer to the source data to be verified
1078 * @dest_offset: offset from flash memory
1079 * @bytes_to_verify: total bytes to verify
1080 */
asd_verify_flash_seg(struct asd_ha_struct * asd_ha,const void * src,u32 dest_offset,u32 bytes_to_verify)1081 int asd_verify_flash_seg(struct asd_ha_struct *asd_ha,
1082 const void *src, u32 dest_offset, u32 bytes_to_verify)
1083 {
1084 const u8 *src_buf;
1085 u8 flash_char;
1086 int err;
1087 u32 nv_offset, reg, i;
1088
1089 reg = asd_ha->hw_prof.flash.bar;
1090 src_buf = NULL;
1091
1092 err = FLASH_OK;
1093 nv_offset = dest_offset;
1094 src_buf = (const u8 *)src;
1095 for (i = 0; i < bytes_to_verify; i++) {
1096 flash_char = asd_read_reg_byte(asd_ha, reg + nv_offset + i);
1097 if (flash_char != src_buf[i]) {
1098 err = FAIL_VERIFY;
1099 break;
1100 }
1101 }
1102 return err;
1103 }
1104
1105 /**
1106 * asd_write_flash_seg - write data into flash memory
1107 * @asd_ha: pointer to the host adapter structure
1108 * @src: pointer to the source data to be written
1109 * @dest_offset: offset from flash memory
1110 * @bytes_to_write: total bytes to write
1111 */
asd_write_flash_seg(struct asd_ha_struct * asd_ha,const void * src,u32 dest_offset,u32 bytes_to_write)1112 int asd_write_flash_seg(struct asd_ha_struct *asd_ha,
1113 const void *src, u32 dest_offset, u32 bytes_to_write)
1114 {
1115 const u8 *src_buf;
1116 u32 nv_offset, reg, i;
1117 int err;
1118
1119 reg = asd_ha->hw_prof.flash.bar;
1120 src_buf = NULL;
1121
1122 err = asd_check_flash_type(asd_ha);
1123 if (err) {
1124 ASD_DPRINTK("couldn't find the type of flash. err=%d\n", err);
1125 return err;
1126 }
1127
1128 nv_offset = dest_offset;
1129 err = asd_erase_nv_sector(asd_ha, nv_offset, bytes_to_write);
1130 if (err) {
1131 ASD_DPRINTK("Erase failed at offset:0x%x\n",
1132 nv_offset);
1133 return err;
1134 }
1135
1136 err = asd_reset_flash(asd_ha);
1137 if (err) {
1138 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1139 return err;
1140 }
1141
1142 src_buf = (const u8 *)src;
1143 for (i = 0; i < bytes_to_write; i++) {
1144 /* Setup program command sequence */
1145 switch (asd_ha->hw_prof.flash.method) {
1146 case FLASH_METHOD_A:
1147 {
1148 asd_write_reg_byte(asd_ha,
1149 (reg + 0xAAA), 0xAA);
1150 asd_write_reg_byte(asd_ha,
1151 (reg + 0x555), 0x55);
1152 asd_write_reg_byte(asd_ha,
1153 (reg + 0xAAA), 0xA0);
1154 asd_write_reg_byte(asd_ha,
1155 (reg + nv_offset + i),
1156 (*(src_buf + i)));
1157 break;
1158 }
1159 case FLASH_METHOD_B:
1160 {
1161 asd_write_reg_byte(asd_ha,
1162 (reg + 0x555), 0xAA);
1163 asd_write_reg_byte(asd_ha,
1164 (reg + 0x2AA), 0x55);
1165 asd_write_reg_byte(asd_ha,
1166 (reg + 0x555), 0xA0);
1167 asd_write_reg_byte(asd_ha,
1168 (reg + nv_offset + i),
1169 (*(src_buf + i)));
1170 break;
1171 }
1172 default:
1173 break;
1174 }
1175 if (asd_chk_write_status(asd_ha,
1176 (nv_offset + i), 0) != 0) {
1177 ASD_DPRINTK("aicx: Write failed at offset:0x%x\n",
1178 reg + nv_offset + i);
1179 return FAIL_WRITE_FLASH;
1180 }
1181 }
1182
1183 err = asd_reset_flash(asd_ha);
1184 if (err) {
1185 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1186 return err;
1187 }
1188 return 0;
1189 }
1190
asd_chk_write_status(struct asd_ha_struct * asd_ha,u32 sector_addr,u8 erase_flag)1191 int asd_chk_write_status(struct asd_ha_struct *asd_ha,
1192 u32 sector_addr, u8 erase_flag)
1193 {
1194 u32 reg;
1195 u32 loop_cnt;
1196 u8 nv_data1, nv_data2;
1197 u8 toggle_bit1;
1198
1199 /*
1200 * Read from DQ2 requires sector address
1201 * while it's dont care for DQ6
1202 */
1203 reg = asd_ha->hw_prof.flash.bar;
1204
1205 for (loop_cnt = 0; loop_cnt < 50000; loop_cnt++) {
1206 nv_data1 = asd_read_reg_byte(asd_ha, reg);
1207 nv_data2 = asd_read_reg_byte(asd_ha, reg);
1208
1209 toggle_bit1 = ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6)
1210 ^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6));
1211
1212 if (toggle_bit1 == 0) {
1213 return 0;
1214 } else {
1215 if (nv_data2 & FLASH_STATUS_BIT_MASK_DQ5) {
1216 nv_data1 = asd_read_reg_byte(asd_ha,
1217 reg);
1218 nv_data2 = asd_read_reg_byte(asd_ha,
1219 reg);
1220 toggle_bit1 =
1221 ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6)
1222 ^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6));
1223
1224 if (toggle_bit1 == 0)
1225 return 0;
1226 }
1227 }
1228
1229 /*
1230 * ERASE is a sector-by-sector operation and requires
1231 * more time to finish while WRITE is byte-byte-byte
1232 * operation and takes lesser time to finish.
1233 *
1234 * For some strange reason a reduced ERASE delay gives different
1235 * behaviour across different spirit boards. Hence we set
1236 * a optimum balance of 50mus for ERASE which works well
1237 * across all boards.
1238 */
1239 if (erase_flag) {
1240 udelay(FLASH_STATUS_ERASE_DELAY_COUNT);
1241 } else {
1242 udelay(FLASH_STATUS_WRITE_DELAY_COUNT);
1243 }
1244 }
1245 return -1;
1246 }
1247
1248 /**
1249 * asd_erase_nv_sector - Erase the flash memory sectors.
1250 * @asd_ha: pointer to the host adapter structure
1251 * @flash_addr: pointer to offset from flash memory
1252 * @size: total bytes to erase.
1253 */
asd_erase_nv_sector(struct asd_ha_struct * asd_ha,u32 flash_addr,u32 size)1254 int asd_erase_nv_sector(struct asd_ha_struct *asd_ha, u32 flash_addr, u32 size)
1255 {
1256 u32 reg;
1257 u32 sector_addr;
1258
1259 reg = asd_ha->hw_prof.flash.bar;
1260
1261 /* sector staring address */
1262 sector_addr = flash_addr & FLASH_SECTOR_SIZE_MASK;
1263
1264 /*
1265 * Erasing an flash sector needs to be done in six consecutive
1266 * write cyles.
1267 */
1268 while (sector_addr < flash_addr+size) {
1269 switch (asd_ha->hw_prof.flash.method) {
1270 case FLASH_METHOD_A:
1271 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA);
1272 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55);
1273 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0x80);
1274 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA);
1275 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55);
1276 asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30);
1277 break;
1278 case FLASH_METHOD_B:
1279 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1280 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1281 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x80);
1282 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1283 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1284 asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30);
1285 break;
1286 default:
1287 break;
1288 }
1289
1290 if (asd_chk_write_status(asd_ha, sector_addr, 1) != 0)
1291 return FAIL_ERASE_FLASH;
1292
1293 sector_addr += FLASH_SECTOR_SIZE;
1294 }
1295
1296 return 0;
1297 }
1298
asd_check_flash_type(struct asd_ha_struct * asd_ha)1299 int asd_check_flash_type(struct asd_ha_struct *asd_ha)
1300 {
1301 u8 manuf_id;
1302 u8 dev_id;
1303 u8 sec_prot;
1304 u32 inc;
1305 u32 reg;
1306 int err;
1307
1308 /* get Flash memory base address */
1309 reg = asd_ha->hw_prof.flash.bar;
1310
1311 /* Determine flash info */
1312 err = asd_reset_flash(asd_ha);
1313 if (err) {
1314 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1315 return err;
1316 }
1317
1318 asd_ha->hw_prof.flash.method = FLASH_METHOD_UNKNOWN;
1319 asd_ha->hw_prof.flash.manuf = FLASH_MANUF_ID_UNKNOWN;
1320 asd_ha->hw_prof.flash.dev_id = FLASH_DEV_ID_UNKNOWN;
1321
1322 /* Get flash info. This would most likely be AMD Am29LV family flash.
1323 * First try the sequence for word mode. It is the same as for
1324 * 008B (byte mode only), 160B (word mode) and 800D (word mode).
1325 */
1326 inc = asd_ha->hw_prof.flash.wide ? 2 : 1;
1327 asd_write_reg_byte(asd_ha, reg + 0xAAA, 0xAA);
1328 asd_write_reg_byte(asd_ha, reg + 0x555, 0x55);
1329 asd_write_reg_byte(asd_ha, reg + 0xAAA, 0x90);
1330 manuf_id = asd_read_reg_byte(asd_ha, reg);
1331 dev_id = asd_read_reg_byte(asd_ha, reg + inc);
1332 sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc);
1333 /* Get out of autoselect mode. */
1334 err = asd_reset_flash(asd_ha);
1335 if (err) {
1336 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1337 return err;
1338 }
1339 ASD_DPRINTK("Flash MethodA manuf_id(0x%x) dev_id(0x%x) "
1340 "sec_prot(0x%x)\n", manuf_id, dev_id, sec_prot);
1341 err = asd_reset_flash(asd_ha);
1342 if (err != 0)
1343 return err;
1344
1345 switch (manuf_id) {
1346 case FLASH_MANUF_ID_AMD:
1347 switch (sec_prot) {
1348 case FLASH_DEV_ID_AM29LV800DT:
1349 case FLASH_DEV_ID_AM29LV640MT:
1350 case FLASH_DEV_ID_AM29F800B:
1351 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1352 break;
1353 default:
1354 break;
1355 }
1356 break;
1357 case FLASH_MANUF_ID_ST:
1358 switch (sec_prot) {
1359 case FLASH_DEV_ID_STM29W800DT:
1360 case FLASH_DEV_ID_STM29LV640:
1361 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1362 break;
1363 default:
1364 break;
1365 }
1366 break;
1367 case FLASH_MANUF_ID_FUJITSU:
1368 switch (sec_prot) {
1369 case FLASH_DEV_ID_MBM29LV800TE:
1370 case FLASH_DEV_ID_MBM29DL800TA:
1371 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1372 break;
1373 }
1374 break;
1375 case FLASH_MANUF_ID_MACRONIX:
1376 switch (sec_prot) {
1377 case FLASH_DEV_ID_MX29LV800BT:
1378 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1379 break;
1380 }
1381 break;
1382 }
1383
1384 if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN) {
1385 err = asd_reset_flash(asd_ha);
1386 if (err) {
1387 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1388 return err;
1389 }
1390
1391 /* Issue Unlock sequence for AM29LV008BT */
1392 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1393 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1394 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x90);
1395 manuf_id = asd_read_reg_byte(asd_ha, reg);
1396 dev_id = asd_read_reg_byte(asd_ha, reg + inc);
1397 sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc);
1398
1399 ASD_DPRINTK("Flash MethodB manuf_id(0x%x) dev_id(0x%x) sec_prot"
1400 "(0x%x)\n", manuf_id, dev_id, sec_prot);
1401
1402 err = asd_reset_flash(asd_ha);
1403 if (err != 0) {
1404 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1405 return err;
1406 }
1407
1408 switch (manuf_id) {
1409 case FLASH_MANUF_ID_AMD:
1410 switch (dev_id) {
1411 case FLASH_DEV_ID_AM29LV008BT:
1412 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1413 break;
1414 default:
1415 break;
1416 }
1417 break;
1418 case FLASH_MANUF_ID_ST:
1419 switch (dev_id) {
1420 case FLASH_DEV_ID_STM29008:
1421 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1422 break;
1423 default:
1424 break;
1425 }
1426 break;
1427 case FLASH_MANUF_ID_FUJITSU:
1428 switch (dev_id) {
1429 case FLASH_DEV_ID_MBM29LV008TA:
1430 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1431 break;
1432 }
1433 break;
1434 case FLASH_MANUF_ID_INTEL:
1435 switch (dev_id) {
1436 case FLASH_DEV_ID_I28LV00TAT:
1437 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1438 break;
1439 }
1440 break;
1441 case FLASH_MANUF_ID_MACRONIX:
1442 switch (dev_id) {
1443 case FLASH_DEV_ID_I28LV00TAT:
1444 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1445 break;
1446 }
1447 break;
1448 default:
1449 return FAIL_FIND_FLASH_ID;
1450 }
1451 }
1452
1453 if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN)
1454 return FAIL_FIND_FLASH_ID;
1455
1456 asd_ha->hw_prof.flash.manuf = manuf_id;
1457 asd_ha->hw_prof.flash.dev_id = dev_id;
1458 asd_ha->hw_prof.flash.sec_prot = sec_prot;
1459 return 0;
1460 }
1461
