1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
3 *
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
6 */
7
8 /* File aq_nic.c: Definition of common code for NIC. */
9
10 #include "aq_nic.h"
11 #include "aq_ring.h"
12 #include "aq_vec.h"
13 #include "aq_hw.h"
14 #include "aq_pci_func.h"
15 #include "aq_macsec.h"
16 #include "aq_main.h"
17 #include "aq_phy.h"
18 #include "aq_ptp.h"
19 #include "aq_filters.h"
20
21 #include <linux/moduleparam.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/timer.h>
25 #include <linux/cpu.h>
26 #include <linux/ip.h>
27 #include <linux/tcp.h>
28 #include <net/ip.h>
29 #include <net/pkt_cls.h>
30
31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
32 module_param_named(aq_itr, aq_itr, uint, 0644);
33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
34
35 static unsigned int aq_itr_tx;
36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
38
39 static unsigned int aq_itr_rx;
40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
42
43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
44
aq_nic_rss_init(struct aq_nic_s * self,unsigned int num_rss_queues)45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
46 {
47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {
48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c
53 };
54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
55 struct aq_rss_parameters *rss_params;
56 int i = 0;
57
58 rss_params = &cfg->aq_rss;
59
60 rss_params->hash_secret_key_size = sizeof(rss_key);
61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key));
62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;
63
64 for (i = rss_params->indirection_table_size; i--;)
65 rss_params->indirection_table[i] = i & (num_rss_queues - 1);
66 }
67
68 /* Recalculate the number of vectors */
aq_nic_cfg_update_num_vecs(struct aq_nic_s * self)69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self)
70 {
71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
72
73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF);
74 cfg->vecs = min(cfg->vecs, num_online_cpus());
75 if (self->irqvecs > AQ_HW_SERVICE_IRQS)
76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS);
77 /* cfg->vecs should be power of 2 for RSS */
78 cfg->vecs = rounddown_pow_of_two(cfg->vecs);
79
80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) {
81 if (cfg->tcs > 2)
82 cfg->vecs = min(cfg->vecs, 4U);
83 }
84
85 if (cfg->vecs <= 4)
86 cfg->tc_mode = AQ_TC_MODE_8TCS;
87 else
88 cfg->tc_mode = AQ_TC_MODE_4TCS;
89
90 /*rss rings */
91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);
92 aq_nic_rss_init(self, cfg->num_rss_queues);
93 }
94
95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */
aq_nic_cfg_start(struct aq_nic_s * self)96 void aq_nic_cfg_start(struct aq_nic_s *self)
97 {
98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
99 int i;
100
101 cfg->tcs = AQ_CFG_TCS_DEF;
102
103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
104
105 cfg->itr = aq_itr;
106 cfg->tx_itr = aq_itr_tx;
107 cfg->rx_itr = aq_itr_rx;
108
109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER;
110 cfg->is_rss = AQ_CFG_IS_RSS_DEF;
111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;
112 cfg->fc.req = AQ_CFG_FC_MODE;
113 cfg->wol = AQ_CFG_WOL_MODES;
114
115 cfg->mtu = AQ_CFG_MTU_DEF;
116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK;
117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF;
118
119 cfg->is_lro = AQ_CFG_IS_LRO_DEF;
120 cfg->is_ptp = true;
121
122 /*descriptors */
123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF);
124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF);
125
126 aq_nic_cfg_update_num_vecs(self);
127
128 cfg->irq_type = aq_pci_func_get_irq_type(self);
129
130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||
131 (cfg->aq_hw_caps->vecs == 1U) ||
132 (cfg->vecs == 1U)) {
133 cfg->is_rss = 0U;
134 cfg->vecs = 1U;
135 }
136
137 /* Check if we have enough vectors allocated for
138 * link status IRQ. If no - we'll know link state from
139 * slower service task.
140 */
141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs)
142 cfg->link_irq_vec = cfg->vecs;
143 else
144 cfg->link_irq_vec = 0;
145
146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
147 cfg->features = cfg->aq_hw_caps->hw_features;
148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX);
149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX);
150 cfg->is_vlan_force_promisc = true;
151
152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
153 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
154 }
155
aq_nic_update_link_status(struct aq_nic_s * self)156 static int aq_nic_update_link_status(struct aq_nic_s *self)
157 {
158 int err = self->aq_fw_ops->update_link_status(self->aq_hw);
159 u32 fc = 0;
160
161 if (err)
162 return err;
163
164 if (self->aq_fw_ops->get_flow_control)
165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc);
166 self->aq_nic_cfg.fc.cur = fc;
167
168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
169 netdev_info(self->ndev, "%s: link change old %d new %d\n",
170 AQ_CFG_DRV_NAME, self->link_status.mbps,
171 self->aq_hw->aq_link_status.mbps);
172 aq_nic_update_interrupt_moderation_settings(self);
173
174 if (self->aq_ptp) {
175 aq_ptp_clock_init(self);
176 aq_ptp_tm_offset_set(self,
177 self->aq_hw->aq_link_status.mbps);
178 aq_ptp_link_change(self);
179 }
180
181 /* Driver has to update flow control settings on RX block
182 * on any link event.
183 * We should query FW whether it negotiated FC.
184 */
185 if (self->aq_hw_ops->hw_set_fc)
186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0);
187 }
188
189 self->link_status = self->aq_hw->aq_link_status;
190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
191 aq_utils_obj_set(&self->flags,
192 AQ_NIC_FLAG_STARTED);
193 aq_utils_obj_clear(&self->flags,
194 AQ_NIC_LINK_DOWN);
195 netif_carrier_on(self->ndev);
196 #if IS_ENABLED(CONFIG_MACSEC)
197 aq_macsec_enable(self);
198 #endif
199 if (self->aq_hw_ops->hw_tc_rate_limit_set)
200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw);
201
202 netif_tx_wake_all_queues(self->ndev);
203 }
204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
205 netif_carrier_off(self->ndev);
206 netif_tx_disable(self->ndev);
207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
208 }
209
210 return 0;
211 }
212
aq_linkstate_threaded_isr(int irq,void * private)213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)
214 {
215 struct aq_nic_s *self = private;
216
217 if (!self)
218 return IRQ_NONE;
219
220 aq_nic_update_link_status(self);
221
222 self->aq_hw_ops->hw_irq_enable(self->aq_hw,
223 BIT(self->aq_nic_cfg.link_irq_vec));
224
225 return IRQ_HANDLED;
226 }
227
aq_nic_service_task(struct work_struct * work)228 static void aq_nic_service_task(struct work_struct *work)
229 {
230 struct aq_nic_s *self = container_of(work, struct aq_nic_s,
231 service_task);
232 int err;
233
234 aq_ptp_service_task(self);
235
236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
237 return;
238
239 err = aq_nic_update_link_status(self);
240 if (err)
241 return;
242
243 #if IS_ENABLED(CONFIG_MACSEC)
244 aq_macsec_work(self);
245 #endif
246
247 mutex_lock(&self->fwreq_mutex);
248 if (self->aq_fw_ops->update_stats)
249 self->aq_fw_ops->update_stats(self->aq_hw);
250 mutex_unlock(&self->fwreq_mutex);
251
252 aq_nic_update_ndev_stats(self);
253 }
254
aq_nic_service_timer_cb(struct timer_list * t)255 static void aq_nic_service_timer_cb(struct timer_list *t)
256 {
257 struct aq_nic_s *self = from_timer(self, t, service_timer);
258
259 mod_timer(&self->service_timer,
260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);
261
262 aq_ndev_schedule_work(&self->service_task);
263 }
264
aq_nic_polling_timer_cb(struct timer_list * t)265 static void aq_nic_polling_timer_cb(struct timer_list *t)
266 {
267 struct aq_nic_s *self = from_timer(self, t, polling_timer);
268 struct aq_vec_s *aq_vec = NULL;
269 unsigned int i = 0U;
270
271 for (i = 0U, aq_vec = self->aq_vec[0];
272 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
273 aq_vec_isr(i, (void *)aq_vec);
274
275 mod_timer(&self->polling_timer, jiffies +
276 AQ_CFG_POLLING_TIMER_INTERVAL);
277 }
278
aq_nic_hw_prepare(struct aq_nic_s * self)279 static int aq_nic_hw_prepare(struct aq_nic_s *self)
280 {
281 int err = 0;
282
283 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw);
284 if (err)
285 goto exit;
286
287 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops);
288
289 exit:
290 return err;
291 }
292
aq_nic_is_valid_ether_addr(const u8 * addr)293 static bool aq_nic_is_valid_ether_addr(const u8 *addr)
294 {
295 /* Some engineering samples of Aquantia NICs are provisioned with a
296 * partially populated MAC, which is still invalid.
297 */
298 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0);
299 }
300
aq_nic_ndev_register(struct aq_nic_s * self)301 int aq_nic_ndev_register(struct aq_nic_s *self)
302 {
303 int err = 0;
304
305 if (!self->ndev) {
306 err = -EINVAL;
307 goto err_exit;
308 }
309
310 err = aq_nic_hw_prepare(self);
311 if (err)
312 goto err_exit;
313
314 #if IS_ENABLED(CONFIG_MACSEC)
315 aq_macsec_init(self);
316 #endif
317
318 mutex_lock(&self->fwreq_mutex);
319 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw,
320 self->ndev->dev_addr);
321 mutex_unlock(&self->fwreq_mutex);
322 if (err)
323 goto err_exit;
324
325 if (!is_valid_ether_addr(self->ndev->dev_addr) ||
326 !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) {
327 netdev_warn(self->ndev, "MAC is invalid, will use random.");
328 eth_hw_addr_random(self->ndev);
329 }
330
331 #if defined(AQ_CFG_MAC_ADDR_PERMANENT)
332 {
333 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;
334
335 ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent);
336 }
337 #endif
338
339 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs;
340 self->aq_vecs++) {
341 self->aq_vec[self->aq_vecs] =
342 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self));
343 if (!self->aq_vec[self->aq_vecs]) {
344 err = -ENOMEM;
345 goto err_exit;
346 }
347 }
348
349 netif_carrier_off(self->ndev);
350
351 netif_tx_disable(self->ndev);
352
353 err = register_netdev(self->ndev);
354 if (err)
355 goto err_exit;
356
357 err_exit:
358 #if IS_ENABLED(CONFIG_MACSEC)
359 if (err)
360 aq_macsec_free(self);
361 #endif
362 return err;
363 }
364
aq_nic_ndev_init(struct aq_nic_s * self)365 void aq_nic_ndev_init(struct aq_nic_s *self)
366 {
367 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
368 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
369
370 self->ndev->hw_features |= aq_hw_caps->hw_features;
371 self->ndev->features = aq_hw_caps->hw_features;
372 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
373 NETIF_F_RXHASH | NETIF_F_SG |
374 NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6;
375 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4;
376 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
377 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
378
379 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK;
380 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
381 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
382
383 }
384
aq_nic_set_tx_ring(struct aq_nic_s * self,unsigned int idx,struct aq_ring_s * ring)385 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
386 struct aq_ring_s *ring)
387 {
388 self->aq_ring_tx[idx] = ring;
389 }
390
aq_nic_get_ndev(struct aq_nic_s * self)391 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
392 {
393 return self->ndev;
394 }
395
aq_nic_init(struct aq_nic_s * self)396 int aq_nic_init(struct aq_nic_s *self)
397 {
398 struct aq_vec_s *aq_vec = NULL;
399 unsigned int i = 0U;
400 int err = 0;
401
402 self->power_state = AQ_HW_POWER_STATE_D0;
403 mutex_lock(&self->fwreq_mutex);
404 err = self->aq_hw_ops->hw_reset(self->aq_hw);
405 mutex_unlock(&self->fwreq_mutex);
406 if (err < 0)
407 goto err_exit;
408 /* Restore default settings */
409 aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter);
410 aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ?
411 AQ_HW_MEDIA_DETECT_CNT : 0);
412
413 err = self->aq_hw_ops->hw_init(self->aq_hw,
414 aq_nic_get_ndev(self)->dev_addr);
415 if (err < 0)
416 goto err_exit;
417
418 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) &&
419 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
420 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
421 err = aq_phy_init(self->aq_hw);
422
423 /* Disable the PTP on NICs where it's known to cause datapath
424 * problems.
425 * Ideally this should have been done by PHY provisioning, but
426 * many units have been shipped with enabled PTP block already.
427 */
428 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
429 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
430 aq_phy_disable_ptp(self->aq_hw);
431 }
432
433 for (i = 0U; i < self->aq_vecs; i++) {
434 aq_vec = self->aq_vec[i];
435 err = aq_vec_ring_alloc(aq_vec, self, i,
436 aq_nic_get_cfg(self));
437 if (err)
438 goto err_exit;
439
440 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw);
441 }
442
443 if (aq_nic_get_cfg(self)->is_ptp) {
444 err = aq_ptp_init(self, self->irqvecs - 1);
445 if (err < 0)
446 goto err_exit;
447
448 err = aq_ptp_ring_alloc(self);
449 if (err < 0)
450 goto err_exit;
451
452 err = aq_ptp_ring_init(self);
453 if (err < 0)
454 goto err_exit;
455 }
456
457 netif_carrier_off(self->ndev);
458
459 err_exit:
460 return err;
461 }
462
aq_nic_start(struct aq_nic_s * self)463 int aq_nic_start(struct aq_nic_s *self)
464 {
465 struct aq_vec_s *aq_vec = NULL;
466 struct aq_nic_cfg_s *cfg;
467 unsigned int i = 0U;
468 int err = 0;
469
470 cfg = aq_nic_get_cfg(self);
471
472 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
473 self->mc_list.ar,
474 self->mc_list.count);
475 if (err < 0)
476 goto err_exit;
477
478 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
479 self->packet_filter);
480 if (err < 0)
481 goto err_exit;
482
483 for (i = 0U, aq_vec = self->aq_vec[0];
484 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
485 err = aq_vec_start(aq_vec);
486 if (err < 0)
487 goto err_exit;
488 }
489
490 err = aq_ptp_ring_start(self);
491 if (err < 0)
492 goto err_exit;
493
494 aq_nic_set_loopback(self);
495
496 err = self->aq_hw_ops->hw_start(self->aq_hw);
497 if (err < 0)
498 goto err_exit;
499
500 err = aq_nic_update_interrupt_moderation_settings(self);
501 if (err)
502 goto err_exit;
503
504 INIT_WORK(&self->service_task, aq_nic_service_task);
505
506 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
507 aq_nic_service_timer_cb(&self->service_timer);
508
509 if (cfg->is_polling) {
510 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
511 mod_timer(&self->polling_timer, jiffies +
512 AQ_CFG_POLLING_TIMER_INTERVAL);
513 } else {
514 for (i = 0U, aq_vec = self->aq_vec[0];
515 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
516 err = aq_pci_func_alloc_irq(self, i, self->ndev->name,
517 aq_vec_isr, aq_vec,
518 aq_vec_get_affinity_mask(aq_vec));
519 if (err < 0)
520 goto err_exit;
521 }
522
523 err = aq_ptp_irq_alloc(self);
524 if (err < 0)
525 goto err_exit;
526
527 if (cfg->link_irq_vec) {
528 int irqvec = pci_irq_vector(self->pdev,
529 cfg->link_irq_vec);
530 err = request_threaded_irq(irqvec, NULL,
531 aq_linkstate_threaded_isr,
532 IRQF_SHARED | IRQF_ONESHOT,
533 self->ndev->name, self);
534 if (err < 0)
535 goto err_exit;
536 self->msix_entry_mask |= (1 << cfg->link_irq_vec);
537 }
538
539 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
540 AQ_CFG_IRQ_MASK);
541 if (err < 0)
542 goto err_exit;
543 }
544
545 err = netif_set_real_num_tx_queues(self->ndev,
546 self->aq_vecs * cfg->tcs);
547 if (err < 0)
548 goto err_exit;
549
550 err = netif_set_real_num_rx_queues(self->ndev,
551 self->aq_vecs * cfg->tcs);
552 if (err < 0)
553 goto err_exit;
554
555 for (i = 0; i < cfg->tcs; i++) {
556 u16 offset = self->aq_vecs * i;
557
558 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset);
559 }
560 netif_tx_start_all_queues(self->ndev);
561
562 err_exit:
563 return err;
564 }
565
aq_nic_map_skb(struct aq_nic_s * self,struct sk_buff * skb,struct aq_ring_s * ring)566 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,
567 struct aq_ring_s *ring)
568 {
569 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
570 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
571 struct device *dev = aq_nic_get_dev(self);
572 struct aq_ring_buff_s *first = NULL;
573 u8 ipver = ip_hdr(skb)->version;
574 struct aq_ring_buff_s *dx_buff;
575 bool need_context_tag = false;
576 unsigned int frag_count = 0U;
577 unsigned int ret = 0U;
578 unsigned int dx;
579 u8 l4proto = 0;
580
581 if (ipver == 4)
582 l4proto = ip_hdr(skb)->protocol;
583 else if (ipver == 6)
584 l4proto = ipv6_hdr(skb)->nexthdr;
585
586 dx = ring->sw_tail;
587 dx_buff = &ring->buff_ring[dx];
588 dx_buff->flags = 0U;
589
590 if (unlikely(skb_is_gso(skb))) {
591 dx_buff->mss = skb_shinfo(skb)->gso_size;
592 if (l4proto == IPPROTO_TCP) {
593 dx_buff->is_gso_tcp = 1U;
594 dx_buff->len_l4 = tcp_hdrlen(skb);
595 } else if (l4proto == IPPROTO_UDP) {
596 dx_buff->is_gso_udp = 1U;
597 dx_buff->len_l4 = sizeof(struct udphdr);
598 /* UDP GSO Hardware does not replace packet length. */
599 udp_hdr(skb)->len = htons(dx_buff->mss +
600 dx_buff->len_l4);
601 } else {
602 WARN_ONCE(true, "Bad GSO mode");
603 goto exit;
604 }
605 dx_buff->len_pkt = skb->len;
606 dx_buff->len_l2 = ETH_HLEN;
607 dx_buff->len_l3 = skb_network_header_len(skb);
608 dx_buff->eop_index = 0xffffU;
609 dx_buff->is_ipv6 = (ipver == 6);
610 need_context_tag = true;
611 }
612
613 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) {
614 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb);
615 dx_buff->len_pkt = skb->len;
616 dx_buff->is_vlan = 1U;
617 need_context_tag = true;
618 }
619
620 if (need_context_tag) {
621 dx = aq_ring_next_dx(ring, dx);
622 dx_buff = &ring->buff_ring[dx];
623 dx_buff->flags = 0U;
624 ++ret;
625 }
626
627 dx_buff->len = skb_headlen(skb);
628 dx_buff->pa = dma_map_single(dev,
629 skb->data,
630 dx_buff->len,
631 DMA_TO_DEVICE);
632
633 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) {
634 ret = 0;
635 goto exit;
636 }
637
638 first = dx_buff;
639 dx_buff->len_pkt = skb->len;
640 dx_buff->is_sop = 1U;
641 dx_buff->is_mapped = 1U;
642 ++ret;
643
644 if (skb->ip_summed == CHECKSUM_PARTIAL) {
645 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol);
646 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP);
647 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP);
648 }
649
650 for (; nr_frags--; ++frag_count) {
651 unsigned int frag_len = 0U;
652 unsigned int buff_offset = 0U;
653 unsigned int buff_size = 0U;
654 dma_addr_t frag_pa;
655 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count];
656
657 frag_len = skb_frag_size(frag);
658
659 while (frag_len) {
660 if (frag_len > AQ_CFG_TX_FRAME_MAX)
661 buff_size = AQ_CFG_TX_FRAME_MAX;
662 else
663 buff_size = frag_len;
664
665 frag_pa = skb_frag_dma_map(dev,
666 frag,
667 buff_offset,
668 buff_size,
669 DMA_TO_DEVICE);
670
671 if (unlikely(dma_mapping_error(dev,
672 frag_pa)))
673 goto mapping_error;
674
675 dx = aq_ring_next_dx(ring, dx);
676 dx_buff = &ring->buff_ring[dx];
677
678 dx_buff->flags = 0U;
679 dx_buff->len = buff_size;
680 dx_buff->pa = frag_pa;
681 dx_buff->is_mapped = 1U;
682 dx_buff->eop_index = 0xffffU;
683
684 frag_len -= buff_size;
685 buff_offset += buff_size;
686
687 ++ret;
688 }
689 }
690
691 first->eop_index = dx;
692 dx_buff->is_eop = 1U;
693 dx_buff->skb = skb;
694 goto exit;
695
696 mapping_error:
697 for (dx = ring->sw_tail;
698 ret > 0;
699 --ret, dx = aq_ring_next_dx(ring, dx)) {
700 dx_buff = &ring->buff_ring[dx];
701
702 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) &&
703 !dx_buff->is_vlan && dx_buff->pa) {
704 if (unlikely(dx_buff->is_sop)) {
705 dma_unmap_single(dev,
706 dx_buff->pa,
707 dx_buff->len,
708 DMA_TO_DEVICE);
709 } else {
710 dma_unmap_page(dev,
711 dx_buff->pa,
712 dx_buff->len,
713 DMA_TO_DEVICE);
714 }
715 }
716 }
717
718 exit:
719 return ret;
720 }
721
aq_nic_xmit(struct aq_nic_s * self,struct sk_buff * skb)722 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
723 {
724 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
725 unsigned int vec = skb->queue_mapping % cfg->vecs;
726 unsigned int tc = skb->queue_mapping / cfg->vecs;
727 struct aq_ring_s *ring = NULL;
728 unsigned int frags = 0U;
729 int err = NETDEV_TX_OK;
730
731 frags = skb_shinfo(skb)->nr_frags + 1;
732
733 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)];
734
735 if (frags > AQ_CFG_SKB_FRAGS_MAX) {
736 dev_kfree_skb_any(skb);
737 goto err_exit;
738 }
739
740 aq_ring_update_queue_state(ring);
741
742 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) {
743 err = NETDEV_TX_BUSY;
744 goto err_exit;
745 }
746
747 /* Above status update may stop the queue. Check this. */
748 if (__netif_subqueue_stopped(self->ndev,
749 AQ_NIC_RING2QMAP(self, ring->idx))) {
750 err = NETDEV_TX_BUSY;
751 goto err_exit;
752 }
753
754 frags = aq_nic_map_skb(self, skb, ring);
755
756 if (likely(frags)) {
757 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
758 ring, frags);
759 } else {
760 err = NETDEV_TX_BUSY;
761 }
762
763 err_exit:
764 return err;
765 }
766
aq_nic_update_interrupt_moderation_settings(struct aq_nic_s * self)767 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
768 {
769 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw);
770 }
771
aq_nic_set_packet_filter(struct aq_nic_s * self,unsigned int flags)772 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
773 {
774 int err = 0;
775
776 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags);
777 if (err < 0)
778 goto err_exit;
779
780 self->packet_filter = flags;
781
782 err_exit:
783 return err;
784 }
785
aq_nic_set_multicast_list(struct aq_nic_s * self,struct net_device * ndev)786 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)
787 {
788 const struct aq_hw_ops *hw_ops = self->aq_hw_ops;
789 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
790 unsigned int packet_filter = ndev->flags;
791 struct netdev_hw_addr *ha = NULL;
792 unsigned int i = 0U;
793 int err = 0;
794
795 self->mc_list.count = 0;
796 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
797 packet_filter |= IFF_PROMISC;
798 } else {
799 netdev_for_each_uc_addr(ha, ndev) {
800 ether_addr_copy(self->mc_list.ar[i++], ha->addr);
801 }
802 }
803
804 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST);
805 if (cfg->is_mc_list_enabled) {
806 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
807 packet_filter |= IFF_ALLMULTI;
808 } else {
809 netdev_for_each_mc_addr(ha, ndev) {
810 ether_addr_copy(self->mc_list.ar[i++],
811 ha->addr);
812 }
813 }
814 }
815
816 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {
817 self->mc_list.count = i;
818 err = hw_ops->hw_multicast_list_set(self->aq_hw,
819 self->mc_list.ar,
820 self->mc_list.count);
821 if (err < 0)
822 return err;
823 }
824
825 return aq_nic_set_packet_filter(self, packet_filter);
826 }
827
aq_nic_set_mtu(struct aq_nic_s * self,int new_mtu)828 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)
829 {
830 self->aq_nic_cfg.mtu = new_mtu;
831
832 return 0;
833 }
834
aq_nic_set_mac(struct aq_nic_s * self,struct net_device * ndev)835 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)
836 {
837 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr);
838 }
839
aq_nic_get_link_speed(struct aq_nic_s * self)840 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)
841 {
842 return self->link_status.mbps;
843 }
844
aq_nic_get_regs(struct aq_nic_s * self,struct ethtool_regs * regs,void * p)845 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)
846 {
847 u32 *regs_buff = p;
848 int err = 0;
849
850 if (unlikely(!self->aq_hw_ops->hw_get_regs))
851 return -EOPNOTSUPP;
852
853 regs->version = 1;
854
855 err = self->aq_hw_ops->hw_get_regs(self->aq_hw,
856 self->aq_nic_cfg.aq_hw_caps,
857 regs_buff);
858 if (err < 0)
859 goto err_exit;
860
861 err_exit:
862 return err;
863 }
864
aq_nic_get_regs_count(struct aq_nic_s * self)865 int aq_nic_get_regs_count(struct aq_nic_s *self)
866 {
867 if (unlikely(!self->aq_hw_ops->hw_get_regs))
868 return 0;
869
870 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count;
871 }
872
aq_nic_get_stats(struct aq_nic_s * self,u64 * data)873 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
874 {
875 struct aq_vec_s *aq_vec = NULL;
876 struct aq_stats_s *stats;
877 unsigned int count = 0U;
878 unsigned int i = 0U;
879 unsigned int tc;
880
881 if (self->aq_fw_ops->update_stats) {
882 mutex_lock(&self->fwreq_mutex);
883 self->aq_fw_ops->update_stats(self->aq_hw);
884 mutex_unlock(&self->fwreq_mutex);
885 }
886 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
887
888 if (!stats)
889 goto err_exit;
890
891 data[i] = stats->uprc + stats->mprc + stats->bprc;
892 data[++i] = stats->uprc;
893 data[++i] = stats->mprc;
894 data[++i] = stats->bprc;
895 data[++i] = stats->erpt;
896 data[++i] = stats->uptc + stats->mptc + stats->bptc;
897 data[++i] = stats->uptc;
898 data[++i] = stats->mptc;
899 data[++i] = stats->bptc;
900 data[++i] = stats->ubrc;
901 data[++i] = stats->ubtc;
902 data[++i] = stats->mbrc;
903 data[++i] = stats->mbtc;
904 data[++i] = stats->bbrc;
905 data[++i] = stats->bbtc;
906 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
907 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
908 data[++i] = stats->dma_pkt_rc;
909 data[++i] = stats->dma_pkt_tc;
910 data[++i] = stats->dma_oct_rc;
911 data[++i] = stats->dma_oct_tc;
912 data[++i] = stats->dpc;
913
914 i++;
915
916 data += i;
917
918 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
919 for (i = 0U, aq_vec = self->aq_vec[0];
920 aq_vec && self->aq_vecs > i;
921 ++i, aq_vec = self->aq_vec[i]) {
922 data += count;
923 count = aq_vec_get_sw_stats(aq_vec, tc, data);
924 }
925 }
926
927 data += count;
928
929 err_exit:
930 return data;
931 }
932
aq_nic_update_ndev_stats(struct aq_nic_s * self)933 static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
934 {
935 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
936 struct net_device *ndev = self->ndev;
937
938 ndev->stats.rx_packets = stats->dma_pkt_rc;
939 ndev->stats.rx_bytes = stats->dma_oct_rc;
940 ndev->stats.rx_errors = stats->erpr;
941 ndev->stats.rx_dropped = stats->dpc;
942 ndev->stats.tx_packets = stats->dma_pkt_tc;
943 ndev->stats.tx_bytes = stats->dma_oct_tc;
944 ndev->stats.tx_errors = stats->erpt;
945 ndev->stats.multicast = stats->mprc;
946 }
947
aq_nic_get_link_ksettings(struct aq_nic_s * self,struct ethtool_link_ksettings * cmd)948 void aq_nic_get_link_ksettings(struct aq_nic_s *self,
949 struct ethtool_link_ksettings *cmd)
950 {
951 u32 lp_link_speed_msk;
952
953 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
954 cmd->base.port = PORT_FIBRE;
955 else
956 cmd->base.port = PORT_TP;
957
958 cmd->base.duplex = DUPLEX_UNKNOWN;
959 if (self->link_status.mbps)
960 cmd->base.duplex = self->link_status.full_duplex ?
961 DUPLEX_FULL : DUPLEX_HALF;
962 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg;
963
964 ethtool_link_ksettings_zero_link_mode(cmd, supported);
965
966 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G)
967 ethtool_link_ksettings_add_link_mode(cmd, supported,
968 10000baseT_Full);
969
970 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G)
971 ethtool_link_ksettings_add_link_mode(cmd, supported,
972 5000baseT_Full);
973
974 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5)
975 ethtool_link_ksettings_add_link_mode(cmd, supported,
976 2500baseT_Full);
977
978 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G)
979 ethtool_link_ksettings_add_link_mode(cmd, supported,
980 1000baseT_Full);
981
982 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF)
983 ethtool_link_ksettings_add_link_mode(cmd, supported,
984 1000baseT_Half);
985
986 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M)
987 ethtool_link_ksettings_add_link_mode(cmd, supported,
988 100baseT_Full);
989
990 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF)
991 ethtool_link_ksettings_add_link_mode(cmd, supported,
992 100baseT_Half);
993
994 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M)
995 ethtool_link_ksettings_add_link_mode(cmd, supported,
996 10baseT_Full);
997
998 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF)
999 ethtool_link_ksettings_add_link_mode(cmd, supported,
1000 10baseT_Half);
1001
1002 if (self->aq_nic_cfg.aq_hw_caps->flow_control) {
1003 ethtool_link_ksettings_add_link_mode(cmd, supported,
1004 Pause);
1005 ethtool_link_ksettings_add_link_mode(cmd, supported,
1006 Asym_Pause);
1007 }
1008
1009 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1010
1011 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1012 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1013 else
1014 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
1015
1016 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
1017
1018 if (self->aq_nic_cfg.is_autoneg)
1019 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1020
1021 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G)
1022 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1023 10000baseT_Full);
1024
1025 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G)
1026 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1027 5000baseT_Full);
1028
1029 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5)
1030 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1031 2500baseT_Full);
1032
1033 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G)
1034 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1035 1000baseT_Full);
1036
1037 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF)
1038 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1039 1000baseT_Half);
1040
1041 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M)
1042 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1043 100baseT_Full);
1044
1045 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF)
1046 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1047 100baseT_Half);
1048
1049 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M)
1050 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1051 10baseT_Full);
1052
1053 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF)
1054 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1055 10baseT_Half);
1056
1057 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)
1058 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1059 Pause);
1060
1061 /* Asym is when either RX or TX, but not both */
1062 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^
1063 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX))
1064 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1065 Asym_Pause);
1066
1067 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1068 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
1069 else
1070 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
1071
1072 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
1073 lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk;
1074
1075 if (lp_link_speed_msk & AQ_NIC_RATE_10G)
1076 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1077 10000baseT_Full);
1078
1079 if (lp_link_speed_msk & AQ_NIC_RATE_5G)
1080 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1081 5000baseT_Full);
1082
1083 if (lp_link_speed_msk & AQ_NIC_RATE_2G5)
1084 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1085 2500baseT_Full);
1086
1087 if (lp_link_speed_msk & AQ_NIC_RATE_1G)
1088 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1089 1000baseT_Full);
1090
1091 if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF)
1092 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1093 1000baseT_Half);
1094
1095 if (lp_link_speed_msk & AQ_NIC_RATE_100M)
1096 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1097 100baseT_Full);
1098
1099 if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF)
1100 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1101 100baseT_Half);
1102
1103 if (lp_link_speed_msk & AQ_NIC_RATE_10M)
1104 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1105 10baseT_Full);
1106
1107 if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF)
1108 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1109 10baseT_Half);
1110
1111 if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)
1112 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1113 Pause);
1114 if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^
1115 !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX))
1116 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1117 Asym_Pause);
1118 }
1119
aq_nic_set_link_ksettings(struct aq_nic_s * self,const struct ethtool_link_ksettings * cmd)1120 int aq_nic_set_link_ksettings(struct aq_nic_s *self,
1121 const struct ethtool_link_ksettings *cmd)
1122 {
1123 int fduplex = (cmd->base.duplex == DUPLEX_FULL);
1124 u32 speed = cmd->base.speed;
1125 u32 rate = 0U;
1126 int err = 0;
1127
1128 if (!fduplex && speed > SPEED_1000) {
1129 err = -EINVAL;
1130 goto err_exit;
1131 }
1132
1133 if (cmd->base.autoneg == AUTONEG_ENABLE) {
1134 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk;
1135 self->aq_nic_cfg.is_autoneg = true;
1136 } else {
1137 switch (speed) {
1138 case SPEED_10:
1139 rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF;
1140 break;
1141
1142 case SPEED_100:
1143 rate = fduplex ? AQ_NIC_RATE_100M
1144 : AQ_NIC_RATE_100M_HALF;
1145 break;
1146
1147 case SPEED_1000:
1148 rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF;
1149 break;
1150
1151 case SPEED_2500:
1152 rate = AQ_NIC_RATE_2G5;
1153 break;
1154
1155 case SPEED_5000:
1156 rate = AQ_NIC_RATE_5G;
1157 break;
1158
1159 case SPEED_10000:
1160 rate = AQ_NIC_RATE_10G;
1161 break;
1162
1163 default:
1164 err = -1;
1165 goto err_exit;
1166 }
1167 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) {
1168 err = -1;
1169 goto err_exit;
1170 }
1171
1172 self->aq_nic_cfg.is_autoneg = false;
1173 }
1174
1175 mutex_lock(&self->fwreq_mutex);
1176 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate);
1177 mutex_unlock(&self->fwreq_mutex);
1178 if (err < 0)
1179 goto err_exit;
1180
1181 self->aq_nic_cfg.link_speed_msk = rate;
1182
1183 err_exit:
1184 return err;
1185 }
1186
aq_nic_get_cfg(struct aq_nic_s * self)1187 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)
1188 {
1189 return &self->aq_nic_cfg;
1190 }
1191
aq_nic_get_fw_version(struct aq_nic_s * self)1192 u32 aq_nic_get_fw_version(struct aq_nic_s *self)
1193 {
1194 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw);
1195 }
1196
aq_nic_set_loopback(struct aq_nic_s * self)1197 int aq_nic_set_loopback(struct aq_nic_s *self)
1198 {
1199 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1200
1201 if (!self->aq_hw_ops->hw_set_loopback ||
1202 !self->aq_fw_ops->set_phyloopback)
1203 return -EOPNOTSUPP;
1204
1205 mutex_lock(&self->fwreq_mutex);
1206 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1207 AQ_HW_LOOPBACK_DMA_SYS,
1208 !!(cfg->priv_flags &
1209 BIT(AQ_HW_LOOPBACK_DMA_SYS)));
1210
1211 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1212 AQ_HW_LOOPBACK_PKT_SYS,
1213 !!(cfg->priv_flags &
1214 BIT(AQ_HW_LOOPBACK_PKT_SYS)));
1215
1216 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1217 AQ_HW_LOOPBACK_DMA_NET,
1218 !!(cfg->priv_flags &
1219 BIT(AQ_HW_LOOPBACK_DMA_NET)));
1220
1221 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1222 AQ_HW_LOOPBACK_PHYINT_SYS,
1223 !!(cfg->priv_flags &
1224 BIT(AQ_HW_LOOPBACK_PHYINT_SYS)));
1225
1226 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1227 AQ_HW_LOOPBACK_PHYEXT_SYS,
1228 !!(cfg->priv_flags &
1229 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS)));
1230 mutex_unlock(&self->fwreq_mutex);
1231
1232 return 0;
1233 }
1234
aq_nic_stop(struct aq_nic_s * self)1235 int aq_nic_stop(struct aq_nic_s *self)
1236 {
1237 struct aq_vec_s *aq_vec = NULL;
1238 unsigned int i = 0U;
1239
1240 netif_tx_disable(self->ndev);
1241 netif_carrier_off(self->ndev);
1242
1243 del_timer_sync(&self->service_timer);
1244 cancel_work_sync(&self->service_task);
1245
1246 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK);
1247
1248 if (self->aq_nic_cfg.is_polling)
1249 del_timer_sync(&self->polling_timer);
1250 else
1251 aq_pci_func_free_irqs(self);
1252
1253 aq_ptp_irq_free(self);
1254
1255 for (i = 0U, aq_vec = self->aq_vec[0];
1256 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
1257 aq_vec_stop(aq_vec);
1258
1259 aq_ptp_ring_stop(self);
1260
1261 return self->aq_hw_ops->hw_stop(self->aq_hw);
1262 }
1263
aq_nic_set_power(struct aq_nic_s * self)1264 void aq_nic_set_power(struct aq_nic_s *self)
1265 {
1266 if (self->power_state != AQ_HW_POWER_STATE_D0 ||
1267 self->aq_hw->aq_nic_cfg->wol)
1268 if (likely(self->aq_fw_ops->set_power)) {
1269 mutex_lock(&self->fwreq_mutex);
1270 self->aq_fw_ops->set_power(self->aq_hw,
1271 self->power_state,
1272 self->ndev->dev_addr);
1273 mutex_unlock(&self->fwreq_mutex);
1274 }
1275 }
1276
aq_nic_deinit(struct aq_nic_s * self,bool link_down)1277 void aq_nic_deinit(struct aq_nic_s *self, bool link_down)
1278 {
1279 struct aq_vec_s *aq_vec = NULL;
1280 unsigned int i = 0U;
1281
1282 if (!self)
1283 goto err_exit;
1284
1285 for (i = 0U; i < self->aq_vecs; i++) {
1286 aq_vec = self->aq_vec[i];
1287 aq_vec_deinit(aq_vec);
1288 aq_vec_ring_free(aq_vec);
1289 }
1290
1291 aq_ptp_unregister(self);
1292 aq_ptp_ring_deinit(self);
1293 aq_ptp_ring_free(self);
1294 aq_ptp_free(self);
1295
1296 if (likely(self->aq_fw_ops->deinit) && link_down) {
1297 mutex_lock(&self->fwreq_mutex);
1298 self->aq_fw_ops->deinit(self->aq_hw);
1299 mutex_unlock(&self->fwreq_mutex);
1300 }
1301
1302 err_exit:;
1303 }
1304
aq_nic_free_vectors(struct aq_nic_s * self)1305 void aq_nic_free_vectors(struct aq_nic_s *self)
1306 {
1307 unsigned int i = 0U;
1308
1309 if (!self)
1310 goto err_exit;
1311
1312 for (i = ARRAY_SIZE(self->aq_vec); i--;) {
1313 if (self->aq_vec[i]) {
1314 aq_vec_free(self->aq_vec[i]);
1315 self->aq_vec[i] = NULL;
1316 }
1317 }
1318
1319 err_exit:;
1320 }
1321
aq_nic_realloc_vectors(struct aq_nic_s * self)1322 int aq_nic_realloc_vectors(struct aq_nic_s *self)
1323 {
1324 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
1325
1326 aq_nic_free_vectors(self);
1327
1328 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) {
1329 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs,
1330 cfg);
1331 if (unlikely(!self->aq_vec[self->aq_vecs]))
1332 return -ENOMEM;
1333 }
1334
1335 return 0;
1336 }
1337
aq_nic_shutdown(struct aq_nic_s * self)1338 void aq_nic_shutdown(struct aq_nic_s *self)
1339 {
1340 int err = 0;
1341
1342 if (!self->ndev)
1343 return;
1344
1345 rtnl_lock();
1346
1347 netif_device_detach(self->ndev);
1348
1349 if (netif_running(self->ndev)) {
1350 err = aq_nic_stop(self);
1351 if (err < 0)
1352 goto err_exit;
1353 }
1354 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol);
1355 aq_nic_set_power(self);
1356
1357 err_exit:
1358 rtnl_unlock();
1359 }
1360
aq_nic_reserve_filter(struct aq_nic_s * self,enum aq_rx_filter_type type)1361 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type)
1362 {
1363 u8 location = 0xFF;
1364 u32 fltr_cnt;
1365 u32 n_bit;
1366
1367 switch (type) {
1368 case aq_rx_filter_ethertype:
1369 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT -
1370 self->aq_hw_rx_fltrs.fet_reserved_count;
1371 self->aq_hw_rx_fltrs.fet_reserved_count++;
1372 break;
1373 case aq_rx_filter_l3l4:
1374 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4;
1375 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count;
1376
1377 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit);
1378 self->aq_hw_rx_fltrs.fl3l4.reserved_count++;
1379 location = n_bit;
1380 break;
1381 default:
1382 break;
1383 }
1384
1385 return location;
1386 }
1387
aq_nic_release_filter(struct aq_nic_s * self,enum aq_rx_filter_type type,u32 location)1388 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,
1389 u32 location)
1390 {
1391 switch (type) {
1392 case aq_rx_filter_ethertype:
1393 self->aq_hw_rx_fltrs.fet_reserved_count--;
1394 break;
1395 case aq_rx_filter_l3l4:
1396 self->aq_hw_rx_fltrs.fl3l4.reserved_count--;
1397 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location);
1398 break;
1399 default:
1400 break;
1401 }
1402 }
1403
aq_nic_set_downshift(struct aq_nic_s * self,int val)1404 int aq_nic_set_downshift(struct aq_nic_s *self, int val)
1405 {
1406 int err = 0;
1407 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1408
1409 if (!self->aq_fw_ops->set_downshift)
1410 return -EOPNOTSUPP;
1411
1412 if (val > 15) {
1413 netdev_err(self->ndev, "downshift counter should be <= 15\n");
1414 return -EINVAL;
1415 }
1416 cfg->downshift_counter = val;
1417
1418 mutex_lock(&self->fwreq_mutex);
1419 err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter);
1420 mutex_unlock(&self->fwreq_mutex);
1421
1422 return err;
1423 }
1424
aq_nic_set_media_detect(struct aq_nic_s * self,int val)1425 int aq_nic_set_media_detect(struct aq_nic_s *self, int val)
1426 {
1427 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1428 int err = 0;
1429
1430 if (!self->aq_fw_ops->set_media_detect)
1431 return -EOPNOTSUPP;
1432
1433 if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) {
1434 netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n",
1435 AQ_HW_MEDIA_DETECT_CNT);
1436 return -EINVAL;
1437 }
1438
1439 mutex_lock(&self->fwreq_mutex);
1440 err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val);
1441 mutex_unlock(&self->fwreq_mutex);
1442
1443 /* msecs plays no role - configuration is always fixed in PHY */
1444 if (!err)
1445 cfg->is_media_detect = !!val;
1446
1447 return err;
1448 }
1449
aq_nic_setup_tc_mqprio(struct aq_nic_s * self,u32 tcs,u8 * prio_tc_map)1450 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map)
1451 {
1452 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1453 const unsigned int prev_vecs = cfg->vecs;
1454 bool ndev_running;
1455 int err = 0;
1456 int i;
1457
1458 /* if already the same configuration or
1459 * disable request (tcs is 0) and we already is disabled
1460 */
1461 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos))
1462 return 0;
1463
1464 ndev_running = netif_running(self->ndev);
1465 if (ndev_running)
1466 dev_close(self->ndev);
1467
1468 cfg->tcs = tcs;
1469 if (cfg->tcs == 0)
1470 cfg->tcs = 1;
1471 if (prio_tc_map)
1472 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map));
1473 else
1474 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
1475 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
1476
1477 cfg->is_qos = (tcs != 0 ? true : false);
1478 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC);
1479 if (!cfg->is_ptp)
1480 netdev_warn(self->ndev, "%s\n",
1481 "PTP is auto disabled due to requested TC count.");
1482
1483 netdev_set_num_tc(self->ndev, cfg->tcs);
1484
1485 /* Changing the number of TCs might change the number of vectors */
1486 aq_nic_cfg_update_num_vecs(self);
1487 if (prev_vecs != cfg->vecs) {
1488 err = aq_nic_realloc_vectors(self);
1489 if (err)
1490 goto err_exit;
1491 }
1492
1493 if (ndev_running)
1494 err = dev_open(self->ndev, NULL);
1495
1496 err_exit:
1497 return err;
1498 }
1499
aq_nic_setup_tc_max_rate(struct aq_nic_s * self,const unsigned int tc,const u32 max_rate)1500 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,
1501 const u32 max_rate)
1502 {
1503 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1504
1505 if (tc >= AQ_CFG_TCS_MAX)
1506 return -EINVAL;
1507
1508 if (max_rate && max_rate < 10) {
1509 netdev_warn(self->ndev,
1510 "Setting %s to the minimum usable value of %dMbps.\n",
1511 "max rate", 10);
1512 cfg->tc_max_rate[tc] = 10;
1513 } else {
1514 cfg->tc_max_rate[tc] = max_rate;
1515 }
1516
1517 return 0;
1518 }
1519
aq_nic_setup_tc_min_rate(struct aq_nic_s * self,const unsigned int tc,const u32 min_rate)1520 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,
1521 const u32 min_rate)
1522 {
1523 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1524
1525 if (tc >= AQ_CFG_TCS_MAX)
1526 return -EINVAL;
1527
1528 if (min_rate)
1529 set_bit(tc, &cfg->tc_min_rate_msk);
1530 else
1531 clear_bit(tc, &cfg->tc_min_rate_msk);
1532
1533 if (min_rate && min_rate < 20) {
1534 netdev_warn(self->ndev,
1535 "Setting %s to the minimum usable value of %dMbps.\n",
1536 "min rate", 20);
1537 cfg->tc_min_rate[tc] = 20;
1538 } else {
1539 cfg->tc_min_rate[tc] = min_rate;
1540 }
1541
1542 return 0;
1543 }
1544
