1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2014 - 2020 Intel Corporation */
3 #include <linux/kernel.h>
4 #include <linux/init.h>
5 #include <linux/types.h>
6 #include <linux/pci.h>
7 #include <linux/slab.h>
8 #include <linux/errno.h>
9 #include <linux/interrupt.h>
10 #include <linux/workqueue.h>
11 #include "adf_accel_devices.h"
12 #include "adf_common_drv.h"
13 #include "adf_cfg.h"
14 #include "adf_cfg_strings.h"
15 #include "adf_cfg_common.h"
16 #include "adf_transport_access_macros.h"
17 #include "adf_transport_internal.h"
18 #include "adf_pf2vf_msg.h"
19
20 #define ADF_VINTSOU_OFFSET 0x204
21 #define ADF_VINTMSK_OFFSET 0x208
22 #define ADF_VINTSOU_BUN BIT(0)
23 #define ADF_VINTSOU_PF2VF BIT(1)
24
25 static struct workqueue_struct *adf_vf_stop_wq;
26
27 struct adf_vf_stop_data {
28 struct adf_accel_dev *accel_dev;
29 struct work_struct work;
30 };
31
adf_enable_pf2vf_interrupts(struct adf_accel_dev * accel_dev)32 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
33 {
34 struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
35 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
36 void __iomem *pmisc_bar_addr =
37 pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
38
39 ADF_CSR_WR(pmisc_bar_addr, ADF_VINTMSK_OFFSET, 0x0);
40 }
41
adf_disable_pf2vf_interrupts(struct adf_accel_dev * accel_dev)42 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
43 {
44 struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
45 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
46 void __iomem *pmisc_bar_addr =
47 pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
48
49 ADF_CSR_WR(pmisc_bar_addr, ADF_VINTMSK_OFFSET, 0x2);
50 }
51 EXPORT_SYMBOL_GPL(adf_disable_pf2vf_interrupts);
52
adf_enable_msi(struct adf_accel_dev * accel_dev)53 static int adf_enable_msi(struct adf_accel_dev *accel_dev)
54 {
55 struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
56 int stat = pci_enable_msi(pci_dev_info->pci_dev);
57
58 if (stat) {
59 dev_err(&GET_DEV(accel_dev),
60 "Failed to enable MSI interrupts\n");
61 return stat;
62 }
63
64 accel_dev->vf.irq_name = kzalloc(ADF_MAX_MSIX_VECTOR_NAME, GFP_KERNEL);
65 if (!accel_dev->vf.irq_name)
66 return -ENOMEM;
67
68 return stat;
69 }
70
adf_disable_msi(struct adf_accel_dev * accel_dev)71 static void adf_disable_msi(struct adf_accel_dev *accel_dev)
72 {
73 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
74
75 kfree(accel_dev->vf.irq_name);
76 pci_disable_msi(pdev);
77 }
78
adf_dev_stop_async(struct work_struct * work)79 static void adf_dev_stop_async(struct work_struct *work)
80 {
81 struct adf_vf_stop_data *stop_data =
82 container_of(work, struct adf_vf_stop_data, work);
83 struct adf_accel_dev *accel_dev = stop_data->accel_dev;
84
85 adf_dev_stop(accel_dev);
86 adf_dev_shutdown(accel_dev);
87
88 /* Re-enable PF2VF interrupts */
89 adf_enable_pf2vf_interrupts(accel_dev);
90 kfree(stop_data);
91 }
92
adf_pf2vf_bh_handler(void * data)93 static void adf_pf2vf_bh_handler(void *data)
94 {
95 struct adf_accel_dev *accel_dev = data;
96 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
97 struct adf_bar *pmisc =
98 &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
99 void __iomem *pmisc_bar_addr = pmisc->virt_addr;
100 u32 msg;
101
102 /* Read the message from PF */
103 msg = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_pf2vf_offset(0));
104
105 if (!(msg & ADF_PF2VF_MSGORIGIN_SYSTEM))
106 /* Ignore legacy non-system (non-kernel) PF2VF messages */
107 goto err;
108
109 switch ((msg & ADF_PF2VF_MSGTYPE_MASK) >> ADF_PF2VF_MSGTYPE_SHIFT) {
110 case ADF_PF2VF_MSGTYPE_RESTARTING: {
111 struct adf_vf_stop_data *stop_data;
112
113 dev_dbg(&GET_DEV(accel_dev),
114 "Restarting msg received from PF 0x%x\n", msg);
115
116 clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status);
117
118 stop_data = kzalloc(sizeof(*stop_data), GFP_ATOMIC);
119 if (!stop_data) {
120 dev_err(&GET_DEV(accel_dev),
121 "Couldn't schedule stop for vf_%d\n",
122 accel_dev->accel_id);
123 return;
124 }
125 stop_data->accel_dev = accel_dev;
126 INIT_WORK(&stop_data->work, adf_dev_stop_async);
127 queue_work(adf_vf_stop_wq, &stop_data->work);
128 /* To ack, clear the PF2VFINT bit */
129 msg &= ~ADF_PF2VF_INT;
130 ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
131 return;
132 }
133 case ADF_PF2VF_MSGTYPE_VERSION_RESP:
134 dev_dbg(&GET_DEV(accel_dev),
135 "Version resp received from PF 0x%x\n", msg);
136 accel_dev->vf.pf_version =
137 (msg & ADF_PF2VF_VERSION_RESP_VERS_MASK) >>
138 ADF_PF2VF_VERSION_RESP_VERS_SHIFT;
139 accel_dev->vf.compatible =
140 (msg & ADF_PF2VF_VERSION_RESP_RESULT_MASK) >>
141 ADF_PF2VF_VERSION_RESP_RESULT_SHIFT;
142 complete(&accel_dev->vf.iov_msg_completion);
143 break;
144 default:
145 goto err;
146 }
147
148 /* To ack, clear the PF2VFINT bit */
149 msg &= ~ADF_PF2VF_INT;
150 ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
151
152 /* Re-enable PF2VF interrupts */
153 adf_enable_pf2vf_interrupts(accel_dev);
154 return;
155 err:
156 dev_err(&GET_DEV(accel_dev),
157 "Unknown message from PF (0x%x); leaving PF2VF ints disabled\n",
158 msg);
159 }
160
adf_setup_pf2vf_bh(struct adf_accel_dev * accel_dev)161 static int adf_setup_pf2vf_bh(struct adf_accel_dev *accel_dev)
162 {
163 tasklet_init(&accel_dev->vf.pf2vf_bh_tasklet,
164 (void *)adf_pf2vf_bh_handler, (unsigned long)accel_dev);
165
166 mutex_init(&accel_dev->vf.vf2pf_lock);
167 return 0;
168 }
169
adf_cleanup_pf2vf_bh(struct adf_accel_dev * accel_dev)170 static void adf_cleanup_pf2vf_bh(struct adf_accel_dev *accel_dev)
171 {
172 tasklet_disable(&accel_dev->vf.pf2vf_bh_tasklet);
173 tasklet_kill(&accel_dev->vf.pf2vf_bh_tasklet);
174 mutex_destroy(&accel_dev->vf.vf2pf_lock);
175 }
176
adf_isr(int irq,void * privdata)177 static irqreturn_t adf_isr(int irq, void *privdata)
178 {
179 struct adf_accel_dev *accel_dev = privdata;
180 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
181 struct adf_hw_csr_ops *csr_ops = &hw_data->csr_ops;
182 struct adf_bar *pmisc =
183 &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
184 void __iomem *pmisc_bar_addr = pmisc->virt_addr;
185 bool handled = false;
186 u32 v_int, v_mask;
187
188 /* Read VF INT source CSR to determine the source of VF interrupt */
189 v_int = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTSOU_OFFSET);
190
191 /* Read VF INT mask CSR to determine which sources are masked */
192 v_mask = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTMSK_OFFSET);
193
194 /*
195 * Recompute v_int ignoring sources that are masked. This is to
196 * avoid rescheduling the tasklet for interrupts already handled
197 */
198 v_int &= ~v_mask;
199
200 /* Check for PF2VF interrupt */
201 if (v_int & ADF_VINTSOU_PF2VF) {
202 /* Disable PF to VF interrupt */
203 adf_disable_pf2vf_interrupts(accel_dev);
204
205 /* Schedule tasklet to handle interrupt BH */
206 tasklet_hi_schedule(&accel_dev->vf.pf2vf_bh_tasklet);
207 handled = true;
208 }
209
210 /* Check bundle interrupt */
211 if (v_int & ADF_VINTSOU_BUN) {
212 struct adf_etr_data *etr_data = accel_dev->transport;
213 struct adf_etr_bank_data *bank = &etr_data->banks[0];
214
215 /* Disable Flag and Coalesce Ring Interrupts */
216 csr_ops->write_csr_int_flag_and_col(bank->csr_addr,
217 bank->bank_number, 0);
218 tasklet_hi_schedule(&bank->resp_handler);
219 handled = true;
220 }
221
222 return handled ? IRQ_HANDLED : IRQ_NONE;
223 }
224
adf_request_msi_irq(struct adf_accel_dev * accel_dev)225 static int adf_request_msi_irq(struct adf_accel_dev *accel_dev)
226 {
227 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
228 unsigned int cpu;
229 int ret;
230
231 snprintf(accel_dev->vf.irq_name, ADF_MAX_MSIX_VECTOR_NAME,
232 "qat_%02x:%02d.%02d", pdev->bus->number, PCI_SLOT(pdev->devfn),
233 PCI_FUNC(pdev->devfn));
234 ret = request_irq(pdev->irq, adf_isr, 0, accel_dev->vf.irq_name,
235 (void *)accel_dev);
236 if (ret) {
237 dev_err(&GET_DEV(accel_dev), "failed to enable irq for %s\n",
238 accel_dev->vf.irq_name);
239 return ret;
240 }
241 cpu = accel_dev->accel_id % num_online_cpus();
242 irq_set_affinity_hint(pdev->irq, get_cpu_mask(cpu));
243
244 return ret;
245 }
246
adf_setup_bh(struct adf_accel_dev * accel_dev)247 static int adf_setup_bh(struct adf_accel_dev *accel_dev)
248 {
249 struct adf_etr_data *priv_data = accel_dev->transport;
250
251 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler,
252 (unsigned long)priv_data->banks);
253 return 0;
254 }
255
adf_cleanup_bh(struct adf_accel_dev * accel_dev)256 static void adf_cleanup_bh(struct adf_accel_dev *accel_dev)
257 {
258 struct adf_etr_data *priv_data = accel_dev->transport;
259
260 tasklet_disable(&priv_data->banks[0].resp_handler);
261 tasklet_kill(&priv_data->banks[0].resp_handler);
262 }
263
264 /**
265 * adf_vf_isr_resource_free() - Free IRQ for acceleration device
266 * @accel_dev: Pointer to acceleration device.
267 *
268 * Function frees interrupts for acceleration device virtual function.
269 */
adf_vf_isr_resource_free(struct adf_accel_dev * accel_dev)270 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev)
271 {
272 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
273
274 irq_set_affinity_hint(pdev->irq, NULL);
275 free_irq(pdev->irq, (void *)accel_dev);
276 adf_cleanup_bh(accel_dev);
277 adf_cleanup_pf2vf_bh(accel_dev);
278 adf_disable_msi(accel_dev);
279 }
280 EXPORT_SYMBOL_GPL(adf_vf_isr_resource_free);
281
282 /**
283 * adf_vf_isr_resource_alloc() - Allocate IRQ for acceleration device
284 * @accel_dev: Pointer to acceleration device.
285 *
286 * Function allocates interrupts for acceleration device virtual function.
287 *
288 * Return: 0 on success, error code otherwise.
289 */
adf_vf_isr_resource_alloc(struct adf_accel_dev * accel_dev)290 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev)
291 {
292 if (adf_enable_msi(accel_dev))
293 goto err_out;
294
295 if (adf_setup_pf2vf_bh(accel_dev))
296 goto err_disable_msi;
297
298 if (adf_setup_bh(accel_dev))
299 goto err_cleanup_pf2vf_bh;
300
301 if (adf_request_msi_irq(accel_dev))
302 goto err_cleanup_bh;
303
304 return 0;
305
306 err_cleanup_bh:
307 adf_cleanup_bh(accel_dev);
308
309 err_cleanup_pf2vf_bh:
310 adf_cleanup_pf2vf_bh(accel_dev);
311
312 err_disable_msi:
313 adf_disable_msi(accel_dev);
314
315 err_out:
316 return -EFAULT;
317 }
318 EXPORT_SYMBOL_GPL(adf_vf_isr_resource_alloc);
319
320 /**
321 * adf_flush_vf_wq() - Flush workqueue for VF
322 * @accel_dev: Pointer to acceleration device.
323 *
324 * Function disables the PF/VF interrupts on the VF so that no new messages
325 * are received and flushes the workqueue 'adf_vf_stop_wq'.
326 *
327 * Return: void.
328 */
adf_flush_vf_wq(struct adf_accel_dev * accel_dev)329 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev)
330 {
331 adf_disable_pf2vf_interrupts(accel_dev);
332
333 flush_workqueue(adf_vf_stop_wq);
334 }
335 EXPORT_SYMBOL_GPL(adf_flush_vf_wq);
336
337 /**
338 * adf_init_vf_wq() - Init workqueue for VF
339 *
340 * Function init workqueue 'adf_vf_stop_wq' for VF.
341 *
342 * Return: 0 on success, error code otherwise.
343 */
adf_init_vf_wq(void)344 int __init adf_init_vf_wq(void)
345 {
346 adf_vf_stop_wq = alloc_workqueue("adf_vf_stop_wq", WQ_MEM_RECLAIM, 0);
347
348 return !adf_vf_stop_wq ? -EFAULT : 0;
349 }
350
adf_exit_vf_wq(void)351 void adf_exit_vf_wq(void)
352 {
353 if (adf_vf_stop_wq)
354 destroy_workqueue(adf_vf_stop_wq);
355
356 adf_vf_stop_wq = NULL;
357 }
358
