1 /*
2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
4
5 GPL LICENSE SUMMARY
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
10
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
15
16 Contact Information:
17 qat-linux@intel.com
18
19 BSD LICENSE
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
23 are met:
24
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
30 distribution.
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
34
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 */
47 #include <linux/kernel.h>
48 #include <linux/pci.h>
49 #include <linux/aer.h>
50 #include <linux/completion.h>
51 #include <linux/workqueue.h>
52 #include <linux/delay.h>
53 #include "adf_accel_devices.h"
54 #include "adf_common_drv.h"
55
56 static struct workqueue_struct *device_reset_wq;
57
adf_error_detected(struct pci_dev * pdev,pci_channel_state_t state)58 static pci_ers_result_t adf_error_detected(struct pci_dev *pdev,
59 pci_channel_state_t state)
60 {
61 struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
62
63 dev_info(&pdev->dev, "Acceleration driver hardware error detected.\n");
64 if (!accel_dev) {
65 dev_err(&pdev->dev, "Can't find acceleration device\n");
66 return PCI_ERS_RESULT_DISCONNECT;
67 }
68
69 if (state == pci_channel_io_perm_failure) {
70 dev_err(&pdev->dev, "Can't recover from device error\n");
71 return PCI_ERS_RESULT_DISCONNECT;
72 }
73
74 return PCI_ERS_RESULT_NEED_RESET;
75 }
76
77 /* reset dev data */
78 struct adf_reset_dev_data {
79 int mode;
80 struct adf_accel_dev *accel_dev;
81 struct completion compl;
82 struct work_struct reset_work;
83 };
84
adf_reset_sbr(struct adf_accel_dev * accel_dev)85 void adf_reset_sbr(struct adf_accel_dev *accel_dev)
86 {
87 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
88 struct pci_dev *parent = pdev->bus->self;
89 uint16_t bridge_ctl = 0;
90
91 if (!parent)
92 parent = pdev;
93
94 if (!pci_wait_for_pending_transaction(pdev))
95 dev_info(&GET_DEV(accel_dev),
96 "Transaction still in progress. Proceeding\n");
97
98 dev_info(&GET_DEV(accel_dev), "Secondary bus reset\n");
99
100 pci_read_config_word(parent, PCI_BRIDGE_CONTROL, &bridge_ctl);
101 bridge_ctl |= PCI_BRIDGE_CTL_BUS_RESET;
102 pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
103 msleep(100);
104 bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
105 pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
106 msleep(100);
107 }
108 EXPORT_SYMBOL_GPL(adf_reset_sbr);
109
adf_reset_flr(struct adf_accel_dev * accel_dev)110 void adf_reset_flr(struct adf_accel_dev *accel_dev)
111 {
112 pcie_flr(accel_to_pci_dev(accel_dev));
113 }
114 EXPORT_SYMBOL_GPL(adf_reset_flr);
115
adf_dev_restore(struct adf_accel_dev * accel_dev)116 void adf_dev_restore(struct adf_accel_dev *accel_dev)
117 {
118 struct adf_hw_device_data *hw_device = accel_dev->hw_device;
119 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
120
121 if (hw_device->reset_device) {
122 dev_info(&GET_DEV(accel_dev), "Resetting device qat_dev%d\n",
123 accel_dev->accel_id);
124 hw_device->reset_device(accel_dev);
125 pci_restore_state(pdev);
126 pci_save_state(pdev);
127 }
128 }
129
adf_device_reset_worker(struct work_struct * work)130 static void adf_device_reset_worker(struct work_struct *work)
131 {
132 struct adf_reset_dev_data *reset_data =
133 container_of(work, struct adf_reset_dev_data, reset_work);
134 struct adf_accel_dev *accel_dev = reset_data->accel_dev;
135
136 adf_dev_restarting_notify(accel_dev);
137 adf_dev_stop(accel_dev);
138 adf_dev_shutdown(accel_dev);
139 if (adf_dev_init(accel_dev) || adf_dev_start(accel_dev)) {
140 /* The device hanged and we can't restart it so stop here */
141 dev_err(&GET_DEV(accel_dev), "Restart device failed\n");
142 kfree(reset_data);
143 WARN(1, "QAT: device restart failed. Device is unusable\n");
144 return;
145 }
146 adf_dev_restarted_notify(accel_dev);
147 clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
148
149 /* The dev is back alive. Notify the caller if in sync mode */
150 if (reset_data->mode == ADF_DEV_RESET_SYNC)
151 complete(&reset_data->compl);
152 else
153 kfree(reset_data);
154 }
155
adf_dev_aer_schedule_reset(struct adf_accel_dev * accel_dev,enum adf_dev_reset_mode mode)156 static int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev,
157 enum adf_dev_reset_mode mode)
158 {
159 struct adf_reset_dev_data *reset_data;
160
161 if (!adf_dev_started(accel_dev) ||
162 test_bit(ADF_STATUS_RESTARTING, &accel_dev->status))
163 return 0;
164
165 set_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
166 reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL);
167 if (!reset_data)
168 return -ENOMEM;
169 reset_data->accel_dev = accel_dev;
170 init_completion(&reset_data->compl);
171 reset_data->mode = mode;
172 INIT_WORK(&reset_data->reset_work, adf_device_reset_worker);
173 queue_work(device_reset_wq, &reset_data->reset_work);
174
175 /* If in sync mode wait for the result */
176 if (mode == ADF_DEV_RESET_SYNC) {
177 int ret = 0;
178 /* Maximum device reset time is 10 seconds */
179 unsigned long wait_jiffies = msecs_to_jiffies(10000);
180 unsigned long timeout = wait_for_completion_timeout(
181 &reset_data->compl, wait_jiffies);
182 if (!timeout) {
183 dev_err(&GET_DEV(accel_dev),
184 "Reset device timeout expired\n");
185 ret = -EFAULT;
186 }
187 kfree(reset_data);
188 return ret;
189 }
190 return 0;
191 }
192
adf_slot_reset(struct pci_dev * pdev)193 static pci_ers_result_t adf_slot_reset(struct pci_dev *pdev)
194 {
195 struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
196
197 if (!accel_dev) {
198 pr_err("QAT: Can't find acceleration device\n");
199 return PCI_ERS_RESULT_DISCONNECT;
200 }
201 pci_cleanup_aer_uncorrect_error_status(pdev);
202 if (adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_SYNC))
203 return PCI_ERS_RESULT_DISCONNECT;
204
205 return PCI_ERS_RESULT_RECOVERED;
206 }
207
adf_resume(struct pci_dev * pdev)208 static void adf_resume(struct pci_dev *pdev)
209 {
210 dev_info(&pdev->dev, "Acceleration driver reset completed\n");
211 dev_info(&pdev->dev, "Device is up and running\n");
212 }
213
214 static const struct pci_error_handlers adf_err_handler = {
215 .error_detected = adf_error_detected,
216 .slot_reset = adf_slot_reset,
217 .resume = adf_resume,
218 };
219
220 /**
221 * adf_enable_aer() - Enable Advance Error Reporting for acceleration device
222 * @accel_dev: Pointer to acceleration device.
223 * @adf: PCI device driver owning the given acceleration device.
224 *
225 * Function enables PCI Advance Error Reporting for the
226 * QAT acceleration device accel_dev.
227 * To be used by QAT device specific drivers.
228 *
229 * Return: 0 on success, error code otherwise.
230 */
adf_enable_aer(struct adf_accel_dev * accel_dev,struct pci_driver * adf)231 int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf)
232 {
233 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
234
235 adf->err_handler = &adf_err_handler;
236 pci_enable_pcie_error_reporting(pdev);
237 return 0;
238 }
239 EXPORT_SYMBOL_GPL(adf_enable_aer);
240
241 /**
242 * adf_disable_aer() - Enable Advance Error Reporting for acceleration device
243 * @accel_dev: Pointer to acceleration device.
244 *
245 * Function disables PCI Advance Error Reporting for the
246 * QAT acceleration device accel_dev.
247 * To be used by QAT device specific drivers.
248 *
249 * Return: void
250 */
adf_disable_aer(struct adf_accel_dev * accel_dev)251 void adf_disable_aer(struct adf_accel_dev *accel_dev)
252 {
253 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
254
255 pci_disable_pcie_error_reporting(pdev);
256 }
257 EXPORT_SYMBOL_GPL(adf_disable_aer);
258
adf_init_aer(void)259 int adf_init_aer(void)
260 {
261 device_reset_wq = alloc_workqueue("qat_device_reset_wq",
262 WQ_MEM_RECLAIM, 0);
263 return !device_reset_wq ? -EFAULT : 0;
264 }
265
adf_exit_aer(void)266 void adf_exit_aer(void)
267 {
268 if (device_reset_wq)
269 destroy_workqueue(device_reset_wq);
270 device_reset_wq = NULL;
271 }
272
