1 /*
2 * Declarations of procedures and variables shared between files
3 * in arch/ppc/mm/.
4 *
5 * Derived from arch/ppc/mm/init.c:
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 *
8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
10 * Copyright (C) 1996 Paul Mackerras
11 *
12 * Derived from "arch/i386/mm/init.c"
13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 *
20 */
21 #include <linux/mm.h>
22 #include <asm/mmu.h>
23
24 #ifdef CONFIG_PPC_MMU_NOHASH
25
26 /*
27 * On 40x and 8xx, we directly inline tlbia and tlbivax
28 */
29 #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
_tlbil_all(void)30 static inline void _tlbil_all(void)
31 {
32 asm volatile ("sync; tlbia; isync" : : : "memory");
33 }
_tlbil_pid(unsigned int pid)34 static inline void _tlbil_pid(unsigned int pid)
35 {
36 asm volatile ("sync; tlbia; isync" : : : "memory");
37 }
38 #define _tlbil_pid_noind(pid) _tlbil_pid(pid)
39
40 #else /* CONFIG_40x || CONFIG_PPC_8xx */
41 extern void _tlbil_all(void);
42 extern void _tlbil_pid(unsigned int pid);
43 #ifdef CONFIG_PPC_BOOK3E
44 extern void _tlbil_pid_noind(unsigned int pid);
45 #else
46 #define _tlbil_pid_noind(pid) _tlbil_pid(pid)
47 #endif
48 #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
49
50 /*
51 * On 8xx, we directly inline tlbie, on others, it's extern
52 */
53 #ifdef CONFIG_PPC_8xx
_tlbil_va(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)54 static inline void _tlbil_va(unsigned long address, unsigned int pid,
55 unsigned int tsize, unsigned int ind)
56 {
57 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
58 }
59 #elif defined(CONFIG_PPC_BOOK3E)
60 extern void _tlbil_va(unsigned long address, unsigned int pid,
61 unsigned int tsize, unsigned int ind);
62 #else
63 extern void __tlbil_va(unsigned long address, unsigned int pid);
_tlbil_va(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)64 static inline void _tlbil_va(unsigned long address, unsigned int pid,
65 unsigned int tsize, unsigned int ind)
66 {
67 __tlbil_va(address, pid);
68 }
69 #endif /* CONFIG_PPC_8xx */
70
71 #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
72 extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
73 unsigned int tsize, unsigned int ind);
74 #else
_tlbivax_bcast(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)75 static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
76 unsigned int tsize, unsigned int ind)
77 {
78 BUG();
79 }
80 #endif
81
82 #else /* CONFIG_PPC_MMU_NOHASH */
83
84 extern void hash_preload(struct mm_struct *mm, unsigned long ea,
85 unsigned long access, unsigned long trap);
86
87
88 extern void _tlbie(unsigned long address);
89 extern void _tlbia(void);
90
91 #endif /* CONFIG_PPC_MMU_NOHASH */
92
93 #ifdef CONFIG_PPC32
94
95 extern void mapin_ram(void);
96 extern void setbat(int index, unsigned long virt, phys_addr_t phys,
97 unsigned int size, pgprot_t prot);
98
99 extern int __map_without_bats;
100 extern unsigned int rtas_data, rtas_size;
101
102 struct hash_pte;
103 extern struct hash_pte *Hash, *Hash_end;
104 extern unsigned long Hash_size, Hash_mask;
105
106 #endif /* CONFIG_PPC32 */
107
108 extern unsigned long ioremap_bot;
109 extern unsigned long __max_low_memory;
110 extern phys_addr_t __initial_memory_limit_addr;
111 extern phys_addr_t total_memory;
112 extern phys_addr_t total_lowmem;
113 extern phys_addr_t memstart_addr;
114 extern phys_addr_t lowmem_end_addr;
115
116 #ifdef CONFIG_WII
117 extern unsigned long wii_hole_start;
118 extern unsigned long wii_hole_size;
119
120 extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
121 extern void wii_memory_fixups(void);
122 #endif
123
124 /* ...and now those things that may be slightly different between processor
125 * architectures. -- Dan
126 */
127 #ifdef CONFIG_PPC32
128 extern void MMU_init_hw(void);
129 extern unsigned long mmu_mapin_ram(unsigned long top);
130 #endif
131
132 #ifdef CONFIG_PPC_FSL_BOOK3E
133 extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
134 bool dryrun);
135 extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
136 phys_addr_t phys);
137 #ifdef CONFIG_PPC32
138 extern void adjust_total_lowmem(void);
139 extern int switch_to_as1(void);
140 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
141 #endif
142 extern void loadcam_entry(unsigned int index);
143 extern void loadcam_multi(int first_idx, int num, int tmp_idx);
144
145 struct tlbcam {
146 u32 MAS0;
147 u32 MAS1;
148 unsigned long MAS2;
149 u32 MAS3;
150 u32 MAS7;
151 };
152 #endif
153
154 #if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
155 /* 6xx have BATS */
156 /* FSL_BOOKE have TLBCAM */
157 /* 8xx have LTLB */
158 phys_addr_t v_block_mapped(unsigned long va);
159 unsigned long p_block_mapped(phys_addr_t pa);
160 #else
v_block_mapped(unsigned long va)161 static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
p_block_mapped(phys_addr_t pa)162 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
163 #endif
164
