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/Linux-v5.4/drivers/regulator/
Dmc13xxx.h55 #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ argument
73 #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ argument
88 #define MC13xxx_GPO_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ argument
Dtps65090-regulator.c185 #define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _nvolt, _volt, _ops) \ argument
200 #define tps65090_REG_FIXEDV(_id, _sname, en_reg, _en_bits, _volt, _ops) \ argument
203 #define tps65090_REG_SWITCH(_id, _sname, en_reg, _en_bits, _ops) \ argument
Dtps65912-regulator.c30 #define TPS65912_REGULATOR(_name, _id, _of_match, _ops, _vr, _er, _lr) \ argument
Dlp873x-regulator.c22 #define LP873X_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \ argument
Dlp87565-regulator.c14 #define LP87565_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \ argument
Dtps65217-regulator.c30 #define TPS65217_REGULATOR(_name, _id, _of_match, _ops, _n, _vr, _vm, _em, \ argument
Dtps6586x-regulator.c109 #define TPS6586X_REGULATOR(_id, _ops, _pin_name, vdata, vreg, shift, nbits, \ argument
132 #define TPS6586X_REGULATOR_LINEAR(_id, _ops, _pin_name, n_volt, min_uv, \ argument
Dtps65218-regulator.c31 #define TPS65218_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ argument
Dbd9571mwv-regulator.c34 #define BD9571MWV_REG(_name, _of, _id, _ops, _vr, _vm, _nv, _min, _step, _lmin)\ argument
Dmax8997-regulator.c821 #define MAX8997_VOLTAGE_REGULATOR(_name, _ops) {\ argument
829 #define MAX8997_CURRENT_REGULATOR(_name, _ops) {\ argument
Dmcp16502.c86 #define MCP16502_REGULATOR(_name, _id, _ranges, _ops) \ argument
Drk808-regulator.c94 _vmask, _ereg, _emask, _enval, _disval, _etime, _ops) \ argument
132 _enval, _disval, _ops) \ argument
Dltc3589.c221 #define LTC3589_REG(_name, _of_name, _ops, en_bit, dtv1_reg, dtv_mask, go_bit)\ argument
Dltc3676.c195 #define LTC3676_REG(_id, _name, _ops, en_reg, en_bit, dvba_reg, dvb_mask) \ argument
/Linux-v5.4/drivers/clk/mediatek/
Dclk-gate.h47 _ops, _flags) { \ argument
57 #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \ argument
Dclk-mux.h47 _gate, _upd_ofs, _upd, _flags, _ops) { \ argument
/Linux-v5.4/arch/arm/mach-mmp/
Dclock.h33 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ argument
49 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ argument
/Linux-v5.4/include/linux/
Dclk-provider.h901 #define CLK_HW_INIT(_name, _parent, _ops, _flags) \ argument
910 #define CLK_HW_INIT_HW(_name, _parent, _ops, _flags) \ argument
924 #define CLK_HW_INIT_HWS(_name, _parent, _ops, _flags) \ argument
933 #define CLK_HW_INIT_FW_NAME(_name, _parent, _ops, _flags) \ argument
944 #define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \ argument
953 #define CLK_HW_INIT_PARENTS_HW(_name, _parents, _ops, _flags) \ argument
962 #define CLK_HW_INIT_PARENTS_DATA(_name, _parents, _ops, _flags) \ argument
971 #define CLK_HW_INIT_NO_PARENT(_name, _ops, _flags) \ argument
/Linux-v5.4/arch/arm/include/asm/
Dcpuidle.h43 #define CPUIDLE_METHOD_OF_DECLARE(name, _method, _ops) \ argument
Dsmp.h114 #define CPU_METHOD_OF_DECLARE(name, _method, _ops) \ argument
/Linux-v5.4/arch/sh/include/asm/
Dsmp.h73 #define CPU_METHOD_OF_DECLARE(name, _method, _ops) \ argument
/Linux-v5.4/drivers/clk/sprd/
Dgate.h22 _enable_mask, _flags, _gate_flags, _ops) \ argument
/Linux-v5.4/drivers/clk/meson/
Dclk-regmap.h114 #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ argument
/Linux-v5.4/drivers/clk/nxp/
Dclk-lpc18xx-creg.c41 #define CREG_CLK(_name, _emask, _ops) \ argument
/Linux-v5.4/drivers/clk/
Dclk-stm32mp1.c1196 #define _STM32_GATE(_gate_offset, _gate_bit_idx, _gate_flags, _mgate, _ops)\ argument
1230 _div_flags, _div_table, _ops)\ argument
1246 #define _STM32_MUX(_offset, _shift, _width, _mux_flags, _mmux, _ops)\ argument
1413 _mgate, _ops)\ argument
1597 #define _K_MUX(_id, _offset, _shift, _width, _mux_flags, _mmux, _ops)\ argument

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