| /Linux-v5.10/drivers/reset/sti/ |
| D | reset-stih407.c | 18 #define STIH407_PDN_0(_bit) \ argument
20 #define STIH407_PDN_1(_bit) \ argument
22 #define STIH407_PDN_ETH(_bit, _stat) \ argument
57 #define STIH407_SRST_CORE(_reg, _bit) \ argument
60 #define STIH407_SRST_SBC(_reg, _bit) \ argument
63 #define STIH407_SRST_LPM(_reg, _bit) \ argument
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| /Linux-v5.10/drivers/clk/meson/ |
| D | clk-regmap.h | 117 #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ argument
132 #define MESON_PCLK(_name, _reg, _bit, _pname) \ argument
135 #define MESON_PCLK_RO(_name, _reg, _bit, _pname) \ argument
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| D | gxbb-aoclk.c | 23 #define GXBB_AO_GATE(_name, _bit) \ argument
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| D | axg-aoclk.c | 34 #define AXG_AO_GATE(_name, _bit) \ argument
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| D | g12a-aoclk.c | 43 #define AXG_AO_GATE(_name, _reg, _bit) \ argument
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| /Linux-v5.10/drivers/memory/tegra/ |
| D | tegra114.c | 940 #define TEGRA114_MC_RESET(_name, _control, _status, _bit) \ argument
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| D | tegra210.c | 1080 #define TEGRA210_MC_RESET(_name, _control, _status, _bit) \ argument
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| D | tegra30.c | 984 #define TEGRA30_MC_RESET(_name, _control, _status, _bit) \ argument
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| D | tegra124.c | 971 #define TEGRA124_MC_RESET(_name, _control, _status, _bit) \ argument
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| D | tegra20.c | 170 #define TEGRA20_MC_RESET(_name, _control, _status, _reset, _bit) \ argument
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| /Linux-v5.10/arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7366.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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| D | clock-sh7343.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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| D | clock-sh7757.c | 62 #define DIV4(_bit, _mask, _flags) \ argument
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| D | clock-shx3.c | 61 #define DIV4(_bit, _mask, _flags) \ argument
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| D | clock-sh7785.c | 66 #define DIV4(_bit, _mask, _flags) \ argument
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| D | clock-sh7722.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| D | clock-sh7723.c | 111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| D | clock-sh7786.c | 67 #define DIV4(_bit, _mask, _flags) \ argument
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| /Linux-v5.10/drivers/reset/ |
| D | reset-uniphier.c | 28 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
35 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
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| /Linux-v5.10/drivers/clk/mvebu/ |
| D | armada-37xx-periph.c | 128 #define PERIPH_GATE(_name, _bit) \ argument
180 #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
185 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
190 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
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| /Linux-v5.10/arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| D | clock-sh7269.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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| /Linux-v5.10/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt2701.c | 31 #define MTK_PINMUX_SPEC(_pin, _offset, _bit) \ argument
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| /Linux-v5.10/drivers/clk/ |
| D | clk-oxnas.c | 89 #define OXNAS_GATE(_name, _bit, _parents) \ argument
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| /Linux-v5.10/drivers/clk/bcm/ |
| D | clk-kona.h | 99 #define POLICY(_offset, _bit) \ argument
383 #define TRIGGER(_offset, _bit) \ argument
442 #define CCU_LVM_EN(_offset, _bit) \ argument
|
