1/* SPDX-License-Identifier: GPL-2.0 */
2#include <asm/asm-offsets.h>
3#include <asm/thread_info.h>
4
5#define PAGE_SIZE _PAGE_SIZE
6
7/*
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
10 */
11#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12
13#include <asm-generic/vmlinux.lds.h>
14
15#undef mips
16#define mips mips
17OUTPUT_ARCH(mips)
18ENTRY(kernel_entry)
19PHDRS {
20	text PT_LOAD FLAGS(7);	/* RWX */
21#ifndef CONFIG_CAVIUM_OCTEON_SOC
22	note PT_NOTE FLAGS(4);	/* R__ */
23#endif /* CAVIUM_OCTEON_SOC */
24}
25
26#ifdef CONFIG_32BIT
27	#ifdef CONFIG_CPU_LITTLE_ENDIAN
28		jiffies	 = jiffies_64;
29	#else
30		jiffies	 = jiffies_64 + 4;
31	#endif
32#else
33	jiffies	 = jiffies_64;
34#endif
35
36SECTIONS
37{
38#ifdef CONFIG_BOOT_ELF64
39	/* Read-only sections, merged into text segment: */
40	/* . = 0xc000000000000000; */
41
42	/* This is the value for an Origin kernel, taken from an IRIX kernel.  */
43	/* . = 0xc00000000001c000; */
44
45	/* Set the vaddr for the text segment to a value
46	 *   >= 0xa800 0000 0001 9000 if no symmon is going to configured
47	 *   >= 0xa800 0000 0030 0000 otherwise
48	 */
49
50	/* . = 0xa800000000300000; */
51	. = 0xffffffff80300000;
52#endif
53	. = VMLINUX_LOAD_ADDRESS;
54	/* read-only */
55	_text = .;	/* Text and read-only data */
56	.text : {
57		TEXT_TEXT
58		SCHED_TEXT
59		CPUIDLE_TEXT
60		LOCK_TEXT
61		KPROBES_TEXT
62		IRQENTRY_TEXT
63		SOFTIRQENTRY_TEXT
64		*(.text.*)
65		*(.fixup)
66		*(.gnu.warning)
67	} :text = 0
68	_etext = .;	/* End of text section */
69
70	EXCEPTION_TABLE(16)
71
72	/* Exception table for data bus errors */
73	__dbe_table : {
74		__start___dbe_table = .;
75		*(__dbe_table)
76		__stop___dbe_table = .;
77	}
78
79#ifdef CONFIG_CAVIUM_OCTEON_SOC
80#define NOTES_HEADER
81#else /* CONFIG_CAVIUM_OCTEON_SOC */
82#define NOTES_HEADER :note
83#endif /* CONFIG_CAVIUM_OCTEON_SOC */
84	NOTES :text NOTES_HEADER
85	.dummy : { *(.dummy) } :text
86
87	_sdata = .;			/* Start of data section */
88	RODATA
89
90	/* writeable */
91	.data : {	/* Data */
92		. = . + DATAOFFSET;		/* for CONFIG_MAPPED_KERNEL */
93
94		INIT_TASK_DATA(THREAD_SIZE)
95		NOSAVE_DATA
96		CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97		READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
98		DATA_DATA
99		CONSTRUCTORS
100	}
101	BUG_TABLE
102	_gp = . + 0x8000;
103	.lit8 : {
104		*(.lit8)
105	}
106	.lit4 : {
107		*(.lit4)
108	}
109	/* We want the small data sections together, so single-instruction offsets
110	   can access them all, and initialized data all before uninitialized, so
111	   we can shorten the on-disk segment size.  */
112	.sdata : {
113		*(.sdata)
114	}
115	_edata =  .;			/* End of data section */
116
117	/* will be freed after init */
118	. = ALIGN(PAGE_SIZE);		/* Init code and data */
119	__init_begin = .;
120	INIT_TEXT_SECTION(PAGE_SIZE)
121	INIT_DATA_SECTION(16)
122
123	. = ALIGN(4);
124	.mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
125		__mips_machines_start = .;
126		*(.mips.machines.init)
127		__mips_machines_end = .;
128	}
129
130	/* .exit.text is discarded at runtime, not link time, to deal with
131	 * references from .rodata
132	 */
133	.exit.text : {
134		EXIT_TEXT
135	}
136	.exit.data : {
137		EXIT_DATA
138	}
139#ifdef CONFIG_SMP
140	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
141#endif
142
143#ifdef CONFIG_RELOCATABLE
144	. = ALIGN(4);
145
146	.data.reloc : {
147		_relocation_start = .;
148		/*
149		 * Space for relocation table
150		 * This needs to be filled so that the
151		 * relocs tool can overwrite the content.
152		 * An invalid value is left at the start of the
153		 * section to abort relocation if the table
154		 * has not been filled in.
155		 */
156		LONG(0xFFFFFFFF);
157		FILL(0);
158		. += CONFIG_RELOCATION_TABLE_SIZE - 4;
159		_relocation_end = .;
160	}
161#endif
162
163#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
164	__appended_dtb = .;
165	/* leave space for appended DTB */
166	. += 0x100000;
167#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
168	.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
169		*(.appended_dtb)
170		KEEP(*(.appended_dtb))
171	}
172#endif
173	/*
174	 * Align to 64K in attempt to eliminate holes before the
175	 * .bss..swapper_pg_dir section at the start of .bss.  This
176	 * also satisfies PAGE_SIZE alignment as the largest page size
177	 * allowed is 64K.
178	 */
179	. = ALIGN(0x10000);
180	__init_end = .;
181	/* freed after init ends here */
182
183	/*
184	 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
185	 * gets that alignment.	 .sbss should be empty, so there will be
186	 * no holes after __init_end. */
187	BSS_SECTION(0, 0x10000, 8)
188
189	_end = . ;
190
191	/* These mark the ABI of the kernel for debuggers.  */
192	.mdebug.abi32 : {
193		KEEP(*(.mdebug.abi32))
194	}
195	.mdebug.abi64 : {
196		KEEP(*(.mdebug.abi64))
197	}
198
199	/* This is the MIPS specific mdebug section.  */
200	.mdebug : {
201		*(.mdebug)
202	}
203
204	STABS_DEBUG
205	DWARF_DEBUG
206
207	/* These must appear regardless of  .  */
208	.gptab.sdata : {
209		*(.gptab.data)
210		*(.gptab.sdata)
211	}
212	.gptab.sbss : {
213		*(.gptab.bss)
214		*(.gptab.sbss)
215	}
216
217	/* Sections to be discarded */
218	DISCARDS
219	/DISCARD/ : {
220		/* ABI crap starts here */
221		*(.MIPS.abiflags)
222		*(.MIPS.options)
223		*(.options)
224		*(.pdr)
225		*(.reginfo)
226		*(.eh_frame)
227	}
228}
229