1 /*
2 	Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 	Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
4 	Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
5 	<http://rt2x00.serialmonkey.com>
6 
7 	This program is free software; you can redistribute it and/or modify
8 	it under the terms of the GNU General Public License as published by
9 	the Free Software Foundation; either version 2 of the License, or
10 	(at your option) any later version.
11 
12 	This program is distributed in the hope that it will be useful,
13 	but WITHOUT ANY WARRANTY; without even the implied warranty of
14 	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 	GNU General Public License for more details.
16 
17 	You should have received a copy of the GNU General Public License
18 	along with this program; if not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 /*
22 	Module: rt2x00lib
23 	Abstract: rt2x00 queue specific routines.
24  */
25 
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/dma-mapping.h>
30 
31 #include "rt2x00.h"
32 #include "rt2x00lib.h"
33 
rt2x00queue_alloc_rxskb(struct queue_entry * entry,gfp_t gfp)34 struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
35 {
36 	struct data_queue *queue = entry->queue;
37 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
38 	struct sk_buff *skb;
39 	struct skb_frame_desc *skbdesc;
40 	unsigned int frame_size;
41 	unsigned int head_size = 0;
42 	unsigned int tail_size = 0;
43 
44 	/*
45 	 * The frame size includes descriptor size, because the
46 	 * hardware directly receive the frame into the skbuffer.
47 	 */
48 	frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
49 
50 	/*
51 	 * The payload should be aligned to a 4-byte boundary,
52 	 * this means we need at least 3 bytes for moving the frame
53 	 * into the correct offset.
54 	 */
55 	head_size = 4;
56 
57 	/*
58 	 * For IV/EIV/ICV assembly we must make sure there is
59 	 * at least 8 bytes bytes available in headroom for IV/EIV
60 	 * and 8 bytes for ICV data as tailroon.
61 	 */
62 	if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
63 		head_size += 8;
64 		tail_size += 8;
65 	}
66 
67 	/*
68 	 * Allocate skbuffer.
69 	 */
70 	skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
71 	if (!skb)
72 		return NULL;
73 
74 	/*
75 	 * Make sure we not have a frame with the requested bytes
76 	 * available in the head and tail.
77 	 */
78 	skb_reserve(skb, head_size);
79 	skb_put(skb, frame_size);
80 
81 	/*
82 	 * Populate skbdesc.
83 	 */
84 	skbdesc = get_skb_frame_desc(skb);
85 	memset(skbdesc, 0, sizeof(*skbdesc));
86 
87 	if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
88 		dma_addr_t skb_dma;
89 
90 		skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
91 					 DMA_FROM_DEVICE);
92 		if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
93 			dev_kfree_skb_any(skb);
94 			return NULL;
95 		}
96 
97 		skbdesc->skb_dma = skb_dma;
98 		skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
99 	}
100 
101 	return skb;
102 }
103 
rt2x00queue_map_txskb(struct queue_entry * entry)104 int rt2x00queue_map_txskb(struct queue_entry *entry)
105 {
106 	struct device *dev = entry->queue->rt2x00dev->dev;
107 	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
108 
109 	skbdesc->skb_dma =
110 	    dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
111 
112 	if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
113 		return -ENOMEM;
114 
115 	skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
116 	return 0;
117 }
118 EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
119 
rt2x00queue_unmap_skb(struct queue_entry * entry)120 void rt2x00queue_unmap_skb(struct queue_entry *entry)
121 {
122 	struct device *dev = entry->queue->rt2x00dev->dev;
123 	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
124 
125 	if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
126 		dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
127 				 DMA_FROM_DEVICE);
128 		skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
129 	} else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
130 		dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
131 				 DMA_TO_DEVICE);
132 		skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
133 	}
134 }
135 EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
136 
rt2x00queue_free_skb(struct queue_entry * entry)137 void rt2x00queue_free_skb(struct queue_entry *entry)
138 {
139 	if (!entry->skb)
140 		return;
141 
142 	rt2x00queue_unmap_skb(entry);
143 	dev_kfree_skb_any(entry->skb);
144 	entry->skb = NULL;
145 }
146 
rt2x00queue_align_frame(struct sk_buff * skb)147 void rt2x00queue_align_frame(struct sk_buff *skb)
148 {
149 	unsigned int frame_length = skb->len;
150 	unsigned int align = ALIGN_SIZE(skb, 0);
151 
152 	if (!align)
153 		return;
154 
155 	skb_push(skb, align);
156 	memmove(skb->data, skb->data + align, frame_length);
157 	skb_trim(skb, frame_length);
158 }
159 
160 /*
161  * H/W needs L2 padding between the header and the paylod if header size
162  * is not 4 bytes aligned.
163  */
rt2x00queue_insert_l2pad(struct sk_buff * skb,unsigned int hdr_len)164 void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
165 {
166 	unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
167 
168 	if (!l2pad)
169 		return;
170 
171 	skb_push(skb, l2pad);
172 	memmove(skb->data, skb->data + l2pad, hdr_len);
173 }
174 
rt2x00queue_remove_l2pad(struct sk_buff * skb,unsigned int hdr_len)175 void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
176 {
177 	unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
178 
179 	if (!l2pad)
180 		return;
181 
182 	memmove(skb->data + l2pad, skb->data, hdr_len);
183 	skb_pull(skb, l2pad);
184 }
185 
rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev * rt2x00dev,struct sk_buff * skb,struct txentry_desc * txdesc)186 static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
187 						 struct sk_buff *skb,
188 						 struct txentry_desc *txdesc)
189 {
190 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
191 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
192 	struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
193 	u16 seqno;
194 
195 	if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
196 		return;
197 
198 	__set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
199 
200 	if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
201 		/*
202 		 * rt2800 has a H/W (or F/W) bug, device incorrectly increase
203 		 * seqno on retransmited data (non-QOS) frames. To workaround
204 		 * the problem let's generate seqno in software if QOS is
205 		 * disabled.
206 		 */
207 		if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
208 			__clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
209 		else
210 			/* H/W will generate sequence number */
211 			return;
212 	}
213 
214 	/*
215 	 * The hardware is not able to insert a sequence number. Assign a
216 	 * software generated one here.
217 	 *
218 	 * This is wrong because beacons are not getting sequence
219 	 * numbers assigned properly.
220 	 *
221 	 * A secondary problem exists for drivers that cannot toggle
222 	 * sequence counting per-frame, since those will override the
223 	 * sequence counter given by mac80211.
224 	 */
225 	if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
226 		seqno = atomic_add_return(0x10, &intf->seqno);
227 	else
228 		seqno = atomic_read(&intf->seqno);
229 
230 	hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
231 	hdr->seq_ctrl |= cpu_to_le16(seqno);
232 }
233 
rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev * rt2x00dev,struct sk_buff * skb,struct txentry_desc * txdesc,const struct rt2x00_rate * hwrate)234 static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
235 						  struct sk_buff *skb,
236 						  struct txentry_desc *txdesc,
237 						  const struct rt2x00_rate *hwrate)
238 {
239 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
240 	struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
241 	unsigned int data_length;
242 	unsigned int duration;
243 	unsigned int residual;
244 
245 	/*
246 	 * Determine with what IFS priority this frame should be send.
247 	 * Set ifs to IFS_SIFS when the this is not the first fragment,
248 	 * or this fragment came after RTS/CTS.
249 	 */
250 	if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
251 		txdesc->u.plcp.ifs = IFS_BACKOFF;
252 	else
253 		txdesc->u.plcp.ifs = IFS_SIFS;
254 
255 	/* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
256 	data_length = skb->len + 4;
257 	data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
258 
259 	/*
260 	 * PLCP setup
261 	 * Length calculation depends on OFDM/CCK rate.
262 	 */
263 	txdesc->u.plcp.signal = hwrate->plcp;
264 	txdesc->u.plcp.service = 0x04;
265 
266 	if (hwrate->flags & DEV_RATE_OFDM) {
267 		txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
268 		txdesc->u.plcp.length_low = data_length & 0x3f;
269 	} else {
270 		/*
271 		 * Convert length to microseconds.
272 		 */
273 		residual = GET_DURATION_RES(data_length, hwrate->bitrate);
274 		duration = GET_DURATION(data_length, hwrate->bitrate);
275 
276 		if (residual != 0) {
277 			duration++;
278 
279 			/*
280 			 * Check if we need to set the Length Extension
281 			 */
282 			if (hwrate->bitrate == 110 && residual <= 30)
283 				txdesc->u.plcp.service |= 0x80;
284 		}
285 
286 		txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
287 		txdesc->u.plcp.length_low = duration & 0xff;
288 
289 		/*
290 		 * When preamble is enabled we should set the
291 		 * preamble bit for the signal.
292 		 */
293 		if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
294 			txdesc->u.plcp.signal |= 0x08;
295 	}
296 }
297 
rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev * rt2x00dev,struct sk_buff * skb,struct txentry_desc * txdesc,struct ieee80211_sta * sta,const struct rt2x00_rate * hwrate)298 static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
299 						struct sk_buff *skb,
300 						struct txentry_desc *txdesc,
301 						struct ieee80211_sta *sta,
302 						const struct rt2x00_rate *hwrate)
303 {
304 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
305 	struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
306 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
307 	struct rt2x00_sta *sta_priv = NULL;
308 	u8 density = 0;
309 
310 	if (sta) {
311 		sta_priv = sta_to_rt2x00_sta(sta);
312 		txdesc->u.ht.wcid = sta_priv->wcid;
313 		density = sta->ht_cap.ampdu_density;
314 	}
315 
316 	/*
317 	 * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
318 	 * mcs rate to be used
319 	 */
320 	if (txrate->flags & IEEE80211_TX_RC_MCS) {
321 		txdesc->u.ht.mcs = txrate->idx;
322 
323 		/*
324 		 * MIMO PS should be set to 1 for STA's using dynamic SM PS
325 		 * when using more then one tx stream (>MCS7).
326 		 */
327 		if (sta && txdesc->u.ht.mcs > 7 &&
328 		    sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
329 			__set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
330 	} else {
331 		txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
332 		if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
333 			txdesc->u.ht.mcs |= 0x08;
334 	}
335 
336 	if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
337 		if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
338 			txdesc->u.ht.txop = TXOP_SIFS;
339 		else
340 			txdesc->u.ht.txop = TXOP_BACKOFF;
341 
342 		/* Left zero on all other settings. */
343 		return;
344 	}
345 
346 	/*
347 	 * Only one STBC stream is supported for now.
348 	 */
349 	if (tx_info->flags & IEEE80211_TX_CTL_STBC)
350 		txdesc->u.ht.stbc = 1;
351 
352 	/*
353 	 * This frame is eligible for an AMPDU, however, don't aggregate
354 	 * frames that are intended to probe a specific tx rate.
355 	 */
356 	if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
357 	    !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
358 		__set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
359 		txdesc->u.ht.mpdu_density = density;
360 		txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
361 	}
362 
363 	/*
364 	 * Set 40Mhz mode if necessary (for legacy rates this will
365 	 * duplicate the frame to both channels).
366 	 */
367 	if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
368 	    txrate->flags & IEEE80211_TX_RC_DUP_DATA)
369 		__set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
370 	if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
371 		__set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
372 
373 	/*
374 	 * Determine IFS values
375 	 * - Use TXOP_BACKOFF for management frames except beacons
376 	 * - Use TXOP_SIFS for fragment bursts
377 	 * - Use TXOP_HTTXOP for everything else
378 	 *
379 	 * Note: rt2800 devices won't use CTS protection (if used)
380 	 * for frames not transmitted with TXOP_HTTXOP
381 	 */
382 	if (ieee80211_is_mgmt(hdr->frame_control) &&
383 	    !ieee80211_is_beacon(hdr->frame_control))
384 		txdesc->u.ht.txop = TXOP_BACKOFF;
385 	else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
386 		txdesc->u.ht.txop = TXOP_SIFS;
387 	else
388 		txdesc->u.ht.txop = TXOP_HTTXOP;
389 }
390 
rt2x00queue_create_tx_descriptor(struct rt2x00_dev * rt2x00dev,struct sk_buff * skb,struct txentry_desc * txdesc,struct ieee80211_sta * sta)391 static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
392 					     struct sk_buff *skb,
393 					     struct txentry_desc *txdesc,
394 					     struct ieee80211_sta *sta)
395 {
396 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
397 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
398 	struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
399 	struct ieee80211_rate *rate;
400 	const struct rt2x00_rate *hwrate = NULL;
401 
402 	memset(txdesc, 0, sizeof(*txdesc));
403 
404 	/*
405 	 * Header and frame information.
406 	 */
407 	txdesc->length = skb->len;
408 	txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
409 
410 	/*
411 	 * Check whether this frame is to be acked.
412 	 */
413 	if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
414 		__set_bit(ENTRY_TXD_ACK, &txdesc->flags);
415 
416 	/*
417 	 * Check if this is a RTS/CTS frame
418 	 */
419 	if (ieee80211_is_rts(hdr->frame_control) ||
420 	    ieee80211_is_cts(hdr->frame_control)) {
421 		__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
422 		if (ieee80211_is_rts(hdr->frame_control))
423 			__set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
424 		else
425 			__set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
426 		if (tx_info->control.rts_cts_rate_idx >= 0)
427 			rate =
428 			    ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
429 	}
430 
431 	/*
432 	 * Determine retry information.
433 	 */
434 	txdesc->retry_limit = tx_info->control.rates[0].count - 1;
435 	if (txdesc->retry_limit >= rt2x00dev->long_retry)
436 		__set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
437 
438 	/*
439 	 * Check if more fragments are pending
440 	 */
441 	if (ieee80211_has_morefrags(hdr->frame_control)) {
442 		__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
443 		__set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
444 	}
445 
446 	/*
447 	 * Check if more frames (!= fragments) are pending
448 	 */
449 	if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
450 		__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
451 
452 	/*
453 	 * Beacons and probe responses require the tsf timestamp
454 	 * to be inserted into the frame.
455 	 */
456 	if (ieee80211_is_beacon(hdr->frame_control) ||
457 	    ieee80211_is_probe_resp(hdr->frame_control))
458 		__set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
459 
460 	if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
461 	    !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
462 		__set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
463 
464 	/*
465 	 * Determine rate modulation.
466 	 */
467 	if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
468 		txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
469 	else if (txrate->flags & IEEE80211_TX_RC_MCS)
470 		txdesc->rate_mode = RATE_MODE_HT_MIX;
471 	else {
472 		rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
473 		hwrate = rt2x00_get_rate(rate->hw_value);
474 		if (hwrate->flags & DEV_RATE_OFDM)
475 			txdesc->rate_mode = RATE_MODE_OFDM;
476 		else
477 			txdesc->rate_mode = RATE_MODE_CCK;
478 	}
479 
480 	/*
481 	 * Apply TX descriptor handling by components
482 	 */
483 	rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
484 	rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
485 
486 	if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
487 		rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
488 						   sta, hwrate);
489 	else
490 		rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
491 						      hwrate);
492 }
493 
rt2x00queue_write_tx_data(struct queue_entry * entry,struct txentry_desc * txdesc)494 static int rt2x00queue_write_tx_data(struct queue_entry *entry,
495 				     struct txentry_desc *txdesc)
496 {
497 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
498 
499 	/*
500 	 * This should not happen, we already checked the entry
501 	 * was ours. When the hardware disagrees there has been
502 	 * a queue corruption!
503 	 */
504 	if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
505 		     rt2x00dev->ops->lib->get_entry_state(entry))) {
506 		rt2x00_err(rt2x00dev,
507 			   "Corrupt queue %d, accessing entry which is not ours\n"
508 			   "Please file bug report to %s\n",
509 			   entry->queue->qid, DRV_PROJECT);
510 		return -EINVAL;
511 	}
512 
513 	/*
514 	 * Add the requested extra tx headroom in front of the skb.
515 	 */
516 	skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
517 	memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
518 
519 	/*
520 	 * Call the driver's write_tx_data function, if it exists.
521 	 */
522 	if (rt2x00dev->ops->lib->write_tx_data)
523 		rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
524 
525 	/*
526 	 * Map the skb to DMA.
527 	 */
528 	if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
529 	    rt2x00queue_map_txskb(entry))
530 		return -ENOMEM;
531 
532 	return 0;
533 }
534 
rt2x00queue_write_tx_descriptor(struct queue_entry * entry,struct txentry_desc * txdesc)535 static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
536 					    struct txentry_desc *txdesc)
537 {
538 	struct data_queue *queue = entry->queue;
539 
540 	queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
541 
542 	/*
543 	 * All processing on the frame has been completed, this means
544 	 * it is now ready to be dumped to userspace through debugfs.
545 	 */
546 	rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry);
547 }
548 
rt2x00queue_kick_tx_queue(struct data_queue * queue,struct txentry_desc * txdesc)549 static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
550 				      struct txentry_desc *txdesc)
551 {
552 	/*
553 	 * Check if we need to kick the queue, there are however a few rules
554 	 *	1) Don't kick unless this is the last in frame in a burst.
555 	 *	   When the burst flag is set, this frame is always followed
556 	 *	   by another frame which in some way are related to eachother.
557 	 *	   This is true for fragments, RTS or CTS-to-self frames.
558 	 *	2) Rule 1 can be broken when the available entries
559 	 *	   in the queue are less then a certain threshold.
560 	 */
561 	if (rt2x00queue_threshold(queue) ||
562 	    !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
563 		queue->rt2x00dev->ops->lib->kick_queue(queue);
564 }
565 
rt2x00queue_bar_check(struct queue_entry * entry)566 static void rt2x00queue_bar_check(struct queue_entry *entry)
567 {
568 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
569 	struct ieee80211_bar *bar = (void *) (entry->skb->data +
570 				    rt2x00dev->extra_tx_headroom);
571 	struct rt2x00_bar_list_entry *bar_entry;
572 
573 	if (likely(!ieee80211_is_back_req(bar->frame_control)))
574 		return;
575 
576 	bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
577 
578 	/*
579 	 * If the alloc fails we still send the BAR out but just don't track
580 	 * it in our bar list. And as a result we will report it to mac80211
581 	 * back as failed.
582 	 */
583 	if (!bar_entry)
584 		return;
585 
586 	bar_entry->entry = entry;
587 	bar_entry->block_acked = 0;
588 
589 	/*
590 	 * Copy the relevant parts of the 802.11 BAR into out check list
591 	 * such that we can use RCU for less-overhead in the RX path since
592 	 * sending BARs and processing the according BlockAck should be
593 	 * the exception.
594 	 */
595 	memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
596 	memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
597 	bar_entry->control = bar->control;
598 	bar_entry->start_seq_num = bar->start_seq_num;
599 
600 	/*
601 	 * Insert BAR into our BAR check list.
602 	 */
603 	spin_lock_bh(&rt2x00dev->bar_list_lock);
604 	list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
605 	spin_unlock_bh(&rt2x00dev->bar_list_lock);
606 }
607 
rt2x00queue_write_tx_frame(struct data_queue * queue,struct sk_buff * skb,struct ieee80211_sta * sta,bool local)608 int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
609 			       struct ieee80211_sta *sta, bool local)
610 {
611 	struct ieee80211_tx_info *tx_info;
612 	struct queue_entry *entry;
613 	struct txentry_desc txdesc;
614 	struct skb_frame_desc *skbdesc;
615 	u8 rate_idx, rate_flags;
616 	int ret = 0;
617 
618 	/*
619 	 * Copy all TX descriptor information into txdesc,
620 	 * after that we are free to use the skb->cb array
621 	 * for our information.
622 	 */
623 	rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
624 
625 	/*
626 	 * All information is retrieved from the skb->cb array,
627 	 * now we should claim ownership of the driver part of that
628 	 * array, preserving the bitrate index and flags.
629 	 */
630 	tx_info = IEEE80211_SKB_CB(skb);
631 	rate_idx = tx_info->control.rates[0].idx;
632 	rate_flags = tx_info->control.rates[0].flags;
633 	skbdesc = get_skb_frame_desc(skb);
634 	memset(skbdesc, 0, sizeof(*skbdesc));
635 	skbdesc->tx_rate_idx = rate_idx;
636 	skbdesc->tx_rate_flags = rate_flags;
637 
638 	if (local)
639 		skbdesc->flags |= SKBDESC_NOT_MAC80211;
640 
641 	/*
642 	 * When hardware encryption is supported, and this frame
643 	 * is to be encrypted, we should strip the IV/EIV data from
644 	 * the frame so we can provide it to the driver separately.
645 	 */
646 	if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
647 	    !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
648 		if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
649 			rt2x00crypto_tx_copy_iv(skb, &txdesc);
650 		else
651 			rt2x00crypto_tx_remove_iv(skb, &txdesc);
652 	}
653 
654 	/*
655 	 * When DMA allocation is required we should guarantee to the
656 	 * driver that the DMA is aligned to a 4-byte boundary.
657 	 * However some drivers require L2 padding to pad the payload
658 	 * rather then the header. This could be a requirement for
659 	 * PCI and USB devices, while header alignment only is valid
660 	 * for PCI devices.
661 	 */
662 	if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
663 		rt2x00queue_insert_l2pad(skb, txdesc.header_length);
664 	else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
665 		rt2x00queue_align_frame(skb);
666 
667 	/*
668 	 * That function must be called with bh disabled.
669 	 */
670 	spin_lock(&queue->tx_lock);
671 
672 	if (unlikely(rt2x00queue_full(queue))) {
673 		rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
674 			   queue->qid);
675 		ret = -ENOBUFS;
676 		goto out;
677 	}
678 
679 	entry = rt2x00queue_get_entry(queue, Q_INDEX);
680 
681 	if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
682 				      &entry->flags))) {
683 		rt2x00_err(queue->rt2x00dev,
684 			   "Arrived at non-free entry in the non-full queue %d\n"
685 			   "Please file bug report to %s\n",
686 			   queue->qid, DRV_PROJECT);
687 		ret = -EINVAL;
688 		goto out;
689 	}
690 
691 	entry->skb = skb;
692 
693 	/*
694 	 * It could be possible that the queue was corrupted and this
695 	 * call failed. Since we always return NETDEV_TX_OK to mac80211,
696 	 * this frame will simply be dropped.
697 	 */
698 	if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
699 		clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
700 		entry->skb = NULL;
701 		ret = -EIO;
702 		goto out;
703 	}
704 
705 	/*
706 	 * Put BlockAckReqs into our check list for driver BA processing.
707 	 */
708 	rt2x00queue_bar_check(entry);
709 
710 	set_bit(ENTRY_DATA_PENDING, &entry->flags);
711 
712 	rt2x00queue_index_inc(entry, Q_INDEX);
713 	rt2x00queue_write_tx_descriptor(entry, &txdesc);
714 	rt2x00queue_kick_tx_queue(queue, &txdesc);
715 
716 out:
717 	/*
718 	 * Pausing queue has to be serialized with rt2x00lib_txdone(), so we
719 	 * do this under queue->tx_lock. Bottom halve was already disabled
720 	 * before ieee80211_xmit() call.
721 	 */
722 	if (rt2x00queue_threshold(queue))
723 		rt2x00queue_pause_queue(queue);
724 
725 	spin_unlock(&queue->tx_lock);
726 	return ret;
727 }
728 
rt2x00queue_clear_beacon(struct rt2x00_dev * rt2x00dev,struct ieee80211_vif * vif)729 int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
730 			     struct ieee80211_vif *vif)
731 {
732 	struct rt2x00_intf *intf = vif_to_intf(vif);
733 
734 	if (unlikely(!intf->beacon))
735 		return -ENOBUFS;
736 
737 	/*
738 	 * Clean up the beacon skb.
739 	 */
740 	rt2x00queue_free_skb(intf->beacon);
741 
742 	/*
743 	 * Clear beacon (single bssid devices don't need to clear the beacon
744 	 * since the beacon queue will get stopped anyway).
745 	 */
746 	if (rt2x00dev->ops->lib->clear_beacon)
747 		rt2x00dev->ops->lib->clear_beacon(intf->beacon);
748 
749 	return 0;
750 }
751 
rt2x00queue_update_beacon(struct rt2x00_dev * rt2x00dev,struct ieee80211_vif * vif)752 int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
753 			      struct ieee80211_vif *vif)
754 {
755 	struct rt2x00_intf *intf = vif_to_intf(vif);
756 	struct skb_frame_desc *skbdesc;
757 	struct txentry_desc txdesc;
758 
759 	if (unlikely(!intf->beacon))
760 		return -ENOBUFS;
761 
762 	/*
763 	 * Clean up the beacon skb.
764 	 */
765 	rt2x00queue_free_skb(intf->beacon);
766 
767 	intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
768 	if (!intf->beacon->skb)
769 		return -ENOMEM;
770 
771 	/*
772 	 * Copy all TX descriptor information into txdesc,
773 	 * after that we are free to use the skb->cb array
774 	 * for our information.
775 	 */
776 	rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
777 
778 	/*
779 	 * Fill in skb descriptor
780 	 */
781 	skbdesc = get_skb_frame_desc(intf->beacon->skb);
782 	memset(skbdesc, 0, sizeof(*skbdesc));
783 
784 	/*
785 	 * Send beacon to hardware.
786 	 */
787 	rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
788 
789 	return 0;
790 
791 }
792 
rt2x00queue_for_each_entry(struct data_queue * queue,enum queue_index start,enum queue_index end,void * data,bool (* fn)(struct queue_entry * entry,void * data))793 bool rt2x00queue_for_each_entry(struct data_queue *queue,
794 				enum queue_index start,
795 				enum queue_index end,
796 				void *data,
797 				bool (*fn)(struct queue_entry *entry,
798 					   void *data))
799 {
800 	unsigned long irqflags;
801 	unsigned int index_start;
802 	unsigned int index_end;
803 	unsigned int i;
804 
805 	if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
806 		rt2x00_err(queue->rt2x00dev,
807 			   "Entry requested from invalid index range (%d - %d)\n",
808 			   start, end);
809 		return true;
810 	}
811 
812 	/*
813 	 * Only protect the range we are going to loop over,
814 	 * if during our loop a extra entry is set to pending
815 	 * it should not be kicked during this run, since it
816 	 * is part of another TX operation.
817 	 */
818 	spin_lock_irqsave(&queue->index_lock, irqflags);
819 	index_start = queue->index[start];
820 	index_end = queue->index[end];
821 	spin_unlock_irqrestore(&queue->index_lock, irqflags);
822 
823 	/*
824 	 * Start from the TX done pointer, this guarantees that we will
825 	 * send out all frames in the correct order.
826 	 */
827 	if (index_start < index_end) {
828 		for (i = index_start; i < index_end; i++) {
829 			if (fn(&queue->entries[i], data))
830 				return true;
831 		}
832 	} else {
833 		for (i = index_start; i < queue->limit; i++) {
834 			if (fn(&queue->entries[i], data))
835 				return true;
836 		}
837 
838 		for (i = 0; i < index_end; i++) {
839 			if (fn(&queue->entries[i], data))
840 				return true;
841 		}
842 	}
843 
844 	return false;
845 }
846 EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
847 
rt2x00queue_get_entry(struct data_queue * queue,enum queue_index index)848 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
849 					  enum queue_index index)
850 {
851 	struct queue_entry *entry;
852 	unsigned long irqflags;
853 
854 	if (unlikely(index >= Q_INDEX_MAX)) {
855 		rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
856 			   index);
857 		return NULL;
858 	}
859 
860 	spin_lock_irqsave(&queue->index_lock, irqflags);
861 
862 	entry = &queue->entries[queue->index[index]];
863 
864 	spin_unlock_irqrestore(&queue->index_lock, irqflags);
865 
866 	return entry;
867 }
868 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
869 
rt2x00queue_index_inc(struct queue_entry * entry,enum queue_index index)870 void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
871 {
872 	struct data_queue *queue = entry->queue;
873 	unsigned long irqflags;
874 
875 	if (unlikely(index >= Q_INDEX_MAX)) {
876 		rt2x00_err(queue->rt2x00dev,
877 			   "Index change on invalid index type (%d)\n", index);
878 		return;
879 	}
880 
881 	spin_lock_irqsave(&queue->index_lock, irqflags);
882 
883 	queue->index[index]++;
884 	if (queue->index[index] >= queue->limit)
885 		queue->index[index] = 0;
886 
887 	entry->last_action = jiffies;
888 
889 	if (index == Q_INDEX) {
890 		queue->length++;
891 	} else if (index == Q_INDEX_DONE) {
892 		queue->length--;
893 		queue->count++;
894 	}
895 
896 	spin_unlock_irqrestore(&queue->index_lock, irqflags);
897 }
898 
rt2x00queue_pause_queue_nocheck(struct data_queue * queue)899 static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
900 {
901 	switch (queue->qid) {
902 	case QID_AC_VO:
903 	case QID_AC_VI:
904 	case QID_AC_BE:
905 	case QID_AC_BK:
906 		/*
907 		 * For TX queues, we have to disable the queue
908 		 * inside mac80211.
909 		 */
910 		ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
911 		break;
912 	default:
913 		break;
914 	}
915 }
rt2x00queue_pause_queue(struct data_queue * queue)916 void rt2x00queue_pause_queue(struct data_queue *queue)
917 {
918 	if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
919 	    !test_bit(QUEUE_STARTED, &queue->flags) ||
920 	    test_and_set_bit(QUEUE_PAUSED, &queue->flags))
921 		return;
922 
923 	rt2x00queue_pause_queue_nocheck(queue);
924 }
925 EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
926 
rt2x00queue_unpause_queue(struct data_queue * queue)927 void rt2x00queue_unpause_queue(struct data_queue *queue)
928 {
929 	if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
930 	    !test_bit(QUEUE_STARTED, &queue->flags) ||
931 	    !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
932 		return;
933 
934 	switch (queue->qid) {
935 	case QID_AC_VO:
936 	case QID_AC_VI:
937 	case QID_AC_BE:
938 	case QID_AC_BK:
939 		/*
940 		 * For TX queues, we have to enable the queue
941 		 * inside mac80211.
942 		 */
943 		ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
944 		break;
945 	case QID_RX:
946 		/*
947 		 * For RX we need to kick the queue now in order to
948 		 * receive frames.
949 		 */
950 		queue->rt2x00dev->ops->lib->kick_queue(queue);
951 	default:
952 		break;
953 	}
954 }
955 EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
956 
rt2x00queue_start_queue(struct data_queue * queue)957 void rt2x00queue_start_queue(struct data_queue *queue)
958 {
959 	mutex_lock(&queue->status_lock);
960 
961 	if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
962 	    test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
963 		mutex_unlock(&queue->status_lock);
964 		return;
965 	}
966 
967 	set_bit(QUEUE_PAUSED, &queue->flags);
968 
969 	queue->rt2x00dev->ops->lib->start_queue(queue);
970 
971 	rt2x00queue_unpause_queue(queue);
972 
973 	mutex_unlock(&queue->status_lock);
974 }
975 EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
976 
rt2x00queue_stop_queue(struct data_queue * queue)977 void rt2x00queue_stop_queue(struct data_queue *queue)
978 {
979 	mutex_lock(&queue->status_lock);
980 
981 	if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
982 		mutex_unlock(&queue->status_lock);
983 		return;
984 	}
985 
986 	rt2x00queue_pause_queue_nocheck(queue);
987 
988 	queue->rt2x00dev->ops->lib->stop_queue(queue);
989 
990 	mutex_unlock(&queue->status_lock);
991 }
992 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
993 
rt2x00queue_flush_queue(struct data_queue * queue,bool drop)994 void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
995 {
996 	bool tx_queue =
997 		(queue->qid == QID_AC_VO) ||
998 		(queue->qid == QID_AC_VI) ||
999 		(queue->qid == QID_AC_BE) ||
1000 		(queue->qid == QID_AC_BK);
1001 
1002 	if (rt2x00queue_empty(queue))
1003 		return;
1004 
1005 	/*
1006 	 * If we are not supposed to drop any pending
1007 	 * frames, this means we must force a start (=kick)
1008 	 * to the queue to make sure the hardware will
1009 	 * start transmitting.
1010 	 */
1011 	if (!drop && tx_queue)
1012 		queue->rt2x00dev->ops->lib->kick_queue(queue);
1013 
1014 	/*
1015 	 * Check if driver supports flushing, if that is the case we can
1016 	 * defer the flushing to the driver. Otherwise we must use the
1017 	 * alternative which just waits for the queue to become empty.
1018 	 */
1019 	if (likely(queue->rt2x00dev->ops->lib->flush_queue))
1020 		queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
1021 
1022 	/*
1023 	 * The queue flush has failed...
1024 	 */
1025 	if (unlikely(!rt2x00queue_empty(queue)))
1026 		rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
1027 			    queue->qid);
1028 }
1029 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
1030 
rt2x00queue_start_queues(struct rt2x00_dev * rt2x00dev)1031 void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
1032 {
1033 	struct data_queue *queue;
1034 
1035 	/*
1036 	 * rt2x00queue_start_queue will call ieee80211_wake_queue
1037 	 * for each queue after is has been properly initialized.
1038 	 */
1039 	tx_queue_for_each(rt2x00dev, queue)
1040 		rt2x00queue_start_queue(queue);
1041 
1042 	rt2x00queue_start_queue(rt2x00dev->rx);
1043 }
1044 EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
1045 
rt2x00queue_stop_queues(struct rt2x00_dev * rt2x00dev)1046 void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
1047 {
1048 	struct data_queue *queue;
1049 
1050 	/*
1051 	 * rt2x00queue_stop_queue will call ieee80211_stop_queue
1052 	 * as well, but we are completely shutting doing everything
1053 	 * now, so it is much safer to stop all TX queues at once,
1054 	 * and use rt2x00queue_stop_queue for cleaning up.
1055 	 */
1056 	ieee80211_stop_queues(rt2x00dev->hw);
1057 
1058 	tx_queue_for_each(rt2x00dev, queue)
1059 		rt2x00queue_stop_queue(queue);
1060 
1061 	rt2x00queue_stop_queue(rt2x00dev->rx);
1062 }
1063 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
1064 
rt2x00queue_flush_queues(struct rt2x00_dev * rt2x00dev,bool drop)1065 void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
1066 {
1067 	struct data_queue *queue;
1068 
1069 	tx_queue_for_each(rt2x00dev, queue)
1070 		rt2x00queue_flush_queue(queue, drop);
1071 
1072 	rt2x00queue_flush_queue(rt2x00dev->rx, drop);
1073 }
1074 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
1075 
rt2x00queue_reset(struct data_queue * queue)1076 static void rt2x00queue_reset(struct data_queue *queue)
1077 {
1078 	unsigned long irqflags;
1079 	unsigned int i;
1080 
1081 	spin_lock_irqsave(&queue->index_lock, irqflags);
1082 
1083 	queue->count = 0;
1084 	queue->length = 0;
1085 
1086 	for (i = 0; i < Q_INDEX_MAX; i++)
1087 		queue->index[i] = 0;
1088 
1089 	spin_unlock_irqrestore(&queue->index_lock, irqflags);
1090 }
1091 
rt2x00queue_init_queues(struct rt2x00_dev * rt2x00dev)1092 void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
1093 {
1094 	struct data_queue *queue;
1095 	unsigned int i;
1096 
1097 	queue_for_each(rt2x00dev, queue) {
1098 		rt2x00queue_reset(queue);
1099 
1100 		for (i = 0; i < queue->limit; i++)
1101 			rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
1102 	}
1103 }
1104 
rt2x00queue_alloc_entries(struct data_queue * queue)1105 static int rt2x00queue_alloc_entries(struct data_queue *queue)
1106 {
1107 	struct queue_entry *entries;
1108 	unsigned int entry_size;
1109 	unsigned int i;
1110 
1111 	rt2x00queue_reset(queue);
1112 
1113 	/*
1114 	 * Allocate all queue entries.
1115 	 */
1116 	entry_size = sizeof(*entries) + queue->priv_size;
1117 	entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
1118 	if (!entries)
1119 		return -ENOMEM;
1120 
1121 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
1122 	(((char *)(__base)) + ((__limit) * (__esize)) + \
1123 	    ((__index) * (__psize)))
1124 
1125 	for (i = 0; i < queue->limit; i++) {
1126 		entries[i].flags = 0;
1127 		entries[i].queue = queue;
1128 		entries[i].skb = NULL;
1129 		entries[i].entry_idx = i;
1130 		entries[i].priv_data =
1131 		    QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
1132 					    sizeof(*entries), queue->priv_size);
1133 	}
1134 
1135 #undef QUEUE_ENTRY_PRIV_OFFSET
1136 
1137 	queue->entries = entries;
1138 
1139 	return 0;
1140 }
1141 
rt2x00queue_free_skbs(struct data_queue * queue)1142 static void rt2x00queue_free_skbs(struct data_queue *queue)
1143 {
1144 	unsigned int i;
1145 
1146 	if (!queue->entries)
1147 		return;
1148 
1149 	for (i = 0; i < queue->limit; i++) {
1150 		rt2x00queue_free_skb(&queue->entries[i]);
1151 	}
1152 }
1153 
rt2x00queue_alloc_rxskbs(struct data_queue * queue)1154 static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
1155 {
1156 	unsigned int i;
1157 	struct sk_buff *skb;
1158 
1159 	for (i = 0; i < queue->limit; i++) {
1160 		skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
1161 		if (!skb)
1162 			return -ENOMEM;
1163 		queue->entries[i].skb = skb;
1164 	}
1165 
1166 	return 0;
1167 }
1168 
rt2x00queue_initialize(struct rt2x00_dev * rt2x00dev)1169 int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
1170 {
1171 	struct data_queue *queue;
1172 	int status;
1173 
1174 	status = rt2x00queue_alloc_entries(rt2x00dev->rx);
1175 	if (status)
1176 		goto exit;
1177 
1178 	tx_queue_for_each(rt2x00dev, queue) {
1179 		status = rt2x00queue_alloc_entries(queue);
1180 		if (status)
1181 			goto exit;
1182 	}
1183 
1184 	status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
1185 	if (status)
1186 		goto exit;
1187 
1188 	if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
1189 		status = rt2x00queue_alloc_entries(rt2x00dev->atim);
1190 		if (status)
1191 			goto exit;
1192 	}
1193 
1194 	status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
1195 	if (status)
1196 		goto exit;
1197 
1198 	return 0;
1199 
1200 exit:
1201 	rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
1202 
1203 	rt2x00queue_uninitialize(rt2x00dev);
1204 
1205 	return status;
1206 }
1207 
rt2x00queue_uninitialize(struct rt2x00_dev * rt2x00dev)1208 void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1209 {
1210 	struct data_queue *queue;
1211 
1212 	rt2x00queue_free_skbs(rt2x00dev->rx);
1213 
1214 	queue_for_each(rt2x00dev, queue) {
1215 		kfree(queue->entries);
1216 		queue->entries = NULL;
1217 	}
1218 }
1219 
rt2x00queue_init(struct rt2x00_dev * rt2x00dev,struct data_queue * queue,enum data_queue_qid qid)1220 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1221 			     struct data_queue *queue, enum data_queue_qid qid)
1222 {
1223 	mutex_init(&queue->status_lock);
1224 	spin_lock_init(&queue->tx_lock);
1225 	spin_lock_init(&queue->index_lock);
1226 
1227 	queue->rt2x00dev = rt2x00dev;
1228 	queue->qid = qid;
1229 	queue->txop = 0;
1230 	queue->aifs = 2;
1231 	queue->cw_min = 5;
1232 	queue->cw_max = 10;
1233 
1234 	rt2x00dev->ops->queue_init(queue);
1235 
1236 	queue->threshold = DIV_ROUND_UP(queue->limit, 10);
1237 }
1238 
rt2x00queue_allocate(struct rt2x00_dev * rt2x00dev)1239 int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1240 {
1241 	struct data_queue *queue;
1242 	enum data_queue_qid qid;
1243 	unsigned int req_atim =
1244 	    rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
1245 
1246 	/*
1247 	 * We need the following queues:
1248 	 * RX: 1
1249 	 * TX: ops->tx_queues
1250 	 * Beacon: 1
1251 	 * Atim: 1 (if required)
1252 	 */
1253 	rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
1254 
1255 	queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
1256 	if (!queue)
1257 		return -ENOMEM;
1258 
1259 	/*
1260 	 * Initialize pointers
1261 	 */
1262 	rt2x00dev->rx = queue;
1263 	rt2x00dev->tx = &queue[1];
1264 	rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
1265 	rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
1266 
1267 	/*
1268 	 * Initialize queue parameters.
1269 	 * RX: qid = QID_RX
1270 	 * TX: qid = QID_AC_VO + index
1271 	 * TX: cw_min: 2^5 = 32.
1272 	 * TX: cw_max: 2^10 = 1024.
1273 	 * BCN: qid = QID_BEACON
1274 	 * ATIM: qid = QID_ATIM
1275 	 */
1276 	rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
1277 
1278 	qid = QID_AC_VO;
1279 	tx_queue_for_each(rt2x00dev, queue)
1280 		rt2x00queue_init(rt2x00dev, queue, qid++);
1281 
1282 	rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
1283 	if (req_atim)
1284 		rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
1285 
1286 	return 0;
1287 }
1288 
rt2x00queue_free(struct rt2x00_dev * rt2x00dev)1289 void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1290 {
1291 	kfree(rt2x00dev->rx);
1292 	rt2x00dev->rx = NULL;
1293 	rt2x00dev->tx = NULL;
1294 	rt2x00dev->bcn = NULL;
1295 }
1296