1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6 #ifndef ATH11K_WMI_H
7 #define ATH11K_WMI_H
8
9 #include <net/mac80211.h>
10 #include "htc.h"
11
12 struct ath11k_base;
13 struct ath11k;
14 struct ath11k_fw_stats;
15
16 #define PSOC_HOST_MAX_NUM_SS (8)
17
18 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
19 #define MAX_HE_NSS 8
20 #define MAX_HE_MODULATION 8
21 #define MAX_HE_RU 4
22 #define HE_MODULATION_NONE 7
23 #define HE_PET_0_USEC 0
24 #define HE_PET_8_USEC 1
25 #define HE_PET_16_USEC 2
26
27 #define WMI_MAX_CHAINS 8
28
29 #define WMI_MAX_NUM_SS MAX_HE_NSS
30 #define WMI_MAX_NUM_RU MAX_HE_RU
31
32 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
33 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
34 #define WMI_TLV_CMD_UNSUPPORTED 0
35 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
36 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
37
38 struct wmi_cmd_hdr {
39 u32 cmd_id;
40 } __packed;
41
42 struct wmi_tlv {
43 u32 header;
44 u8 value[];
45 } __packed;
46
47 #define WMI_TLV_LEN GENMASK(15, 0)
48 #define WMI_TLV_TAG GENMASK(31, 16)
49 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header)
50
51 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0)
52 #define WMI_MAX_MEM_REQS 32
53 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5
54
55 #define WLAN_SCAN_MAX_HINT_S_SSID 10
56 #define WLAN_SCAN_MAX_HINT_BSSID 10
57 #define MAX_RNR_BSS 5
58
59 #define WLAN_SCAN_MAX_HINT_S_SSID 10
60 #define WLAN_SCAN_MAX_HINT_BSSID 10
61 #define MAX_RNR_BSS 5
62
63 #define WLAN_SCAN_PARAMS_MAX_SSID 16
64 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
66
67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
68
69 #define WMI_BA_MODE_BUFFER_SIZE_256 3
70 /*
71 * HW mode config type replicated from FW header
72 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
73 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
74 * one in 2G and another in 5G.
75 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
76 * same band; no tx allowed.
77 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
78 * Support for both PHYs within one band is planned
79 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
80 * but could be extended to other bands in the future.
81 * The separation of the band between the two PHYs needs
82 * to be communicated separately.
83 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
84 * as in WMI_HW_MODE_SBS, and 3rd on the other band
85 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
86 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
87 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
88 */
89 enum wmi_host_hw_mode_config_type {
90 WMI_HOST_HW_MODE_SINGLE = 0,
91 WMI_HOST_HW_MODE_DBS = 1,
92 WMI_HOST_HW_MODE_SBS_PASSIVE = 2,
93 WMI_HOST_HW_MODE_SBS = 3,
94 WMI_HOST_HW_MODE_DBS_SBS = 4,
95 WMI_HOST_HW_MODE_DBS_OR_SBS = 5,
96
97 /* keep last */
98 WMI_HOST_HW_MODE_MAX
99 };
100
101 /* HW mode priority values used to detect the preferred HW mode
102 * on the available modes.
103 */
104 enum wmi_host_hw_mode_priority {
105 WMI_HOST_HW_MODE_DBS_SBS_PRI,
106 WMI_HOST_HW_MODE_DBS_PRI,
107 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
108 WMI_HOST_HW_MODE_SBS_PRI,
109 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
110 WMI_HOST_HW_MODE_SINGLE_PRI,
111
112 /* keep last the lowest priority */
113 WMI_HOST_HW_MODE_MAX_PRI
114 };
115
116 enum {
117 WMI_HOST_WLAN_2G_CAP = 0x1,
118 WMI_HOST_WLAN_5G_CAP = 0x2,
119 WMI_HOST_WLAN_2G_5G_CAP = 0x3,
120 };
121
122 /*
123 * wmi command groups.
124 */
125 enum wmi_cmd_group {
126 /* 0 to 2 are reserved */
127 WMI_GRP_START = 0x3,
128 WMI_GRP_SCAN = WMI_GRP_START,
129 WMI_GRP_PDEV = 0x4,
130 WMI_GRP_VDEV = 0x5,
131 WMI_GRP_PEER = 0x6,
132 WMI_GRP_MGMT = 0x7,
133 WMI_GRP_BA_NEG = 0x8,
134 WMI_GRP_STA_PS = 0x9,
135 WMI_GRP_DFS = 0xa,
136 WMI_GRP_ROAM = 0xb,
137 WMI_GRP_OFL_SCAN = 0xc,
138 WMI_GRP_P2P = 0xd,
139 WMI_GRP_AP_PS = 0xe,
140 WMI_GRP_RATE_CTRL = 0xf,
141 WMI_GRP_PROFILE = 0x10,
142 WMI_GRP_SUSPEND = 0x11,
143 WMI_GRP_BCN_FILTER = 0x12,
144 WMI_GRP_WOW = 0x13,
145 WMI_GRP_RTT = 0x14,
146 WMI_GRP_SPECTRAL = 0x15,
147 WMI_GRP_STATS = 0x16,
148 WMI_GRP_ARP_NS_OFL = 0x17,
149 WMI_GRP_NLO_OFL = 0x18,
150 WMI_GRP_GTK_OFL = 0x19,
151 WMI_GRP_CSA_OFL = 0x1a,
152 WMI_GRP_CHATTER = 0x1b,
153 WMI_GRP_TID_ADDBA = 0x1c,
154 WMI_GRP_MISC = 0x1d,
155 WMI_GRP_GPIO = 0x1e,
156 WMI_GRP_FWTEST = 0x1f,
157 WMI_GRP_TDLS = 0x20,
158 WMI_GRP_RESMGR = 0x21,
159 WMI_GRP_STA_SMPS = 0x22,
160 WMI_GRP_WLAN_HB = 0x23,
161 WMI_GRP_RMC = 0x24,
162 WMI_GRP_MHF_OFL = 0x25,
163 WMI_GRP_LOCATION_SCAN = 0x26,
164 WMI_GRP_OEM = 0x27,
165 WMI_GRP_NAN = 0x28,
166 WMI_GRP_COEX = 0x29,
167 WMI_GRP_OBSS_OFL = 0x2a,
168 WMI_GRP_LPI = 0x2b,
169 WMI_GRP_EXTSCAN = 0x2c,
170 WMI_GRP_DHCP_OFL = 0x2d,
171 WMI_GRP_IPA = 0x2e,
172 WMI_GRP_MDNS_OFL = 0x2f,
173 WMI_GRP_SAP_OFL = 0x30,
174 WMI_GRP_OCB = 0x31,
175 WMI_GRP_SOC = 0x32,
176 WMI_GRP_PKT_FILTER = 0x33,
177 WMI_GRP_MAWC = 0x34,
178 WMI_GRP_PMF_OFFLOAD = 0x35,
179 WMI_GRP_BPF_OFFLOAD = 0x36,
180 WMI_GRP_NAN_DATA = 0x37,
181 WMI_GRP_PROTOTYPE = 0x38,
182 WMI_GRP_MONITOR = 0x39,
183 WMI_GRP_REGULATORY = 0x3a,
184 WMI_GRP_HW_DATA_FILTER = 0x3b,
185 WMI_GRP_WLM = 0x3c,
186 WMI_GRP_11K_OFFLOAD = 0x3d,
187 WMI_GRP_TWT = 0x3e,
188 WMI_GRP_MOTION_DET = 0x3f,
189 WMI_GRP_SPATIAL_REUSE = 0x40,
190 };
191
192 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
193 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
194
195 #define WMI_CMD_UNSUPPORTED 0
196
197 enum wmi_tlv_cmd_id {
198 WMI_INIT_CMDID = 0x1,
199 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
200 WMI_STOP_SCAN_CMDID,
201 WMI_SCAN_CHAN_LIST_CMDID,
202 WMI_SCAN_SCH_PRIO_TBL_CMDID,
203 WMI_SCAN_UPDATE_REQUEST_CMDID,
204 WMI_SCAN_PROB_REQ_OUI_CMDID,
205 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
206 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
207 WMI_PDEV_SET_CHANNEL_CMDID,
208 WMI_PDEV_SET_PARAM_CMDID,
209 WMI_PDEV_PKTLOG_ENABLE_CMDID,
210 WMI_PDEV_PKTLOG_DISABLE_CMDID,
211 WMI_PDEV_SET_WMM_PARAMS_CMDID,
212 WMI_PDEV_SET_HT_CAP_IE_CMDID,
213 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
214 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
215 WMI_PDEV_SET_QUIET_MODE_CMDID,
216 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
217 WMI_PDEV_GET_TPC_CONFIG_CMDID,
218 WMI_PDEV_SET_BASE_MACADDR_CMDID,
219 WMI_PDEV_DUMP_CMDID,
220 WMI_PDEV_SET_LED_CONFIG_CMDID,
221 WMI_PDEV_GET_TEMPERATURE_CMDID,
222 WMI_PDEV_SET_LED_FLASHING_CMDID,
223 WMI_PDEV_SMART_ANT_ENABLE_CMDID,
224 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
225 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
226 WMI_PDEV_SET_CTL_TABLE_CMDID,
227 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
228 WMI_PDEV_FIPS_CMDID,
229 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
230 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
231 WMI_PDEV_GET_NFCAL_POWER_CMDID,
232 WMI_PDEV_GET_TPC_CMDID,
233 WMI_MIB_STATS_ENABLE_CMDID,
234 WMI_PDEV_SET_PCL_CMDID,
235 WMI_PDEV_SET_HW_MODE_CMDID,
236 WMI_PDEV_SET_MAC_CONFIG_CMDID,
237 WMI_PDEV_SET_ANTENNA_MODE_CMDID,
238 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
239 WMI_PDEV_WAL_POWER_DEBUG_CMDID,
240 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
241 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
242 WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
243 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
244 WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
245 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
246 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
247 WMI_PDEV_CHECK_CAL_VERSION_CMDID,
248 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
249 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
250 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
251 WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
252 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
253 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
254 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
255 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
256 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
257 WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
258 WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
259 WMI_PDEV_PKTLOG_FILTER_CMDID,
260 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
261 WMI_VDEV_DELETE_CMDID,
262 WMI_VDEV_START_REQUEST_CMDID,
263 WMI_VDEV_RESTART_REQUEST_CMDID,
264 WMI_VDEV_UP_CMDID,
265 WMI_VDEV_STOP_CMDID,
266 WMI_VDEV_DOWN_CMDID,
267 WMI_VDEV_SET_PARAM_CMDID,
268 WMI_VDEV_INSTALL_KEY_CMDID,
269 WMI_VDEV_WNM_SLEEPMODE_CMDID,
270 WMI_VDEV_WMM_ADDTS_CMDID,
271 WMI_VDEV_WMM_DELTS_CMDID,
272 WMI_VDEV_SET_WMM_PARAMS_CMDID,
273 WMI_VDEV_SET_GTX_PARAMS_CMDID,
274 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
275 WMI_VDEV_PLMREQ_START_CMDID,
276 WMI_VDEV_PLMREQ_STOP_CMDID,
277 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
278 WMI_VDEV_SET_IE_CMDID,
279 WMI_VDEV_RATEMASK_CMDID,
280 WMI_VDEV_ATF_REQUEST_CMDID,
281 WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
282 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
283 WMI_VDEV_SET_QUIET_MODE_CMDID,
284 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
285 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
286 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
287 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
288 WMI_PEER_DELETE_CMDID,
289 WMI_PEER_FLUSH_TIDS_CMDID,
290 WMI_PEER_SET_PARAM_CMDID,
291 WMI_PEER_ASSOC_CMDID,
292 WMI_PEER_ADD_WDS_ENTRY_CMDID,
293 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
294 WMI_PEER_MCAST_GROUP_CMDID,
295 WMI_PEER_INFO_REQ_CMDID,
296 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
297 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
298 WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
299 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
300 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
301 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
302 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
303 WMI_PEER_ATF_REQUEST_CMDID,
304 WMI_PEER_BWF_REQUEST_CMDID,
305 WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
306 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
307 WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
308 WMI_PEER_ANTDIV_INFO_REQ_CMDID,
309 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
310 WMI_PDEV_SEND_BCN_CMDID,
311 WMI_BCN_TMPL_CMDID,
312 WMI_BCN_FILTER_RX_CMDID,
313 WMI_PRB_REQ_FILTER_RX_CMDID,
314 WMI_MGMT_TX_CMDID,
315 WMI_PRB_TMPL_CMDID,
316 WMI_MGMT_TX_SEND_CMDID,
317 WMI_OFFCHAN_DATA_TX_SEND_CMDID,
318 WMI_PDEV_SEND_FD_CMDID,
319 WMI_BCN_OFFLOAD_CTRL_CMDID,
320 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
321 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
322 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
323 WMI_ADDBA_SEND_CMDID,
324 WMI_ADDBA_STATUS_CMDID,
325 WMI_DELBA_SEND_CMDID,
326 WMI_ADDBA_SET_RESP_CMDID,
327 WMI_SEND_SINGLEAMSDU_CMDID,
328 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
329 WMI_STA_POWERSAVE_PARAM_CMDID,
330 WMI_STA_MIMO_PS_MODE_CMDID,
331 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
332 WMI_PDEV_DFS_DISABLE_CMDID,
333 WMI_DFS_PHYERR_FILTER_ENA_CMDID,
334 WMI_DFS_PHYERR_FILTER_DIS_CMDID,
335 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
336 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
337 WMI_VDEV_ADFS_CH_CFG_CMDID,
338 WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
339 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
340 WMI_ROAM_SCAN_RSSI_THRESHOLD,
341 WMI_ROAM_SCAN_PERIOD,
342 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
343 WMI_ROAM_AP_PROFILE,
344 WMI_ROAM_CHAN_LIST,
345 WMI_ROAM_SCAN_CMD,
346 WMI_ROAM_SYNCH_COMPLETE,
347 WMI_ROAM_SET_RIC_REQUEST_CMDID,
348 WMI_ROAM_INVOKE_CMDID,
349 WMI_ROAM_FILTER_CMDID,
350 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
351 WMI_ROAM_CONFIGURE_MAWC_CMDID,
352 WMI_ROAM_SET_MBO_PARAM_CMDID,
353 WMI_ROAM_PER_CONFIG_CMDID,
354 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
355 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
356 WMI_OFL_SCAN_PERIOD,
357 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
358 WMI_P2P_DEV_SET_DISCOVERABILITY,
359 WMI_P2P_GO_SET_BEACON_IE,
360 WMI_P2P_GO_SET_PROBE_RESP_IE,
361 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
362 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
363 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
364 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
365 WMI_P2P_SET_OPPPS_PARAM_CMDID,
366 WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
367 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
368 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
369 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
370 WMI_AP_PS_EGAP_PARAM_CMDID,
371 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
372 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
373 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
374 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
375 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
376 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
377 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
378 WMI_PDEV_RESUME_CMDID,
379 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
380 WMI_RMV_BCN_FILTER_CMDID,
381 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
382 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
383 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
384 WMI_WOW_ENABLE_CMDID,
385 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
386 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
387 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
388 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
389 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
390 WMI_D0_WOW_ENABLE_DISABLE_CMDID,
391 WMI_EXTWOW_ENABLE_CMDID,
392 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
393 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
394 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
395 WMI_WOW_UDP_SVC_OFLD_CMDID,
396 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
397 WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
398 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
399 WMI_RTT_TSF_CMDID,
400 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
401 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
402 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
403 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
404 WMI_REQUEST_STATS_EXT_CMDID,
405 WMI_REQUEST_LINK_STATS_CMDID,
406 WMI_START_LINK_STATS_CMDID,
407 WMI_CLEAR_LINK_STATS_CMDID,
408 WMI_GET_FW_MEM_DUMP_CMDID,
409 WMI_DEBUG_MESG_FLUSH_CMDID,
410 WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
411 WMI_REQUEST_WLAN_STATS_CMDID,
412 WMI_REQUEST_RCPI_CMDID,
413 WMI_REQUEST_PEER_STATS_INFO_CMDID,
414 WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
415 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
416 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
417 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
418 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
419 WMI_APFIND_CMDID,
420 WMI_PASSPOINT_LIST_CONFIG_CMDID,
421 WMI_NLO_CONFIGURE_MAWC_CMDID,
422 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
423 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
424 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
425 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
426 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
427 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
428 WMI_CHATTER_COALESCING_QUERY_CMDID,
429 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
430 WMI_PEER_TID_DELBA_CMDID,
431 WMI_STA_DTIM_PS_METHOD_CMDID,
432 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
433 WMI_STA_KEEPALIVE_CMDID,
434 WMI_BA_REQ_SSN_CMDID,
435 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
436 WMI_PDEV_UTF_CMDID,
437 WMI_DBGLOG_CFG_CMDID,
438 WMI_PDEV_QVIT_CMDID,
439 WMI_PDEV_FTM_INTG_CMDID,
440 WMI_VDEV_SET_KEEPALIVE_CMDID,
441 WMI_VDEV_GET_KEEPALIVE_CMDID,
442 WMI_FORCE_FW_HANG_CMDID,
443 WMI_SET_MCASTBCAST_FILTER_CMDID,
444 WMI_THERMAL_MGMT_CMDID,
445 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
446 WMI_TPC_CHAINMASK_CONFIG_CMDID,
447 WMI_SET_ANTENNA_DIVERSITY_CMDID,
448 WMI_OCB_SET_SCHED_CMDID,
449 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
450 WMI_LRO_CONFIG_CMDID,
451 WMI_TRANSFER_DATA_TO_FLASH_CMDID,
452 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
453 WMI_VDEV_WISA_CMDID,
454 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
455 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
456 WMI_READ_DATA_FROM_FLASH_CMDID,
457 WMI_THERM_THROT_SET_CONF_CMDID,
458 WMI_RUNTIME_DPD_RECAL_CMDID,
459 WMI_GET_TPC_POWER_CMDID,
460 WMI_IDLE_TRIGGER_MONITOR_CMDID,
461 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
462 WMI_GPIO_OUTPUT_CMDID,
463 WMI_TXBF_CMDID,
464 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
465 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
466 WMI_UNIT_TEST_CMDID,
467 WMI_FWTEST_CMDID,
468 WMI_QBOOST_CFG_CMDID,
469 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
470 WMI_TDLS_PEER_UPDATE_CMDID,
471 WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
472 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
473 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
474 WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
475 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
476 WMI_STA_SMPS_PARAM_CMDID,
477 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
478 WMI_HB_SET_TCP_PARAMS_CMDID,
479 WMI_HB_SET_TCP_PKT_FILTER_CMDID,
480 WMI_HB_SET_UDP_PARAMS_CMDID,
481 WMI_HB_SET_UDP_PKT_FILTER_CMDID,
482 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
483 WMI_RMC_SET_ACTION_PERIOD_CMDID,
484 WMI_RMC_CONFIG_CMDID,
485 WMI_RMC_SET_MANUAL_LEADER_CMDID,
486 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
487 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
488 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
489 WMI_BATCH_SCAN_DISABLE_CMDID,
490 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
491 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
492 WMI_OEM_REQUEST_CMDID,
493 WMI_LPI_OEM_REQ_CMDID,
494 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
495 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
496 WMI_CHAN_AVOID_UPDATE_CMDID,
497 WMI_COEX_CONFIG_CMDID,
498 WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
499 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
500 WMI_SAR_LIMITS_CMDID,
501 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
502 WMI_OBSS_SCAN_DISABLE_CMDID,
503 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
504 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
505 WMI_LPI_START_SCAN_CMDID,
506 WMI_LPI_STOP_SCAN_CMDID,
507 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
508 WMI_EXTSCAN_STOP_CMDID,
509 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
510 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
511 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
512 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
513 WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
514 WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
515 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
516 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
517 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
518 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
519 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
520 WMI_MDNS_SET_FQDN_CMDID,
521 WMI_MDNS_SET_RESPONSE_CMDID,
522 WMI_MDNS_GET_STATS_CMDID,
523 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
524 WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
525 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
526 WMI_OCB_SET_UTC_TIME_CMDID,
527 WMI_OCB_START_TIMING_ADVERT_CMDID,
528 WMI_OCB_STOP_TIMING_ADVERT_CMDID,
529 WMI_OCB_GET_TSF_TIMER_CMDID,
530 WMI_DCC_GET_STATS_CMDID,
531 WMI_DCC_CLEAR_STATS_CMDID,
532 WMI_DCC_UPDATE_NDL_CMDID,
533 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
534 WMI_SOC_SET_HW_MODE_CMDID,
535 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
536 WMI_SOC_SET_ANTENNA_MODE_CMDID,
537 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
538 WMI_PACKET_FILTER_ENABLE_CMDID,
539 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
540 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
541 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
542 WMI_BPF_GET_VDEV_STATS_CMDID,
543 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
544 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
545 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
546 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
547 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
548 WMI_11D_SCAN_START_CMDID,
549 WMI_11D_SCAN_STOP_CMDID,
550 WMI_SET_INIT_COUNTRY_CMDID,
551 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
552 WMI_NDP_INITIATOR_REQ_CMDID,
553 WMI_NDP_RESPONDER_REQ_CMDID,
554 WMI_NDP_END_REQ_CMDID,
555 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
556 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
557 WMI_TWT_DISABLE_CMDID,
558 WMI_TWT_ADD_DIALOG_CMDID,
559 WMI_TWT_DEL_DIALOG_CMDID,
560 WMI_TWT_PAUSE_DIALOG_CMDID,
561 WMI_TWT_RESUME_DIALOG_CMDID,
562 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
563 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
564 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
565 };
566
567 enum wmi_tlv_event_id {
568 WMI_SERVICE_READY_EVENTID = 0x1,
569 WMI_READY_EVENTID,
570 WMI_SERVICE_AVAILABLE_EVENTID,
571 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
572 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
573 WMI_CHAN_INFO_EVENTID,
574 WMI_PHYERR_EVENTID,
575 WMI_PDEV_DUMP_EVENTID,
576 WMI_TX_PAUSE_EVENTID,
577 WMI_DFS_RADAR_EVENTID,
578 WMI_PDEV_L1SS_TRACK_EVENTID,
579 WMI_PDEV_TEMPERATURE_EVENTID,
580 WMI_SERVICE_READY_EXT_EVENTID,
581 WMI_PDEV_FIPS_EVENTID,
582 WMI_PDEV_CHANNEL_HOPPING_EVENTID,
583 WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
584 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
585 WMI_PDEV_TPC_EVENTID,
586 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
587 WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
588 WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
589 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
590 WMI_PDEV_ANTDIV_STATUS_EVENTID,
591 WMI_PDEV_CHIP_POWER_STATS_EVENTID,
592 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
593 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
594 WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
595 WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
596 WMI_PDEV_BSS_CHAN_INFO_EVENTID,
597 WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
598 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
599 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
600 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
601 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
602 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
603 WMI_PDEV_RAP_INFO_EVENTID,
604 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
605 WMI_SERVICE_READY_EXT2_EVENTID,
606 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
607 WMI_VDEV_STOPPED_EVENTID,
608 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
609 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
610 WMI_VDEV_TSF_REPORT_EVENTID,
611 WMI_VDEV_DELETE_RESP_EVENTID,
612 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
613 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
614 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
615 WMI_PEER_INFO_EVENTID,
616 WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
617 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
618 WMI_PEER_STATE_EVENTID,
619 WMI_PEER_ASSOC_CONF_EVENTID,
620 WMI_PEER_DELETE_RESP_EVENTID,
621 WMI_PEER_RATECODE_LIST_EVENTID,
622 WMI_WDS_PEER_EVENTID,
623 WMI_PEER_STA_PS_STATECHG_EVENTID,
624 WMI_PEER_ANTDIV_INFO_EVENTID,
625 WMI_PEER_RESERVED0_EVENTID,
626 WMI_PEER_RESERVED1_EVENTID,
627 WMI_PEER_RESERVED2_EVENTID,
628 WMI_PEER_RESERVED3_EVENTID,
629 WMI_PEER_RESERVED4_EVENTID,
630 WMI_PEER_RESERVED5_EVENTID,
631 WMI_PEER_RESERVED6_EVENTID,
632 WMI_PEER_RESERVED7_EVENTID,
633 WMI_PEER_RESERVED8_EVENTID,
634 WMI_PEER_RESERVED9_EVENTID,
635 WMI_PEER_RESERVED10_EVENTID,
636 WMI_PEER_OPER_MODE_CHANGE_EVENTID,
637 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
638 WMI_HOST_SWBA_EVENTID,
639 WMI_TBTTOFFSET_UPDATE_EVENTID,
640 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
641 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
642 WMI_MGMT_TX_COMPLETION_EVENTID,
643 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
644 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
645 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
646 WMI_TX_ADDBA_COMPLETE_EVENTID,
647 WMI_BA_RSP_SSN_EVENTID,
648 WMI_AGGR_STATE_TRIG_EVENTID,
649 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
650 WMI_PROFILE_MATCH,
651 WMI_ROAM_SYNCH_EVENTID,
652 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
653 WMI_P2P_NOA_EVENTID,
654 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
655 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
656 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
657 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
658 WMI_D0_WOW_DISABLE_ACK_EVENTID,
659 WMI_WOW_INITIAL_WAKEUP_EVENTID,
660 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
661 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
662 WMI_RTT_ERROR_REPORT_EVENTID,
663 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
664 WMI_IFACE_LINK_STATS_EVENTID,
665 WMI_PEER_LINK_STATS_EVENTID,
666 WMI_RADIO_LINK_STATS_EVENTID,
667 WMI_UPDATE_FW_MEM_DUMP_EVENTID,
668 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
669 WMI_INST_RSSI_STATS_EVENTID,
670 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
671 WMI_REPORT_STATS_EVENTID,
672 WMI_UPDATE_RCPI_EVENTID,
673 WMI_PEER_STATS_INFO_EVENTID,
674 WMI_RADIO_CHAN_STATS_EVENTID,
675 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
676 WMI_NLO_SCAN_COMPLETE_EVENTID,
677 WMI_APFIND_EVENTID,
678 WMI_PASSPOINT_MATCH_EVENTID,
679 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
680 WMI_GTK_REKEY_FAIL_EVENTID,
681 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
682 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
683 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
684 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
685 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
686 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
687 WMI_PDEV_UTF_EVENTID,
688 WMI_DEBUG_MESG_EVENTID,
689 WMI_UPDATE_STATS_EVENTID,
690 WMI_DEBUG_PRINT_EVENTID,
691 WMI_DCS_INTERFERENCE_EVENTID,
692 WMI_PDEV_QVIT_EVENTID,
693 WMI_WLAN_PROFILE_DATA_EVENTID,
694 WMI_PDEV_FTM_INTG_EVENTID,
695 WMI_WLAN_FREQ_AVOID_EVENTID,
696 WMI_VDEV_GET_KEEPALIVE_EVENTID,
697 WMI_THERMAL_MGMT_EVENTID,
698 WMI_DIAG_DATA_CONTAINER_EVENTID,
699 WMI_HOST_AUTO_SHUTDOWN_EVENTID,
700 WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
701 WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
702 WMI_DIAG_EVENTID,
703 WMI_OCB_SET_SCHED_EVENTID,
704 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
705 WMI_RSSI_BREACH_EVENTID,
706 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
707 WMI_PDEV_UTF_SCPC_EVENTID,
708 WMI_READ_DATA_FROM_FLASH_EVENTID,
709 WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
710 WMI_PKGID_EVENTID,
711 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
712 WMI_UPLOADH_EVENTID,
713 WMI_CAPTUREH_EVENTID,
714 WMI_RFKILL_STATE_CHANGE_EVENTID,
715 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
716 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
717 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
718 WMI_BATCH_SCAN_RESULT_EVENTID,
719 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
720 WMI_OEM_MEASUREMENT_REPORT_EVENTID,
721 WMI_OEM_ERROR_REPORT_EVENTID,
722 WMI_OEM_RESPONSE_EVENTID,
723 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
724 WMI_NAN_DISC_IFACE_CREATED_EVENTID,
725 WMI_NAN_DISC_IFACE_DELETED_EVENTID,
726 WMI_NAN_STARTED_CLUSTER_EVENTID,
727 WMI_NAN_JOINED_CLUSTER_EVENTID,
728 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
729 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
730 WMI_LPI_STATUS_EVENTID,
731 WMI_LPI_HANDOFF_EVENTID,
732 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
733 WMI_EXTSCAN_OPERATION_EVENTID,
734 WMI_EXTSCAN_TABLE_USAGE_EVENTID,
735 WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
736 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
737 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
738 WMI_EXTSCAN_CAPABILITIES_EVENTID,
739 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
740 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
741 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
742 WMI_SAP_OFL_DEL_STA_EVENTID,
743 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
744 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
745 WMI_DCC_GET_STATS_RESP_EVENTID,
746 WMI_DCC_UPDATE_NDL_RESP_EVENTID,
747 WMI_DCC_STATS_EVENTID,
748 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
749 WMI_SOC_HW_MODE_TRANSITION_EVENTID,
750 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
751 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
752 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
753 WMI_BPF_VDEV_STATS_INFO_EVENTID,
754 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
755 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
756 WMI_11D_NEW_COUNTRY_EVENTID,
757 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
758 WMI_NDP_INITIATOR_RSP_EVENTID,
759 WMI_NDP_RESPONDER_RSP_EVENTID,
760 WMI_NDP_END_RSP_EVENTID,
761 WMI_NDP_INDICATION_EVENTID,
762 WMI_NDP_CONFIRM_EVENTID,
763 WMI_NDP_END_INDICATION_EVENTID,
764
765 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
766 WMI_TWT_DISABLE_EVENTID,
767 WMI_TWT_ADD_DIALOG_EVENTID,
768 WMI_TWT_DEL_DIALOG_EVENTID,
769 WMI_TWT_PAUSE_DIALOG_EVENTID,
770 WMI_TWT_RESUME_DIALOG_EVENTID,
771 };
772
773 enum wmi_tlv_pdev_param {
774 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
775 WMI_PDEV_PARAM_RX_CHAIN_MASK,
776 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
777 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
778 WMI_PDEV_PARAM_TXPOWER_SCALE,
779 WMI_PDEV_PARAM_BEACON_GEN_MODE,
780 WMI_PDEV_PARAM_BEACON_TX_MODE,
781 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
782 WMI_PDEV_PARAM_PROTECTION_MODE,
783 WMI_PDEV_PARAM_DYNAMIC_BW,
784 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
785 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
786 WMI_PDEV_PARAM_STA_KICKOUT_TH,
787 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
788 WMI_PDEV_PARAM_LTR_ENABLE,
789 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
790 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
791 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
792 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
793 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
794 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
795 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
796 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
797 WMI_PDEV_PARAM_L1SS_ENABLE,
798 WMI_PDEV_PARAM_DSLEEP_ENABLE,
799 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
800 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
801 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
802 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
803 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
804 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
805 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
806 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
807 WMI_PDEV_PARAM_PMF_QOS,
808 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
809 WMI_PDEV_PARAM_DCS,
810 WMI_PDEV_PARAM_ANI_ENABLE,
811 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
812 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
813 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
814 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
815 WMI_PDEV_PARAM_DYNTXCHAIN,
816 WMI_PDEV_PARAM_PROXY_STA,
817 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
818 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
819 WMI_PDEV_PARAM_RFKILL_ENABLE,
820 WMI_PDEV_PARAM_BURST_DUR,
821 WMI_PDEV_PARAM_BURST_ENABLE,
822 WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
823 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
824 WMI_PDEV_PARAM_L1SS_TRACK,
825 WMI_PDEV_PARAM_HYST_EN,
826 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
827 WMI_PDEV_PARAM_LED_SYS_STATE,
828 WMI_PDEV_PARAM_LED_ENABLE,
829 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
830 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
831 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
832 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
833 WMI_PDEV_PARAM_CTS_CBW,
834 WMI_PDEV_PARAM_WNTS_CONFIG,
835 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
836 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
837 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
838 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
839 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
840 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
841 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
842 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
843 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
844 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
845 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
846 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
847 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
848 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
849 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
850 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
851 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
852 WMI_PDEV_PARAM_TXPOWER_DECR_DB,
853 WMI_PDEV_PARAM_AGGR_BURST,
854 WMI_PDEV_PARAM_RX_DECAP_MODE,
855 WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
856 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
857 WMI_PDEV_PARAM_ANTENNA_GAIN,
858 WMI_PDEV_PARAM_RX_FILTER,
859 WMI_PDEV_SET_MCAST_TO_UCAST_TID,
860 WMI_PDEV_PARAM_PROXY_STA_MODE,
861 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
862 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
863 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
864 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
865 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
866 WMI_PDEV_PARAM_BLOCK_INTERBSS,
867 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
868 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
869 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
870 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
871 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
872 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
873 WMI_PDEV_PARAM_EN_STATS,
874 WMI_PDEV_PARAM_MU_GROUP_POLICY,
875 WMI_PDEV_PARAM_NOISE_DETECTION,
876 WMI_PDEV_PARAM_NOISE_THRESHOLD,
877 WMI_PDEV_PARAM_DPD_ENABLE,
878 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
879 WMI_PDEV_PARAM_ATF_STRICT_SCH,
880 WMI_PDEV_PARAM_ATF_SCHED_DURATION,
881 WMI_PDEV_PARAM_ANT_PLZN,
882 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
883 WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
884 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
885 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
886 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
887 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
888 WMI_PDEV_PARAM_CCA_THRESHOLD,
889 WMI_PDEV_PARAM_RTS_FIXED_RATE,
890 WMI_PDEV_PARAM_PDEV_RESET,
891 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
892 WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
893 WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
894 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
895 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
896 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
897 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
898 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
899 WMI_PDEV_PARAM_PROPAGATION_DELAY,
900 WMI_PDEV_PARAM_ENA_ANT_DIV,
901 WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
902 WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
903 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
904 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
905 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
906 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
907 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
908 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
909 WMI_PDEV_PARAM_TX_SCH_DELAY,
910 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
911 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
912 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
913 WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
914 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
915 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
916 WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
917 };
918
919 enum wmi_tlv_vdev_param {
920 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
921 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
922 WMI_VDEV_PARAM_BEACON_INTERVAL,
923 WMI_VDEV_PARAM_LISTEN_INTERVAL,
924 WMI_VDEV_PARAM_MULTICAST_RATE,
925 WMI_VDEV_PARAM_MGMT_TX_RATE,
926 WMI_VDEV_PARAM_SLOT_TIME,
927 WMI_VDEV_PARAM_PREAMBLE,
928 WMI_VDEV_PARAM_SWBA_TIME,
929 WMI_VDEV_STATS_UPDATE_PERIOD,
930 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
931 WMI_VDEV_HOST_SWBA_INTERVAL,
932 WMI_VDEV_PARAM_DTIM_PERIOD,
933 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
934 WMI_VDEV_PARAM_WDS,
935 WMI_VDEV_PARAM_ATIM_WINDOW,
936 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
937 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
938 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
939 WMI_VDEV_PARAM_FEATURE_WMM,
940 WMI_VDEV_PARAM_CHWIDTH,
941 WMI_VDEV_PARAM_CHEXTOFFSET,
942 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
943 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
944 WMI_VDEV_PARAM_MGMT_RATE,
945 WMI_VDEV_PARAM_PROTECTION_MODE,
946 WMI_VDEV_PARAM_FIXED_RATE,
947 WMI_VDEV_PARAM_SGI,
948 WMI_VDEV_PARAM_LDPC,
949 WMI_VDEV_PARAM_TX_STBC,
950 WMI_VDEV_PARAM_RX_STBC,
951 WMI_VDEV_PARAM_INTRA_BSS_FWD,
952 WMI_VDEV_PARAM_DEF_KEYID,
953 WMI_VDEV_PARAM_NSS,
954 WMI_VDEV_PARAM_BCAST_DATA_RATE,
955 WMI_VDEV_PARAM_MCAST_DATA_RATE,
956 WMI_VDEV_PARAM_MCAST_INDICATE,
957 WMI_VDEV_PARAM_DHCP_INDICATE,
958 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
959 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
960 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
961 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
962 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
963 WMI_VDEV_PARAM_ENABLE_RTSCTS,
964 WMI_VDEV_PARAM_TXBF,
965 WMI_VDEV_PARAM_PACKET_POWERSAVE,
966 WMI_VDEV_PARAM_DROP_UNENCRY,
967 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
968 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
969 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
970 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
971 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
972 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
973 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
974 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
975 WMI_VDEV_PARAM_TX_PWRLIMIT,
976 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
977 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
978 WMI_VDEV_PARAM_ENABLE_RMC,
979 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
980 WMI_VDEV_PARAM_MAX_RATE,
981 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
982 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
983 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
984 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
985 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
986 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
987 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
988 WMI_VDEV_PARAM_INACTIVITY_CNT,
989 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
990 WMI_VDEV_PARAM_DTIM_POLICY,
991 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
992 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
993 WMI_VDEV_PARAM_RX_LEAK_WINDOW,
994 WMI_VDEV_PARAM_STATS_AVG_FACTOR,
995 WMI_VDEV_PARAM_DISCONNECT_TH,
996 WMI_VDEV_PARAM_RTSCTS_RATE,
997 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
998 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
999 WMI_VDEV_PARAM_TXPOWER_SCALE,
1000 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1001 WMI_VDEV_PARAM_MCAST2UCAST_SET,
1002 WMI_VDEV_PARAM_RC_NUM_RETRIES,
1003 WMI_VDEV_PARAM_CABQ_MAXDUR,
1004 WMI_VDEV_PARAM_MFPTEST_SET,
1005 WMI_VDEV_PARAM_RTS_FIXED_RATE,
1006 WMI_VDEV_PARAM_VHT_SGIMASK,
1007 WMI_VDEV_PARAM_VHT80_RATEMASK,
1008 WMI_VDEV_PARAM_PROXY_STA,
1009 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1010 WMI_VDEV_PARAM_RX_DECAP_TYPE,
1011 WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1012 WMI_VDEV_PARAM_SENSOR_AP,
1013 WMI_VDEV_PARAM_BEACON_RATE,
1014 WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1015 WMI_VDEV_PARAM_STA_KICKOUT,
1016 WMI_VDEV_PARAM_CAPABILITIES,
1017 WMI_VDEV_PARAM_TSF_INCREMENT,
1018 WMI_VDEV_PARAM_AMPDU_PER_AC,
1019 WMI_VDEV_PARAM_RX_FILTER,
1020 WMI_VDEV_PARAM_MGMT_TX_POWER,
1021 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1022 WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1023 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1024 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1025 WMI_VDEV_PARAM_HE_DCM,
1026 WMI_VDEV_PARAM_HE_RANGE_EXT,
1027 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1028 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1029 WMI_VDEV_PARAM_BA_MODE = 0x7e,
1030 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1031 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1032 WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1033 WMI_VDEV_PARAM_BSS_COLOR,
1034 WMI_VDEV_PARAM_SET_HEMU_MODE,
1035 WMI_VDEV_PARAM_TX_OFDMA_CPLEN,
1036 };
1037
1038 enum wmi_tlv_peer_flags {
1039 WMI_TLV_PEER_AUTH = 0x00000001,
1040 WMI_TLV_PEER_QOS = 0x00000002,
1041 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
1042 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
1043 WMI_TLV_PEER_APSD = 0x00000800,
1044 WMI_TLV_PEER_HT = 0x00001000,
1045 WMI_TLV_PEER_40MHZ = 0x00002000,
1046 WMI_TLV_PEER_STBC = 0x00008000,
1047 WMI_TLV_PEER_LDPC = 0x00010000,
1048 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
1049 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
1050 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
1051 WMI_TLV_PEER_VHT = 0x02000000,
1052 WMI_TLV_PEER_80MHZ = 0x04000000,
1053 WMI_TLV_PEER_PMF = 0x08000000,
1054 WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1055 WMI_PEER_160MHZ = 0x40000000,
1056 WMI_PEER_SAFEMODE_EN = 0x80000000,
1057
1058 };
1059
1060 /** Enum list of TLV Tags for each parameter structure type. */
1061 enum wmi_tlv_tag {
1062 WMI_TAG_LAST_RESERVED = 15,
1063 WMI_TAG_FIRST_ARRAY_ENUM,
1064 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1065 WMI_TAG_ARRAY_BYTE,
1066 WMI_TAG_ARRAY_STRUCT,
1067 WMI_TAG_ARRAY_FIXED_STRUCT,
1068 WMI_TAG_LAST_ARRAY_ENUM = 31,
1069 WMI_TAG_SERVICE_READY_EVENT,
1070 WMI_TAG_HAL_REG_CAPABILITIES,
1071 WMI_TAG_WLAN_HOST_MEM_REQ,
1072 WMI_TAG_READY_EVENT,
1073 WMI_TAG_SCAN_EVENT,
1074 WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1075 WMI_TAG_CHAN_INFO_EVENT,
1076 WMI_TAG_COMB_PHYERR_RX_HDR,
1077 WMI_TAG_VDEV_START_RESPONSE_EVENT,
1078 WMI_TAG_VDEV_STOPPED_EVENT,
1079 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1080 WMI_TAG_PEER_STA_KICKOUT_EVENT,
1081 WMI_TAG_MGMT_RX_HDR,
1082 WMI_TAG_TBTT_OFFSET_EVENT,
1083 WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1084 WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1085 WMI_TAG_ROAM_EVENT,
1086 WMI_TAG_WOW_EVENT_INFO,
1087 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1088 WMI_TAG_RTT_EVENT_HEADER,
1089 WMI_TAG_RTT_ERROR_REPORT_EVENT,
1090 WMI_TAG_RTT_MEAS_EVENT,
1091 WMI_TAG_ECHO_EVENT,
1092 WMI_TAG_FTM_INTG_EVENT,
1093 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1094 WMI_TAG_GPIO_INPUT_EVENT,
1095 WMI_TAG_CSA_EVENT,
1096 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1097 WMI_TAG_IGTK_INFO,
1098 WMI_TAG_DCS_INTERFERENCE_EVENT,
1099 WMI_TAG_ATH_DCS_CW_INT,
1100 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1101 WMI_TAG_ATH_DCS_CW_INT,
1102 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1103 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1104 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1105 WMI_TAG_WLAN_PROFILE_CTX_T,
1106 WMI_TAG_WLAN_PROFILE_T,
1107 WMI_TAG_PDEV_QVIT_EVENT,
1108 WMI_TAG_HOST_SWBA_EVENT,
1109 WMI_TAG_TIM_INFO,
1110 WMI_TAG_P2P_NOA_INFO,
1111 WMI_TAG_STATS_EVENT,
1112 WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1113 WMI_TAG_AVOID_FREQ_RANGE_DESC,
1114 WMI_TAG_GTK_REKEY_FAIL_EVENT,
1115 WMI_TAG_INIT_CMD,
1116 WMI_TAG_RESOURCE_CONFIG,
1117 WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1118 WMI_TAG_START_SCAN_CMD,
1119 WMI_TAG_STOP_SCAN_CMD,
1120 WMI_TAG_SCAN_CHAN_LIST_CMD,
1121 WMI_TAG_CHANNEL,
1122 WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1123 WMI_TAG_PDEV_SET_PARAM_CMD,
1124 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1125 WMI_TAG_WMM_PARAMS,
1126 WMI_TAG_PDEV_SET_QUIET_CMD,
1127 WMI_TAG_VDEV_CREATE_CMD,
1128 WMI_TAG_VDEV_DELETE_CMD,
1129 WMI_TAG_VDEV_START_REQUEST_CMD,
1130 WMI_TAG_P2P_NOA_DESCRIPTOR,
1131 WMI_TAG_P2P_GO_SET_BEACON_IE,
1132 WMI_TAG_GTK_OFFLOAD_CMD,
1133 WMI_TAG_VDEV_UP_CMD,
1134 WMI_TAG_VDEV_STOP_CMD,
1135 WMI_TAG_VDEV_DOWN_CMD,
1136 WMI_TAG_VDEV_SET_PARAM_CMD,
1137 WMI_TAG_VDEV_INSTALL_KEY_CMD,
1138 WMI_TAG_PEER_CREATE_CMD,
1139 WMI_TAG_PEER_DELETE_CMD,
1140 WMI_TAG_PEER_FLUSH_TIDS_CMD,
1141 WMI_TAG_PEER_SET_PARAM_CMD,
1142 WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1143 WMI_TAG_VHT_RATE_SET,
1144 WMI_TAG_BCN_TMPL_CMD,
1145 WMI_TAG_PRB_TMPL_CMD,
1146 WMI_TAG_BCN_PRB_INFO,
1147 WMI_TAG_PEER_TID_ADDBA_CMD,
1148 WMI_TAG_PEER_TID_DELBA_CMD,
1149 WMI_TAG_STA_POWERSAVE_MODE_CMD,
1150 WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1151 WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1152 WMI_TAG_ROAM_SCAN_MODE,
1153 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1154 WMI_TAG_ROAM_SCAN_PERIOD,
1155 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1156 WMI_TAG_PDEV_SUSPEND_CMD,
1157 WMI_TAG_PDEV_RESUME_CMD,
1158 WMI_TAG_ADD_BCN_FILTER_CMD,
1159 WMI_TAG_RMV_BCN_FILTER_CMD,
1160 WMI_TAG_WOW_ENABLE_CMD,
1161 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1162 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1163 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1164 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1165 WMI_TAG_ARP_OFFLOAD_TUPLE,
1166 WMI_TAG_NS_OFFLOAD_TUPLE,
1167 WMI_TAG_FTM_INTG_CMD,
1168 WMI_TAG_STA_KEEPALIVE_CMD,
1169 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
1170 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1171 WMI_TAG_AP_PS_PEER_CMD,
1172 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1173 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1174 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1175 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1176 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1177 WMI_TAG_WOW_DEL_PATTERN_CMD,
1178 WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1179 WMI_TAG_RTT_MEASREQ_HEAD,
1180 WMI_TAG_RTT_MEASREQ_BODY,
1181 WMI_TAG_RTT_TSF_CMD,
1182 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1183 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1184 WMI_TAG_REQUEST_STATS_CMD,
1185 WMI_TAG_NLO_CONFIG_CMD,
1186 WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1187 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1188 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1189 WMI_TAG_CHATTER_SET_MODE_CMD,
1190 WMI_TAG_ECHO_CMD,
1191 WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1192 WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1193 WMI_TAG_FORCE_FW_HANG_CMD,
1194 WMI_TAG_GPIO_CONFIG_CMD,
1195 WMI_TAG_GPIO_OUTPUT_CMD,
1196 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1197 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1198 WMI_TAG_BCN_TX_HDR,
1199 WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1200 WMI_TAG_MGMT_TX_HDR,
1201 WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1202 WMI_TAG_ADDBA_SEND_CMD,
1203 WMI_TAG_DELBA_SEND_CMD,
1204 WMI_TAG_ADDBA_SETRESPONSE_CMD,
1205 WMI_TAG_SEND_SINGLEAMSDU_CMD,
1206 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1207 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1208 WMI_TAG_PDEV_SET_HT_IE_CMD,
1209 WMI_TAG_PDEV_SET_VHT_IE_CMD,
1210 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1211 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1212 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1213 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1214 WMI_TAG_PEER_MCAST_GROUP_CMD,
1215 WMI_TAG_ROAM_AP_PROFILE,
1216 WMI_TAG_AP_PROFILE,
1217 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1218 WMI_TAG_PDEV_DFS_ENABLE_CMD,
1219 WMI_TAG_PDEV_DFS_DISABLE_CMD,
1220 WMI_TAG_WOW_ADD_PATTERN_CMD,
1221 WMI_TAG_WOW_BITMAP_PATTERN_T,
1222 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1223 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1224 WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1225 WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1226 WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1227 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1228 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1229 WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1230 WMI_TAG_TXBF_CMD,
1231 WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1232 WMI_TAG_NLO_EVENT,
1233 WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1234 WMI_TAG_UPLOAD_H_HDR,
1235 WMI_TAG_CAPTURE_H_EVENT_HDR,
1236 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1237 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1238 WMI_TAG_VDEV_WMM_ADDTS_CMD,
1239 WMI_TAG_VDEV_WMM_DELTS_CMD,
1240 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1241 WMI_TAG_TDLS_SET_STATE_CMD,
1242 WMI_TAG_TDLS_PEER_UPDATE_CMD,
1243 WMI_TAG_TDLS_PEER_EVENT,
1244 WMI_TAG_TDLS_PEER_CAPABILITIES,
1245 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1246 WMI_TAG_ROAM_CHAN_LIST,
1247 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1248 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1249 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1250 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1251 WMI_TAG_BA_REQ_SSN_CMD,
1252 WMI_TAG_BA_RSP_SSN_EVENT,
1253 WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1254 WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1255 WMI_TAG_P2P_SET_OPPPS_CMD,
1256 WMI_TAG_P2P_SET_NOA_CMD,
1257 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1258 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1259 WMI_TAG_STA_SMPS_PARAM_CMD,
1260 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1261 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1262 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1263 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1264 WMI_TAG_P2P_NOA_EVENT,
1265 WMI_TAG_HB_SET_ENABLE_CMD,
1266 WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1267 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1268 WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1269 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1270 WMI_TAG_HB_IND_EVENT,
1271 WMI_TAG_TX_PAUSE_EVENT,
1272 WMI_TAG_RFKILL_EVENT,
1273 WMI_TAG_DFS_RADAR_EVENT,
1274 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1275 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1276 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1277 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1278 WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1279 WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1280 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1281 WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1282 WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1283 WMI_TAG_VDEV_PLMREQ_START_CMD,
1284 WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1285 WMI_TAG_THERMAL_MGMT_CMD,
1286 WMI_TAG_THERMAL_MGMT_EVENT,
1287 WMI_TAG_PEER_INFO_REQ_CMD,
1288 WMI_TAG_PEER_INFO_EVENT,
1289 WMI_TAG_PEER_INFO,
1290 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1291 WMI_TAG_RMC_SET_MODE_CMD,
1292 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1293 WMI_TAG_RMC_CONFIG_CMD,
1294 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1295 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1296 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1297 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1298 WMI_TAG_NAN_CMD_PARAM,
1299 WMI_TAG_NAN_EVENT_HDR,
1300 WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1301 WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1302 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1303 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1304 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1305 WMI_TAG_AGGR_STATE_TRIG_EVENT,
1306 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1307 WMI_TAG_ROAM_SCAN_CMD,
1308 WMI_TAG_REQ_STATS_EXT_CMD,
1309 WMI_TAG_STATS_EXT_EVENT,
1310 WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1311 WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1312 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1313 WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1314 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1315 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1316 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1317 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1318 WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1319 WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1320 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1321 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1322 WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1323 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1324 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1325 WMI_TAG_START_LINK_STATS_CMD,
1326 WMI_TAG_CLEAR_LINK_STATS_CMD,
1327 WMI_TAG_REQUEST_LINK_STATS_CMD,
1328 WMI_TAG_IFACE_LINK_STATS_EVENT,
1329 WMI_TAG_RADIO_LINK_STATS_EVENT,
1330 WMI_TAG_PEER_STATS_EVENT,
1331 WMI_TAG_CHANNEL_STATS,
1332 WMI_TAG_RADIO_LINK_STATS,
1333 WMI_TAG_RATE_STATS,
1334 WMI_TAG_PEER_LINK_STATS,
1335 WMI_TAG_WMM_AC_STATS,
1336 WMI_TAG_IFACE_LINK_STATS,
1337 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1338 WMI_TAG_LPI_START_SCAN_CMD,
1339 WMI_TAG_LPI_STOP_SCAN_CMD,
1340 WMI_TAG_LPI_RESULT_EVENT,
1341 WMI_TAG_PEER_STATE_EVENT,
1342 WMI_TAG_EXTSCAN_BUCKET_CMD,
1343 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1344 WMI_TAG_EXTSCAN_START_CMD,
1345 WMI_TAG_EXTSCAN_STOP_CMD,
1346 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1347 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1348 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1349 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1350 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1351 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1352 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1353 WMI_TAG_EXTSCAN_OPERATION_EVENT,
1354 WMI_TAG_EXTSCAN_START_STOP_EVENT,
1355 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1356 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1357 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1358 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1359 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1360 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1361 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1362 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1363 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1364 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1365 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1366 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1367 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1368 WMI_TAG_UNIT_TEST_CMD,
1369 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1370 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1371 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1372 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1373 WMI_TAG_ROAM_SYNCH_EVENT,
1374 WMI_TAG_ROAM_SYNCH_COMPLETE,
1375 WMI_TAG_EXTWOW_ENABLE_CMD,
1376 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1377 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1378 WMI_TAG_LPI_STATUS_EVENT,
1379 WMI_TAG_LPI_HANDOFF_EVENT,
1380 WMI_TAG_VDEV_RATE_STATS_EVENT,
1381 WMI_TAG_VDEV_RATE_HT_INFO,
1382 WMI_TAG_RIC_REQUEST,
1383 WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1384 WMI_TAG_PDEV_TEMPERATURE_EVENT,
1385 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1386 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1387 WMI_TAG_RIC_TSPEC,
1388 WMI_TAG_TPC_CHAINMASK_CONFIG,
1389 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1390 WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1391 WMI_TAG_KEY_MATERIAL,
1392 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1393 WMI_TAG_SET_LED_FLASHING_CMD,
1394 WMI_TAG_MDNS_OFFLOAD_CMD,
1395 WMI_TAG_MDNS_SET_FQDN_CMD,
1396 WMI_TAG_MDNS_SET_RESP_CMD,
1397 WMI_TAG_MDNS_GET_STATS_CMD,
1398 WMI_TAG_MDNS_STATS_EVENT,
1399 WMI_TAG_ROAM_INVOKE_CMD,
1400 WMI_TAG_PDEV_RESUME_EVENT,
1401 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1402 WMI_TAG_SAP_OFL_ENABLE_CMD,
1403 WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1404 WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1405 WMI_TAG_APFIND_CMD_PARAM,
1406 WMI_TAG_APFIND_EVENT_HDR,
1407 WMI_TAG_OCB_SET_SCHED_CMD,
1408 WMI_TAG_OCB_SET_SCHED_EVENT,
1409 WMI_TAG_OCB_SET_CONFIG_CMD,
1410 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1411 WMI_TAG_OCB_SET_UTC_TIME_CMD,
1412 WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1413 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1414 WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1415 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1416 WMI_TAG_DCC_GET_STATS_CMD,
1417 WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1418 WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1419 WMI_TAG_DCC_CLEAR_STATS_CMD,
1420 WMI_TAG_DCC_UPDATE_NDL_CMD,
1421 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1422 WMI_TAG_DCC_STATS_EVENT,
1423 WMI_TAG_OCB_CHANNEL,
1424 WMI_TAG_OCB_SCHEDULE_ELEMENT,
1425 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1426 WMI_TAG_DCC_NDL_CHAN,
1427 WMI_TAG_QOS_PARAMETER,
1428 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1429 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1430 WMI_TAG_ROAM_FILTER,
1431 WMI_TAG_PASSPOINT_CONFIG_CMD,
1432 WMI_TAG_PASSPOINT_EVENT_HDR,
1433 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1434 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1435 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1436 WMI_TAG_VDEV_TSF_REPORT_EVENT,
1437 WMI_TAG_GET_FW_MEM_DUMP,
1438 WMI_TAG_UPDATE_FW_MEM_DUMP,
1439 WMI_TAG_FW_MEM_DUMP_PARAMS,
1440 WMI_TAG_DEBUG_MESG_FLUSH,
1441 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1442 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1443 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1444 WMI_TAG_VDEV_SET_IE_CMD,
1445 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1446 WMI_TAG_RSSI_BREACH_EVENT,
1447 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1448 WMI_TAG_SOC_SET_PCL_CMD,
1449 WMI_TAG_SOC_SET_HW_MODE_CMD,
1450 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1451 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1452 WMI_TAG_VDEV_TXRX_STREAMS,
1453 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1454 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1455 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1456 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1457 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1458 WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1459 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1460 WMI_TAG_PACKET_FILTER_CONFIG,
1461 WMI_TAG_PACKET_FILTER_ENABLE,
1462 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1463 WMI_TAG_MGMT_TX_SEND_CMD,
1464 WMI_TAG_MGMT_TX_COMPL_EVENT,
1465 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1466 WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1467 WMI_TAG_LRO_INFO_CMD,
1468 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1469 WMI_TAG_SERVICE_READY_EXT_EVENT,
1470 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1471 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1472 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1473 WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1474 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1475 WMI_TAG_PEER_ASSOC_CONF_EVENT,
1476 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1477 WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1478 WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1479 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1480 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1481 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1482 WMI_TAG_SCPC_EVENT,
1483 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1484 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1485 WMI_TAG_BPF_GET_CAPABILITY_CMD,
1486 WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1487 WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1488 WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1489 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1490 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1491 WMI_TAG_VDEV_DELETE_RESP_EVENT,
1492 WMI_TAG_PEER_DELETE_RESP_EVENT,
1493 WMI_TAG_ROAM_DENSE_THRES_PARAM,
1494 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1495 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1496 WMI_TAG_VDEV_CONFIG_RATEMASK,
1497 WMI_TAG_PDEV_FIPS_CMD,
1498 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1499 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1500 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1501 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1502 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1503 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1504 WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1505 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1506 WMI_TAG_FWTEST_SET_PARAM_CMD,
1507 WMI_TAG_PEER_ATF_REQUEST,
1508 WMI_TAG_VDEV_ATF_REQUEST,
1509 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1510 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1511 WMI_TAG_INST_RSSI_STATS_RESP,
1512 WMI_TAG_MED_UTIL_REPORT_EVENT,
1513 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1514 WMI_TAG_WDS_ADDR_EVENT,
1515 WMI_TAG_PEER_RATECODE_LIST_EVENT,
1516 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1517 WMI_TAG_PDEV_TPC_EVENT,
1518 WMI_TAG_ANI_OFDM_EVENT,
1519 WMI_TAG_ANI_CCK_EVENT,
1520 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1521 WMI_TAG_PDEV_FIPS_EVENT,
1522 WMI_TAG_ATF_PEER_INFO,
1523 WMI_TAG_PDEV_GET_TPC_CMD,
1524 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1525 WMI_TAG_QBOOST_CFG_CMD,
1526 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1527 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1528 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1529 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1530 WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1531 WMI_TAG_PEER_MCS_RATE_INFO,
1532 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1533 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1534 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1535 WMI_TAG_MU_REPORT_TOTAL_MU,
1536 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1537 WMI_TAG_ROAM_SET_MBO,
1538 WMI_TAG_MIB_STATS_ENABLE_CMD,
1539 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1540 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1541 WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1542 WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1543 WMI_TAG_NDI_GET_CAP_REQ,
1544 WMI_TAG_NDP_INITIATOR_REQ,
1545 WMI_TAG_NDP_RESPONDER_REQ,
1546 WMI_TAG_NDP_END_REQ,
1547 WMI_TAG_NDI_CAP_RSP_EVENT,
1548 WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1549 WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1550 WMI_TAG_NDP_END_RSP_EVENT,
1551 WMI_TAG_NDP_INDICATION_EVENT,
1552 WMI_TAG_NDP_CONFIRM_EVENT,
1553 WMI_TAG_NDP_END_INDICATION_EVENT,
1554 WMI_TAG_VDEV_SET_QUIET_CMD,
1555 WMI_TAG_PDEV_SET_PCL_CMD,
1556 WMI_TAG_PDEV_SET_HW_MODE_CMD,
1557 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1558 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1559 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1560 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1561 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1562 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1563 WMI_TAG_COEX_CONFIG_CMD,
1564 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1565 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1566 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1567 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1568 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1569 WMI_TAG_MAC_PHY_CAPABILITIES,
1570 WMI_TAG_HW_MODE_CAPABILITIES,
1571 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1572 WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1573 WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1574 WMI_TAG_VDEV_WISA_CMD,
1575 WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1576 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1577 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1578 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1579 WMI_TAG_NDP_END_RSP_PER_NDI,
1580 WMI_TAG_PEER_BWF_REQUEST,
1581 WMI_TAG_BWF_PEER_INFO,
1582 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1583 WMI_TAG_RMC_SET_LEADER_CMD,
1584 WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1585 WMI_TAG_PER_CHAIN_RSSI_STATS,
1586 WMI_TAG_RSSI_STATS,
1587 WMI_TAG_P2P_LO_START_CMD,
1588 WMI_TAG_P2P_LO_STOP_CMD,
1589 WMI_TAG_P2P_LO_STOPPED_EVENT,
1590 WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1591 WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1592 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1593 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1594 WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1595 WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1596 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1597 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1598 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1599 WMI_TAG_TLV_BUF_LEN_PARAM,
1600 WMI_TAG_SERVICE_AVAILABLE_EVENT,
1601 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1602 WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1603 WMI_TAG_PEER_ANTDIV_INFO,
1604 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1605 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1606 WMI_TAG_MNT_FILTER_CMD,
1607 WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1608 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1609 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1610 WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1611 WMI_TAG_CHAN_CCA_STATS,
1612 WMI_TAG_PEER_SIGNAL_STATS,
1613 WMI_TAG_TX_STATS,
1614 WMI_TAG_PEER_AC_TX_STATS,
1615 WMI_TAG_RX_STATS,
1616 WMI_TAG_PEER_AC_RX_STATS,
1617 WMI_TAG_REPORT_STATS_EVENT,
1618 WMI_TAG_CHAN_CCA_STATS_THRESH,
1619 WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1620 WMI_TAG_TX_STATS_THRESH,
1621 WMI_TAG_RX_STATS_THRESH,
1622 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1623 WMI_TAG_REQUEST_WLAN_STATS_CMD,
1624 WMI_TAG_RX_AGGR_FAILURE_EVENT,
1625 WMI_TAG_RX_AGGR_FAILURE_INFO,
1626 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1627 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1628 WMI_TAG_PDEV_BAND_TO_MAC,
1629 WMI_TAG_TBTT_OFFSET_INFO,
1630 WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1631 WMI_TAG_SAR_LIMITS_CMD,
1632 WMI_TAG_SAR_LIMIT_CMD_ROW,
1633 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1634 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1635 WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1636 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1637 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1638 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1639 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1640 WMI_TAG_VENDOR_OUI,
1641 WMI_TAG_REQUEST_RCPI_CMD,
1642 WMI_TAG_UPDATE_RCPI_EVENT,
1643 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1644 WMI_TAG_PEER_STATS_INFO,
1645 WMI_TAG_PEER_STATS_INFO_EVENT,
1646 WMI_TAG_PKGID_EVENT,
1647 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1648 WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1649 WMI_TAG_REGULATORY_RULE_STRUCT,
1650 WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1651 WMI_TAG_11D_SCAN_START_CMD,
1652 WMI_TAG_11D_SCAN_STOP_CMD,
1653 WMI_TAG_11D_NEW_COUNTRY_EVENT,
1654 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1655 WMI_TAG_RADIO_CHAN_STATS,
1656 WMI_TAG_RADIO_CHAN_STATS_EVENT,
1657 WMI_TAG_ROAM_PER_CONFIG,
1658 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1659 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1660 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1661 WMI_TAG_HW_DATA_FILTER_CMD,
1662 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1663 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1664 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1665 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1666 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1667 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1668 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1669 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1670 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1671 WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1672 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1673 WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1674 WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1675 WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1676 WMI_TAG_IFACE_OFFLOAD_STATS,
1677 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1678 WMI_TAG_RSSI_CTL_EXT,
1679 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1680 WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1681 WMI_TAG_VDEV_GET_TX_POWER_CMD,
1682 WMI_TAG_VDEV_TX_POWER_EVENT,
1683 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1684 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1685 WMI_TAG_TX_SEND_PARAMS,
1686 WMI_TAG_HE_RATE_SET,
1687 WMI_TAG_CONGESTION_STATS,
1688 WMI_TAG_SET_INIT_COUNTRY_CMD,
1689 WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1690 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1691 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1692 WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1693 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1694 WMI_TAG_THERM_THROT_STATS_EVENT,
1695 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1696 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1697 WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1698 WMI_TAG_OEM_DMA_RING_CFG_REQ,
1699 WMI_TAG_OEM_DMA_RING_CFG_RSP,
1700 WMI_TAG_OEM_INDIRECT_DATA,
1701 WMI_TAG_OEM_DMA_BUF_RELEASE,
1702 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1703 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1704 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1705 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1706 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1707 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1708 WMI_TAG_UNIT_TEST_EVENT,
1709 WMI_TAG_ROAM_FILS_OFFLOAD,
1710 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1711 WMI_TAG_PMK_CACHE,
1712 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1713 WMI_TAG_ROAM_FILS_SYNCH,
1714 WMI_TAG_GTK_OFFLOAD_EXTENDED,
1715 WMI_TAG_ROAM_BG_SCAN_ROAMING,
1716 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1717 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1718 WMI_TAG_OIC_PING_HANDOFF_EVENT,
1719 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1720 WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1721 WMI_TAG_BTM_CONFIG,
1722 WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1723 WMI_TAG_WLM_CONFIG_CMD,
1724 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1725 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1726 WMI_TAG_ROAM_CND_SCORING_PARAM,
1727 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1728 WMI_TAG_VENDOR_OUI_EXT,
1729 WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1730 WMI_TAG_FD_SEND_FROM_HOST_CMD,
1731 WMI_TAG_ENABLE_FILS_CMD,
1732 WMI_TAG_HOST_SWFDA_EVENT,
1733 WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1734 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1735 WMI_TAG_STATS_PERIOD,
1736 WMI_TAG_NDL_SCHEDULE_UPDATE,
1737 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1738 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1739 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1740 WMI_TAG_SAR2_RESULT_EVENT,
1741 WMI_TAG_SAR_CAPABILITIES,
1742 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1743 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1744 WMI_TAG_DMA_RING_CAPABILITIES,
1745 WMI_TAG_DMA_RING_CFG_REQ,
1746 WMI_TAG_DMA_RING_CFG_RSP,
1747 WMI_TAG_DMA_BUF_RELEASE,
1748 WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1749 WMI_TAG_SAR_GET_LIMITS_CMD,
1750 WMI_TAG_SAR_GET_LIMITS_EVENT,
1751 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1752 WMI_TAG_OFFLOAD_11K_REPORT,
1753 WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1754 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1755 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1756 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1757 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1758 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1759 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1760 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1761 WMI_TAG_PDEV_GET_NFCAL_POWER,
1762 WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1763 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1764 WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1765 WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1766 WMI_TAG_TWT_ENABLE_CMD,
1767 WMI_TAG_TWT_DISABLE_CMD,
1768 WMI_TAG_TWT_ADD_DIALOG_CMD,
1769 WMI_TAG_TWT_DEL_DIALOG_CMD,
1770 WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1771 WMI_TAG_TWT_RESUME_DIALOG_CMD,
1772 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1773 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1774 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1775 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1776 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1777 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1778 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1779 WMI_TAG_ROAM_SCAN_STATS_EVENT,
1780 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1781 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1782 WMI_TAG_GET_TPC_POWER_CMD,
1783 WMI_TAG_GET_TPC_POWER_EVENT,
1784 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1785 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1786 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1787 WMI_TAG_MOTION_DET_START_STOP_CMD,
1788 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1789 WMI_TAG_MOTION_DET_EVENT,
1790 WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1791 WMI_TAG_NDP_TRANSPORT_IP,
1792 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1793 WMI_TAG_ESP_ESTIMATE_EVENT,
1794 WMI_TAG_NAN_HOST_CONFIG,
1795 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1796 WMI_TAG_PEER_CFR_CAPTURE_CMD,
1797 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1798 WMI_TAG_CHAN_WIDTH_PEER_LIST,
1799 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1800 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1801 WMI_TAG_PEER_EXTD2_STATS,
1802 WMI_TAG_HPCS_PULSE_START_CMD,
1803 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1804 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1805 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1806 WMI_TAG_NAN_EVENT_INFO,
1807 WMI_TAG_NDP_CHANNEL_INFO,
1808 WMI_TAG_NDP_CMD,
1809 WMI_TAG_NDP_EVENT,
1810 /* TODO add all the missing cmds */
1811 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1812 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1813 WMI_TAG_MAX
1814 };
1815
1816 enum wmi_tlv_service {
1817 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1818 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1819 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1820 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1821 WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1822 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1823 WMI_TLV_SERVICE_AP_UAPSD = 6,
1824 WMI_TLV_SERVICE_AP_DFS = 7,
1825 WMI_TLV_SERVICE_11AC = 8,
1826 WMI_TLV_SERVICE_BLOCKACK = 9,
1827 WMI_TLV_SERVICE_PHYERR = 10,
1828 WMI_TLV_SERVICE_BCN_FILTER = 11,
1829 WMI_TLV_SERVICE_RTT = 12,
1830 WMI_TLV_SERVICE_WOW = 13,
1831 WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1832 WMI_TLV_SERVICE_IRAM_TIDS = 15,
1833 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1834 WMI_TLV_SERVICE_NLO = 17,
1835 WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1836 WMI_TLV_SERVICE_SCAN_SCH = 19,
1837 WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1838 WMI_TLV_SERVICE_CHATTER = 21,
1839 WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1840 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1841 WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1842 WMI_TLV_SERVICE_GPIO = 25,
1843 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1844 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1845 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1846 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1847 WMI_TLV_SERVICE_TX_ENCAP = 30,
1848 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1849 WMI_TLV_SERVICE_EARLY_RX = 32,
1850 WMI_TLV_SERVICE_STA_SMPS = 33,
1851 WMI_TLV_SERVICE_FWTEST = 34,
1852 WMI_TLV_SERVICE_STA_WMMAC = 35,
1853 WMI_TLV_SERVICE_TDLS = 36,
1854 WMI_TLV_SERVICE_BURST = 37,
1855 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1856 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1857 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1858 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1859 WMI_TLV_SERVICE_WLAN_HB = 42,
1860 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1861 WMI_TLV_SERVICE_BATCH_SCAN = 44,
1862 WMI_TLV_SERVICE_QPOWER = 45,
1863 WMI_TLV_SERVICE_PLMREQ = 46,
1864 WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1865 WMI_TLV_SERVICE_RMC = 48,
1866 WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1867 WMI_TLV_SERVICE_COEX_SAR = 50,
1868 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1869 WMI_TLV_SERVICE_NAN = 52,
1870 WMI_TLV_SERVICE_L1SS_STAT = 53,
1871 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1872 WMI_TLV_SERVICE_OBSS_SCAN = 55,
1873 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1874 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1875 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1876 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1877 WMI_TLV_SERVICE_LPASS = 60,
1878 WMI_TLV_SERVICE_EXTSCAN = 61,
1879 WMI_TLV_SERVICE_D0WOW = 62,
1880 WMI_TLV_SERVICE_HSOFFLOAD = 63,
1881 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1882 WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1883 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1884 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1885 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1886 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1887 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1888 WMI_TLV_SERVICE_OCB = 71,
1889 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1890 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1891 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1892 WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1893 WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1894 WMI_TLV_SERVICE_EXT_MSG = 77,
1895 WMI_TLV_SERVICE_MAWC = 78,
1896 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1897 WMI_TLV_SERVICE_EGAP = 80,
1898 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1899 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1900 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1901 WMI_TLV_SERVICE_ATF = 84,
1902 WMI_TLV_SERVICE_COEX_GPIO = 85,
1903 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1904 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1905 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1906 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1907 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1908 WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1909 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
1910 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
1911 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
1912 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
1913 WMI_TLV_SERVICE_NAN_DATA = 96,
1914 WMI_TLV_SERVICE_NAN_RTT = 97,
1915 WMI_TLV_SERVICE_11AX = 98,
1916 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
1917 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
1918 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
1919 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
1920 WMI_TLV_SERVICE_MESH_11S = 103,
1921 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
1922 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
1923 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
1924 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
1925 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
1926 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
1927 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
1928 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
1929 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
1930 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
1931 WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
1932 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
1933 WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
1934 WMI_TLV_SERVICE_REGULATORY_DB = 117,
1935 WMI_TLV_SERVICE_11D_OFFLOAD = 118,
1936 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
1937 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
1938 WMI_TLV_SERVICE_PKT_ROUTING = 121,
1939 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
1940 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
1941 WMI_TLV_SERVICE_8SS_TX_BFEE = 124,
1942 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
1943 WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
1944 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
1945
1946 WMI_MAX_SERVICE = 128,
1947
1948 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
1949 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
1950 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
1951 WMI_TLV_SERVICE_FILS_SUPPORT = 131,
1952 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
1953 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
1954 WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
1955 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
1956 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
1957 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
1958 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
1959 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
1960 WMI_TLV_SERVICE_THERM_THROT = 140,
1961 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
1962 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
1963 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
1964 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
1965 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
1966 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
1967 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
1968 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
1969 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
1970 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
1971 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
1972 WMI_TLV_SERVICE_STA_TWT = 152,
1973 WMI_TLV_SERVICE_AP_TWT = 153,
1974 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
1975 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
1976 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
1977 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
1978 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
1979 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
1980 WMI_TLV_SERVICE_MOTION_DET = 160,
1981 WMI_TLV_SERVICE_INFRA_MBSSID = 161,
1982 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
1983 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
1984 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
1985 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
1986 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
1987 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
1988 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
1989 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
1990 WMI_TLV_SERVICE_ESP_SUPPORT = 170,
1991 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
1992 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
1993 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
1994 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
1995 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
1996 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
1997 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
1998 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
1999 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2000 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2001 WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2002 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2003 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2004 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2005 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2006 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2007 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2008 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2009 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2010 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2011 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2012 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2013 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2014 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2015 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2016 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2017 WMI_TLV_SERVICE_VOW_ENABLE = 197,
2018 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2019 WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2020 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2021 WMI_TLV_SERVICE_PS_TDCC = 201,
2022 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202,
2023 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2024 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2025 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2026 WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2027 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2028 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2029 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2030 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2031 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2032 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2033 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2034 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2035 WMI_TLV_SERVICE_EXT2_MSG = 220,
2036
2037 WMI_MAX_EXT_SERVICE
2038 };
2039
2040 enum {
2041 WMI_SMPS_FORCED_MODE_NONE = 0,
2042 WMI_SMPS_FORCED_MODE_DISABLED,
2043 WMI_SMPS_FORCED_MODE_STATIC,
2044 WMI_SMPS_FORCED_MODE_DYNAMIC
2045 };
2046
2047 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0
2048 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1
2049 #define WMI_NUM_SUPPORTED_BAND_MAX 2
2050
2051 #define WMI_PEER_MIMO_PS_STATE 0x1
2052 #define WMI_PEER_AMPDU 0x2
2053 #define WMI_PEER_AUTHORIZE 0x3
2054 #define WMI_PEER_CHWIDTH 0x4
2055 #define WMI_PEER_NSS 0x5
2056 #define WMI_PEER_USE_4ADDR 0x6
2057 #define WMI_PEER_MEMBERSHIP 0x7
2058 #define WMI_PEER_USERPOS 0x8
2059 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9
2060 #define WMI_PEER_TX_FAIL_CNT_THR 0xA
2061 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB
2062 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC
2063 #define WMI_PEER_PHYMODE 0xD
2064 #define WMI_PEER_USE_FIXED_PWR 0xE
2065 #define WMI_PEER_PARAM_FIXED_RATE 0xF
2066 #define WMI_PEER_SET_MU_WHITELIST 0x10
2067 #define WMI_PEER_SET_MAX_TX_RATE 0x11
2068 #define WMI_PEER_SET_MIN_TX_RATE 0x12
2069 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13
2070
2071 /* slot time long */
2072 #define WMI_VDEV_SLOT_TIME_LONG 0x1
2073 /* slot time short */
2074 #define WMI_VDEV_SLOT_TIME_SHORT 0x2
2075 /* preablbe long */
2076 #define WMI_VDEV_PREAMBLE_LONG 0x1
2077 /* preablbe short */
2078 #define WMI_VDEV_PREAMBLE_SHORT 0x2
2079
2080 enum wmi_peer_smps_state {
2081 WMI_PEER_SMPS_PS_NONE = 0x0,
2082 WMI_PEER_SMPS_STATIC = 0x1,
2083 WMI_PEER_SMPS_DYNAMIC = 0x2
2084 };
2085
2086 enum wmi_peer_chwidth {
2087 WMI_PEER_CHWIDTH_20MHZ = 0,
2088 WMI_PEER_CHWIDTH_40MHZ = 1,
2089 WMI_PEER_CHWIDTH_80MHZ = 2,
2090 WMI_PEER_CHWIDTH_160MHZ = 3,
2091 };
2092
2093 enum wmi_beacon_gen_mode {
2094 WMI_BEACON_STAGGERED_MODE = 0,
2095 WMI_BEACON_BURST_MODE = 1
2096 };
2097
2098 enum wmi_direct_buffer_module {
2099 WMI_DIRECT_BUF_SPECTRAL = 0,
2100 WMI_DIRECT_BUF_CFR = 1,
2101
2102 /* keep it last */
2103 WMI_DIRECT_BUF_MAX
2104 };
2105
2106 struct wmi_host_pdev_band_to_mac {
2107 u32 pdev_id;
2108 u32 start_freq;
2109 u32 end_freq;
2110 };
2111
2112 struct ath11k_ppe_threshold {
2113 u32 numss_m1;
2114 u32 ru_bit_mask;
2115 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2116 };
2117
2118 struct ath11k_service_ext_param {
2119 u32 default_conc_scan_config_bits;
2120 u32 default_fw_config_bits;
2121 struct ath11k_ppe_threshold ppet;
2122 u32 he_cap_info;
2123 u32 mpdu_density;
2124 u32 max_bssid_rx_filters;
2125 u32 num_hw_modes;
2126 u32 num_phy;
2127 };
2128
2129 struct ath11k_hw_mode_caps {
2130 u32 hw_mode_id;
2131 u32 phy_id_map;
2132 u32 hw_mode_config_type;
2133 };
2134
2135 #define PSOC_HOST_MAX_PHY_SIZE (3)
2136 #define ATH11K_11B_SUPPORT BIT(0)
2137 #define ATH11K_11G_SUPPORT BIT(1)
2138 #define ATH11K_11A_SUPPORT BIT(2)
2139 #define ATH11K_11N_SUPPORT BIT(3)
2140 #define ATH11K_11AC_SUPPORT BIT(4)
2141 #define ATH11K_11AX_SUPPORT BIT(5)
2142
2143 struct ath11k_hal_reg_capabilities_ext {
2144 u32 phy_id;
2145 u32 eeprom_reg_domain;
2146 u32 eeprom_reg_domain_ext;
2147 u32 regcap1;
2148 u32 regcap2;
2149 u32 wireless_modes;
2150 u32 low_2ghz_chan;
2151 u32 high_2ghz_chan;
2152 u32 low_5ghz_chan;
2153 u32 high_5ghz_chan;
2154 };
2155
2156 #define WMI_HOST_MAX_PDEV 3
2157
2158 struct wlan_host_mem_chunk {
2159 u32 tlv_header;
2160 u32 req_id;
2161 u32 ptr;
2162 u32 size;
2163 } __packed;
2164
2165 struct wmi_host_mem_chunk {
2166 void *vaddr;
2167 dma_addr_t paddr;
2168 u32 len;
2169 u32 req_id;
2170 };
2171
2172 struct wmi_init_cmd_param {
2173 u32 tlv_header;
2174 struct target_resource_config *res_cfg;
2175 u8 num_mem_chunks;
2176 struct wmi_host_mem_chunk *mem_chunks;
2177 u32 hw_mode_id;
2178 u32 num_band_to_mac;
2179 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2180 };
2181
2182 struct wmi_pdev_band_to_mac {
2183 u32 tlv_header;
2184 u32 pdev_id;
2185 u32 start_freq;
2186 u32 end_freq;
2187 } __packed;
2188
2189 struct wmi_pdev_set_hw_mode_cmd_param {
2190 u32 tlv_header;
2191 u32 pdev_id;
2192 u32 hw_mode_index;
2193 u32 num_band_to_mac;
2194 } __packed;
2195
2196 struct wmi_ppe_threshold {
2197 u32 numss_m1; /** NSS - 1*/
2198 union {
2199 u32 ru_count;
2200 u32 ru_mask;
2201 } __packed;
2202 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2203 } __packed;
2204
2205 #define HW_BD_INFO_SIZE 5
2206
2207 struct wmi_abi_version {
2208 u32 abi_version_0;
2209 u32 abi_version_1;
2210 u32 abi_version_ns_0;
2211 u32 abi_version_ns_1;
2212 u32 abi_version_ns_2;
2213 u32 abi_version_ns_3;
2214 } __packed;
2215
2216 struct wmi_init_cmd {
2217 u32 tlv_header;
2218 struct wmi_abi_version host_abi_vers;
2219 u32 num_host_mem_chunks;
2220 } __packed;
2221
2222 struct wmi_resource_config {
2223 u32 tlv_header;
2224 u32 num_vdevs;
2225 u32 num_peers;
2226 u32 num_offload_peers;
2227 u32 num_offload_reorder_buffs;
2228 u32 num_peer_keys;
2229 u32 num_tids;
2230 u32 ast_skid_limit;
2231 u32 tx_chain_mask;
2232 u32 rx_chain_mask;
2233 u32 rx_timeout_pri[4];
2234 u32 rx_decap_mode;
2235 u32 scan_max_pending_req;
2236 u32 bmiss_offload_max_vdev;
2237 u32 roam_offload_max_vdev;
2238 u32 roam_offload_max_ap_profiles;
2239 u32 num_mcast_groups;
2240 u32 num_mcast_table_elems;
2241 u32 mcast2ucast_mode;
2242 u32 tx_dbg_log_size;
2243 u32 num_wds_entries;
2244 u32 dma_burst_size;
2245 u32 mac_aggr_delim;
2246 u32 rx_skip_defrag_timeout_dup_detection_check;
2247 u32 vow_config;
2248 u32 gtk_offload_max_vdev;
2249 u32 num_msdu_desc;
2250 u32 max_frag_entries;
2251 u32 num_tdls_vdevs;
2252 u32 num_tdls_conn_table_entries;
2253 u32 beacon_tx_offload_max_vdev;
2254 u32 num_multicast_filter_entries;
2255 u32 num_wow_filters;
2256 u32 num_keep_alive_pattern;
2257 u32 keep_alive_pattern_size;
2258 u32 max_tdls_concurrent_sleep_sta;
2259 u32 max_tdls_concurrent_buffer_sta;
2260 u32 wmi_send_separate;
2261 u32 num_ocb_vdevs;
2262 u32 num_ocb_channels;
2263 u32 num_ocb_schedules;
2264 u32 flag1;
2265 u32 smart_ant_cap;
2266 u32 bk_minfree;
2267 u32 be_minfree;
2268 u32 vi_minfree;
2269 u32 vo_minfree;
2270 u32 alloc_frag_desc_for_data_pkt;
2271 u32 num_ns_ext_tuples_cfg;
2272 u32 bpf_instruction_size;
2273 u32 max_bssid_rx_filters;
2274 u32 use_pdev_id;
2275 u32 max_num_dbs_scan_duty_cycle;
2276 u32 max_num_group_keys;
2277 u32 peer_map_unmap_v2_support;
2278 u32 sched_params;
2279 u32 twt_ap_pdev_count;
2280 u32 twt_ap_sta_count;
2281 } __packed;
2282
2283 struct wmi_service_ready_event {
2284 u32 fw_build_vers;
2285 struct wmi_abi_version fw_abi_vers;
2286 u32 phy_capability;
2287 u32 max_frag_entry;
2288 u32 num_rf_chains;
2289 u32 ht_cap_info;
2290 u32 vht_cap_info;
2291 u32 vht_supp_mcs;
2292 u32 hw_min_tx_power;
2293 u32 hw_max_tx_power;
2294 u32 sys_cap_info;
2295 u32 min_pkt_size_enable;
2296 u32 max_bcn_ie_size;
2297 u32 num_mem_reqs;
2298 u32 max_num_scan_channels;
2299 u32 hw_bd_id;
2300 u32 hw_bd_info[HW_BD_INFO_SIZE];
2301 u32 max_supported_macs;
2302 u32 wmi_fw_sub_feat_caps;
2303 u32 num_dbs_hw_modes;
2304 /* txrx_chainmask
2305 * [7:0] - 2G band tx chain mask
2306 * [15:8] - 2G band rx chain mask
2307 * [23:16] - 5G band tx chain mask
2308 * [31:24] - 5G band rx chain mask
2309 */
2310 u32 txrx_chainmask;
2311 u32 default_dbs_hw_mode_index;
2312 u32 num_msdu_desc;
2313 } __packed;
2314
2315 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2316
2317 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2318 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2319 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2320 #define WMI_SERVICE_BITS_IN_SIZE32 4
2321
2322 struct wmi_service_ready_ext_event {
2323 u32 default_conc_scan_config_bits;
2324 u32 default_fw_config_bits;
2325 struct wmi_ppe_threshold ppet;
2326 u32 he_cap_info;
2327 u32 mpdu_density;
2328 u32 max_bssid_rx_filters;
2329 u32 fw_build_vers_ext;
2330 u32 max_nlo_ssids;
2331 u32 max_bssid_indicator;
2332 u32 he_cap_info_ext;
2333 } __packed;
2334
2335 struct wmi_soc_mac_phy_hw_mode_caps {
2336 u32 num_hw_modes;
2337 u32 num_chainmask_tables;
2338 } __packed;
2339
2340 struct wmi_hw_mode_capabilities {
2341 u32 tlv_header;
2342 u32 hw_mode_id;
2343 u32 phy_id_map;
2344 u32 hw_mode_config_type;
2345 } __packed;
2346
2347 #define WMI_MAX_HECAP_PHY_SIZE (3)
2348
2349 struct wmi_mac_phy_capabilities {
2350 u32 hw_mode_id;
2351 u32 pdev_id;
2352 u32 phy_id;
2353 u32 supported_flags;
2354 u32 supported_bands;
2355 u32 ampdu_density;
2356 u32 max_bw_supported_2g;
2357 u32 ht_cap_info_2g;
2358 u32 vht_cap_info_2g;
2359 u32 vht_supp_mcs_2g;
2360 u32 he_cap_info_2g;
2361 u32 he_supp_mcs_2g;
2362 u32 tx_chain_mask_2g;
2363 u32 rx_chain_mask_2g;
2364 u32 max_bw_supported_5g;
2365 u32 ht_cap_info_5g;
2366 u32 vht_cap_info_5g;
2367 u32 vht_supp_mcs_5g;
2368 u32 he_cap_info_5g;
2369 u32 he_supp_mcs_5g;
2370 u32 tx_chain_mask_5g;
2371 u32 rx_chain_mask_5g;
2372 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2373 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2374 struct wmi_ppe_threshold he_ppet2g;
2375 struct wmi_ppe_threshold he_ppet5g;
2376 u32 chainmask_table_id;
2377 u32 lmac_id;
2378 u32 he_cap_info_2g_ext;
2379 u32 he_cap_info_5g_ext;
2380 u32 he_cap_info_internal;
2381 } __packed;
2382
2383 struct wmi_hal_reg_capabilities_ext {
2384 u32 tlv_header;
2385 u32 phy_id;
2386 u32 eeprom_reg_domain;
2387 u32 eeprom_reg_domain_ext;
2388 u32 regcap1;
2389 u32 regcap2;
2390 u32 wireless_modes;
2391 u32 low_2ghz_chan;
2392 u32 high_2ghz_chan;
2393 u32 low_5ghz_chan;
2394 u32 high_5ghz_chan;
2395 } __packed;
2396
2397 struct wmi_soc_hal_reg_capabilities {
2398 u32 num_phy;
2399 } __packed;
2400
2401 /* 2 word representation of MAC addr */
2402 struct wmi_mac_addr {
2403 union {
2404 u8 addr[6];
2405 struct {
2406 u32 word0;
2407 u32 word1;
2408 } __packed;
2409 } __packed;
2410 } __packed;
2411
2412 struct wmi_dma_ring_capabilities {
2413 u32 tlv_header;
2414 u32 pdev_id;
2415 u32 module_id;
2416 u32 min_elem;
2417 u32 min_buf_sz;
2418 u32 min_buf_align;
2419 } __packed;
2420
2421 struct wmi_ready_event_min {
2422 struct wmi_abi_version fw_abi_vers;
2423 struct wmi_mac_addr mac_addr;
2424 u32 status;
2425 u32 num_dscp_table;
2426 u32 num_extra_mac_addr;
2427 u32 num_total_peers;
2428 u32 num_extra_peers;
2429 } __packed;
2430
2431 struct wmi_ready_event {
2432 struct wmi_ready_event_min ready_event_min;
2433 u32 max_ast_index;
2434 u32 pktlog_defs_checksum;
2435 } __packed;
2436
2437 struct wmi_service_available_event {
2438 u32 wmi_service_segment_offset;
2439 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2440 } __packed;
2441
2442 struct ath11k_pdev_wmi {
2443 struct ath11k_wmi_base *wmi_ab;
2444 enum ath11k_htc_ep_id eid;
2445 const struct wmi_peer_flags_map *peer_flags;
2446 u32 rx_decap_mode;
2447 };
2448
2449 struct vdev_create_params {
2450 u8 if_id;
2451 u32 type;
2452 u32 subtype;
2453 struct {
2454 u8 tx;
2455 u8 rx;
2456 } chains[NUM_NL80211_BANDS];
2457 u32 pdev_id;
2458 };
2459
2460 struct wmi_vdev_create_cmd {
2461 u32 tlv_header;
2462 u32 vdev_id;
2463 u32 vdev_type;
2464 u32 vdev_subtype;
2465 struct wmi_mac_addr vdev_macaddr;
2466 u32 num_cfg_txrx_streams;
2467 u32 pdev_id;
2468 } __packed;
2469
2470 struct wmi_vdev_txrx_streams {
2471 u32 tlv_header;
2472 u32 band;
2473 u32 supported_tx_streams;
2474 u32 supported_rx_streams;
2475 } __packed;
2476
2477 struct wmi_vdev_delete_cmd {
2478 u32 tlv_header;
2479 u32 vdev_id;
2480 } __packed;
2481
2482 struct wmi_vdev_up_cmd {
2483 u32 tlv_header;
2484 u32 vdev_id;
2485 u32 vdev_assoc_id;
2486 struct wmi_mac_addr vdev_bssid;
2487 struct wmi_mac_addr trans_bssid;
2488 u32 profile_idx;
2489 u32 profile_num;
2490 } __packed;
2491
2492 struct wmi_vdev_stop_cmd {
2493 u32 tlv_header;
2494 u32 vdev_id;
2495 } __packed;
2496
2497 struct wmi_vdev_down_cmd {
2498 u32 tlv_header;
2499 u32 vdev_id;
2500 } __packed;
2501
2502 #define WMI_VDEV_START_HIDDEN_SSID BIT(0)
2503 #define WMI_VDEV_START_PMF_ENABLED BIT(1)
2504 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2505
2506 struct wmi_ssid {
2507 u32 ssid_len;
2508 u32 ssid[8];
2509 } __packed;
2510
2511 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2512
2513 struct wmi_vdev_start_request_cmd {
2514 u32 tlv_header;
2515 u32 vdev_id;
2516 u32 requestor_id;
2517 u32 beacon_interval;
2518 u32 dtim_period;
2519 u32 flags;
2520 struct wmi_ssid ssid;
2521 u32 bcn_tx_rate;
2522 u32 bcn_txpower;
2523 u32 num_noa_descriptors;
2524 u32 disable_hw_ack;
2525 u32 preferred_tx_streams;
2526 u32 preferred_rx_streams;
2527 u32 he_ops;
2528 u32 cac_duration_ms;
2529 u32 regdomain;
2530 } __packed;
2531
2532 #define MGMT_TX_DL_FRM_LEN 64
2533 #define WMI_MAC_MAX_SSID_LENGTH 32
2534 struct mac_ssid {
2535 u8 length;
2536 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2537 } __packed;
2538
2539 struct wmi_p2p_noa_descriptor {
2540 u32 type_count;
2541 u32 duration;
2542 u32 interval;
2543 u32 start_time;
2544 };
2545
2546 struct channel_param {
2547 u8 chan_id;
2548 u8 pwr;
2549 u32 mhz;
2550 u32 half_rate:1,
2551 quarter_rate:1,
2552 dfs_set:1,
2553 dfs_set_cfreq2:1,
2554 is_chan_passive:1,
2555 allow_ht:1,
2556 allow_vht:1,
2557 allow_he:1,
2558 set_agile:1,
2559 psc_channel:1;
2560 u32 phy_mode;
2561 u32 cfreq1;
2562 u32 cfreq2;
2563 char maxpower;
2564 char minpower;
2565 char maxregpower;
2566 u8 antennamax;
2567 u8 reg_class_id;
2568 } __packed;
2569
2570 enum wmi_phy_mode {
2571 MODE_11A = 0,
2572 MODE_11G = 1, /* 11b/g Mode */
2573 MODE_11B = 2, /* 11b Mode */
2574 MODE_11GONLY = 3, /* 11g only Mode */
2575 MODE_11NA_HT20 = 4,
2576 MODE_11NG_HT20 = 5,
2577 MODE_11NA_HT40 = 6,
2578 MODE_11NG_HT40 = 7,
2579 MODE_11AC_VHT20 = 8,
2580 MODE_11AC_VHT40 = 9,
2581 MODE_11AC_VHT80 = 10,
2582 MODE_11AC_VHT20_2G = 11,
2583 MODE_11AC_VHT40_2G = 12,
2584 MODE_11AC_VHT80_2G = 13,
2585 MODE_11AC_VHT80_80 = 14,
2586 MODE_11AC_VHT160 = 15,
2587 MODE_11AX_HE20 = 16,
2588 MODE_11AX_HE40 = 17,
2589 MODE_11AX_HE80 = 18,
2590 MODE_11AX_HE80_80 = 19,
2591 MODE_11AX_HE160 = 20,
2592 MODE_11AX_HE20_2G = 21,
2593 MODE_11AX_HE40_2G = 22,
2594 MODE_11AX_HE80_2G = 23,
2595 MODE_UNKNOWN = 24,
2596 MODE_MAX = 24
2597 };
2598
ath11k_wmi_phymode_str(enum wmi_phy_mode mode)2599 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2600 {
2601 switch (mode) {
2602 case MODE_11A:
2603 return "11a";
2604 case MODE_11G:
2605 return "11g";
2606 case MODE_11B:
2607 return "11b";
2608 case MODE_11GONLY:
2609 return "11gonly";
2610 case MODE_11NA_HT20:
2611 return "11na-ht20";
2612 case MODE_11NG_HT20:
2613 return "11ng-ht20";
2614 case MODE_11NA_HT40:
2615 return "11na-ht40";
2616 case MODE_11NG_HT40:
2617 return "11ng-ht40";
2618 case MODE_11AC_VHT20:
2619 return "11ac-vht20";
2620 case MODE_11AC_VHT40:
2621 return "11ac-vht40";
2622 case MODE_11AC_VHT80:
2623 return "11ac-vht80";
2624 case MODE_11AC_VHT160:
2625 return "11ac-vht160";
2626 case MODE_11AC_VHT80_80:
2627 return "11ac-vht80+80";
2628 case MODE_11AC_VHT20_2G:
2629 return "11ac-vht20-2g";
2630 case MODE_11AC_VHT40_2G:
2631 return "11ac-vht40-2g";
2632 case MODE_11AC_VHT80_2G:
2633 return "11ac-vht80-2g";
2634 case MODE_11AX_HE20:
2635 return "11ax-he20";
2636 case MODE_11AX_HE40:
2637 return "11ax-he40";
2638 case MODE_11AX_HE80:
2639 return "11ax-he80";
2640 case MODE_11AX_HE80_80:
2641 return "11ax-he80+80";
2642 case MODE_11AX_HE160:
2643 return "11ax-he160";
2644 case MODE_11AX_HE20_2G:
2645 return "11ax-he20-2g";
2646 case MODE_11AX_HE40_2G:
2647 return "11ax-he40-2g";
2648 case MODE_11AX_HE80_2G:
2649 return "11ax-he80-2g";
2650 case MODE_UNKNOWN:
2651 /* skip */
2652 break;
2653
2654 /* no default handler to allow compiler to check that the
2655 * enum is fully handled
2656 */
2657 }
2658
2659 return "<unknown>";
2660 }
2661
2662 struct wmi_channel_arg {
2663 u32 freq;
2664 u32 band_center_freq1;
2665 u32 band_center_freq2;
2666 bool passive;
2667 bool allow_ibss;
2668 bool allow_ht;
2669 bool allow_vht;
2670 bool ht40plus;
2671 bool chan_radar;
2672 bool freq2_radar;
2673 bool allow_he;
2674 u32 min_power;
2675 u32 max_power;
2676 u32 max_reg_power;
2677 u32 max_antenna_gain;
2678 enum wmi_phy_mode mode;
2679 };
2680
2681 struct wmi_vdev_start_req_arg {
2682 u32 vdev_id;
2683 struct wmi_channel_arg channel;
2684 u32 bcn_intval;
2685 u32 dtim_period;
2686 u8 *ssid;
2687 u32 ssid_len;
2688 u32 bcn_tx_rate;
2689 u32 bcn_tx_power;
2690 bool disable_hw_ack;
2691 bool hidden_ssid;
2692 bool pmf_enabled;
2693 u32 he_ops;
2694 u32 cac_duration_ms;
2695 u32 regdomain;
2696 u32 pref_rx_streams;
2697 u32 pref_tx_streams;
2698 u32 num_noa_descriptors;
2699 };
2700
2701 struct peer_create_params {
2702 const u8 *peer_addr;
2703 u32 peer_type;
2704 u32 vdev_id;
2705 };
2706
2707 struct peer_delete_params {
2708 u8 vdev_id;
2709 };
2710
2711 struct peer_flush_params {
2712 u32 peer_tid_bitmap;
2713 u8 vdev_id;
2714 };
2715
2716 struct pdev_set_regdomain_params {
2717 u16 current_rd_in_use;
2718 u16 current_rd_2g;
2719 u16 current_rd_5g;
2720 u32 ctl_2g;
2721 u32 ctl_5g;
2722 u8 dfs_domain;
2723 u32 pdev_id;
2724 };
2725
2726 struct rx_reorder_queue_remove_params {
2727 u8 *peer_macaddr;
2728 u16 vdev_id;
2729 u32 peer_tid_bitmap;
2730 };
2731
2732 #define WMI_HOST_PDEV_ID_SOC 0xFF
2733 #define WMI_HOST_PDEV_ID_0 0
2734 #define WMI_HOST_PDEV_ID_1 1
2735 #define WMI_HOST_PDEV_ID_2 2
2736
2737 #define WMI_PDEV_ID_SOC 0
2738 #define WMI_PDEV_ID_1ST 1
2739 #define WMI_PDEV_ID_2ND 2
2740 #define WMI_PDEV_ID_3RD 3
2741
2742 /* Freq units in MHz */
2743 #define REG_RULE_START_FREQ 0x0000ffff
2744 #define REG_RULE_END_FREQ 0xffff0000
2745 #define REG_RULE_FLAGS 0x0000ffff
2746 #define REG_RULE_MAX_BW 0x0000ffff
2747 #define REG_RULE_REG_PWR 0x00ff0000
2748 #define REG_RULE_ANT_GAIN 0xff000000
2749
2750 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2751 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2752 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2753 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2754
2755 #define HECAP_PHYDWORD_0 0
2756 #define HECAP_PHYDWORD_1 1
2757 #define HECAP_PHYDWORD_2 2
2758
2759 #define HECAP_PHY_SU_BFER BIT(31)
2760 #define HECAP_PHY_SU_BFEE BIT(0)
2761 #define HECAP_PHY_MU_BFER BIT(1)
2762 #define HECAP_PHY_UL_MUMIMO BIT(22)
2763 #define HECAP_PHY_UL_MUOFDMA BIT(23)
2764
2765 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2766 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
2767
2768 #define HECAP_PHY_SUBFME_GET(hecap_phy) \
2769 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
2770
2771 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2772 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
2773
2774 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2775 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
2776
2777 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2778 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
2779
2780 #define HE_MODE_SU_TX_BFEE BIT(0)
2781 #define HE_MODE_SU_TX_BFER BIT(1)
2782 #define HE_MODE_MU_TX_BFEE BIT(2)
2783 #define HE_MODE_MU_TX_BFER BIT(3)
2784 #define HE_MODE_DL_OFDMA BIT(4)
2785 #define HE_MODE_UL_OFDMA BIT(5)
2786 #define HE_MODE_UL_MUMIMO BIT(6)
2787
2788 #define HE_DL_MUOFDMA_ENABLE 1
2789 #define HE_UL_MUOFDMA_ENABLE 1
2790 #define HE_DL_MUMIMO_ENABLE 1
2791 #define HE_MU_BFEE_ENABLE 1
2792 #define HE_SU_BFEE_ENABLE 1
2793
2794 #define HE_VHT_SOUNDING_MODE_ENABLE 1
2795 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1
2796 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1
2797
2798 /* HE or VHT Sounding */
2799 #define HE_VHT_SOUNDING_MODE BIT(0)
2800 /* SU or MU Sounding */
2801 #define HE_SU_MU_SOUNDING_MODE BIT(2)
2802 /* Trig or Non-Trig Sounding */
2803 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3)
2804
2805 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4
2806 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
2807 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8
2808 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700
2809
2810 struct pdev_params {
2811 u32 param_id;
2812 u32 param_value;
2813 };
2814
2815 enum wmi_peer_type {
2816 WMI_PEER_TYPE_DEFAULT = 0,
2817 WMI_PEER_TYPE_BSS = 1,
2818 WMI_PEER_TYPE_TDLS = 2,
2819 };
2820
2821 struct wmi_peer_create_cmd {
2822 u32 tlv_header;
2823 u32 vdev_id;
2824 struct wmi_mac_addr peer_macaddr;
2825 u32 peer_type;
2826 } __packed;
2827
2828 struct wmi_peer_delete_cmd {
2829 u32 tlv_header;
2830 u32 vdev_id;
2831 struct wmi_mac_addr peer_macaddr;
2832 } __packed;
2833
2834 struct wmi_peer_reorder_queue_setup_cmd {
2835 u32 tlv_header;
2836 u32 vdev_id;
2837 struct wmi_mac_addr peer_macaddr;
2838 u32 tid;
2839 u32 queue_ptr_lo;
2840 u32 queue_ptr_hi;
2841 u32 queue_no;
2842 u32 ba_window_size_valid;
2843 u32 ba_window_size;
2844 } __packed;
2845
2846 struct wmi_peer_reorder_queue_remove_cmd {
2847 u32 tlv_header;
2848 u32 vdev_id;
2849 struct wmi_mac_addr peer_macaddr;
2850 u32 tid_mask;
2851 } __packed;
2852
2853 struct gpio_config_params {
2854 u32 gpio_num;
2855 u32 input;
2856 u32 pull_type;
2857 u32 intr_mode;
2858 };
2859
2860 enum wmi_gpio_type {
2861 WMI_GPIO_PULL_NONE,
2862 WMI_GPIO_PULL_UP,
2863 WMI_GPIO_PULL_DOWN
2864 };
2865
2866 enum wmi_gpio_intr_type {
2867 WMI_GPIO_INTTYPE_DISABLE,
2868 WMI_GPIO_INTTYPE_RISING_EDGE,
2869 WMI_GPIO_INTTYPE_FALLING_EDGE,
2870 WMI_GPIO_INTTYPE_BOTH_EDGE,
2871 WMI_GPIO_INTTYPE_LEVEL_LOW,
2872 WMI_GPIO_INTTYPE_LEVEL_HIGH
2873 };
2874
2875 enum wmi_bss_chan_info_req_type {
2876 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
2877 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
2878 };
2879
2880 struct wmi_gpio_config_cmd_param {
2881 u32 tlv_header;
2882 u32 gpio_num;
2883 u32 input;
2884 u32 pull_type;
2885 u32 intr_mode;
2886 };
2887
2888 struct gpio_output_params {
2889 u32 gpio_num;
2890 u32 set;
2891 };
2892
2893 struct wmi_gpio_output_cmd_param {
2894 u32 tlv_header;
2895 u32 gpio_num;
2896 u32 set;
2897 };
2898
2899 struct set_fwtest_params {
2900 u32 arg;
2901 u32 value;
2902 };
2903
2904 struct wmi_fwtest_set_param_cmd_param {
2905 u32 tlv_header;
2906 u32 param_id;
2907 u32 param_value;
2908 };
2909
2910 struct wmi_pdev_set_param_cmd {
2911 u32 tlv_header;
2912 u32 pdev_id;
2913 u32 param_id;
2914 u32 param_value;
2915 } __packed;
2916
2917 struct wmi_pdev_set_ps_mode_cmd {
2918 u32 tlv_header;
2919 u32 vdev_id;
2920 u32 sta_ps_mode;
2921 } __packed;
2922
2923 struct wmi_pdev_suspend_cmd {
2924 u32 tlv_header;
2925 u32 pdev_id;
2926 u32 suspend_opt;
2927 } __packed;
2928
2929 struct wmi_pdev_resume_cmd {
2930 u32 tlv_header;
2931 u32 pdev_id;
2932 } __packed;
2933
2934 struct wmi_pdev_bss_chan_info_req_cmd {
2935 u32 tlv_header;
2936 /* ref wmi_bss_chan_info_req_type */
2937 u32 req_type;
2938 } __packed;
2939
2940 struct wmi_ap_ps_peer_cmd {
2941 u32 tlv_header;
2942 u32 vdev_id;
2943 struct wmi_mac_addr peer_macaddr;
2944 u32 param;
2945 u32 value;
2946 } __packed;
2947
2948 struct wmi_sta_powersave_param_cmd {
2949 u32 tlv_header;
2950 u32 vdev_id;
2951 u32 param;
2952 u32 value;
2953 } __packed;
2954
2955 struct wmi_pdev_set_regdomain_cmd {
2956 u32 tlv_header;
2957 u32 pdev_id;
2958 u32 reg_domain;
2959 u32 reg_domain_2g;
2960 u32 reg_domain_5g;
2961 u32 conformance_test_limit_2g;
2962 u32 conformance_test_limit_5g;
2963 u32 dfs_domain;
2964 } __packed;
2965
2966 struct wmi_peer_set_param_cmd {
2967 u32 tlv_header;
2968 u32 vdev_id;
2969 struct wmi_mac_addr peer_macaddr;
2970 u32 param_id;
2971 u32 param_value;
2972 } __packed;
2973
2974 struct wmi_peer_flush_tids_cmd {
2975 u32 tlv_header;
2976 u32 vdev_id;
2977 struct wmi_mac_addr peer_macaddr;
2978 u32 peer_tid_bitmap;
2979 } __packed;
2980
2981 struct wmi_dfs_phyerr_offload_cmd {
2982 u32 tlv_header;
2983 u32 pdev_id;
2984 } __packed;
2985
2986 struct wmi_bcn_offload_ctrl_cmd {
2987 u32 tlv_header;
2988 u32 vdev_id;
2989 u32 bcn_ctrl_op;
2990 } __packed;
2991
2992 enum scan_dwelltime_adaptive_mode {
2993 SCAN_DWELL_MODE_DEFAULT = 0,
2994 SCAN_DWELL_MODE_CONSERVATIVE = 1,
2995 SCAN_DWELL_MODE_MODERATE = 2,
2996 SCAN_DWELL_MODE_AGGRESSIVE = 3,
2997 SCAN_DWELL_MODE_STATIC = 4
2998 };
2999
3000 #define WLAN_SCAN_MAX_NUM_SSID 10
3001 #define WLAN_SCAN_MAX_NUM_BSSID 10
3002 #define WLAN_SCAN_MAX_NUM_CHANNELS 40
3003
3004 #define WLAN_SSID_MAX_LEN 32
3005
3006 struct element_info {
3007 u32 len;
3008 u8 *ptr;
3009 };
3010
3011 struct wlan_ssid {
3012 u8 length;
3013 u8 ssid[WLAN_SSID_MAX_LEN];
3014 };
3015
3016 #define WMI_IE_BITMAP_SIZE 8
3017
3018 #define WMI_SCAN_MAX_NUM_SSID 0x0A
3019 /* prefix used by scan requestor ids on the host */
3020 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3021
3022 /* prefix used by scan request ids generated on the host */
3023 /* host cycles through the lower 12 bits to generate ids */
3024 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3025
3026 #define WLAN_SCAN_PARAMS_MAX_SSID 16
3027 #define WLAN_SCAN_PARAMS_MAX_BSSID 4
3028 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3029
3030 /* Values lower than this may be refused by some firmware revisions with a scan
3031 * completion with a timedout reason.
3032 */
3033 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3034
3035 /* Scan priority numbers must be sequential, starting with 0 */
3036 enum wmi_scan_priority {
3037 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3038 WMI_SCAN_PRIORITY_LOW,
3039 WMI_SCAN_PRIORITY_MEDIUM,
3040 WMI_SCAN_PRIORITY_HIGH,
3041 WMI_SCAN_PRIORITY_VERY_HIGH,
3042 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
3043 };
3044
3045 enum wmi_scan_event_type {
3046 WMI_SCAN_EVENT_STARTED = BIT(0),
3047 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3048 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3049 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3),
3050 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3051 /* possibly by high-prio scan */
3052 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3053 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3054 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3055 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8),
3056 WMI_SCAN_EVENT_SUSPENDED = BIT(9),
3057 WMI_SCAN_EVENT_RESUMED = BIT(10),
3058 WMI_SCAN_EVENT_MAX = BIT(15),
3059 };
3060
3061 enum wmi_scan_completion_reason {
3062 WMI_SCAN_REASON_COMPLETED,
3063 WMI_SCAN_REASON_CANCELLED,
3064 WMI_SCAN_REASON_PREEMPTED,
3065 WMI_SCAN_REASON_TIMEDOUT,
3066 WMI_SCAN_REASON_INTERNAL_FAILURE,
3067 WMI_SCAN_REASON_MAX,
3068 };
3069
3070 struct wmi_start_scan_cmd {
3071 u32 tlv_header;
3072 u32 scan_id;
3073 u32 scan_req_id;
3074 u32 vdev_id;
3075 u32 scan_priority;
3076 u32 notify_scan_events;
3077 u32 dwell_time_active;
3078 u32 dwell_time_passive;
3079 u32 min_rest_time;
3080 u32 max_rest_time;
3081 u32 repeat_probe_time;
3082 u32 probe_spacing_time;
3083 u32 idle_time;
3084 u32 max_scan_time;
3085 u32 probe_delay;
3086 u32 scan_ctrl_flags;
3087 u32 burst_duration;
3088 u32 num_chan;
3089 u32 num_bssid;
3090 u32 num_ssids;
3091 u32 ie_len;
3092 u32 n_probes;
3093 struct wmi_mac_addr mac_addr;
3094 struct wmi_mac_addr mac_mask;
3095 u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3096 u32 num_vendor_oui;
3097 u32 scan_ctrl_flags_ext;
3098 u32 dwell_time_active_2g;
3099 u32 dwell_time_active_6g;
3100 u32 dwell_time_passive_6g;
3101 u32 scan_start_offset;
3102 } __packed;
3103
3104 #define WMI_SCAN_FLAG_PASSIVE 0x1
3105 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3106 #define WMI_SCAN_ADD_CCK_RATES 0x4
3107 #define WMI_SCAN_ADD_OFDM_RATES 0x8
3108 #define WMI_SCAN_CHAN_STAT_EVENT 0x10
3109 #define WMI_SCAN_FILTER_PROBE_REQ 0x20
3110 #define WMI_SCAN_BYPASS_DFS_CHN 0x40
3111 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3112 #define WMI_SCAN_FILTER_PROMISCUOS 0x100
3113 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3114 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400
3115 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800
3116 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000
3117 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000
3118 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000
3119 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000
3120 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3121 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000
3122 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000
3123 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3124 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3125
3126 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3127 #define WMI_SCAN_DWELL_MODE_SHIFT 21
3128
3129 enum {
3130 WMI_SCAN_DWELL_MODE_DEFAULT = 0,
3131 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3132 WMI_SCAN_DWELL_MODE_MODERATE = 2,
3133 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3,
3134 WMI_SCAN_DWELL_MODE_STATIC = 4,
3135 };
3136
3137 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3138 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3139 WMI_SCAN_DWELL_MODE_MASK))
3140
3141 struct hint_short_ssid {
3142 u32 freq_flags;
3143 u32 short_ssid;
3144 };
3145
3146 struct hint_bssid {
3147 u32 freq_flags;
3148 struct wmi_mac_addr bssid;
3149 };
3150
3151 struct scan_req_params {
3152 u32 scan_id;
3153 u32 scan_req_id;
3154 u32 vdev_id;
3155 u32 pdev_id;
3156 enum wmi_scan_priority scan_priority;
3157 union {
3158 struct {
3159 u32 scan_ev_started:1,
3160 scan_ev_completed:1,
3161 scan_ev_bss_chan:1,
3162 scan_ev_foreign_chan:1,
3163 scan_ev_dequeued:1,
3164 scan_ev_preempted:1,
3165 scan_ev_start_failed:1,
3166 scan_ev_restarted:1,
3167 scan_ev_foreign_chn_exit:1,
3168 scan_ev_invalid:1,
3169 scan_ev_gpio_timeout:1,
3170 scan_ev_suspended:1,
3171 scan_ev_resumed:1;
3172 };
3173 u32 scan_events;
3174 };
3175 u32 dwell_time_active;
3176 u32 dwell_time_active_2g;
3177 u32 dwell_time_passive;
3178 u32 dwell_time_active_6g;
3179 u32 dwell_time_passive_6g;
3180 u32 min_rest_time;
3181 u32 max_rest_time;
3182 u32 repeat_probe_time;
3183 u32 probe_spacing_time;
3184 u32 idle_time;
3185 u32 max_scan_time;
3186 u32 probe_delay;
3187 union {
3188 struct {
3189 u32 scan_f_passive:1,
3190 scan_f_bcast_probe:1,
3191 scan_f_cck_rates:1,
3192 scan_f_ofdm_rates:1,
3193 scan_f_chan_stat_evnt:1,
3194 scan_f_filter_prb_req:1,
3195 scan_f_bypass_dfs_chn:1,
3196 scan_f_continue_on_err:1,
3197 scan_f_offchan_mgmt_tx:1,
3198 scan_f_offchan_data_tx:1,
3199 scan_f_promisc_mode:1,
3200 scan_f_capture_phy_err:1,
3201 scan_f_strict_passive_pch:1,
3202 scan_f_half_rate:1,
3203 scan_f_quarter_rate:1,
3204 scan_f_force_active_dfs_chn:1,
3205 scan_f_add_tpc_ie_in_probe:1,
3206 scan_f_add_ds_ie_in_probe:1,
3207 scan_f_add_spoofed_mac_in_probe:1,
3208 scan_f_add_rand_seq_in_probe:1,
3209 scan_f_en_ie_whitelist_in_probe:1,
3210 scan_f_forced:1,
3211 scan_f_2ghz:1,
3212 scan_f_5ghz:1,
3213 scan_f_80mhz:1;
3214 };
3215 u32 scan_flags;
3216 };
3217 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3218 u32 burst_duration;
3219 u32 num_chan;
3220 u32 num_bssid;
3221 u32 num_ssids;
3222 u32 n_probes;
3223 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS];
3224 u32 notify_scan_events;
3225 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID];
3226 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID];
3227 struct element_info extraie;
3228 struct element_info htcap;
3229 struct element_info vhtcap;
3230 u32 num_hint_s_ssid;
3231 u32 num_hint_bssid;
3232 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3233 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3234 };
3235
3236 struct wmi_ssid_arg {
3237 int len;
3238 const u8 *ssid;
3239 };
3240
3241 struct wmi_bssid_arg {
3242 const u8 *bssid;
3243 };
3244
3245 struct wmi_start_scan_arg {
3246 u32 scan_id;
3247 u32 scan_req_id;
3248 u32 vdev_id;
3249 u32 scan_priority;
3250 u32 notify_scan_events;
3251 u32 dwell_time_active;
3252 u32 dwell_time_passive;
3253 u32 min_rest_time;
3254 u32 max_rest_time;
3255 u32 repeat_probe_time;
3256 u32 probe_spacing_time;
3257 u32 idle_time;
3258 u32 max_scan_time;
3259 u32 probe_delay;
3260 u32 scan_ctrl_flags;
3261
3262 u32 ie_len;
3263 u32 n_channels;
3264 u32 n_ssids;
3265 u32 n_bssids;
3266
3267 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3268 u32 channels[64];
3269 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3270 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3271 };
3272
3273 #define WMI_SCAN_STOP_ONE 0x00000000
3274 #define WMI_SCN_STOP_VAP_ALL 0x01000000
3275 #define WMI_SCAN_STOP_ALL 0x04000000
3276
3277 /* Prefix 0xA000 indicates that the scan request
3278 * is trigger by HOST
3279 */
3280 #define ATH11K_SCAN_ID 0xA000
3281
3282 enum scan_cancel_req_type {
3283 WLAN_SCAN_CANCEL_SINGLE = 1,
3284 WLAN_SCAN_CANCEL_VDEV_ALL,
3285 WLAN_SCAN_CANCEL_PDEV_ALL,
3286 };
3287
3288 struct scan_cancel_param {
3289 u32 requester;
3290 u32 scan_id;
3291 enum scan_cancel_req_type req_type;
3292 u32 vdev_id;
3293 u32 pdev_id;
3294 };
3295
3296 struct wmi_bcn_send_from_host_cmd {
3297 u32 tlv_header;
3298 u32 vdev_id;
3299 u32 data_len;
3300 union {
3301 u32 frag_ptr;
3302 u32 frag_ptr_lo;
3303 };
3304 u32 frame_ctrl;
3305 u32 dtim_flag;
3306 u32 bcn_antenna;
3307 u32 frag_ptr_hi;
3308 };
3309
3310 #define WMI_CHAN_INFO_MODE GENMASK(5, 0)
3311 #define WMI_CHAN_INFO_HT40_PLUS BIT(6)
3312 #define WMI_CHAN_INFO_PASSIVE BIT(7)
3313 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8)
3314 #define WMI_CHAN_INFO_AP_DISABLED BIT(9)
3315 #define WMI_CHAN_INFO_DFS BIT(10)
3316 #define WMI_CHAN_INFO_ALLOW_HT BIT(11)
3317 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12)
3318 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13)
3319 #define WMI_CHAN_INFO_HALF_RATE BIT(14)
3320 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15)
3321 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16)
3322 #define WMI_CHAN_INFO_ALLOW_HE BIT(17)
3323 #define WMI_CHAN_INFO_PSC BIT(18)
3324
3325 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0)
3326 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8)
3327 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16)
3328 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24)
3329
3330 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0)
3331 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8)
3332
3333 struct wmi_channel {
3334 u32 tlv_header;
3335 u32 mhz;
3336 u32 band_center_freq1;
3337 u32 band_center_freq2;
3338 u32 info;
3339 u32 reg_info_1;
3340 u32 reg_info_2;
3341 } __packed;
3342
3343 struct wmi_mgmt_params {
3344 void *tx_frame;
3345 u16 frm_len;
3346 u8 vdev_id;
3347 u16 chanfreq;
3348 void *pdata;
3349 u16 desc_id;
3350 u8 *macaddr;
3351 void *qdf_ctx;
3352 };
3353
3354 enum wmi_sta_ps_mode {
3355 WMI_STA_PS_MODE_DISABLED = 0,
3356 WMI_STA_PS_MODE_ENABLED = 1,
3357 };
3358
3359 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3360 #define WMI_SMPS_MASK_UPPER_3BITS 0x7
3361 #define WMI_SMPS_PARAM_VALUE_SHIFT 29
3362
3363 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3364 #define ATH11K_WMI_FW_HANG_DELAY 0
3365
3366 /* type, 0:unused 1: ASSERT 2: not respond detect command
3367 * delay_time_ms, the simulate will delay time
3368 */
3369
3370 struct wmi_force_fw_hang_cmd {
3371 u32 tlv_header;
3372 u32 type;
3373 u32 delay_time_ms;
3374 };
3375
3376 struct wmi_vdev_set_param_cmd {
3377 u32 tlv_header;
3378 u32 vdev_id;
3379 u32 param_id;
3380 u32 param_value;
3381 } __packed;
3382
3383 enum wmi_stats_id {
3384 WMI_REQUEST_PEER_STAT = BIT(0),
3385 WMI_REQUEST_AP_STAT = BIT(1),
3386 WMI_REQUEST_PDEV_STAT = BIT(2),
3387 WMI_REQUEST_VDEV_STAT = BIT(3),
3388 WMI_REQUEST_BCNFLT_STAT = BIT(4),
3389 WMI_REQUEST_VDEV_RATE_STAT = BIT(5),
3390 WMI_REQUEST_INST_STAT = BIT(6),
3391 WMI_REQUEST_MIB_STAT = BIT(7),
3392 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8),
3393 WMI_REQUEST_CONGESTION_STAT = BIT(9),
3394 WMI_REQUEST_PEER_EXTD_STAT = BIT(10),
3395 WMI_REQUEST_BCN_STAT = BIT(11),
3396 WMI_REQUEST_BCN_STAT_RESET = BIT(12),
3397 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13),
3398 };
3399
3400 struct wmi_request_stats_cmd {
3401 u32 tlv_header;
3402 enum wmi_stats_id stats_id;
3403 u32 vdev_id;
3404 struct wmi_mac_addr peer_macaddr;
3405 u32 pdev_id;
3406 } __packed;
3407
3408 struct wmi_get_pdev_temperature_cmd {
3409 u32 tlv_header;
3410 u32 param;
3411 u32 pdev_id;
3412 } __packed;
3413
3414 #define WMI_BEACON_TX_BUFFER_SIZE 512
3415
3416 struct wmi_bcn_tmpl_cmd {
3417 u32 tlv_header;
3418 u32 vdev_id;
3419 u32 tim_ie_offset;
3420 u32 buf_len;
3421 u32 csa_switch_count_offset;
3422 u32 ext_csa_switch_count_offset;
3423 u32 csa_event_bitmap;
3424 u32 mbssid_ie_offset;
3425 u32 esp_ie_offset;
3426 } __packed;
3427
3428 struct wmi_key_seq_counter {
3429 u32 key_seq_counter_l;
3430 u32 key_seq_counter_h;
3431 } __packed;
3432
3433 struct wmi_vdev_install_key_cmd {
3434 u32 tlv_header;
3435 u32 vdev_id;
3436 struct wmi_mac_addr peer_macaddr;
3437 u32 key_idx;
3438 u32 key_flags;
3439 u32 key_cipher;
3440 struct wmi_key_seq_counter key_rsc_counter;
3441 struct wmi_key_seq_counter key_global_rsc_counter;
3442 struct wmi_key_seq_counter key_tsc_counter;
3443 u8 wpi_key_rsc_counter[16];
3444 u8 wpi_key_tsc_counter[16];
3445 u32 key_len;
3446 u32 key_txmic_len;
3447 u32 key_rxmic_len;
3448 u32 is_group_key_id_valid;
3449 u32 group_key_id;
3450
3451 /* Followed by key_data containing key followed by
3452 * tx mic and then rx mic
3453 */
3454 } __packed;
3455
3456 struct wmi_vdev_install_key_arg {
3457 u32 vdev_id;
3458 const u8 *macaddr;
3459 u32 key_idx;
3460 u32 key_flags;
3461 u32 key_cipher;
3462 u32 key_len;
3463 u32 key_txmic_len;
3464 u32 key_rxmic_len;
3465 u64 key_rsc_counter;
3466 const void *key_data;
3467 };
3468
3469 #define WMI_MAX_SUPPORTED_RATES 128
3470 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3
3471 #define WMI_HOST_MAX_HE_RATE_SET 3
3472 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
3473 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
3474 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
3475
3476 struct wmi_rate_set_arg {
3477 u32 num_rates;
3478 u8 rates[WMI_MAX_SUPPORTED_RATES];
3479 };
3480
3481 struct peer_assoc_params {
3482 struct wmi_mac_addr peer_macaddr;
3483 u32 vdev_id;
3484 u32 peer_new_assoc;
3485 u32 peer_associd;
3486 u32 peer_flags;
3487 u32 peer_caps;
3488 u32 peer_listen_intval;
3489 u32 peer_ht_caps;
3490 u32 peer_max_mpdu;
3491 u32 peer_mpdu_density;
3492 u32 peer_rate_caps;
3493 u32 peer_nss;
3494 u32 peer_vht_caps;
3495 u32 peer_phymode;
3496 u32 peer_ht_info[2];
3497 struct wmi_rate_set_arg peer_legacy_rates;
3498 struct wmi_rate_set_arg peer_ht_rates;
3499 u32 rx_max_rate;
3500 u32 rx_mcs_set;
3501 u32 tx_max_rate;
3502 u32 tx_mcs_set;
3503 u8 vht_capable;
3504 u8 min_data_rate;
3505 u32 tx_max_mcs_nss;
3506 u32 peer_bw_rxnss_override;
3507 bool is_pmf_enabled;
3508 bool is_wme_set;
3509 bool qos_flag;
3510 bool apsd_flag;
3511 bool ht_flag;
3512 bool bw_40;
3513 bool bw_80;
3514 bool bw_160;
3515 bool stbc_flag;
3516 bool ldpc_flag;
3517 bool static_mimops_flag;
3518 bool dynamic_mimops_flag;
3519 bool spatial_mux_flag;
3520 bool vht_flag;
3521 bool vht_ng_flag;
3522 bool need_ptk_4_way;
3523 bool need_gtk_2_way;
3524 bool auth_flag;
3525 bool safe_mode_enabled;
3526 bool amsdu_disable;
3527 /* Use common structure */
3528 u8 peer_mac[ETH_ALEN];
3529
3530 bool he_flag;
3531 u32 peer_he_cap_macinfo[2];
3532 u32 peer_he_cap_macinfo_internal;
3533 u32 peer_he_caps_6ghz;
3534 u32 peer_he_ops;
3535 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3536 u32 peer_he_mcs_count;
3537 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3538 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3539 bool twt_responder;
3540 bool twt_requester;
3541 struct ath11k_ppe_threshold peer_ppet;
3542 };
3543
3544 struct wmi_peer_assoc_complete_cmd {
3545 u32 tlv_header;
3546 struct wmi_mac_addr peer_macaddr;
3547 u32 vdev_id;
3548 u32 peer_new_assoc;
3549 u32 peer_associd;
3550 u32 peer_flags;
3551 u32 peer_caps;
3552 u32 peer_listen_intval;
3553 u32 peer_ht_caps;
3554 u32 peer_max_mpdu;
3555 u32 peer_mpdu_density;
3556 u32 peer_rate_caps;
3557 u32 peer_nss;
3558 u32 peer_vht_caps;
3559 u32 peer_phymode;
3560 u32 peer_ht_info[2];
3561 u32 num_peer_legacy_rates;
3562 u32 num_peer_ht_rates;
3563 u32 peer_bw_rxnss_override;
3564 struct wmi_ppe_threshold peer_ppet;
3565 u32 peer_he_cap_info;
3566 u32 peer_he_ops;
3567 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3568 u32 peer_he_mcs;
3569 u32 peer_he_cap_info_ext;
3570 u32 peer_he_cap_info_internal;
3571 u32 min_data_rate;
3572 u32 peer_he_caps_6ghz;
3573 } __packed;
3574
3575 struct wmi_stop_scan_cmd {
3576 u32 tlv_header;
3577 u32 requestor;
3578 u32 scan_id;
3579 u32 req_type;
3580 u32 vdev_id;
3581 u32 pdev_id;
3582 };
3583
3584 struct scan_chan_list_params {
3585 u32 pdev_id;
3586 u16 nallchans;
3587 struct channel_param ch_param[1];
3588 };
3589
3590 struct wmi_scan_chan_list_cmd {
3591 u32 tlv_header;
3592 u32 num_scan_chans;
3593 u32 flags;
3594 u32 pdev_id;
3595 } __packed;
3596
3597 #define WMI_MGMT_SEND_DOWNLD_LEN 64
3598
3599 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
3600 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
3601 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20)
3602 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28)
3603
3604 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0)
3605 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8)
3606 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15)
3607 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20)
3608 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21)
3609
3610 struct wmi_mgmt_send_params {
3611 u32 tlv_header;
3612 u32 tx_params_dword0;
3613 u32 tx_params_dword1;
3614 };
3615
3616 struct wmi_mgmt_send_cmd {
3617 u32 tlv_header;
3618 u32 vdev_id;
3619 u32 desc_id;
3620 u32 chanfreq;
3621 u32 paddr_lo;
3622 u32 paddr_hi;
3623 u32 frame_len;
3624 u32 buf_len;
3625 u32 tx_params_valid;
3626
3627 /* This TLV is followed by struct wmi_mgmt_frame */
3628
3629 /* Followed by struct wmi_mgmt_send_params */
3630 } __packed;
3631
3632 struct wmi_sta_powersave_mode_cmd {
3633 u32 tlv_header;
3634 u32 vdev_id;
3635 u32 sta_ps_mode;
3636 };
3637
3638 struct wmi_sta_smps_force_mode_cmd {
3639 u32 tlv_header;
3640 u32 vdev_id;
3641 u32 forced_mode;
3642 };
3643
3644 struct wmi_sta_smps_param_cmd {
3645 u32 tlv_header;
3646 u32 vdev_id;
3647 u32 param;
3648 u32 value;
3649 };
3650
3651 struct wmi_bcn_prb_info {
3652 u32 tlv_header;
3653 u32 caps;
3654 u32 erp;
3655 } __packed;
3656
3657 enum {
3658 WMI_PDEV_SUSPEND,
3659 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3660 };
3661
3662 struct green_ap_ps_params {
3663 u32 value;
3664 };
3665
3666 struct wmi_pdev_green_ap_ps_enable_cmd_param {
3667 u32 tlv_header;
3668 u32 pdev_id;
3669 u32 enable;
3670 };
3671
3672 struct ap_ps_params {
3673 u32 vdev_id;
3674 u32 param;
3675 u32 value;
3676 };
3677
3678 struct vdev_set_params {
3679 u32 if_id;
3680 u32 param_id;
3681 u32 param_value;
3682 };
3683
3684 struct stats_request_params {
3685 u32 stats_id;
3686 u32 vdev_id;
3687 u32 pdev_id;
3688 };
3689
3690 enum set_init_cc_type {
3691 WMI_COUNTRY_INFO_TYPE_ALPHA,
3692 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3693 WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3694 };
3695
3696 enum set_init_cc_flags {
3697 INVALID_CC,
3698 CC_IS_SET,
3699 REGDMN_IS_SET,
3700 ALPHA_IS_SET,
3701 };
3702
3703 struct wmi_init_country_params {
3704 union {
3705 u16 country_code;
3706 u16 regdom_id;
3707 u8 alpha2[3];
3708 } cc_info;
3709 enum set_init_cc_flags flags;
3710 };
3711
3712 struct wmi_init_country_cmd {
3713 u32 tlv_header;
3714 u32 pdev_id;
3715 u32 init_cc_type;
3716 union {
3717 u32 country_code;
3718 u32 regdom_id;
3719 u32 alpha2;
3720 } cc_info;
3721 } __packed;
3722
3723 #define THERMAL_LEVELS 1
3724 struct tt_level_config {
3725 u32 tmplwm;
3726 u32 tmphwm;
3727 u32 dcoffpercent;
3728 u32 priority;
3729 };
3730
3731 struct thermal_mitigation_params {
3732 u32 pdev_id;
3733 u32 enable;
3734 u32 dc;
3735 u32 dc_per_event;
3736 struct tt_level_config levelconf[THERMAL_LEVELS];
3737 };
3738
3739 struct wmi_therm_throt_config_request_cmd {
3740 u32 tlv_header;
3741 u32 pdev_id;
3742 u32 enable;
3743 u32 dc;
3744 u32 dc_per_event;
3745 u32 therm_throt_levels;
3746 } __packed;
3747
3748 struct wmi_therm_throt_level_config_info {
3749 u32 tlv_header;
3750 u32 temp_lwm;
3751 u32 temp_hwm;
3752 u32 dc_off_percent;
3753 u32 prio;
3754 } __packed;
3755
3756 struct wmi_delba_send_cmd {
3757 u32 tlv_header;
3758 u32 vdev_id;
3759 struct wmi_mac_addr peer_macaddr;
3760 u32 tid;
3761 u32 initiator;
3762 u32 reasoncode;
3763 } __packed;
3764
3765 struct wmi_addba_setresponse_cmd {
3766 u32 tlv_header;
3767 u32 vdev_id;
3768 struct wmi_mac_addr peer_macaddr;
3769 u32 tid;
3770 u32 statuscode;
3771 } __packed;
3772
3773 struct wmi_addba_send_cmd {
3774 u32 tlv_header;
3775 u32 vdev_id;
3776 struct wmi_mac_addr peer_macaddr;
3777 u32 tid;
3778 u32 buffersize;
3779 } __packed;
3780
3781 struct wmi_addba_clear_resp_cmd {
3782 u32 tlv_header;
3783 u32 vdev_id;
3784 struct wmi_mac_addr peer_macaddr;
3785 } __packed;
3786
3787 struct wmi_pdev_pktlog_filter_info {
3788 u32 tlv_header;
3789 struct wmi_mac_addr peer_macaddr;
3790 } __packed;
3791
3792 struct wmi_pdev_pktlog_filter_cmd {
3793 u32 tlv_header;
3794 u32 pdev_id;
3795 u32 enable;
3796 u32 filter_type;
3797 u32 num_mac;
3798 } __packed;
3799
3800 enum ath11k_wmi_pktlog_enable {
3801 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0,
3802 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
3803 };
3804
3805 struct wmi_pktlog_enable_cmd {
3806 u32 tlv_header;
3807 u32 pdev_id;
3808 u32 evlist; /* WMI_PKTLOG_EVENT */
3809 u32 enable;
3810 } __packed;
3811
3812 struct wmi_pktlog_disable_cmd {
3813 u32 tlv_header;
3814 u32 pdev_id;
3815 } __packed;
3816
3817 #define DFS_PHYERR_UNIT_TEST_CMD 0
3818 #define DFS_UNIT_TEST_MODULE 0x2b
3819 #define DFS_UNIT_TEST_TOKEN 0xAA
3820
3821 enum dfs_test_args_idx {
3822 DFS_TEST_CMDID = 0,
3823 DFS_TEST_PDEV_ID,
3824 DFS_TEST_RADAR_PARAM,
3825 DFS_MAX_TEST_ARGS,
3826 };
3827
3828 struct wmi_dfs_unit_test_arg {
3829 u32 cmd_id;
3830 u32 pdev_id;
3831 u32 radar_param;
3832 };
3833
3834 struct wmi_unit_test_cmd {
3835 u32 tlv_header;
3836 u32 vdev_id;
3837 u32 module_id;
3838 u32 num_args;
3839 u32 diag_token;
3840 /* Followed by test args*/
3841 } __packed;
3842
3843 #define MAX_SUPPORTED_RATES 128
3844
3845 #define WMI_PEER_AUTH 0x00000001
3846 #define WMI_PEER_QOS 0x00000002
3847 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004
3848 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010
3849 #define WMI_PEER_HE 0x00000400
3850 #define WMI_PEER_APSD 0x00000800
3851 #define WMI_PEER_HT 0x00001000
3852 #define WMI_PEER_40MHZ 0x00002000
3853 #define WMI_PEER_STBC 0x00008000
3854 #define WMI_PEER_LDPC 0x00010000
3855 #define WMI_PEER_DYN_MIMOPS 0x00020000
3856 #define WMI_PEER_STATIC_MIMOPS 0x00040000
3857 #define WMI_PEER_SPATIAL_MUX 0x00200000
3858 #define WMI_PEER_TWT_REQ 0x00400000
3859 #define WMI_PEER_TWT_RESP 0x00800000
3860 #define WMI_PEER_VHT 0x02000000
3861 #define WMI_PEER_80MHZ 0x04000000
3862 #define WMI_PEER_PMF 0x08000000
3863 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
3864 * Need to be cleaned up
3865 */
3866 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000
3867 #define WMI_PEER_160MHZ 0x40000000
3868 #define WMI_PEER_SAFEMODE_EN 0x80000000
3869
3870 struct beacon_tmpl_params {
3871 u8 vdev_id;
3872 u32 tim_ie_offset;
3873 u32 tmpl_len;
3874 u32 tmpl_len_aligned;
3875 u32 csa_switch_count_offset;
3876 u32 ext_csa_switch_count_offset;
3877 u8 *frm;
3878 };
3879
3880 struct wmi_rate_set {
3881 u32 num_rates;
3882 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
3883 };
3884
3885 struct wmi_vht_rate_set {
3886 u32 tlv_header;
3887 u32 rx_max_rate;
3888 u32 rx_mcs_set;
3889 u32 tx_max_rate;
3890 u32 tx_mcs_set;
3891 u32 tx_max_mcs_nss;
3892 } __packed;
3893
3894 struct wmi_he_rate_set {
3895 u32 tlv_header;
3896 u32 rx_mcs_set;
3897 u32 tx_mcs_set;
3898 } __packed;
3899
3900 #define MAX_REG_RULES 10
3901 #define REG_ALPHA2_LEN 2
3902
3903 enum wmi_start_event_param {
3904 WMI_VDEV_START_RESP_EVENT = 0,
3905 WMI_VDEV_RESTART_RESP_EVENT,
3906 };
3907
3908 struct wmi_vdev_start_resp_event {
3909 u32 vdev_id;
3910 u32 requestor_id;
3911 enum wmi_start_event_param resp_type;
3912 u32 status;
3913 u32 chain_mask;
3914 u32 smps_mode;
3915 union {
3916 u32 mac_id;
3917 u32 pdev_id;
3918 };
3919 u32 cfgd_tx_streams;
3920 u32 cfgd_rx_streams;
3921 } __packed;
3922
3923 /* VDEV start response status codes */
3924 enum wmi_vdev_start_resp_status_code {
3925 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
3926 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
3927 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
3928 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
3929 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
3930 };
3931
3932 ;
3933 enum cc_setting_code {
3934 REG_SET_CC_STATUS_PASS = 0,
3935 REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3936 REG_INIT_ALPHA2_NOT_FOUND = 2,
3937 REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3938 REG_SET_CC_STATUS_NO_MEMORY = 4,
3939 REG_SET_CC_STATUS_FAIL = 5,
3940 };
3941
3942 /* Regaulatory Rule Flags Passed by FW */
3943 #define REGULATORY_CHAN_DISABLED BIT(0)
3944 #define REGULATORY_CHAN_NO_IR BIT(1)
3945 #define REGULATORY_CHAN_RADAR BIT(3)
3946 #define REGULATORY_CHAN_NO_OFDM BIT(6)
3947 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9)
3948
3949 #define REGULATORY_CHAN_NO_HT40 BIT(4)
3950 #define REGULATORY_CHAN_NO_80MHZ BIT(7)
3951 #define REGULATORY_CHAN_NO_160MHZ BIT(8)
3952 #define REGULATORY_CHAN_NO_20MHZ BIT(11)
3953 #define REGULATORY_CHAN_NO_10MHZ BIT(12)
3954
3955 enum {
3956 WMI_REG_SET_CC_STATUS_PASS = 0,
3957 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
3958 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
3959 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
3960 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
3961 WMI_REG_SET_CC_STATUS_FAIL = 5,
3962 };
3963
3964 struct cur_reg_rule {
3965 u16 start_freq;
3966 u16 end_freq;
3967 u16 max_bw;
3968 u8 reg_power;
3969 u8 ant_gain;
3970 u16 flags;
3971 };
3972
3973 struct cur_regulatory_info {
3974 enum cc_setting_code status_code;
3975 u8 num_phy;
3976 u8 phy_id;
3977 u16 reg_dmn_pair;
3978 u16 ctry_code;
3979 u8 alpha2[REG_ALPHA2_LEN + 1];
3980 u32 dfs_region;
3981 u32 phybitmap;
3982 u32 min_bw_2g;
3983 u32 max_bw_2g;
3984 u32 min_bw_5g;
3985 u32 max_bw_5g;
3986 u32 num_2g_reg_rules;
3987 u32 num_5g_reg_rules;
3988 struct cur_reg_rule *reg_rules_2g_ptr;
3989 struct cur_reg_rule *reg_rules_5g_ptr;
3990 };
3991
3992 struct wmi_reg_chan_list_cc_event {
3993 u32 status_code;
3994 u32 phy_id;
3995 u32 alpha2;
3996 u32 num_phy;
3997 u32 country_id;
3998 u32 domain_code;
3999 u32 dfs_region;
4000 u32 phybitmap;
4001 u32 min_bw_2g;
4002 u32 max_bw_2g;
4003 u32 min_bw_5g;
4004 u32 max_bw_5g;
4005 u32 num_2g_reg_rules;
4006 u32 num_5g_reg_rules;
4007 } __packed;
4008
4009 struct wmi_regulatory_rule_struct {
4010 u32 tlv_header;
4011 u32 freq_info;
4012 u32 bw_pwr_info;
4013 u32 flag_info;
4014 };
4015
4016 struct wmi_peer_delete_resp_event {
4017 u32 vdev_id;
4018 struct wmi_mac_addr peer_macaddr;
4019 } __packed;
4020
4021 struct wmi_bcn_tx_status_event {
4022 u32 vdev_id;
4023 u32 tx_status;
4024 } __packed;
4025
4026 struct wmi_vdev_stopped_event {
4027 u32 vdev_id;
4028 } __packed;
4029
4030 struct wmi_pdev_bss_chan_info_event {
4031 u32 pdev_id;
4032 u32 freq; /* Units in MHz */
4033 u32 noise_floor; /* units are dBm */
4034 /* rx clear - how often the channel was unused */
4035 u32 rx_clear_count_low;
4036 u32 rx_clear_count_high;
4037 /* cycle count - elapsed time during measured period, in clock ticks */
4038 u32 cycle_count_low;
4039 u32 cycle_count_high;
4040 /* tx cycle count - elapsed time spent in tx, in clock ticks */
4041 u32 tx_cycle_count_low;
4042 u32 tx_cycle_count_high;
4043 /* rx cycle count - elapsed time spent in rx, in clock ticks */
4044 u32 rx_cycle_count_low;
4045 u32 rx_cycle_count_high;
4046 /*rx_cycle cnt for my bss in 64bits format */
4047 u32 rx_bss_cycle_count_low;
4048 u32 rx_bss_cycle_count_high;
4049 } __packed;
4050
4051 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4052
4053 struct wmi_vdev_install_key_compl_event {
4054 u32 vdev_id;
4055 struct wmi_mac_addr peer_macaddr;
4056 u32 key_idx;
4057 u32 key_flags;
4058 u32 status;
4059 } __packed;
4060
4061 struct wmi_vdev_install_key_complete_arg {
4062 u32 vdev_id;
4063 const u8 *macaddr;
4064 u32 key_idx;
4065 u32 key_flags;
4066 u32 status;
4067 };
4068
4069 struct wmi_peer_assoc_conf_event {
4070 u32 vdev_id;
4071 struct wmi_mac_addr peer_macaddr;
4072 } __packed;
4073
4074 struct wmi_peer_assoc_conf_arg {
4075 u32 vdev_id;
4076 const u8 *macaddr;
4077 };
4078
4079 /*
4080 * PDEV statistics
4081 */
4082 struct wmi_pdev_stats_base {
4083 s32 chan_nf;
4084 u32 tx_frame_count; /* Cycles spent transmitting frames */
4085 u32 rx_frame_count; /* Cycles spent receiving frames */
4086 u32 rx_clear_count; /* Total channel busy time, evidently */
4087 u32 cycle_count; /* Total on-channel time */
4088 u32 phy_err_count;
4089 u32 chan_tx_pwr;
4090 } __packed;
4091
4092 struct wmi_pdev_stats_extra {
4093 u32 ack_rx_bad;
4094 u32 rts_bad;
4095 u32 rts_good;
4096 u32 fcs_bad;
4097 u32 no_beacons;
4098 u32 mib_int_count;
4099 } __packed;
4100
4101 struct wmi_pdev_stats_tx {
4102 /* Num HTT cookies queued to dispatch list */
4103 s32 comp_queued;
4104
4105 /* Num HTT cookies dispatched */
4106 s32 comp_delivered;
4107
4108 /* Num MSDU queued to WAL */
4109 s32 msdu_enqued;
4110
4111 /* Num MPDU queue to WAL */
4112 s32 mpdu_enqued;
4113
4114 /* Num MSDUs dropped by WMM limit */
4115 s32 wmm_drop;
4116
4117 /* Num Local frames queued */
4118 s32 local_enqued;
4119
4120 /* Num Local frames done */
4121 s32 local_freed;
4122
4123 /* Num queued to HW */
4124 s32 hw_queued;
4125
4126 /* Num PPDU reaped from HW */
4127 s32 hw_reaped;
4128
4129 /* Num underruns */
4130 s32 underrun;
4131
4132 /* Num PPDUs cleaned up in TX abort */
4133 s32 tx_abort;
4134
4135 /* Num MPDUs requed by SW */
4136 s32 mpdus_requed;
4137
4138 /* excessive retries */
4139 u32 tx_ko;
4140
4141 /* data hw rate code */
4142 u32 data_rc;
4143
4144 /* Scheduler self triggers */
4145 u32 self_triggers;
4146
4147 /* frames dropped due to excessive sw retries */
4148 u32 sw_retry_failure;
4149
4150 /* illegal rate phy errors */
4151 u32 illgl_rate_phy_err;
4152
4153 /* wal pdev continuous xretry */
4154 u32 pdev_cont_xretry;
4155
4156 /* wal pdev tx timeouts */
4157 u32 pdev_tx_timeout;
4158
4159 /* wal pdev resets */
4160 u32 pdev_resets;
4161
4162 /* frames dropped due to non-availability of stateless TIDs */
4163 u32 stateless_tid_alloc_failure;
4164
4165 /* PhY/BB underrun */
4166 u32 phy_underrun;
4167
4168 /* MPDU is more than txop limit */
4169 u32 txop_ovf;
4170 } __packed;
4171
4172 struct wmi_pdev_stats_rx {
4173 /* Cnts any change in ring routing mid-ppdu */
4174 s32 mid_ppdu_route_change;
4175
4176 /* Total number of statuses processed */
4177 s32 status_rcvd;
4178
4179 /* Extra frags on rings 0-3 */
4180 s32 r0_frags;
4181 s32 r1_frags;
4182 s32 r2_frags;
4183 s32 r3_frags;
4184
4185 /* MSDUs / MPDUs delivered to HTT */
4186 s32 htt_msdus;
4187 s32 htt_mpdus;
4188
4189 /* MSDUs / MPDUs delivered to local stack */
4190 s32 loc_msdus;
4191 s32 loc_mpdus;
4192
4193 /* AMSDUs that have more MSDUs than the status ring size */
4194 s32 oversize_amsdu;
4195
4196 /* Number of PHY errors */
4197 s32 phy_errs;
4198
4199 /* Number of PHY errors drops */
4200 s32 phy_err_drop;
4201
4202 /* Number of mpdu errors - FCS, MIC, ENC etc. */
4203 s32 mpdu_errs;
4204 } __packed;
4205
4206 struct wmi_pdev_stats {
4207 struct wmi_pdev_stats_base base;
4208 struct wmi_pdev_stats_tx tx;
4209 struct wmi_pdev_stats_rx rx;
4210 } __packed;
4211
4212 #define WLAN_MAX_AC 4
4213 #define MAX_TX_RATE_VALUES 10
4214 #define MAX_TX_RATE_VALUES 10
4215
4216 struct wmi_vdev_stats {
4217 u32 vdev_id;
4218 u32 beacon_snr;
4219 u32 data_snr;
4220 u32 num_tx_frames[WLAN_MAX_AC];
4221 u32 num_rx_frames;
4222 u32 num_tx_frames_retries[WLAN_MAX_AC];
4223 u32 num_tx_frames_failures[WLAN_MAX_AC];
4224 u32 num_rts_fail;
4225 u32 num_rts_success;
4226 u32 num_rx_err;
4227 u32 num_rx_discard;
4228 u32 num_tx_not_acked;
4229 u32 tx_rate_history[MAX_TX_RATE_VALUES];
4230 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4231 } __packed;
4232
4233 struct wmi_bcn_stats {
4234 u32 vdev_id;
4235 u32 tx_bcn_succ_cnt;
4236 u32 tx_bcn_outage_cnt;
4237 } __packed;
4238
4239 struct wmi_stats_event {
4240 u32 stats_id;
4241 u32 num_pdev_stats;
4242 u32 num_vdev_stats;
4243 u32 num_peer_stats;
4244 u32 num_bcnflt_stats;
4245 u32 num_chan_stats;
4246 u32 num_mib_stats;
4247 u32 pdev_id;
4248 u32 num_bcn_stats;
4249 u32 num_peer_extd_stats;
4250 u32 num_peer_extd2_stats;
4251 } __packed;
4252
4253 struct wmi_pdev_ctl_failsafe_chk_event {
4254 u32 pdev_id;
4255 u32 ctl_failsafe_status;
4256 } __packed;
4257
4258 struct wmi_pdev_csa_switch_ev {
4259 u32 pdev_id;
4260 u32 current_switch_count;
4261 u32 num_vdevs;
4262 } __packed;
4263
4264 struct wmi_pdev_radar_ev {
4265 u32 pdev_id;
4266 u32 detection_mode;
4267 u32 chan_freq;
4268 u32 chan_width;
4269 u32 detector_id;
4270 u32 segment_id;
4271 u32 timestamp;
4272 u32 is_chirp;
4273 s32 freq_offset;
4274 s32 sidx;
4275 } __packed;
4276
4277 struct wmi_pdev_temperature_event {
4278 /* temperature value in Celcius degree */
4279 s32 temp;
4280 u32 pdev_id;
4281 } __packed;
4282
4283 #define WMI_RX_STATUS_OK 0x00
4284 #define WMI_RX_STATUS_ERR_CRC 0x01
4285 #define WMI_RX_STATUS_ERR_DECRYPT 0x08
4286 #define WMI_RX_STATUS_ERR_MIC 0x10
4287 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
4288
4289 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4290
4291 struct mgmt_rx_event_params {
4292 u32 chan_freq;
4293 u32 channel;
4294 u32 snr;
4295 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4296 u32 rate;
4297 enum wmi_phy_mode phy_mode;
4298 u32 buf_len;
4299 int status;
4300 u32 flags;
4301 int rssi;
4302 u32 tsf_delta;
4303 u8 pdev_id;
4304 };
4305
4306 #define ATH_MAX_ANTENNA 4
4307
4308 struct wmi_mgmt_rx_hdr {
4309 u32 channel;
4310 u32 snr;
4311 u32 rate;
4312 u32 phy_mode;
4313 u32 buf_len;
4314 u32 status;
4315 u32 rssi_ctl[ATH_MAX_ANTENNA];
4316 u32 flags;
4317 int rssi;
4318 u32 tsf_delta;
4319 u32 rx_tsf_l32;
4320 u32 rx_tsf_u32;
4321 u32 pdev_id;
4322 u32 chan_freq;
4323 } __packed;
4324
4325 #define MAX_ANTENNA_EIGHT 8
4326
4327 struct wmi_rssi_ctl_ext {
4328 u32 tlv_header;
4329 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4330 };
4331
4332 struct wmi_mgmt_tx_compl_event {
4333 u32 desc_id;
4334 u32 status;
4335 u32 pdev_id;
4336 } __packed;
4337
4338 struct wmi_scan_event {
4339 u32 event_type; /* %WMI_SCAN_EVENT_ */
4340 u32 reason; /* %WMI_SCAN_REASON_ */
4341 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4342 u32 scan_req_id;
4343 u32 scan_id;
4344 u32 vdev_id;
4345 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4346 * In case of AP it is TSF of the AP vdev
4347 * In case of STA connected state, this is the TSF of the AP
4348 * In case of STA not connected, it will be the free running HW timer
4349 */
4350 u32 tsf_timestamp;
4351 } __packed;
4352
4353 struct wmi_peer_sta_kickout_arg {
4354 const u8 *mac_addr;
4355 };
4356
4357 struct wmi_peer_sta_kickout_event {
4358 struct wmi_mac_addr peer_macaddr;
4359 } __packed;
4360
4361 enum wmi_roam_reason {
4362 WMI_ROAM_REASON_BETTER_AP = 1,
4363 WMI_ROAM_REASON_BEACON_MISS = 2,
4364 WMI_ROAM_REASON_LOW_RSSI = 3,
4365 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4366 WMI_ROAM_REASON_HO_FAILED = 5,
4367
4368 /* keep last */
4369 WMI_ROAM_REASON_MAX,
4370 };
4371
4372 struct wmi_roam_event {
4373 u32 vdev_id;
4374 u32 reason;
4375 u32 rssi;
4376 } __packed;
4377
4378 #define WMI_CHAN_INFO_START_RESP 0
4379 #define WMI_CHAN_INFO_END_RESP 1
4380
4381 struct wmi_chan_info_event {
4382 u32 err_code;
4383 u32 freq;
4384 u32 cmd_flags;
4385 u32 noise_floor;
4386 u32 rx_clear_count;
4387 u32 cycle_count;
4388 u32 chan_tx_pwr_range;
4389 u32 chan_tx_pwr_tp;
4390 u32 rx_frame_count;
4391 u32 my_bss_rx_cycle_count;
4392 u32 rx_11b_mode_data_duration;
4393 u32 tx_frame_cnt;
4394 u32 mac_clk_mhz;
4395 u32 vdev_id;
4396 } __packed;
4397
4398 struct ath11k_targ_cap {
4399 u32 phy_capability;
4400 u32 max_frag_entry;
4401 u32 num_rf_chains;
4402 u32 ht_cap_info;
4403 u32 vht_cap_info;
4404 u32 vht_supp_mcs;
4405 u32 hw_min_tx_power;
4406 u32 hw_max_tx_power;
4407 u32 sys_cap_info;
4408 u32 min_pkt_size_enable;
4409 u32 max_bcn_ie_size;
4410 u32 max_num_scan_channels;
4411 u32 max_supported_macs;
4412 u32 wmi_fw_sub_feat_caps;
4413 u32 txrx_chainmask;
4414 u32 default_dbs_hw_mode_index;
4415 u32 num_msdu_desc;
4416 };
4417
4418 enum wmi_vdev_type {
4419 WMI_VDEV_TYPE_AP = 1,
4420 WMI_VDEV_TYPE_STA = 2,
4421 WMI_VDEV_TYPE_IBSS = 3,
4422 WMI_VDEV_TYPE_MONITOR = 4,
4423 };
4424
4425 enum wmi_vdev_subtype {
4426 WMI_VDEV_SUBTYPE_NONE,
4427 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4428 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4429 WMI_VDEV_SUBTYPE_P2P_GO,
4430 WMI_VDEV_SUBTYPE_PROXY_STA,
4431 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4432 WMI_VDEV_SUBTYPE_MESH_11S,
4433 };
4434
4435 enum wmi_sta_powersave_param {
4436 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4437 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4438 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4439 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4440 WMI_STA_PS_PARAM_UAPSD = 4,
4441 };
4442
4443 #define WMI_UAPSD_AC_TYPE_DELI 0
4444 #define WMI_UAPSD_AC_TYPE_TRIG 1
4445
4446 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
4447 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \
4448 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
4449
4450 enum wmi_sta_ps_param_uapsd {
4451 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4452 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4453 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4454 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4455 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4456 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4457 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4458 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4459 };
4460
4461 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
4462
4463 struct wmi_sta_uapsd_auto_trig_param {
4464 u32 wmm_ac;
4465 u32 user_priority;
4466 u32 service_interval;
4467 u32 suspend_interval;
4468 u32 delay_interval;
4469 };
4470
4471 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
4472 u32 vdev_id;
4473 struct wmi_mac_addr peer_macaddr;
4474 u32 num_ac;
4475 };
4476
4477 struct wmi_sta_uapsd_auto_trig_arg {
4478 u32 wmm_ac;
4479 u32 user_priority;
4480 u32 service_interval;
4481 u32 suspend_interval;
4482 u32 delay_interval;
4483 };
4484
4485 enum wmi_sta_ps_param_tx_wake_threshold {
4486 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4487 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4488
4489 /* Values greater than one indicate that many TX attempts per beacon
4490 * interval before the STA will wake up
4491 */
4492 };
4493
4494 /* The maximum number of PS-Poll frames the FW will send in response to
4495 * traffic advertised in TIM before waking up (by sending a null frame with PS
4496 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
4497 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
4498 * parameter is used when the RX wake policy is
4499 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
4500 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
4501 */
4502 enum wmi_sta_ps_param_pspoll_count {
4503 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4504 /* Values greater than 0 indicate the maximum numer of PS-Poll frames
4505 * FW will send before waking up.
4506 */
4507 };
4508
4509 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
4510 enum wmi_ap_ps_param_uapsd {
4511 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4512 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4513 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4514 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4515 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4516 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4517 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4518 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4519 };
4520
4521 /* U-APSD maximum service period of peer station */
4522 enum wmi_ap_ps_peer_param_max_sp {
4523 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4524 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4525 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4526 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4527 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4528 };
4529
4530 enum wmi_ap_ps_peer_param {
4531 /** Set uapsd configuration for a given peer.
4532 *
4533 * This include the delivery and trigger enabled state for each AC.
4534 * The host MLME needs to set this based on AP capability and stations
4535 * request Set in the association request received from the station.
4536 *
4537 * Lower 8 bits of the value specify the UAPSD configuration.
4538 *
4539 * (see enum wmi_ap_ps_param_uapsd)
4540 * The default value is 0.
4541 */
4542 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4543
4544 /**
4545 * Set the service period for a UAPSD capable station
4546 *
4547 * The service period from wme ie in the (re)assoc request frame.
4548 *
4549 * (see enum wmi_ap_ps_peer_param_max_sp)
4550 */
4551 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4552
4553 /** Time in seconds for aging out buffered frames
4554 * for STA in power save
4555 */
4556 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4557
4558 /** Specify frame types that are considered SIFS
4559 * RESP trigger frame
4560 */
4561 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
4562
4563 /** Specifies the trigger state of TID.
4564 * Valid only for UAPSD frame type
4565 */
4566 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
4567
4568 /* Specifies the WNM sleep state of a STA */
4569 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
4570 };
4571
4572 #define DISABLE_SIFS_RESPONSE_TRIGGER 0
4573
4574 #define WMI_MAX_KEY_INDEX 3
4575 #define WMI_MAX_KEY_LEN 32
4576
4577 #define WMI_KEY_PAIRWISE 0x00
4578 #define WMI_KEY_GROUP 0x01
4579
4580 #define WMI_CIPHER_NONE 0x0 /* clear key */
4581 #define WMI_CIPHER_WEP 0x1
4582 #define WMI_CIPHER_TKIP 0x2
4583 #define WMI_CIPHER_AES_OCB 0x3
4584 #define WMI_CIPHER_AES_CCM 0x4
4585 #define WMI_CIPHER_WAPI 0x5
4586 #define WMI_CIPHER_CKIP 0x6
4587 #define WMI_CIPHER_AES_CMAC 0x7
4588 #define WMI_CIPHER_ANY 0x8
4589 #define WMI_CIPHER_AES_GCM 0x9
4590 #define WMI_CIPHER_AES_GMAC 0xa
4591
4592 /* Value to disable fixed rate setting */
4593 #define WMI_FIXED_RATE_NONE (0xffff)
4594
4595 #define ATH11K_RC_VERSION_OFFSET 28
4596 #define ATH11K_RC_PREAMBLE_OFFSET 8
4597 #define ATH11K_RC_NSS_OFFSET 5
4598
4599 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \
4600 ((1 << ATH11K_RC_VERSION_OFFSET) | \
4601 ((nss) << ATH11K_RC_NSS_OFFSET) | \
4602 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \
4603 (rate))
4604
4605 /* Preamble types to be used with VDEV fixed rate configuration */
4606 enum wmi_rate_preamble {
4607 WMI_RATE_PREAMBLE_OFDM,
4608 WMI_RATE_PREAMBLE_CCK,
4609 WMI_RATE_PREAMBLE_HT,
4610 WMI_RATE_PREAMBLE_VHT,
4611 WMI_RATE_PREAMBLE_HE,
4612 };
4613
4614 /**
4615 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
4616 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled.
4617 * @WMI_USE_RTS_CTS : RTS/CTS Enabled.
4618 * @WMI_USE_CTS2SELF : CTS to self protection Enabled.
4619 */
4620 enum wmi_rtscts_prot_mode {
4621 WMI_RTS_CTS_DISABLED = 0,
4622 WMI_USE_RTS_CTS = 1,
4623 WMI_USE_CTS2SELF = 2,
4624 };
4625
4626 /**
4627 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
4628 * protection mode.
4629 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS
4630 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS
4631 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS,
4632 * but if there's a sw retry, both the rate
4633 * series will use RTS-CTS.
4634 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU.
4635 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series.
4636 */
4637 enum wmi_rtscts_profile {
4638 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
4639 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
4640 WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
4641 WMI_RTSCTS_ERP = 3,
4642 WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
4643 };
4644
4645 struct ath11k_hal_reg_cap {
4646 u32 eeprom_rd;
4647 u32 eeprom_rd_ext;
4648 u32 regcap1;
4649 u32 regcap2;
4650 u32 wireless_modes;
4651 u32 low_2ghz_chan;
4652 u32 high_2ghz_chan;
4653 u32 low_5ghz_chan;
4654 u32 high_5ghz_chan;
4655 };
4656
4657 struct ath11k_mem_chunk {
4658 void *vaddr;
4659 dma_addr_t paddr;
4660 u32 len;
4661 u32 req_id;
4662 };
4663
4664 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4665
4666 enum wmi_sta_ps_param_rx_wake_policy {
4667 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4668 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4669 };
4670
4671 /* Do not change existing values! Used by ath11k_frame_mode parameter
4672 * module parameter.
4673 */
4674 enum ath11k_hw_txrx_mode {
4675 ATH11K_HW_TXRX_RAW = 0,
4676 ATH11K_HW_TXRX_NATIVE_WIFI = 1,
4677 ATH11K_HW_TXRX_ETHERNET = 2,
4678 };
4679
4680 struct wmi_wmm_params {
4681 u32 tlv_header;
4682 u32 cwmin;
4683 u32 cwmax;
4684 u32 aifs;
4685 u32 txoplimit;
4686 u32 acm;
4687 u32 no_ack;
4688 } __packed;
4689
4690 struct wmi_wmm_params_arg {
4691 u8 acm;
4692 u8 aifs;
4693 u16 cwmin;
4694 u16 cwmax;
4695 u16 txop;
4696 u8 no_ack;
4697 };
4698
4699 struct wmi_vdev_set_wmm_params_cmd {
4700 u32 tlv_header;
4701 u32 vdev_id;
4702 struct wmi_wmm_params wmm_params[4];
4703 u32 wmm_param_type;
4704 } __packed;
4705
4706 struct wmi_wmm_params_all_arg {
4707 struct wmi_wmm_params_arg ac_be;
4708 struct wmi_wmm_params_arg ac_bk;
4709 struct wmi_wmm_params_arg ac_vi;
4710 struct wmi_wmm_params_arg ac_vo;
4711 };
4712
4713 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000
4714 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10
4715 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50
4716 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20
4717 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100
4718 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80
4719 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50
4720 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10
4721 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2
4722 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2
4723 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2
4724 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500
4725 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000
4726 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000
4727 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000
4728
4729 struct wmi_twt_enable_params_cmd {
4730 u32 tlv_header;
4731 u32 pdev_id;
4732 u32 sta_cong_timer_ms;
4733 u32 mbss_support;
4734 u32 default_slot_size;
4735 u32 congestion_thresh_setup;
4736 u32 congestion_thresh_teardown;
4737 u32 congestion_thresh_critical;
4738 u32 interference_thresh_teardown;
4739 u32 interference_thresh_setup;
4740 u32 min_no_sta_setup;
4741 u32 min_no_sta_teardown;
4742 u32 no_of_bcast_mcast_slots;
4743 u32 min_no_twt_slots;
4744 u32 max_no_sta_twt;
4745 u32 mode_check_interval;
4746 u32 add_sta_slot_interval;
4747 u32 remove_sta_slot_interval;
4748 } __packed;
4749
4750 struct wmi_twt_disable_params_cmd {
4751 u32 tlv_header;
4752 u32 pdev_id;
4753 } __packed;
4754
4755 struct wmi_obss_spatial_reuse_params_cmd {
4756 u32 tlv_header;
4757 u32 pdev_id;
4758 u32 enable;
4759 s32 obss_min;
4760 s32 obss_max;
4761 u32 vdev_id;
4762 } __packed;
4763
4764 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200
4765 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0
4766 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1
4767
4768 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000
4769 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000
4770
4771 struct wmi_obss_color_collision_cfg_params_cmd {
4772 u32 tlv_header;
4773 u32 vdev_id;
4774 u32 flags;
4775 u32 evt_type;
4776 u32 current_bss_color;
4777 u32 detection_period_ms;
4778 u32 scan_period_ms;
4779 u32 free_slot_expiry_time_ms;
4780 } __packed;
4781
4782 struct wmi_bss_color_change_enable_params_cmd {
4783 u32 tlv_header;
4784 u32 vdev_id;
4785 u32 enable;
4786 } __packed;
4787
4788 #define ATH11K_IPV4_TH_SEED_SIZE 5
4789 #define ATH11K_IPV6_TH_SEED_SIZE 11
4790
4791 struct ath11k_wmi_pdev_lro_config_cmd {
4792 u32 tlv_header;
4793 u32 lro_enable;
4794 u32 res;
4795 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
4796 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
4797 u32 pdev_id;
4798 } __packed;
4799
4800 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0
4801 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224
4802 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1
4803 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
4804 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1
4805 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
4806 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
4807 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
4808 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
4809 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
4810 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
4811 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
4812 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
4813 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
4814 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2
4815 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
4816 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
4817 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1
4818
4819 struct ath11k_wmi_vdev_spectral_conf_param {
4820 u32 vdev_id;
4821 u32 scan_count;
4822 u32 scan_period;
4823 u32 scan_priority;
4824 u32 scan_fft_size;
4825 u32 scan_gc_ena;
4826 u32 scan_restart_ena;
4827 u32 scan_noise_floor_ref;
4828 u32 scan_init_delay;
4829 u32 scan_nb_tone_thr;
4830 u32 scan_str_bin_thr;
4831 u32 scan_wb_rpt_mode;
4832 u32 scan_rssi_rpt_mode;
4833 u32 scan_rssi_thr;
4834 u32 scan_pwr_format;
4835 u32 scan_rpt_mode;
4836 u32 scan_bin_scale;
4837 u32 scan_dbm_adj;
4838 u32 scan_chn_mask;
4839 } __packed;
4840
4841 struct ath11k_wmi_vdev_spectral_conf_cmd {
4842 u32 tlv_header;
4843 struct ath11k_wmi_vdev_spectral_conf_param param;
4844 } __packed;
4845
4846 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
4847 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
4848 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
4849 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
4850
4851 struct ath11k_wmi_vdev_spectral_enable_cmd {
4852 u32 tlv_header;
4853 u32 vdev_id;
4854 u32 trigger_cmd;
4855 u32 enable_cmd;
4856 } __packed;
4857
4858 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
4859 u32 tlv_header;
4860 u32 pdev_id;
4861 u32 module_id; /* see enum wmi_direct_buffer_module */
4862 u32 base_paddr_lo;
4863 u32 base_paddr_hi;
4864 u32 head_idx_paddr_lo;
4865 u32 head_idx_paddr_hi;
4866 u32 tail_idx_paddr_lo;
4867 u32 tail_idx_paddr_hi;
4868 u32 num_elems; /* Number of elems in the ring */
4869 u32 buf_size; /* size of allocated buffer in bytes */
4870
4871 /* Number of wmi_dma_buf_release_entry packed together */
4872 u32 num_resp_per_event;
4873
4874 /* Target should timeout and send whatever resp
4875 * it has if this time expires, units in milliseconds
4876 */
4877 u32 event_timeout_ms;
4878 } __packed;
4879
4880 struct ath11k_wmi_dma_buf_release_fixed_param {
4881 u32 pdev_id;
4882 u32 module_id;
4883 u32 num_buf_release_entry;
4884 u32 num_meta_data_entry;
4885 } __packed;
4886
4887 struct wmi_dma_buf_release_entry {
4888 u32 tlv_header;
4889 u32 paddr_lo;
4890
4891 /* Bits 11:0: address of data
4892 * Bits 31:12: host context data
4893 */
4894 u32 paddr_hi;
4895 } __packed;
4896
4897 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0)
4898 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16)
4899
4900 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0)
4901
4902 struct wmi_dma_buf_release_meta_data {
4903 u32 tlv_header;
4904 s32 noise_floor[WMI_MAX_CHAINS];
4905 u32 reset_delay;
4906 u32 freq1;
4907 u32 freq2;
4908 u32 ch_width;
4909 } __packed;
4910
4911 struct target_resource_config {
4912 u32 num_vdevs;
4913 u32 num_peers;
4914 u32 num_active_peers;
4915 u32 num_offload_peers;
4916 u32 num_offload_reorder_buffs;
4917 u32 num_peer_keys;
4918 u32 num_tids;
4919 u32 ast_skid_limit;
4920 u32 tx_chain_mask;
4921 u32 rx_chain_mask;
4922 u32 rx_timeout_pri[4];
4923 u32 rx_decap_mode;
4924 u32 scan_max_pending_req;
4925 u32 bmiss_offload_max_vdev;
4926 u32 roam_offload_max_vdev;
4927 u32 roam_offload_max_ap_profiles;
4928 u32 num_mcast_groups;
4929 u32 num_mcast_table_elems;
4930 u32 mcast2ucast_mode;
4931 u32 tx_dbg_log_size;
4932 u32 num_wds_entries;
4933 u32 dma_burst_size;
4934 u32 mac_aggr_delim;
4935 u32 rx_skip_defrag_timeout_dup_detection_check;
4936 u32 vow_config;
4937 u32 gtk_offload_max_vdev;
4938 u32 num_msdu_desc;
4939 u32 max_frag_entries;
4940 u32 max_peer_ext_stats;
4941 u32 smart_ant_cap;
4942 u32 bk_minfree;
4943 u32 be_minfree;
4944 u32 vi_minfree;
4945 u32 vo_minfree;
4946 u32 rx_batchmode;
4947 u32 tt_support;
4948 u32 atf_config;
4949 u32 iphdr_pad_config;
4950 u32 qwrap_config:16,
4951 alloc_frag_desc_for_data_pkt:16;
4952 u32 num_tdls_vdevs;
4953 u32 num_tdls_conn_table_entries;
4954 u32 beacon_tx_offload_max_vdev;
4955 u32 num_multicast_filter_entries;
4956 u32 num_wow_filters;
4957 u32 num_keep_alive_pattern;
4958 u32 keep_alive_pattern_size;
4959 u32 max_tdls_concurrent_sleep_sta;
4960 u32 max_tdls_concurrent_buffer_sta;
4961 u32 wmi_send_separate;
4962 u32 num_ocb_vdevs;
4963 u32 num_ocb_channels;
4964 u32 num_ocb_schedules;
4965 u32 num_ns_ext_tuples_cfg;
4966 u32 bpf_instruction_size;
4967 u32 max_bssid_rx_filters;
4968 u32 use_pdev_id;
4969 u32 peer_map_unmap_v2_support;
4970 u32 sched_params;
4971 u32 twt_ap_pdev_count;
4972 u32 twt_ap_sta_count;
4973 };
4974
4975 #define WMI_MAX_MEM_REQS 32
4976
4977 #define MAX_RADIOS 3
4978
4979 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
4980 #define WMI_SEND_TIMEOUT_HZ (3 * HZ)
4981
4982 struct ath11k_wmi_base {
4983 struct ath11k_base *ab;
4984 struct ath11k_pdev_wmi wmi[MAX_RADIOS];
4985 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
4986 u32 max_msg_len[MAX_RADIOS];
4987
4988 struct completion service_ready;
4989 struct completion unified_ready;
4990 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE);
4991 wait_queue_head_t tx_credits_wq;
4992 const struct wmi_peer_flags_map *peer_flags;
4993 u32 num_mem_chunks;
4994 u32 rx_decap_mode;
4995 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
4996
4997 enum wmi_host_hw_mode_config_type preferred_hw_mode;
4998 struct target_resource_config wlan_resource_config;
4999
5000 struct ath11k_targ_cap *targ_cap;
5001 };
5002
5003 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
5004 u32 cmd_id);
5005 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
5006 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
5007 struct sk_buff *frame);
5008 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
5009 struct ieee80211_mutable_offsets *offs,
5010 struct sk_buff *bcn);
5011 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
5012 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
5013 const u8 *bssid);
5014 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
5015 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
5016 bool restart);
5017 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
5018 u32 vdev_id, u32 param_id, u32 param_val);
5019 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
5020 u32 param_value, u8 pdev_id);
5021 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable);
5022 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
5023 int ath11k_wmi_cmd_init(struct ath11k_base *ab);
5024 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
5025 int ath11k_wmi_connect(struct ath11k_base *ab);
5026 int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
5027 u8 pdev_id);
5028 int ath11k_wmi_attach(struct ath11k_base *ab);
5029 void ath11k_wmi_detach(struct ath11k_base *ab);
5030 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
5031 struct vdev_create_params *param);
5032 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
5033 const u8 *addr, dma_addr_t paddr,
5034 u8 tid, u8 ba_window_size_valid,
5035 u32 ba_window_size);
5036 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
5037 struct peer_create_params *param);
5038 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
5039 u32 param_id, u32 param_value);
5040
5041 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
5042 u32 param, u32 param_value);
5043 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
5044 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
5045 const u8 *peer_addr, u8 vdev_id);
5046 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
5047 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
5048 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
5049 struct scan_req_params *params);
5050 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
5051 struct scan_cancel_param *param);
5052 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
5053 struct wmi_wmm_params_all_arg *param);
5054 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
5055 u32 pdev_id);
5056 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
5057
5058 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
5059 struct peer_assoc_params *param);
5060 int ath11k_wmi_vdev_install_key(struct ath11k *ar,
5061 struct wmi_vdev_install_key_arg *arg);
5062 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
5063 enum wmi_bss_chan_info_req_type type);
5064 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
5065 struct stats_request_params *param);
5066 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
5067 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
5068 u8 peer_addr[ETH_ALEN],
5069 struct peer_flush_params *param);
5070 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
5071 struct ap_ps_params *param);
5072 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
5073 struct scan_chan_list_params *chan_list);
5074 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
5075 u32 pdev_id);
5076 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
5077 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
5078 u32 tid, u32 buf_size);
5079 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
5080 u32 tid, u32 status);
5081 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
5082 u32 tid, u32 initiator, u32 reason);
5083 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
5084 u32 vdev_id, u32 bcn_ctrl_op);
5085 int
5086 ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
5087 struct wmi_init_country_params init_cc_param);
5088 int
5089 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
5090 struct thermal_mitigation_params *param);
5091 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
5092 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
5093 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
5094 int
5095 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
5096 struct rx_reorder_queue_remove_params *param);
5097 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
5098 struct pdev_set_regdomain_params *param);
5099 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
5100 struct ath11k_fw_stats *stats);
5101 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head);
5102 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head);
5103 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head);
5104 void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
5105 struct ath11k_fw_stats *fw_stats, u32 stats_id,
5106 char *buf);
5107 int ath11k_wmi_simulate_radar(struct ath11k *ar);
5108 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id);
5109 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
5110 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
5111 struct ieee80211_he_obss_pd *he_obss_pd);
5112 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
5113 u8 bss_color, u32 period,
5114 bool enable);
5115 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
5116 bool enable);
5117 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
5118 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
5119 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
5120 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
5121 u32 trigger, u32 enable);
5122 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
5123 struct ath11k_wmi_vdev_spectral_conf_param *param);
5124 #endif
5125
