1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2015-2017 Google, Inc 4 * 5 * USB Type-C Port Controller Interface. 6 */ 7 8 #ifndef __LINUX_USB_TCPCI_H 9 #define __LINUX_USB_TCPCI_H 10 11 #include <linux/usb/typec.h> 12 13 #define TCPC_VENDOR_ID 0x0 14 #define TCPC_PRODUCT_ID 0x2 15 #define TCPC_BCD_DEV 0x4 16 #define TCPC_TC_REV 0x6 17 #define TCPC_PD_REV 0x8 18 #define TCPC_PD_INT_REV 0xa 19 20 #define TCPC_ALERT 0x10 21 #define TCPC_ALERT_EXTND BIT(14) 22 #define TCPC_ALERT_EXTENDED_STATUS BIT(13) 23 #define TCPC_ALERT_VBUS_DISCNCT BIT(11) 24 #define TCPC_ALERT_RX_BUF_OVF BIT(10) 25 #define TCPC_ALERT_FAULT BIT(9) 26 #define TCPC_ALERT_V_ALARM_LO BIT(8) 27 #define TCPC_ALERT_V_ALARM_HI BIT(7) 28 #define TCPC_ALERT_TX_SUCCESS BIT(6) 29 #define TCPC_ALERT_TX_DISCARDED BIT(5) 30 #define TCPC_ALERT_TX_FAILED BIT(4) 31 #define TCPC_ALERT_RX_HARD_RST BIT(3) 32 #define TCPC_ALERT_RX_STATUS BIT(2) 33 #define TCPC_ALERT_POWER_STATUS BIT(1) 34 #define TCPC_ALERT_CC_STATUS BIT(0) 35 36 #define TCPC_ALERT_MASK 0x12 37 #define TCPC_POWER_STATUS_MASK 0x14 38 #define TCPC_FAULT_STATUS_MASK 0x15 39 40 #define TCPC_EXTENDED_STATUS_MASK 0x16 41 #define TCPC_EXTENDED_STATUS_MASK_VSAFE0V BIT(0) 42 43 #define TCPC_ALERT_EXTENDED_MASK 0x17 44 #define TCPC_SINK_FAST_ROLE_SWAP BIT(0) 45 46 #define TCPC_CONFIG_STD_OUTPUT 0x18 47 48 #define TCPC_TCPC_CTRL 0x19 49 #define TCPC_TCPC_CTRL_ORIENTATION BIT(0) 50 #define PLUG_ORNT_CC1 0 51 #define PLUG_ORNT_CC2 1 52 #define TCPC_TCPC_CTRL_BIST_TM BIT(1) 53 #define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT BIT(6) 54 55 #define TCPC_EXTENDED_STATUS 0x20 56 #define TCPC_EXTENDED_STATUS_VSAFE0V BIT(0) 57 58 #define TCPC_ROLE_CTRL 0x1a 59 #define TCPC_ROLE_CTRL_DRP BIT(6) 60 #define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4 61 #define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3 62 #define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0 63 #define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1 64 #define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2 65 #define TCPC_ROLE_CTRL_CC2_SHIFT 2 66 #define TCPC_ROLE_CTRL_CC2_MASK 0x3 67 #define TCPC_ROLE_CTRL_CC1_SHIFT 0 68 #define TCPC_ROLE_CTRL_CC1_MASK 0x3 69 #define TCPC_ROLE_CTRL_CC_RA 0x0 70 #define TCPC_ROLE_CTRL_CC_RP 0x1 71 #define TCPC_ROLE_CTRL_CC_RD 0x2 72 #define TCPC_ROLE_CTRL_CC_OPEN 0x3 73 74 #define TCPC_FAULT_CTRL 0x1b 75 76 #define TCPC_POWER_CTRL 0x1c 77 #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0) 78 #define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3) 79 #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4) 80 #define TCPC_DIS_VOLT_ALRM BIT(5) 81 #define TCPC_POWER_CTRL_VBUS_VOLT_MON BIT(6) 82 #define TCPC_FAST_ROLE_SWAP_EN BIT(7) 83 84 #define TCPC_CC_STATUS 0x1d 85 #define TCPC_CC_STATUS_TOGGLING BIT(5) 86 #define TCPC_CC_STATUS_TERM BIT(4) 87 #define TCPC_CC_STATUS_TERM_RP 0 88 #define TCPC_CC_STATUS_TERM_RD 1 89 #define TCPC_CC_STATE_SRC_OPEN 0 90 #define TCPC_CC_STATUS_CC2_SHIFT 2 91 #define TCPC_CC_STATUS_CC2_MASK 0x3 92 #define TCPC_CC_STATUS_CC1_SHIFT 0 93 #define TCPC_CC_STATUS_CC1_MASK 0x3 94 95 #define TCPC_POWER_STATUS 0x1e 96 #define TCPC_POWER_STATUS_DBG_ACC_CON BIT(7) 97 #define TCPC_POWER_STATUS_UNINIT BIT(6) 98 #define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4) 99 #define TCPC_POWER_STATUS_VBUS_DET BIT(3) 100 #define TCPC_POWER_STATUS_VBUS_PRES BIT(2) 101 #define TCPC_POWER_STATUS_SINKING_VBUS BIT(0) 102 103 #define TCPC_FAULT_STATUS 0x1f 104 105 #define TCPC_ALERT_EXTENDED 0x21 106 107 #define TCPC_COMMAND 0x23 108 #define TCPC_CMD_WAKE_I2C 0x11 109 #define TCPC_CMD_DISABLE_VBUS_DETECT 0x22 110 #define TCPC_CMD_ENABLE_VBUS_DETECT 0x33 111 #define TCPC_CMD_DISABLE_SINK_VBUS 0x44 112 #define TCPC_CMD_SINK_VBUS 0x55 113 #define TCPC_CMD_DISABLE_SRC_VBUS 0x66 114 #define TCPC_CMD_SRC_VBUS_DEFAULT 0x77 115 #define TCPC_CMD_SRC_VBUS_HIGH 0x88 116 #define TCPC_CMD_LOOK4CONNECTION 0x99 117 #define TCPC_CMD_RXONEMORE 0xAA 118 #define TCPC_CMD_I2C_IDLE 0xFF 119 120 #define TCPC_DEV_CAP_1 0x24 121 #define TCPC_DEV_CAP_2 0x26 122 #define TCPC_STD_INPUT_CAP 0x28 123 #define TCPC_STD_OUTPUT_CAP 0x29 124 125 #define TCPC_MSG_HDR_INFO 0x2e 126 #define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3) 127 #define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0) 128 #define TCPC_MSG_HDR_INFO_REV_SHIFT 1 129 #define TCPC_MSG_HDR_INFO_REV_MASK 0x3 130 131 #define TCPC_RX_DETECT 0x2f 132 #define TCPC_RX_DETECT_HARD_RESET BIT(5) 133 #define TCPC_RX_DETECT_SOP BIT(0) 134 #define TCPC_RX_DETECT_SOP1 BIT(1) 135 #define TCPC_RX_DETECT_SOP2 BIT(2) 136 #define TCPC_RX_DETECT_DBG1 BIT(3) 137 #define TCPC_RX_DETECT_DBG2 BIT(4) 138 139 #define TCPC_RX_BYTE_CNT 0x30 140 #define TCPC_RX_BUF_FRAME_TYPE 0x31 141 #define TCPC_RX_BUF_FRAME_TYPE_SOP 0 142 #define TCPC_RX_HDR 0x32 143 #define TCPC_RX_DATA 0x34 /* through 0x4f */ 144 145 #define TCPC_TRANSMIT 0x50 146 #define TCPC_TRANSMIT_RETRY_SHIFT 4 147 #define TCPC_TRANSMIT_RETRY_MASK 0x3 148 #define TCPC_TRANSMIT_TYPE_SHIFT 0 149 #define TCPC_TRANSMIT_TYPE_MASK 0x7 150 151 #define TCPC_TX_BYTE_CNT 0x51 152 #define TCPC_TX_HDR 0x52 153 #define TCPC_TX_DATA 0x54 /* through 0x6f */ 154 155 #define TCPC_VBUS_VOLTAGE 0x70 156 #define TCPC_VBUS_VOLTAGE_MASK 0x3ff 157 #define TCPC_VBUS_VOLTAGE_LSB_MV 25 158 #define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72 159 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV 25 160 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX 0x3ff 161 #define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74 162 #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76 163 #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78 164 165 /* I2C_WRITE_BYTE_COUNT + 1 when TX_BUF_BYTE_x is only accessible I2C_WRITE_BYTE_COUNT */ 166 #define TCPC_TRANSMIT_BUFFER_MAX_LEN 31 167 168 struct tcpci; 169 170 /* 171 * @TX_BUF_BYTE_x_hidden: 172 * optional; Set when TX_BUF_BYTE_x can only be accessed through I2C_WRITE_BYTE_COUNT. 173 * @frs_sourcing_vbus: 174 * Optional; Callback to perform chip specific operations when FRS 175 * is sourcing vbus. 176 * @auto_discharge_disconnect: 177 * Optional; Enables TCPC to autonously discharge vbus on disconnect. 178 * @vbus_vsafe0v: 179 * optional; Set when TCPC can detect whether vbus is at VSAFE0V. 180 * @set_partner_usb_comm_capable: 181 * Optional; The USB Communications Capable bit indicates if port 182 * partner is capable of communication over the USB data lines 183 * (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit. 184 */ 185 struct tcpci_data { 186 struct regmap *regmap; 187 unsigned char TX_BUF_BYTE_x_hidden:1; 188 unsigned char auto_discharge_disconnect:1; 189 unsigned char vbus_vsafe0v:1; 190 191 int (*init)(struct tcpci *tcpci, struct tcpci_data *data); 192 int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data, 193 bool enable); 194 int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data, 195 enum typec_cc_status cc); 196 int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool source, bool sink); 197 void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data); 198 void (*set_partner_usb_comm_capable)(struct tcpci *tcpci, struct tcpci_data *data, 199 bool capable); 200 }; 201 202 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data); 203 void tcpci_unregister_port(struct tcpci *tcpci); 204 irqreturn_t tcpci_irq(struct tcpci *tcpci); 205 206 struct tcpm_port; 207 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci); 208 #endif /* __LINUX_USB_TCPCI_H */ 209
