1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef __SMU_TYPES_H__ 24 #define __SMU_TYPES_H__ 25 26 #define SMU_MESSAGE_TYPES \ 27 __SMU_DUMMY_MAP(TestMessage), \ 28 __SMU_DUMMY_MAP(GetSmuVersion), \ 29 __SMU_DUMMY_MAP(GetDriverIfVersion), \ 30 __SMU_DUMMY_MAP(SetAllowedFeaturesMaskLow), \ 31 __SMU_DUMMY_MAP(SetAllowedFeaturesMaskHigh), \ 32 __SMU_DUMMY_MAP(EnableAllSmuFeatures), \ 33 __SMU_DUMMY_MAP(DisableAllSmuFeatures), \ 34 __SMU_DUMMY_MAP(EnableSmuFeaturesLow), \ 35 __SMU_DUMMY_MAP(EnableSmuFeaturesHigh), \ 36 __SMU_DUMMY_MAP(DisableSmuFeaturesLow), \ 37 __SMU_DUMMY_MAP(DisableSmuFeaturesHigh), \ 38 __SMU_DUMMY_MAP(GetEnabledSmuFeaturesLow), \ 39 __SMU_DUMMY_MAP(GetEnabledSmuFeaturesHigh), \ 40 __SMU_DUMMY_MAP(SetWorkloadMask), \ 41 __SMU_DUMMY_MAP(SetPptLimit), \ 42 __SMU_DUMMY_MAP(SetDriverDramAddrHigh), \ 43 __SMU_DUMMY_MAP(SetDriverDramAddrLow), \ 44 __SMU_DUMMY_MAP(SetToolsDramAddrHigh), \ 45 __SMU_DUMMY_MAP(SetToolsDramAddrLow), \ 46 __SMU_DUMMY_MAP(TransferTableSmu2Dram), \ 47 __SMU_DUMMY_MAP(TransferTableDram2Smu), \ 48 __SMU_DUMMY_MAP(UseDefaultPPTable), \ 49 __SMU_DUMMY_MAP(UseBackupPPTable), \ 50 __SMU_DUMMY_MAP(RunBtc), \ 51 __SMU_DUMMY_MAP(RequestI2CBus), \ 52 __SMU_DUMMY_MAP(ReleaseI2CBus), \ 53 __SMU_DUMMY_MAP(SetFloorSocVoltage), \ 54 __SMU_DUMMY_MAP(SoftReset), \ 55 __SMU_DUMMY_MAP(StartBacoMonitor), \ 56 __SMU_DUMMY_MAP(CancelBacoMonitor), \ 57 __SMU_DUMMY_MAP(EnterBaco), \ 58 __SMU_DUMMY_MAP(SetSoftMinByFreq), \ 59 __SMU_DUMMY_MAP(SetSoftMaxByFreq), \ 60 __SMU_DUMMY_MAP(SetHardMinByFreq), \ 61 __SMU_DUMMY_MAP(SetHardMaxByFreq), \ 62 __SMU_DUMMY_MAP(GetMinDpmFreq), \ 63 __SMU_DUMMY_MAP(GetMaxDpmFreq), \ 64 __SMU_DUMMY_MAP(GetDpmFreqByIndex), \ 65 __SMU_DUMMY_MAP(GetDpmClockFreq), \ 66 __SMU_DUMMY_MAP(GetSsVoltageByDpm), \ 67 __SMU_DUMMY_MAP(SetMemoryChannelConfig), \ 68 __SMU_DUMMY_MAP(SetGeminiMode), \ 69 __SMU_DUMMY_MAP(SetGeminiApertureHigh), \ 70 __SMU_DUMMY_MAP(SetGeminiApertureLow), \ 71 __SMU_DUMMY_MAP(SetMinLinkDpmByIndex), \ 72 __SMU_DUMMY_MAP(OverridePcieParameters), \ 73 __SMU_DUMMY_MAP(OverDriveSetPercentage), \ 74 __SMU_DUMMY_MAP(SetMinDeepSleepDcefclk), \ 75 __SMU_DUMMY_MAP(ReenableAcDcInterrupt), \ 76 __SMU_DUMMY_MAP(NotifyPowerSource), \ 77 __SMU_DUMMY_MAP(SetUclkFastSwitch), \ 78 __SMU_DUMMY_MAP(SetUclkDownHyst), \ 79 __SMU_DUMMY_MAP(GfxDeviceDriverReset), \ 80 __SMU_DUMMY_MAP(GetCurrentRpm), \ 81 __SMU_DUMMY_MAP(SetVideoFps), \ 82 __SMU_DUMMY_MAP(SetTjMax), \ 83 __SMU_DUMMY_MAP(SetFanTemperatureTarget), \ 84 __SMU_DUMMY_MAP(PrepareMp1ForUnload), \ 85 __SMU_DUMMY_MAP(DramLogSetDramAddrHigh), \ 86 __SMU_DUMMY_MAP(DramLogSetDramAddrLow), \ 87 __SMU_DUMMY_MAP(DramLogSetDramSize), \ 88 __SMU_DUMMY_MAP(SetFanMaxRpm), \ 89 __SMU_DUMMY_MAP(SetFanMinPwm), \ 90 __SMU_DUMMY_MAP(ConfigureGfxDidt), \ 91 __SMU_DUMMY_MAP(NumOfDisplays), \ 92 __SMU_DUMMY_MAP(RemoveMargins), \ 93 __SMU_DUMMY_MAP(ReadSerialNumTop32), \ 94 __SMU_DUMMY_MAP(ReadSerialNumBottom32), \ 95 __SMU_DUMMY_MAP(SetSystemVirtualDramAddrHigh), \ 96 __SMU_DUMMY_MAP(SetSystemVirtualDramAddrLow), \ 97 __SMU_DUMMY_MAP(WaflTest), \ 98 __SMU_DUMMY_MAP(SetFclkGfxClkRatio), \ 99 __SMU_DUMMY_MAP(AllowGfxOff), \ 100 __SMU_DUMMY_MAP(DisallowGfxOff), \ 101 __SMU_DUMMY_MAP(GetPptLimit), \ 102 __SMU_DUMMY_MAP(GetDcModeMaxDpmFreq), \ 103 __SMU_DUMMY_MAP(GetDebugData), \ 104 __SMU_DUMMY_MAP(SetXgmiMode), \ 105 __SMU_DUMMY_MAP(RunAfllBtc), \ 106 __SMU_DUMMY_MAP(ExitBaco), \ 107 __SMU_DUMMY_MAP(PrepareMp1ForReset), \ 108 __SMU_DUMMY_MAP(PrepareMp1ForShutdown), \ 109 __SMU_DUMMY_MAP(SetMGpuFanBoostLimitRpm), \ 110 __SMU_DUMMY_MAP(GetAVFSVoltageByDpm), \ 111 __SMU_DUMMY_MAP(PowerUpVcn), \ 112 __SMU_DUMMY_MAP(PowerDownVcn), \ 113 __SMU_DUMMY_MAP(PowerUpJpeg), \ 114 __SMU_DUMMY_MAP(PowerDownJpeg), \ 115 __SMU_DUMMY_MAP(BacoAudioD3PME), \ 116 __SMU_DUMMY_MAP(ArmD3), \ 117 __SMU_DUMMY_MAP(RunDcBtc), \ 118 __SMU_DUMMY_MAP(RunGfxDcBtc), \ 119 __SMU_DUMMY_MAP(RunSocDcBtc), \ 120 __SMU_DUMMY_MAP(SetMemoryChannelEnable), \ 121 __SMU_DUMMY_MAP(SetDfSwitchType), \ 122 __SMU_DUMMY_MAP(GetVoltageByDpm), \ 123 __SMU_DUMMY_MAP(GetVoltageByDpmOverdrive), \ 124 __SMU_DUMMY_MAP(PowerUpVcn0), \ 125 __SMU_DUMMY_MAP(PowerDownVcn0), \ 126 __SMU_DUMMY_MAP(PowerUpVcn1), \ 127 __SMU_DUMMY_MAP(PowerDownVcn1), \ 128 __SMU_DUMMY_MAP(PowerUpGfx), \ 129 __SMU_DUMMY_MAP(PowerDownIspByTile), \ 130 __SMU_DUMMY_MAP(PowerUpIspByTile), \ 131 __SMU_DUMMY_MAP(PowerDownSdma), \ 132 __SMU_DUMMY_MAP(PowerUpSdma), \ 133 __SMU_DUMMY_MAP(SetHardMinIspclkByFreq), \ 134 __SMU_DUMMY_MAP(SetHardMinVcn), \ 135 __SMU_DUMMY_MAP(Spare1), \ 136 __SMU_DUMMY_MAP(Spare2), \ 137 __SMU_DUMMY_MAP(SetAllowFclkSwitch), \ 138 __SMU_DUMMY_MAP(SetMinVideoGfxclkFreq), \ 139 __SMU_DUMMY_MAP(ActiveProcessNotify), \ 140 __SMU_DUMMY_MAP(SetCustomPolicy), \ 141 __SMU_DUMMY_MAP(QueryPowerLimit), \ 142 __SMU_DUMMY_MAP(SetGfxclkOverdriveByFreqVid), \ 143 __SMU_DUMMY_MAP(SetHardMinDcfclkByFreq), \ 144 __SMU_DUMMY_MAP(SetHardMinSocclkByFreq), \ 145 __SMU_DUMMY_MAP(ControlIgpuATS), \ 146 __SMU_DUMMY_MAP(SetMinVideoFclkFreq), \ 147 __SMU_DUMMY_MAP(SetMinDeepSleepDcfclk), \ 148 __SMU_DUMMY_MAP(ForcePowerDownGfx), \ 149 __SMU_DUMMY_MAP(SetPhyclkVoltageByFreq), \ 150 __SMU_DUMMY_MAP(SetDppclkVoltageByFreq), \ 151 __SMU_DUMMY_MAP(SetSoftMinVcn), \ 152 __SMU_DUMMY_MAP(EnablePostCode), \ 153 __SMU_DUMMY_MAP(GetGfxclkFrequency), \ 154 __SMU_DUMMY_MAP(GetFclkFrequency), \ 155 __SMU_DUMMY_MAP(GetMinGfxclkFrequency), \ 156 __SMU_DUMMY_MAP(GetMaxGfxclkFrequency), \ 157 __SMU_DUMMY_MAP(SetGfxCGPG), \ 158 __SMU_DUMMY_MAP(SetSoftMaxGfxClk), \ 159 __SMU_DUMMY_MAP(SetHardMinGfxClk), \ 160 __SMU_DUMMY_MAP(SetSoftMaxSocclkByFreq), \ 161 __SMU_DUMMY_MAP(SetSoftMaxFclkByFreq), \ 162 __SMU_DUMMY_MAP(SetSoftMaxVcn), \ 163 __SMU_DUMMY_MAP(PowerGateMmHub), \ 164 __SMU_DUMMY_MAP(UpdatePmeRestore), \ 165 __SMU_DUMMY_MAP(GpuChangeState), \ 166 __SMU_DUMMY_MAP(SetPowerLimitPercentage), \ 167 __SMU_DUMMY_MAP(ForceGfxContentSave), \ 168 __SMU_DUMMY_MAP(EnableTmdp48MHzRefclkPwrDown), \ 169 __SMU_DUMMY_MAP(PowerGateAtHub), \ 170 __SMU_DUMMY_MAP(SetSoftMinJpeg), \ 171 __SMU_DUMMY_MAP(SetHardMinFclkByFreq), \ 172 __SMU_DUMMY_MAP(DFCstateControl), \ 173 __SMU_DUMMY_MAP(GmiPwrDnControl), \ 174 __SMU_DUMMY_MAP(DAL_DISABLE_DUMMY_PSTATE_CHANGE), \ 175 __SMU_DUMMY_MAP(DAL_ENABLE_DUMMY_PSTATE_CHANGE), \ 176 __SMU_DUMMY_MAP(SET_DRIVER_DUMMY_TABLE_DRAM_ADDR_HIGH), \ 177 __SMU_DUMMY_MAP(SET_DRIVER_DUMMY_TABLE_DRAM_ADDR_LOW), \ 178 __SMU_DUMMY_MAP(GET_UMC_FW_WA), \ 179 __SMU_DUMMY_MAP(Mode1Reset), \ 180 181 #undef __SMU_DUMMY_MAP 182 #define __SMU_DUMMY_MAP(type) SMU_MSG_##type 183 enum smu_message_type { 184 SMU_MESSAGE_TYPES 185 SMU_MSG_MAX_COUNT, 186 }; 187 188 enum smu_clk_type { 189 SMU_GFXCLK, 190 SMU_VCLK, 191 SMU_DCLK, 192 SMU_VCLK1, 193 SMU_DCLK1, 194 SMU_ECLK, 195 SMU_SOCCLK, 196 SMU_UCLK, 197 SMU_DCEFCLK, 198 SMU_DISPCLK, 199 SMU_PIXCLK, 200 SMU_PHYCLK, 201 SMU_FCLK, 202 SMU_SCLK, 203 SMU_MCLK, 204 SMU_PCIE, 205 SMU_OD_SCLK, 206 SMU_OD_MCLK, 207 SMU_OD_VDDC_CURVE, 208 SMU_OD_RANGE, 209 SMU_CLK_COUNT, 210 }; 211 212 #define SMU_FEATURE_MASKS \ 213 __SMU_DUMMY_MAP(DPM_PREFETCHER), \ 214 __SMU_DUMMY_MAP(DPM_GFXCLK), \ 215 __SMU_DUMMY_MAP(DPM_UCLK), \ 216 __SMU_DUMMY_MAP(DPM_SOCCLK), \ 217 __SMU_DUMMY_MAP(DPM_UVD), \ 218 __SMU_DUMMY_MAP(DPM_VCE), \ 219 __SMU_DUMMY_MAP(ULV), \ 220 __SMU_DUMMY_MAP(DPM_MP0CLK), \ 221 __SMU_DUMMY_MAP(DPM_LINK), \ 222 __SMU_DUMMY_MAP(DPM_DCEFCLK), \ 223 __SMU_DUMMY_MAP(DPM_XGMI), \ 224 __SMU_DUMMY_MAP(DS_GFXCLK), \ 225 __SMU_DUMMY_MAP(DS_SOCCLK), \ 226 __SMU_DUMMY_MAP(DS_LCLK), \ 227 __SMU_DUMMY_MAP(PPT), \ 228 __SMU_DUMMY_MAP(TDC), \ 229 __SMU_DUMMY_MAP(THERMAL), \ 230 __SMU_DUMMY_MAP(GFX_PER_CU_CG), \ 231 __SMU_DUMMY_MAP(RM), \ 232 __SMU_DUMMY_MAP(DS_DCEFCLK), \ 233 __SMU_DUMMY_MAP(ACDC), \ 234 __SMU_DUMMY_MAP(VR0HOT), \ 235 __SMU_DUMMY_MAP(VR1HOT), \ 236 __SMU_DUMMY_MAP(FW_CTF), \ 237 __SMU_DUMMY_MAP(LED_DISPLAY), \ 238 __SMU_DUMMY_MAP(FAN_CONTROL), \ 239 __SMU_DUMMY_MAP(GFX_EDC), \ 240 __SMU_DUMMY_MAP(GFXOFF), \ 241 __SMU_DUMMY_MAP(CG), \ 242 __SMU_DUMMY_MAP(DPM_FCLK), \ 243 __SMU_DUMMY_MAP(DS_FCLK), \ 244 __SMU_DUMMY_MAP(DS_MP1CLK), \ 245 __SMU_DUMMY_MAP(DS_MP0CLK), \ 246 __SMU_DUMMY_MAP(XGMI), \ 247 __SMU_DUMMY_MAP(DPM_GFX_PACE), \ 248 __SMU_DUMMY_MAP(MEM_VDDCI_SCALING), \ 249 __SMU_DUMMY_MAP(MEM_MVDD_SCALING), \ 250 __SMU_DUMMY_MAP(DS_UCLK), \ 251 __SMU_DUMMY_MAP(GFX_ULV), \ 252 __SMU_DUMMY_MAP(FW_DSTATE), \ 253 __SMU_DUMMY_MAP(BACO), \ 254 __SMU_DUMMY_MAP(VCN_PG), \ 255 __SMU_DUMMY_MAP(MM_DPM_PG), \ 256 __SMU_DUMMY_MAP(JPEG_PG), \ 257 __SMU_DUMMY_MAP(USB_PG), \ 258 __SMU_DUMMY_MAP(RSMU_SMN_CG), \ 259 __SMU_DUMMY_MAP(APCC_PLUS), \ 260 __SMU_DUMMY_MAP(GTHR), \ 261 __SMU_DUMMY_MAP(GFX_DCS), \ 262 __SMU_DUMMY_MAP(GFX_SS), \ 263 __SMU_DUMMY_MAP(OUT_OF_BAND_MONITOR), \ 264 __SMU_DUMMY_MAP(TEMP_DEPENDENT_VMIN), \ 265 __SMU_DUMMY_MAP(MMHUB_PG), \ 266 __SMU_DUMMY_MAP(ATHUB_PG), \ 267 __SMU_DUMMY_MAP(APCC_DFLL), \ 268 __SMU_DUMMY_MAP(DPM_GFX_GPO), \ 269 __SMU_DUMMY_MAP(WAFL_CG), 270 271 #undef __SMU_DUMMY_MAP 272 #define __SMU_DUMMY_MAP(feature) SMU_FEATURE_##feature##_BIT 273 enum smu_feature_mask { 274 SMU_FEATURE_MASKS 275 SMU_FEATURE_COUNT, 276 }; 277 278 #endif 279
