1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cistpl.h>
73 #include <pcmcia/cisreg.h>
74 #include <pcmcia/ds.h>
75
76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
77 #define SYNCLINK_GENERIC_HDLC 1
78 #else
79 #define SYNCLINK_GENERIC_HDLC 0
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <linux/uaccess.h>
88
89 static MGSL_PARAMS default_params = {
90 MGSL_MODE_HDLC, /* unsigned long mode */
91 0, /* unsigned char loopback; */
92 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
93 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
94 0, /* unsigned long clock_speed; */
95 0xff, /* unsigned char addr_filter; */
96 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
97 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
98 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
99 9600, /* unsigned long data_rate; */
100 8, /* unsigned char data_bits; */
101 1, /* unsigned char stop_bits; */
102 ASYNC_PARITY_NONE /* unsigned char parity; */
103 };
104
105 typedef struct {
106 int count;
107 unsigned char status;
108 char data[1];
109 } RXBUF;
110
111 /* The queue of BH actions to be performed */
112
113 #define BH_RECEIVE 1
114 #define BH_TRANSMIT 2
115 #define BH_STATUS 4
116
117 #define IO_PIN_SHUTDOWN_LIMIT 100
118
119 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
120
121 struct _input_signal_events {
122 int ri_up;
123 int ri_down;
124 int dsr_up;
125 int dsr_down;
126 int dcd_up;
127 int dcd_down;
128 int cts_up;
129 int cts_down;
130 };
131
132
133 /*
134 * Device instance data structure
135 */
136
137 typedef struct _mgslpc_info {
138 struct tty_port port;
139 void *if_ptr; /* General purpose pointer (used by SPPP) */
140 int magic;
141 int line;
142
143 struct mgsl_icount icount;
144
145 int timeout;
146 int x_char; /* xon/xoff character */
147 unsigned char read_status_mask;
148 unsigned char ignore_status_mask;
149
150 unsigned char *tx_buf;
151 int tx_put;
152 int tx_get;
153 int tx_count;
154
155 /* circular list of fixed length rx buffers */
156
157 unsigned char *rx_buf; /* memory allocated for all rx buffers */
158 int rx_buf_total_size; /* size of memory allocated for rx buffers */
159 int rx_put; /* index of next empty rx buffer */
160 int rx_get; /* index of next full rx buffer */
161 int rx_buf_size; /* size in bytes of single rx buffer */
162 int rx_buf_count; /* total number of rx buffers */
163 int rx_frame_count; /* number of full rx buffers */
164
165 wait_queue_head_t status_event_wait_q;
166 wait_queue_head_t event_wait_q;
167 struct timer_list tx_timer; /* HDLC transmit timeout timer */
168 struct _mgslpc_info *next_device; /* device list link */
169
170 unsigned short imra_value;
171 unsigned short imrb_value;
172 unsigned char pim_value;
173
174 spinlock_t lock;
175 struct work_struct task; /* task structure for scheduling bh */
176
177 u32 max_frame_size;
178
179 u32 pending_bh;
180
181 bool bh_running;
182 bool bh_requested;
183
184 int dcd_chkcount; /* check counts to prevent */
185 int cts_chkcount; /* too many IRQs if a signal */
186 int dsr_chkcount; /* is floating */
187 int ri_chkcount;
188
189 bool rx_enabled;
190 bool rx_overflow;
191
192 bool tx_enabled;
193 bool tx_active;
194 bool tx_aborting;
195 u32 idle_mode;
196
197 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
198
199 char device_name[25]; /* device instance name */
200
201 unsigned int io_base; /* base I/O address of adapter */
202 unsigned int irq_level;
203
204 MGSL_PARAMS params; /* communications parameters */
205
206 unsigned char serial_signals; /* current serial signal states */
207
208 bool irq_occurred; /* for diagnostics use */
209 char testing_irq;
210 unsigned int init_error; /* startup error (DIAGS) */
211
212 char *flag_buf;
213 bool drop_rts_on_tx_done;
214
215 struct _input_signal_events input_signal_events;
216
217 /* PCMCIA support */
218 struct pcmcia_device *p_dev;
219 int stop;
220
221 /* SPPP/Cisco HDLC device parts */
222 int netcount;
223 spinlock_t netlock;
224
225 #if SYNCLINK_GENERIC_HDLC
226 struct net_device *netdev;
227 #endif
228
229 } MGSLPC_INFO;
230
231 #define MGSLPC_MAGIC 0x5402
232
233 /*
234 * The size of the serial xmit buffer is 1 page, or 4096 bytes
235 */
236 #define TXBUFSIZE 4096
237
238
239 #define CHA 0x00 /* channel A offset */
240 #define CHB 0x40 /* channel B offset */
241
242 /*
243 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
244 */
245 #undef PVR
246
247 #define RXFIFO 0
248 #define TXFIFO 0
249 #define STAR 0x20
250 #define CMDR 0x20
251 #define RSTA 0x21
252 #define PRE 0x21
253 #define MODE 0x22
254 #define TIMR 0x23
255 #define XAD1 0x24
256 #define XAD2 0x25
257 #define RAH1 0x26
258 #define RAH2 0x27
259 #define DAFO 0x27
260 #define RAL1 0x28
261 #define RFC 0x28
262 #define RHCR 0x29
263 #define RAL2 0x29
264 #define RBCL 0x2a
265 #define XBCL 0x2a
266 #define RBCH 0x2b
267 #define XBCH 0x2b
268 #define CCR0 0x2c
269 #define CCR1 0x2d
270 #define CCR2 0x2e
271 #define CCR3 0x2f
272 #define VSTR 0x34
273 #define BGR 0x34
274 #define RLCR 0x35
275 #define AML 0x36
276 #define AMH 0x37
277 #define GIS 0x38
278 #define IVA 0x38
279 #define IPC 0x39
280 #define ISR 0x3a
281 #define IMR 0x3a
282 #define PVR 0x3c
283 #define PIS 0x3d
284 #define PIM 0x3d
285 #define PCR 0x3e
286 #define CCR4 0x3f
287
288 // IMR/ISR
289
290 #define IRQ_BREAK_ON BIT15 // rx break detected
291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
292 #define IRQ_ALLSENT BIT13 // all sent
293 #define IRQ_UNDERRUN BIT12 // transmit data underrun
294 #define IRQ_TIMER BIT11 // timer interrupt
295 #define IRQ_CTS BIT10 // CTS status change
296 #define IRQ_TXREPEAT BIT9 // tx message repeat
297 #define IRQ_TXFIFO BIT8 // transmit pool ready
298 #define IRQ_RXEOM BIT7 // receive message end
299 #define IRQ_EXITHUNT BIT6 // receive frame start
300 #define IRQ_RXTIME BIT6 // rx char timeout
301 #define IRQ_DCD BIT2 // carrier detect status change
302 #define IRQ_OVERRUN BIT1 // receive frame overflow
303 #define IRQ_RXFIFO BIT0 // receive pool full
304
305 // STAR
306
307 #define XFW BIT6 // transmit FIFO write enable
308 #define CEC BIT2 // command executing
309 #define CTS BIT1 // CTS state
310
311 #define PVR_DTR BIT0
312 #define PVR_DSR BIT1
313 #define PVR_RI BIT2
314 #define PVR_AUTOCTS BIT3
315 #define PVR_RS232 0x20 /* 0010b */
316 #define PVR_V35 0xe0 /* 1110b */
317 #define PVR_RS422 0x40 /* 0100b */
318
319 /* Register access functions */
320
321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
322 #define read_reg(info, reg) inb((info)->io_base + (reg))
323
324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
326
327 #define set_reg_bits(info, reg, mask) \
328 write_reg(info, (reg), \
329 (unsigned char) (read_reg(info, (reg)) | (mask)))
330 #define clear_reg_bits(info, reg, mask) \
331 write_reg(info, (reg), \
332 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
333 /*
334 * interrupt enable/disable routines
335 */
irq_disable(MGSLPC_INFO * info,unsigned char channel,unsigned short mask)336 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
337 {
338 if (channel == CHA) {
339 info->imra_value |= mask;
340 write_reg16(info, CHA + IMR, info->imra_value);
341 } else {
342 info->imrb_value |= mask;
343 write_reg16(info, CHB + IMR, info->imrb_value);
344 }
345 }
irq_enable(MGSLPC_INFO * info,unsigned char channel,unsigned short mask)346 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
347 {
348 if (channel == CHA) {
349 info->imra_value &= ~mask;
350 write_reg16(info, CHA + IMR, info->imra_value);
351 } else {
352 info->imrb_value &= ~mask;
353 write_reg16(info, CHB + IMR, info->imrb_value);
354 }
355 }
356
357 #define port_irq_disable(info, mask) \
358 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
359
360 #define port_irq_enable(info, mask) \
361 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
362
363 static void rx_start(MGSLPC_INFO *info);
364 static void rx_stop(MGSLPC_INFO *info);
365
366 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
367 static void tx_stop(MGSLPC_INFO *info);
368 static void tx_set_idle(MGSLPC_INFO *info);
369
370 static void get_signals(MGSLPC_INFO *info);
371 static void set_signals(MGSLPC_INFO *info);
372
373 static void reset_device(MGSLPC_INFO *info);
374
375 static void hdlc_mode(MGSLPC_INFO *info);
376 static void async_mode(MGSLPC_INFO *info);
377
378 static void tx_timeout(struct timer_list *t);
379
380 static int carrier_raised(struct tty_port *port);
381 static void dtr_rts(struct tty_port *port, int onoff);
382
383 #if SYNCLINK_GENERIC_HDLC
384 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
385 static void hdlcdev_tx_done(MGSLPC_INFO *info);
386 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
387 static int hdlcdev_init(MGSLPC_INFO *info);
388 static void hdlcdev_exit(MGSLPC_INFO *info);
389 #endif
390
391 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
392
393 static bool register_test(MGSLPC_INFO *info);
394 static bool irq_test(MGSLPC_INFO *info);
395 static int adapter_test(MGSLPC_INFO *info);
396
397 static int claim_resources(MGSLPC_INFO *info);
398 static void release_resources(MGSLPC_INFO *info);
399 static int mgslpc_add_device(MGSLPC_INFO *info);
400 static void mgslpc_remove_device(MGSLPC_INFO *info);
401
402 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
403 static void rx_reset_buffers(MGSLPC_INFO *info);
404 static int rx_alloc_buffers(MGSLPC_INFO *info);
405 static void rx_free_buffers(MGSLPC_INFO *info);
406
407 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
408
409 /*
410 * Bottom half interrupt handlers
411 */
412 static void bh_handler(struct work_struct *work);
413 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
414 static void bh_status(MGSLPC_INFO *info);
415
416 /*
417 * ioctl handlers
418 */
419 static int tiocmget(struct tty_struct *tty);
420 static int tiocmset(struct tty_struct *tty,
421 unsigned int set, unsigned int clear);
422 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
423 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
424 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
425 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
426 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
427 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
428 static int tx_abort(MGSLPC_INFO *info);
429 static int set_rxenable(MGSLPC_INFO *info, int enable);
430 static int wait_events(MGSLPC_INFO *info, int __user *mask);
431
432 static MGSLPC_INFO *mgslpc_device_list = NULL;
433 static int mgslpc_device_count = 0;
434
435 /*
436 * Set this param to non-zero to load eax with the
437 * .text section address and breakpoint on module load.
438 * This is useful for use with gdb and add-symbol-file command.
439 */
440 static bool break_on_load;
441
442 /*
443 * Driver major number, defaults to zero to get auto
444 * assigned major number. May be forced as module parameter.
445 */
446 static int ttymajor=0;
447
448 static int debug_level = 0;
449 static int maxframe[MAX_DEVICE_COUNT] = {0,};
450
451 module_param(break_on_load, bool, 0);
452 module_param(ttymajor, int, 0);
453 module_param(debug_level, int, 0);
454 module_param_array(maxframe, int, NULL, 0);
455
456 MODULE_LICENSE("GPL");
457
458 static char *driver_name = "SyncLink PC Card driver";
459 static char *driver_version = "$Revision: 4.34 $";
460
461 static struct tty_driver *serial_driver;
462
463 /* number of characters left in xmit buffer before we ask for more */
464 #define WAKEUP_CHARS 256
465
466 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
467 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
468
469 /* PCMCIA prototypes */
470
471 static int mgslpc_config(struct pcmcia_device *link);
472 static void mgslpc_release(u_long arg);
473 static void mgslpc_detach(struct pcmcia_device *p_dev);
474
475 /*
476 * 1st function defined in .text section. Calling this function in
477 * init_module() followed by a breakpoint allows a remote debugger
478 * (gdb) to get the .text address for the add-symbol-file command.
479 * This allows remote debugging of dynamically loadable modules.
480 */
mgslpc_get_text_ptr(void)481 static void* mgslpc_get_text_ptr(void)
482 {
483 return mgslpc_get_text_ptr;
484 }
485
486 /**
487 * line discipline callback wrappers
488 *
489 * The wrappers maintain line discipline references
490 * while calling into the line discipline.
491 *
492 * ldisc_receive_buf - pass receive data to line discipline
493 */
494
ldisc_receive_buf(struct tty_struct * tty,const __u8 * data,char * flags,int count)495 static void ldisc_receive_buf(struct tty_struct *tty,
496 const __u8 *data, char *flags, int count)
497 {
498 struct tty_ldisc *ld;
499 if (!tty)
500 return;
501 ld = tty_ldisc_ref(tty);
502 if (ld) {
503 if (ld->ops->receive_buf)
504 ld->ops->receive_buf(tty, data, flags, count);
505 tty_ldisc_deref(ld);
506 }
507 }
508
509 static const struct tty_port_operations mgslpc_port_ops = {
510 .carrier_raised = carrier_raised,
511 .dtr_rts = dtr_rts
512 };
513
mgslpc_probe(struct pcmcia_device * link)514 static int mgslpc_probe(struct pcmcia_device *link)
515 {
516 MGSLPC_INFO *info;
517 int ret;
518
519 if (debug_level >= DEBUG_LEVEL_INFO)
520 printk("mgslpc_attach\n");
521
522 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
523 if (!info) {
524 printk("Error can't allocate device instance data\n");
525 return -ENOMEM;
526 }
527
528 info->magic = MGSLPC_MAGIC;
529 tty_port_init(&info->port);
530 info->port.ops = &mgslpc_port_ops;
531 INIT_WORK(&info->task, bh_handler);
532 info->max_frame_size = 4096;
533 info->port.close_delay = 5*HZ/10;
534 info->port.closing_wait = 30*HZ;
535 init_waitqueue_head(&info->status_event_wait_q);
536 init_waitqueue_head(&info->event_wait_q);
537 spin_lock_init(&info->lock);
538 spin_lock_init(&info->netlock);
539 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
540 info->idle_mode = HDLC_TXIDLE_FLAGS;
541 info->imra_value = 0xffff;
542 info->imrb_value = 0xffff;
543 info->pim_value = 0xff;
544
545 info->p_dev = link;
546 link->priv = info;
547
548 /* Initialize the struct pcmcia_device structure */
549
550 ret = mgslpc_config(link);
551 if (ret != 0)
552 goto failed;
553
554 ret = mgslpc_add_device(info);
555 if (ret != 0)
556 goto failed_release;
557
558 return 0;
559
560 failed_release:
561 mgslpc_release((u_long)link);
562 failed:
563 tty_port_destroy(&info->port);
564 kfree(info);
565 return ret;
566 }
567
568 /* Card has been inserted.
569 */
570
mgslpc_ioprobe(struct pcmcia_device * p_dev,void * priv_data)571 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
572 {
573 return pcmcia_request_io(p_dev);
574 }
575
mgslpc_config(struct pcmcia_device * link)576 static int mgslpc_config(struct pcmcia_device *link)
577 {
578 MGSLPC_INFO *info = link->priv;
579 int ret;
580
581 if (debug_level >= DEBUG_LEVEL_INFO)
582 printk("mgslpc_config(0x%p)\n", link);
583
584 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
585
586 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
587 if (ret != 0)
588 goto failed;
589
590 link->config_index = 8;
591 link->config_regs = PRESENT_OPTION;
592
593 ret = pcmcia_request_irq(link, mgslpc_isr);
594 if (ret)
595 goto failed;
596 ret = pcmcia_enable_device(link);
597 if (ret)
598 goto failed;
599
600 info->io_base = link->resource[0]->start;
601 info->irq_level = link->irq;
602 return 0;
603
604 failed:
605 mgslpc_release((u_long)link);
606 return -ENODEV;
607 }
608
609 /* Card has been removed.
610 * Unregister device and release PCMCIA configuration.
611 * If device is open, postpone until it is closed.
612 */
mgslpc_release(u_long arg)613 static void mgslpc_release(u_long arg)
614 {
615 struct pcmcia_device *link = (struct pcmcia_device *)arg;
616
617 if (debug_level >= DEBUG_LEVEL_INFO)
618 printk("mgslpc_release(0x%p)\n", link);
619
620 pcmcia_disable_device(link);
621 }
622
mgslpc_detach(struct pcmcia_device * link)623 static void mgslpc_detach(struct pcmcia_device *link)
624 {
625 if (debug_level >= DEBUG_LEVEL_INFO)
626 printk("mgslpc_detach(0x%p)\n", link);
627
628 ((MGSLPC_INFO *)link->priv)->stop = 1;
629 mgslpc_release((u_long)link);
630
631 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
632 }
633
mgslpc_suspend(struct pcmcia_device * link)634 static int mgslpc_suspend(struct pcmcia_device *link)
635 {
636 MGSLPC_INFO *info = link->priv;
637
638 info->stop = 1;
639
640 return 0;
641 }
642
mgslpc_resume(struct pcmcia_device * link)643 static int mgslpc_resume(struct pcmcia_device *link)
644 {
645 MGSLPC_INFO *info = link->priv;
646
647 info->stop = 0;
648
649 return 0;
650 }
651
652
mgslpc_paranoia_check(MGSLPC_INFO * info,char * name,const char * routine)653 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
654 char *name, const char *routine)
655 {
656 #ifdef MGSLPC_PARANOIA_CHECK
657 static const char *badmagic =
658 "Warning: bad magic number for mgsl struct (%s) in %s\n";
659 static const char *badinfo =
660 "Warning: null mgslpc_info for (%s) in %s\n";
661
662 if (!info) {
663 printk(badinfo, name, routine);
664 return true;
665 }
666 if (info->magic != MGSLPC_MAGIC) {
667 printk(badmagic, name, routine);
668 return true;
669 }
670 #else
671 if (!info)
672 return true;
673 #endif
674 return false;
675 }
676
677
678 #define CMD_RXFIFO BIT7 // release current rx FIFO
679 #define CMD_RXRESET BIT6 // receiver reset
680 #define CMD_RXFIFO_READ BIT5
681 #define CMD_START_TIMER BIT4
682 #define CMD_TXFIFO BIT3 // release current tx FIFO
683 #define CMD_TXEOM BIT1 // transmit end message
684 #define CMD_TXRESET BIT0 // transmit reset
685
wait_command_complete(MGSLPC_INFO * info,unsigned char channel)686 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
687 {
688 int i = 0;
689 /* wait for command completion */
690 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
691 udelay(1);
692 if (i++ == 1000)
693 return false;
694 }
695 return true;
696 }
697
issue_command(MGSLPC_INFO * info,unsigned char channel,unsigned char cmd)698 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
699 {
700 wait_command_complete(info, channel);
701 write_reg(info, (unsigned char) (channel + CMDR), cmd);
702 }
703
tx_pause(struct tty_struct * tty)704 static void tx_pause(struct tty_struct *tty)
705 {
706 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
707 unsigned long flags;
708
709 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
710 return;
711 if (debug_level >= DEBUG_LEVEL_INFO)
712 printk("tx_pause(%s)\n", info->device_name);
713
714 spin_lock_irqsave(&info->lock, flags);
715 if (info->tx_enabled)
716 tx_stop(info);
717 spin_unlock_irqrestore(&info->lock, flags);
718 }
719
tx_release(struct tty_struct * tty)720 static void tx_release(struct tty_struct *tty)
721 {
722 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
723 unsigned long flags;
724
725 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
726 return;
727 if (debug_level >= DEBUG_LEVEL_INFO)
728 printk("tx_release(%s)\n", info->device_name);
729
730 spin_lock_irqsave(&info->lock, flags);
731 if (!info->tx_enabled)
732 tx_start(info, tty);
733 spin_unlock_irqrestore(&info->lock, flags);
734 }
735
736 /* Return next bottom half action to perform.
737 * or 0 if nothing to do.
738 */
bh_action(MGSLPC_INFO * info)739 static int bh_action(MGSLPC_INFO *info)
740 {
741 unsigned long flags;
742 int rc = 0;
743
744 spin_lock_irqsave(&info->lock, flags);
745
746 if (info->pending_bh & BH_RECEIVE) {
747 info->pending_bh &= ~BH_RECEIVE;
748 rc = BH_RECEIVE;
749 } else if (info->pending_bh & BH_TRANSMIT) {
750 info->pending_bh &= ~BH_TRANSMIT;
751 rc = BH_TRANSMIT;
752 } else if (info->pending_bh & BH_STATUS) {
753 info->pending_bh &= ~BH_STATUS;
754 rc = BH_STATUS;
755 }
756
757 if (!rc) {
758 /* Mark BH routine as complete */
759 info->bh_running = false;
760 info->bh_requested = false;
761 }
762
763 spin_unlock_irqrestore(&info->lock, flags);
764
765 return rc;
766 }
767
bh_handler(struct work_struct * work)768 static void bh_handler(struct work_struct *work)
769 {
770 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
771 struct tty_struct *tty;
772 int action;
773
774 if (debug_level >= DEBUG_LEVEL_BH)
775 printk("%s(%d):bh_handler(%s) entry\n",
776 __FILE__,__LINE__,info->device_name);
777
778 info->bh_running = true;
779 tty = tty_port_tty_get(&info->port);
780
781 while((action = bh_action(info)) != 0) {
782
783 /* Process work item */
784 if (debug_level >= DEBUG_LEVEL_BH)
785 printk("%s(%d):bh_handler() work item action=%d\n",
786 __FILE__,__LINE__,action);
787
788 switch (action) {
789
790 case BH_RECEIVE:
791 while(rx_get_frame(info, tty));
792 break;
793 case BH_TRANSMIT:
794 bh_transmit(info, tty);
795 break;
796 case BH_STATUS:
797 bh_status(info);
798 break;
799 default:
800 /* unknown work item ID */
801 printk("Unknown work item ID=%08X!\n", action);
802 break;
803 }
804 }
805
806 tty_kref_put(tty);
807 if (debug_level >= DEBUG_LEVEL_BH)
808 printk("%s(%d):bh_handler(%s) exit\n",
809 __FILE__,__LINE__,info->device_name);
810 }
811
bh_transmit(MGSLPC_INFO * info,struct tty_struct * tty)812 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
813 {
814 if (debug_level >= DEBUG_LEVEL_BH)
815 printk("bh_transmit() entry on %s\n", info->device_name);
816
817 if (tty)
818 tty_wakeup(tty);
819 }
820
bh_status(MGSLPC_INFO * info)821 static void bh_status(MGSLPC_INFO *info)
822 {
823 info->ri_chkcount = 0;
824 info->dsr_chkcount = 0;
825 info->dcd_chkcount = 0;
826 info->cts_chkcount = 0;
827 }
828
829 /* eom: non-zero = end of frame */
rx_ready_hdlc(MGSLPC_INFO * info,int eom)830 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
831 {
832 unsigned char data[2];
833 unsigned char fifo_count, read_count, i;
834 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
835
836 if (debug_level >= DEBUG_LEVEL_ISR)
837 printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
838
839 if (!info->rx_enabled)
840 return;
841
842 if (info->rx_frame_count >= info->rx_buf_count) {
843 /* no more free buffers */
844 issue_command(info, CHA, CMD_RXRESET);
845 info->pending_bh |= BH_RECEIVE;
846 info->rx_overflow = true;
847 info->icount.buf_overrun++;
848 return;
849 }
850
851 if (eom) {
852 /* end of frame, get FIFO count from RBCL register */
853 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
854 if (fifo_count == 0)
855 fifo_count = 32;
856 } else
857 fifo_count = 32;
858
859 do {
860 if (fifo_count == 1) {
861 read_count = 1;
862 data[0] = read_reg(info, CHA + RXFIFO);
863 } else {
864 read_count = 2;
865 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
866 }
867 fifo_count -= read_count;
868 if (!fifo_count && eom)
869 buf->status = data[--read_count];
870
871 for (i = 0; i < read_count; i++) {
872 if (buf->count >= info->max_frame_size) {
873 /* frame too large, reset receiver and reset current buffer */
874 issue_command(info, CHA, CMD_RXRESET);
875 buf->count = 0;
876 return;
877 }
878 *(buf->data + buf->count) = data[i];
879 buf->count++;
880 }
881 } while (fifo_count);
882
883 if (eom) {
884 info->pending_bh |= BH_RECEIVE;
885 info->rx_frame_count++;
886 info->rx_put++;
887 if (info->rx_put >= info->rx_buf_count)
888 info->rx_put = 0;
889 }
890 issue_command(info, CHA, CMD_RXFIFO);
891 }
892
rx_ready_async(MGSLPC_INFO * info,int tcd)893 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
894 {
895 struct tty_port *port = &info->port;
896 unsigned char data, status, flag;
897 int fifo_count;
898 int work = 0;
899 struct mgsl_icount *icount = &info->icount;
900
901 if (tcd) {
902 /* early termination, get FIFO count from RBCL register */
903 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
904
905 /* Zero fifo count could mean 0 or 32 bytes available.
906 * If BIT5 of STAR is set then at least 1 byte is available.
907 */
908 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
909 fifo_count = 32;
910 } else
911 fifo_count = 32;
912
913 tty_buffer_request_room(port, fifo_count);
914 /* Flush received async data to receive data buffer. */
915 while (fifo_count) {
916 data = read_reg(info, CHA + RXFIFO);
917 status = read_reg(info, CHA + RXFIFO);
918 fifo_count -= 2;
919
920 icount->rx++;
921 flag = TTY_NORMAL;
922
923 // if no frameing/crc error then save data
924 // BIT7:parity error
925 // BIT6:framing error
926
927 if (status & (BIT7 + BIT6)) {
928 if (status & BIT7)
929 icount->parity++;
930 else
931 icount->frame++;
932
933 /* discard char if tty control flags say so */
934 if (status & info->ignore_status_mask)
935 continue;
936
937 status &= info->read_status_mask;
938
939 if (status & BIT7)
940 flag = TTY_PARITY;
941 else if (status & BIT6)
942 flag = TTY_FRAME;
943 }
944 work += tty_insert_flip_char(port, data, flag);
945 }
946 issue_command(info, CHA, CMD_RXFIFO);
947
948 if (debug_level >= DEBUG_LEVEL_ISR) {
949 printk("%s(%d):rx_ready_async",
950 __FILE__,__LINE__);
951 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
952 __FILE__,__LINE__,icount->rx,icount->brk,
953 icount->parity,icount->frame,icount->overrun);
954 }
955
956 if (work)
957 tty_flip_buffer_push(port);
958 }
959
960
tx_done(MGSLPC_INFO * info,struct tty_struct * tty)961 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
962 {
963 if (!info->tx_active)
964 return;
965
966 info->tx_active = false;
967 info->tx_aborting = false;
968
969 if (info->params.mode == MGSL_MODE_ASYNC)
970 return;
971
972 info->tx_count = info->tx_put = info->tx_get = 0;
973 del_timer(&info->tx_timer);
974
975 if (info->drop_rts_on_tx_done) {
976 get_signals(info);
977 if (info->serial_signals & SerialSignal_RTS) {
978 info->serial_signals &= ~SerialSignal_RTS;
979 set_signals(info);
980 }
981 info->drop_rts_on_tx_done = false;
982 }
983
984 #if SYNCLINK_GENERIC_HDLC
985 if (info->netcount)
986 hdlcdev_tx_done(info);
987 else
988 #endif
989 {
990 if (tty && (tty->stopped || tty->hw_stopped)) {
991 tx_stop(info);
992 return;
993 }
994 info->pending_bh |= BH_TRANSMIT;
995 }
996 }
997
tx_ready(MGSLPC_INFO * info,struct tty_struct * tty)998 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
999 {
1000 unsigned char fifo_count = 32;
1001 int c;
1002
1003 if (debug_level >= DEBUG_LEVEL_ISR)
1004 printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1005
1006 if (info->params.mode == MGSL_MODE_HDLC) {
1007 if (!info->tx_active)
1008 return;
1009 } else {
1010 if (tty && (tty->stopped || tty->hw_stopped)) {
1011 tx_stop(info);
1012 return;
1013 }
1014 if (!info->tx_count)
1015 info->tx_active = false;
1016 }
1017
1018 if (!info->tx_count)
1019 return;
1020
1021 while (info->tx_count && fifo_count) {
1022 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1023
1024 if (c == 1) {
1025 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1026 } else {
1027 write_reg16(info, CHA + TXFIFO,
1028 *((unsigned short*)(info->tx_buf + info->tx_get)));
1029 }
1030 info->tx_count -= c;
1031 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1032 fifo_count -= c;
1033 }
1034
1035 if (info->params.mode == MGSL_MODE_ASYNC) {
1036 if (info->tx_count < WAKEUP_CHARS)
1037 info->pending_bh |= BH_TRANSMIT;
1038 issue_command(info, CHA, CMD_TXFIFO);
1039 } else {
1040 if (info->tx_count)
1041 issue_command(info, CHA, CMD_TXFIFO);
1042 else
1043 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1044 }
1045 }
1046
cts_change(MGSLPC_INFO * info,struct tty_struct * tty)1047 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1048 {
1049 get_signals(info);
1050 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1051 irq_disable(info, CHB, IRQ_CTS);
1052 info->icount.cts++;
1053 if (info->serial_signals & SerialSignal_CTS)
1054 info->input_signal_events.cts_up++;
1055 else
1056 info->input_signal_events.cts_down++;
1057 wake_up_interruptible(&info->status_event_wait_q);
1058 wake_up_interruptible(&info->event_wait_q);
1059
1060 if (tty && tty_port_cts_enabled(&info->port)) {
1061 if (tty->hw_stopped) {
1062 if (info->serial_signals & SerialSignal_CTS) {
1063 if (debug_level >= DEBUG_LEVEL_ISR)
1064 printk("CTS tx start...");
1065 tty->hw_stopped = 0;
1066 tx_start(info, tty);
1067 info->pending_bh |= BH_TRANSMIT;
1068 return;
1069 }
1070 } else {
1071 if (!(info->serial_signals & SerialSignal_CTS)) {
1072 if (debug_level >= DEBUG_LEVEL_ISR)
1073 printk("CTS tx stop...");
1074 tty->hw_stopped = 1;
1075 tx_stop(info);
1076 }
1077 }
1078 }
1079 info->pending_bh |= BH_STATUS;
1080 }
1081
dcd_change(MGSLPC_INFO * info,struct tty_struct * tty)1082 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1083 {
1084 get_signals(info);
1085 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1086 irq_disable(info, CHB, IRQ_DCD);
1087 info->icount.dcd++;
1088 if (info->serial_signals & SerialSignal_DCD) {
1089 info->input_signal_events.dcd_up++;
1090 }
1091 else
1092 info->input_signal_events.dcd_down++;
1093 #if SYNCLINK_GENERIC_HDLC
1094 if (info->netcount) {
1095 if (info->serial_signals & SerialSignal_DCD)
1096 netif_carrier_on(info->netdev);
1097 else
1098 netif_carrier_off(info->netdev);
1099 }
1100 #endif
1101 wake_up_interruptible(&info->status_event_wait_q);
1102 wake_up_interruptible(&info->event_wait_q);
1103
1104 if (tty_port_check_carrier(&info->port)) {
1105 if (debug_level >= DEBUG_LEVEL_ISR)
1106 printk("%s CD now %s...", info->device_name,
1107 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1108 if (info->serial_signals & SerialSignal_DCD)
1109 wake_up_interruptible(&info->port.open_wait);
1110 else {
1111 if (debug_level >= DEBUG_LEVEL_ISR)
1112 printk("doing serial hangup...");
1113 if (tty)
1114 tty_hangup(tty);
1115 }
1116 }
1117 info->pending_bh |= BH_STATUS;
1118 }
1119
dsr_change(MGSLPC_INFO * info)1120 static void dsr_change(MGSLPC_INFO *info)
1121 {
1122 get_signals(info);
1123 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1124 port_irq_disable(info, PVR_DSR);
1125 info->icount.dsr++;
1126 if (info->serial_signals & SerialSignal_DSR)
1127 info->input_signal_events.dsr_up++;
1128 else
1129 info->input_signal_events.dsr_down++;
1130 wake_up_interruptible(&info->status_event_wait_q);
1131 wake_up_interruptible(&info->event_wait_q);
1132 info->pending_bh |= BH_STATUS;
1133 }
1134
ri_change(MGSLPC_INFO * info)1135 static void ri_change(MGSLPC_INFO *info)
1136 {
1137 get_signals(info);
1138 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1139 port_irq_disable(info, PVR_RI);
1140 info->icount.rng++;
1141 if (info->serial_signals & SerialSignal_RI)
1142 info->input_signal_events.ri_up++;
1143 else
1144 info->input_signal_events.ri_down++;
1145 wake_up_interruptible(&info->status_event_wait_q);
1146 wake_up_interruptible(&info->event_wait_q);
1147 info->pending_bh |= BH_STATUS;
1148 }
1149
1150 /* Interrupt service routine entry point.
1151 *
1152 * Arguments:
1153 *
1154 * irq interrupt number that caused interrupt
1155 * dev_id device ID supplied during interrupt registration
1156 */
mgslpc_isr(int dummy,void * dev_id)1157 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1158 {
1159 MGSLPC_INFO *info = dev_id;
1160 struct tty_struct *tty;
1161 unsigned short isr;
1162 unsigned char gis, pis;
1163 int count=0;
1164
1165 if (debug_level >= DEBUG_LEVEL_ISR)
1166 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1167
1168 if (!(info->p_dev->_locked))
1169 return IRQ_HANDLED;
1170
1171 tty = tty_port_tty_get(&info->port);
1172
1173 spin_lock(&info->lock);
1174
1175 while ((gis = read_reg(info, CHA + GIS))) {
1176 if (debug_level >= DEBUG_LEVEL_ISR)
1177 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1178
1179 if ((gis & 0x70) || count > 1000) {
1180 printk("synclink_cs:hardware failed or ejected\n");
1181 break;
1182 }
1183 count++;
1184
1185 if (gis & (BIT1 | BIT0)) {
1186 isr = read_reg16(info, CHB + ISR);
1187 if (isr & IRQ_DCD)
1188 dcd_change(info, tty);
1189 if (isr & IRQ_CTS)
1190 cts_change(info, tty);
1191 }
1192 if (gis & (BIT3 | BIT2))
1193 {
1194 isr = read_reg16(info, CHA + ISR);
1195 if (isr & IRQ_TIMER) {
1196 info->irq_occurred = true;
1197 irq_disable(info, CHA, IRQ_TIMER);
1198 }
1199
1200 /* receive IRQs */
1201 if (isr & IRQ_EXITHUNT) {
1202 info->icount.exithunt++;
1203 wake_up_interruptible(&info->event_wait_q);
1204 }
1205 if (isr & IRQ_BREAK_ON) {
1206 info->icount.brk++;
1207 if (info->port.flags & ASYNC_SAK)
1208 do_SAK(tty);
1209 }
1210 if (isr & IRQ_RXTIME) {
1211 issue_command(info, CHA, CMD_RXFIFO_READ);
1212 }
1213 if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) {
1214 if (info->params.mode == MGSL_MODE_HDLC)
1215 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1216 else
1217 rx_ready_async(info, isr & IRQ_RXEOM);
1218 }
1219
1220 /* transmit IRQs */
1221 if (isr & IRQ_UNDERRUN) {
1222 if (info->tx_aborting)
1223 info->icount.txabort++;
1224 else
1225 info->icount.txunder++;
1226 tx_done(info, tty);
1227 }
1228 else if (isr & IRQ_ALLSENT) {
1229 info->icount.txok++;
1230 tx_done(info, tty);
1231 }
1232 else if (isr & IRQ_TXFIFO)
1233 tx_ready(info, tty);
1234 }
1235 if (gis & BIT7) {
1236 pis = read_reg(info, CHA + PIS);
1237 if (pis & BIT1)
1238 dsr_change(info);
1239 if (pis & BIT2)
1240 ri_change(info);
1241 }
1242 }
1243
1244 /* Request bottom half processing if there's something
1245 * for it to do and the bh is not already running
1246 */
1247
1248 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1249 if (debug_level >= DEBUG_LEVEL_ISR)
1250 printk("%s(%d):%s queueing bh task.\n",
1251 __FILE__,__LINE__,info->device_name);
1252 schedule_work(&info->task);
1253 info->bh_requested = true;
1254 }
1255
1256 spin_unlock(&info->lock);
1257 tty_kref_put(tty);
1258
1259 if (debug_level >= DEBUG_LEVEL_ISR)
1260 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1261 __FILE__, __LINE__, info->irq_level);
1262
1263 return IRQ_HANDLED;
1264 }
1265
1266 /* Initialize and start device.
1267 */
startup(MGSLPC_INFO * info,struct tty_struct * tty)1268 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1269 {
1270 int retval = 0;
1271
1272 if (debug_level >= DEBUG_LEVEL_INFO)
1273 printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1274
1275 if (tty_port_initialized(&info->port))
1276 return 0;
1277
1278 if (!info->tx_buf) {
1279 /* allocate a page of memory for a transmit buffer */
1280 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1281 if (!info->tx_buf) {
1282 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1283 __FILE__, __LINE__, info->device_name);
1284 return -ENOMEM;
1285 }
1286 }
1287
1288 info->pending_bh = 0;
1289
1290 memset(&info->icount, 0, sizeof(info->icount));
1291
1292 timer_setup(&info->tx_timer, tx_timeout, 0);
1293
1294 /* Allocate and claim adapter resources */
1295 retval = claim_resources(info);
1296
1297 /* perform existence check and diagnostics */
1298 if (!retval)
1299 retval = adapter_test(info);
1300
1301 if (retval) {
1302 if (capable(CAP_SYS_ADMIN) && tty)
1303 set_bit(TTY_IO_ERROR, &tty->flags);
1304 release_resources(info);
1305 return retval;
1306 }
1307
1308 /* program hardware for current parameters */
1309 mgslpc_change_params(info, tty);
1310
1311 if (tty)
1312 clear_bit(TTY_IO_ERROR, &tty->flags);
1313
1314 tty_port_set_initialized(&info->port, 1);
1315
1316 return 0;
1317 }
1318
1319 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1320 */
shutdown(MGSLPC_INFO * info,struct tty_struct * tty)1321 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1322 {
1323 unsigned long flags;
1324
1325 if (!tty_port_initialized(&info->port))
1326 return;
1327
1328 if (debug_level >= DEBUG_LEVEL_INFO)
1329 printk("%s(%d):mgslpc_shutdown(%s)\n",
1330 __FILE__, __LINE__, info->device_name);
1331
1332 /* clear status wait queue because status changes */
1333 /* can't happen after shutting down the hardware */
1334 wake_up_interruptible(&info->status_event_wait_q);
1335 wake_up_interruptible(&info->event_wait_q);
1336
1337 del_timer_sync(&info->tx_timer);
1338
1339 if (info->tx_buf) {
1340 free_page((unsigned long) info->tx_buf);
1341 info->tx_buf = NULL;
1342 }
1343
1344 spin_lock_irqsave(&info->lock, flags);
1345
1346 rx_stop(info);
1347 tx_stop(info);
1348
1349 /* TODO:disable interrupts instead of reset to preserve signal states */
1350 reset_device(info);
1351
1352 if (!tty || C_HUPCL(tty)) {
1353 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1354 set_signals(info);
1355 }
1356
1357 spin_unlock_irqrestore(&info->lock, flags);
1358
1359 release_resources(info);
1360
1361 if (tty)
1362 set_bit(TTY_IO_ERROR, &tty->flags);
1363
1364 tty_port_set_initialized(&info->port, 0);
1365 }
1366
mgslpc_program_hw(MGSLPC_INFO * info,struct tty_struct * tty)1367 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1368 {
1369 unsigned long flags;
1370
1371 spin_lock_irqsave(&info->lock, flags);
1372
1373 rx_stop(info);
1374 tx_stop(info);
1375 info->tx_count = info->tx_put = info->tx_get = 0;
1376
1377 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1378 hdlc_mode(info);
1379 else
1380 async_mode(info);
1381
1382 set_signals(info);
1383
1384 info->dcd_chkcount = 0;
1385 info->cts_chkcount = 0;
1386 info->ri_chkcount = 0;
1387 info->dsr_chkcount = 0;
1388
1389 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1390 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1391 get_signals(info);
1392
1393 if (info->netcount || (tty && C_CREAD(tty)))
1394 rx_start(info);
1395
1396 spin_unlock_irqrestore(&info->lock, flags);
1397 }
1398
1399 /* Reconfigure adapter based on new parameters
1400 */
mgslpc_change_params(MGSLPC_INFO * info,struct tty_struct * tty)1401 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1402 {
1403 unsigned cflag;
1404 int bits_per_char;
1405
1406 if (!tty)
1407 return;
1408
1409 if (debug_level >= DEBUG_LEVEL_INFO)
1410 printk("%s(%d):mgslpc_change_params(%s)\n",
1411 __FILE__, __LINE__, info->device_name);
1412
1413 cflag = tty->termios.c_cflag;
1414
1415 /* if B0 rate (hangup) specified then negate RTS and DTR */
1416 /* otherwise assert RTS and DTR */
1417 if (cflag & CBAUD)
1418 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1419 else
1420 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1421
1422 /* byte size and parity */
1423
1424 switch (cflag & CSIZE) {
1425 case CS5: info->params.data_bits = 5; break;
1426 case CS6: info->params.data_bits = 6; break;
1427 case CS7: info->params.data_bits = 7; break;
1428 case CS8: info->params.data_bits = 8; break;
1429 default: info->params.data_bits = 7; break;
1430 }
1431
1432 if (cflag & CSTOPB)
1433 info->params.stop_bits = 2;
1434 else
1435 info->params.stop_bits = 1;
1436
1437 info->params.parity = ASYNC_PARITY_NONE;
1438 if (cflag & PARENB) {
1439 if (cflag & PARODD)
1440 info->params.parity = ASYNC_PARITY_ODD;
1441 else
1442 info->params.parity = ASYNC_PARITY_EVEN;
1443 #ifdef CMSPAR
1444 if (cflag & CMSPAR)
1445 info->params.parity = ASYNC_PARITY_SPACE;
1446 #endif
1447 }
1448
1449 /* calculate number of jiffies to transmit a full
1450 * FIFO (32 bytes) at specified data rate
1451 */
1452 bits_per_char = info->params.data_bits +
1453 info->params.stop_bits + 1;
1454
1455 /* if port data rate is set to 460800 or less then
1456 * allow tty settings to override, otherwise keep the
1457 * current data rate.
1458 */
1459 if (info->params.data_rate <= 460800) {
1460 info->params.data_rate = tty_get_baud_rate(tty);
1461 }
1462
1463 if (info->params.data_rate) {
1464 info->timeout = (32*HZ*bits_per_char) /
1465 info->params.data_rate;
1466 }
1467 info->timeout += HZ/50; /* Add .02 seconds of slop */
1468
1469 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
1470 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
1471
1472 /* process tty input control flags */
1473
1474 info->read_status_mask = 0;
1475 if (I_INPCK(tty))
1476 info->read_status_mask |= BIT7 | BIT6;
1477 if (I_IGNPAR(tty))
1478 info->ignore_status_mask |= BIT7 | BIT6;
1479
1480 mgslpc_program_hw(info, tty);
1481 }
1482
1483 /* Add a character to the transmit buffer
1484 */
mgslpc_put_char(struct tty_struct * tty,unsigned char ch)1485 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1486 {
1487 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1488 unsigned long flags;
1489
1490 if (debug_level >= DEBUG_LEVEL_INFO) {
1491 printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1492 __FILE__, __LINE__, ch, info->device_name);
1493 }
1494
1495 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1496 return 0;
1497
1498 if (!info->tx_buf)
1499 return 0;
1500
1501 spin_lock_irqsave(&info->lock, flags);
1502
1503 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1504 if (info->tx_count < TXBUFSIZE - 1) {
1505 info->tx_buf[info->tx_put++] = ch;
1506 info->tx_put &= TXBUFSIZE-1;
1507 info->tx_count++;
1508 }
1509 }
1510
1511 spin_unlock_irqrestore(&info->lock, flags);
1512 return 1;
1513 }
1514
1515 /* Enable transmitter so remaining characters in the
1516 * transmit buffer are sent.
1517 */
mgslpc_flush_chars(struct tty_struct * tty)1518 static void mgslpc_flush_chars(struct tty_struct *tty)
1519 {
1520 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1521 unsigned long flags;
1522
1523 if (debug_level >= DEBUG_LEVEL_INFO)
1524 printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1525 __FILE__, __LINE__, info->device_name, info->tx_count);
1526
1527 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1528 return;
1529
1530 if (info->tx_count <= 0 || tty->stopped ||
1531 tty->hw_stopped || !info->tx_buf)
1532 return;
1533
1534 if (debug_level >= DEBUG_LEVEL_INFO)
1535 printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1536 __FILE__, __LINE__, info->device_name);
1537
1538 spin_lock_irqsave(&info->lock, flags);
1539 if (!info->tx_active)
1540 tx_start(info, tty);
1541 spin_unlock_irqrestore(&info->lock, flags);
1542 }
1543
1544 /* Send a block of data
1545 *
1546 * Arguments:
1547 *
1548 * tty pointer to tty information structure
1549 * buf pointer to buffer containing send data
1550 * count size of send data in bytes
1551 *
1552 * Returns: number of characters written
1553 */
mgslpc_write(struct tty_struct * tty,const unsigned char * buf,int count)1554 static int mgslpc_write(struct tty_struct * tty,
1555 const unsigned char *buf, int count)
1556 {
1557 int c, ret = 0;
1558 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1559 unsigned long flags;
1560
1561 if (debug_level >= DEBUG_LEVEL_INFO)
1562 printk("%s(%d):mgslpc_write(%s) count=%d\n",
1563 __FILE__, __LINE__, info->device_name, count);
1564
1565 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1566 !info->tx_buf)
1567 goto cleanup;
1568
1569 if (info->params.mode == MGSL_MODE_HDLC) {
1570 if (count > TXBUFSIZE) {
1571 ret = -EIO;
1572 goto cleanup;
1573 }
1574 if (info->tx_active)
1575 goto cleanup;
1576 else if (info->tx_count)
1577 goto start;
1578 }
1579
1580 for (;;) {
1581 c = min(count,
1582 min(TXBUFSIZE - info->tx_count - 1,
1583 TXBUFSIZE - info->tx_put));
1584 if (c <= 0)
1585 break;
1586
1587 memcpy(info->tx_buf + info->tx_put, buf, c);
1588
1589 spin_lock_irqsave(&info->lock, flags);
1590 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1591 info->tx_count += c;
1592 spin_unlock_irqrestore(&info->lock, flags);
1593
1594 buf += c;
1595 count -= c;
1596 ret += c;
1597 }
1598 start:
1599 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1600 spin_lock_irqsave(&info->lock, flags);
1601 if (!info->tx_active)
1602 tx_start(info, tty);
1603 spin_unlock_irqrestore(&info->lock, flags);
1604 }
1605 cleanup:
1606 if (debug_level >= DEBUG_LEVEL_INFO)
1607 printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1608 __FILE__, __LINE__, info->device_name, ret);
1609 return ret;
1610 }
1611
1612 /* Return the count of free bytes in transmit buffer
1613 */
mgslpc_write_room(struct tty_struct * tty)1614 static int mgslpc_write_room(struct tty_struct *tty)
1615 {
1616 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1617 int ret;
1618
1619 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1620 return 0;
1621
1622 if (info->params.mode == MGSL_MODE_HDLC) {
1623 /* HDLC (frame oriented) mode */
1624 if (info->tx_active)
1625 return 0;
1626 else
1627 return HDLC_MAX_FRAME_SIZE;
1628 } else {
1629 ret = TXBUFSIZE - info->tx_count - 1;
1630 if (ret < 0)
1631 ret = 0;
1632 }
1633
1634 if (debug_level >= DEBUG_LEVEL_INFO)
1635 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1636 __FILE__, __LINE__, info->device_name, ret);
1637 return ret;
1638 }
1639
1640 /* Return the count of bytes in transmit buffer
1641 */
mgslpc_chars_in_buffer(struct tty_struct * tty)1642 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1643 {
1644 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1645 int rc;
1646
1647 if (debug_level >= DEBUG_LEVEL_INFO)
1648 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1649 __FILE__, __LINE__, info->device_name);
1650
1651 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1652 return 0;
1653
1654 if (info->params.mode == MGSL_MODE_HDLC)
1655 rc = info->tx_active ? info->max_frame_size : 0;
1656 else
1657 rc = info->tx_count;
1658
1659 if (debug_level >= DEBUG_LEVEL_INFO)
1660 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1661 __FILE__, __LINE__, info->device_name, rc);
1662
1663 return rc;
1664 }
1665
1666 /* Discard all data in the send buffer
1667 */
mgslpc_flush_buffer(struct tty_struct * tty)1668 static void mgslpc_flush_buffer(struct tty_struct *tty)
1669 {
1670 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1671 unsigned long flags;
1672
1673 if (debug_level >= DEBUG_LEVEL_INFO)
1674 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1675 __FILE__, __LINE__, info->device_name);
1676
1677 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1678 return;
1679
1680 spin_lock_irqsave(&info->lock, flags);
1681 info->tx_count = info->tx_put = info->tx_get = 0;
1682 del_timer(&info->tx_timer);
1683 spin_unlock_irqrestore(&info->lock, flags);
1684
1685 wake_up_interruptible(&tty->write_wait);
1686 tty_wakeup(tty);
1687 }
1688
1689 /* Send a high-priority XON/XOFF character
1690 */
mgslpc_send_xchar(struct tty_struct * tty,char ch)1691 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1692 {
1693 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1694 unsigned long flags;
1695
1696 if (debug_level >= DEBUG_LEVEL_INFO)
1697 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1698 __FILE__, __LINE__, info->device_name, ch);
1699
1700 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1701 return;
1702
1703 info->x_char = ch;
1704 if (ch) {
1705 spin_lock_irqsave(&info->lock, flags);
1706 if (!info->tx_enabled)
1707 tx_start(info, tty);
1708 spin_unlock_irqrestore(&info->lock, flags);
1709 }
1710 }
1711
1712 /* Signal remote device to throttle send data (our receive data)
1713 */
mgslpc_throttle(struct tty_struct * tty)1714 static void mgslpc_throttle(struct tty_struct * tty)
1715 {
1716 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1717 unsigned long flags;
1718
1719 if (debug_level >= DEBUG_LEVEL_INFO)
1720 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1721 __FILE__, __LINE__, info->device_name);
1722
1723 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1724 return;
1725
1726 if (I_IXOFF(tty))
1727 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1728
1729 if (C_CRTSCTS(tty)) {
1730 spin_lock_irqsave(&info->lock, flags);
1731 info->serial_signals &= ~SerialSignal_RTS;
1732 set_signals(info);
1733 spin_unlock_irqrestore(&info->lock, flags);
1734 }
1735 }
1736
1737 /* Signal remote device to stop throttling send data (our receive data)
1738 */
mgslpc_unthrottle(struct tty_struct * tty)1739 static void mgslpc_unthrottle(struct tty_struct * tty)
1740 {
1741 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1742 unsigned long flags;
1743
1744 if (debug_level >= DEBUG_LEVEL_INFO)
1745 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1746 __FILE__, __LINE__, info->device_name);
1747
1748 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1749 return;
1750
1751 if (I_IXOFF(tty)) {
1752 if (info->x_char)
1753 info->x_char = 0;
1754 else
1755 mgslpc_send_xchar(tty, START_CHAR(tty));
1756 }
1757
1758 if (C_CRTSCTS(tty)) {
1759 spin_lock_irqsave(&info->lock, flags);
1760 info->serial_signals |= SerialSignal_RTS;
1761 set_signals(info);
1762 spin_unlock_irqrestore(&info->lock, flags);
1763 }
1764 }
1765
1766 /* get the current serial statistics
1767 */
get_stats(MGSLPC_INFO * info,struct mgsl_icount __user * user_icount)1768 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1769 {
1770 int err;
1771 if (debug_level >= DEBUG_LEVEL_INFO)
1772 printk("get_params(%s)\n", info->device_name);
1773 if (!user_icount) {
1774 memset(&info->icount, 0, sizeof(info->icount));
1775 } else {
1776 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1777 if (err)
1778 return -EFAULT;
1779 }
1780 return 0;
1781 }
1782
1783 /* get the current serial parameters
1784 */
get_params(MGSLPC_INFO * info,MGSL_PARAMS __user * user_params)1785 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1786 {
1787 int err;
1788 if (debug_level >= DEBUG_LEVEL_INFO)
1789 printk("get_params(%s)\n", info->device_name);
1790 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1791 if (err)
1792 return -EFAULT;
1793 return 0;
1794 }
1795
1796 /* set the serial parameters
1797 *
1798 * Arguments:
1799 *
1800 * info pointer to device instance data
1801 * new_params user buffer containing new serial params
1802 *
1803 * Returns: 0 if success, otherwise error code
1804 */
set_params(MGSLPC_INFO * info,MGSL_PARAMS __user * new_params,struct tty_struct * tty)1805 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1806 {
1807 unsigned long flags;
1808 MGSL_PARAMS tmp_params;
1809 int err;
1810
1811 if (debug_level >= DEBUG_LEVEL_INFO)
1812 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1813 info->device_name);
1814 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1815 if (err) {
1816 if (debug_level >= DEBUG_LEVEL_INFO)
1817 printk("%s(%d):set_params(%s) user buffer copy failed\n",
1818 __FILE__, __LINE__, info->device_name);
1819 return -EFAULT;
1820 }
1821
1822 spin_lock_irqsave(&info->lock, flags);
1823 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1824 spin_unlock_irqrestore(&info->lock, flags);
1825
1826 mgslpc_change_params(info, tty);
1827
1828 return 0;
1829 }
1830
get_txidle(MGSLPC_INFO * info,int __user * idle_mode)1831 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1832 {
1833 int err;
1834 if (debug_level >= DEBUG_LEVEL_INFO)
1835 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1836 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1837 if (err)
1838 return -EFAULT;
1839 return 0;
1840 }
1841
set_txidle(MGSLPC_INFO * info,int idle_mode)1842 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1843 {
1844 unsigned long flags;
1845 if (debug_level >= DEBUG_LEVEL_INFO)
1846 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1847 spin_lock_irqsave(&info->lock, flags);
1848 info->idle_mode = idle_mode;
1849 tx_set_idle(info);
1850 spin_unlock_irqrestore(&info->lock, flags);
1851 return 0;
1852 }
1853
get_interface(MGSLPC_INFO * info,int __user * if_mode)1854 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1855 {
1856 int err;
1857 if (debug_level >= DEBUG_LEVEL_INFO)
1858 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1859 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1860 if (err)
1861 return -EFAULT;
1862 return 0;
1863 }
1864
set_interface(MGSLPC_INFO * info,int if_mode)1865 static int set_interface(MGSLPC_INFO * info, int if_mode)
1866 {
1867 unsigned long flags;
1868 unsigned char val;
1869 if (debug_level >= DEBUG_LEVEL_INFO)
1870 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1871 spin_lock_irqsave(&info->lock, flags);
1872 info->if_mode = if_mode;
1873
1874 val = read_reg(info, PVR) & 0x0f;
1875 switch (info->if_mode)
1876 {
1877 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1878 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1879 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1880 }
1881 write_reg(info, PVR, val);
1882
1883 spin_unlock_irqrestore(&info->lock, flags);
1884 return 0;
1885 }
1886
set_txenable(MGSLPC_INFO * info,int enable,struct tty_struct * tty)1887 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1888 {
1889 unsigned long flags;
1890
1891 if (debug_level >= DEBUG_LEVEL_INFO)
1892 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1893
1894 spin_lock_irqsave(&info->lock, flags);
1895 if (enable) {
1896 if (!info->tx_enabled)
1897 tx_start(info, tty);
1898 } else {
1899 if (info->tx_enabled)
1900 tx_stop(info);
1901 }
1902 spin_unlock_irqrestore(&info->lock, flags);
1903 return 0;
1904 }
1905
tx_abort(MGSLPC_INFO * info)1906 static int tx_abort(MGSLPC_INFO * info)
1907 {
1908 unsigned long flags;
1909
1910 if (debug_level >= DEBUG_LEVEL_INFO)
1911 printk("tx_abort(%s)\n", info->device_name);
1912
1913 spin_lock_irqsave(&info->lock, flags);
1914 if (info->tx_active && info->tx_count &&
1915 info->params.mode == MGSL_MODE_HDLC) {
1916 /* clear data count so FIFO is not filled on next IRQ.
1917 * This results in underrun and abort transmission.
1918 */
1919 info->tx_count = info->tx_put = info->tx_get = 0;
1920 info->tx_aborting = true;
1921 }
1922 spin_unlock_irqrestore(&info->lock, flags);
1923 return 0;
1924 }
1925
set_rxenable(MGSLPC_INFO * info,int enable)1926 static int set_rxenable(MGSLPC_INFO * info, int enable)
1927 {
1928 unsigned long flags;
1929
1930 if (debug_level >= DEBUG_LEVEL_INFO)
1931 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1932
1933 spin_lock_irqsave(&info->lock, flags);
1934 if (enable) {
1935 if (!info->rx_enabled)
1936 rx_start(info);
1937 } else {
1938 if (info->rx_enabled)
1939 rx_stop(info);
1940 }
1941 spin_unlock_irqrestore(&info->lock, flags);
1942 return 0;
1943 }
1944
1945 /* wait for specified event to occur
1946 *
1947 * Arguments: info pointer to device instance data
1948 * mask pointer to bitmask of events to wait for
1949 * Return Value: 0 if successful and bit mask updated with
1950 * of events triggerred,
1951 * otherwise error code
1952 */
wait_events(MGSLPC_INFO * info,int __user * mask_ptr)1953 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1954 {
1955 unsigned long flags;
1956 int s;
1957 int rc=0;
1958 struct mgsl_icount cprev, cnow;
1959 int events;
1960 int mask;
1961 struct _input_signal_events oldsigs, newsigs;
1962 DECLARE_WAITQUEUE(wait, current);
1963
1964 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1965 if (rc)
1966 return -EFAULT;
1967
1968 if (debug_level >= DEBUG_LEVEL_INFO)
1969 printk("wait_events(%s,%d)\n", info->device_name, mask);
1970
1971 spin_lock_irqsave(&info->lock, flags);
1972
1973 /* return immediately if state matches requested events */
1974 get_signals(info);
1975 s = info->serial_signals;
1976 events = mask &
1977 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1978 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1979 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1980 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1981 if (events) {
1982 spin_unlock_irqrestore(&info->lock, flags);
1983 goto exit;
1984 }
1985
1986 /* save current irq counts */
1987 cprev = info->icount;
1988 oldsigs = info->input_signal_events;
1989
1990 if ((info->params.mode == MGSL_MODE_HDLC) &&
1991 (mask & MgslEvent_ExitHuntMode))
1992 irq_enable(info, CHA, IRQ_EXITHUNT);
1993
1994 set_current_state(TASK_INTERRUPTIBLE);
1995 add_wait_queue(&info->event_wait_q, &wait);
1996
1997 spin_unlock_irqrestore(&info->lock, flags);
1998
1999
2000 for(;;) {
2001 schedule();
2002 if (signal_pending(current)) {
2003 rc = -ERESTARTSYS;
2004 break;
2005 }
2006
2007 /* get current irq counts */
2008 spin_lock_irqsave(&info->lock, flags);
2009 cnow = info->icount;
2010 newsigs = info->input_signal_events;
2011 set_current_state(TASK_INTERRUPTIBLE);
2012 spin_unlock_irqrestore(&info->lock, flags);
2013
2014 /* if no change, wait aborted for some reason */
2015 if (newsigs.dsr_up == oldsigs.dsr_up &&
2016 newsigs.dsr_down == oldsigs.dsr_down &&
2017 newsigs.dcd_up == oldsigs.dcd_up &&
2018 newsigs.dcd_down == oldsigs.dcd_down &&
2019 newsigs.cts_up == oldsigs.cts_up &&
2020 newsigs.cts_down == oldsigs.cts_down &&
2021 newsigs.ri_up == oldsigs.ri_up &&
2022 newsigs.ri_down == oldsigs.ri_down &&
2023 cnow.exithunt == cprev.exithunt &&
2024 cnow.rxidle == cprev.rxidle) {
2025 rc = -EIO;
2026 break;
2027 }
2028
2029 events = mask &
2030 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2031 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2032 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2033 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2034 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2035 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2036 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2037 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2038 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2039 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2040 if (events)
2041 break;
2042
2043 cprev = cnow;
2044 oldsigs = newsigs;
2045 }
2046
2047 remove_wait_queue(&info->event_wait_q, &wait);
2048 set_current_state(TASK_RUNNING);
2049
2050 if (mask & MgslEvent_ExitHuntMode) {
2051 spin_lock_irqsave(&info->lock, flags);
2052 if (!waitqueue_active(&info->event_wait_q))
2053 irq_disable(info, CHA, IRQ_EXITHUNT);
2054 spin_unlock_irqrestore(&info->lock, flags);
2055 }
2056 exit:
2057 if (rc == 0)
2058 PUT_USER(rc, events, mask_ptr);
2059 return rc;
2060 }
2061
modem_input_wait(MGSLPC_INFO * info,int arg)2062 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2063 {
2064 unsigned long flags;
2065 int rc;
2066 struct mgsl_icount cprev, cnow;
2067 DECLARE_WAITQUEUE(wait, current);
2068
2069 /* save current irq counts */
2070 spin_lock_irqsave(&info->lock, flags);
2071 cprev = info->icount;
2072 add_wait_queue(&info->status_event_wait_q, &wait);
2073 set_current_state(TASK_INTERRUPTIBLE);
2074 spin_unlock_irqrestore(&info->lock, flags);
2075
2076 for(;;) {
2077 schedule();
2078 if (signal_pending(current)) {
2079 rc = -ERESTARTSYS;
2080 break;
2081 }
2082
2083 /* get new irq counts */
2084 spin_lock_irqsave(&info->lock, flags);
2085 cnow = info->icount;
2086 set_current_state(TASK_INTERRUPTIBLE);
2087 spin_unlock_irqrestore(&info->lock, flags);
2088
2089 /* if no change, wait aborted for some reason */
2090 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2091 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2092 rc = -EIO;
2093 break;
2094 }
2095
2096 /* check for change in caller specified modem input */
2097 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2098 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2099 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2100 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2101 rc = 0;
2102 break;
2103 }
2104
2105 cprev = cnow;
2106 }
2107 remove_wait_queue(&info->status_event_wait_q, &wait);
2108 set_current_state(TASK_RUNNING);
2109 return rc;
2110 }
2111
2112 /* return the state of the serial control and status signals
2113 */
tiocmget(struct tty_struct * tty)2114 static int tiocmget(struct tty_struct *tty)
2115 {
2116 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2117 unsigned int result;
2118 unsigned long flags;
2119
2120 spin_lock_irqsave(&info->lock, flags);
2121 get_signals(info);
2122 spin_unlock_irqrestore(&info->lock, flags);
2123
2124 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2125 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2126 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2127 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2128 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2129 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2130
2131 if (debug_level >= DEBUG_LEVEL_INFO)
2132 printk("%s(%d):%s tiocmget() value=%08X\n",
2133 __FILE__, __LINE__, info->device_name, result);
2134 return result;
2135 }
2136
2137 /* set modem control signals (DTR/RTS)
2138 */
tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)2139 static int tiocmset(struct tty_struct *tty,
2140 unsigned int set, unsigned int clear)
2141 {
2142 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2143 unsigned long flags;
2144
2145 if (debug_level >= DEBUG_LEVEL_INFO)
2146 printk("%s(%d):%s tiocmset(%x,%x)\n",
2147 __FILE__, __LINE__, info->device_name, set, clear);
2148
2149 if (set & TIOCM_RTS)
2150 info->serial_signals |= SerialSignal_RTS;
2151 if (set & TIOCM_DTR)
2152 info->serial_signals |= SerialSignal_DTR;
2153 if (clear & TIOCM_RTS)
2154 info->serial_signals &= ~SerialSignal_RTS;
2155 if (clear & TIOCM_DTR)
2156 info->serial_signals &= ~SerialSignal_DTR;
2157
2158 spin_lock_irqsave(&info->lock, flags);
2159 set_signals(info);
2160 spin_unlock_irqrestore(&info->lock, flags);
2161
2162 return 0;
2163 }
2164
2165 /* Set or clear transmit break condition
2166 *
2167 * Arguments: tty pointer to tty instance data
2168 * break_state -1=set break condition, 0=clear
2169 */
mgslpc_break(struct tty_struct * tty,int break_state)2170 static int mgslpc_break(struct tty_struct *tty, int break_state)
2171 {
2172 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2173 unsigned long flags;
2174
2175 if (debug_level >= DEBUG_LEVEL_INFO)
2176 printk("%s(%d):mgslpc_break(%s,%d)\n",
2177 __FILE__, __LINE__, info->device_name, break_state);
2178
2179 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2180 return -EINVAL;
2181
2182 spin_lock_irqsave(&info->lock, flags);
2183 if (break_state == -1)
2184 set_reg_bits(info, CHA+DAFO, BIT6);
2185 else
2186 clear_reg_bits(info, CHA+DAFO, BIT6);
2187 spin_unlock_irqrestore(&info->lock, flags);
2188 return 0;
2189 }
2190
mgslpc_get_icount(struct tty_struct * tty,struct serial_icounter_struct * icount)2191 static int mgslpc_get_icount(struct tty_struct *tty,
2192 struct serial_icounter_struct *icount)
2193 {
2194 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2195 struct mgsl_icount cnow; /* kernel counter temps */
2196 unsigned long flags;
2197
2198 spin_lock_irqsave(&info->lock, flags);
2199 cnow = info->icount;
2200 spin_unlock_irqrestore(&info->lock, flags);
2201
2202 icount->cts = cnow.cts;
2203 icount->dsr = cnow.dsr;
2204 icount->rng = cnow.rng;
2205 icount->dcd = cnow.dcd;
2206 icount->rx = cnow.rx;
2207 icount->tx = cnow.tx;
2208 icount->frame = cnow.frame;
2209 icount->overrun = cnow.overrun;
2210 icount->parity = cnow.parity;
2211 icount->brk = cnow.brk;
2212 icount->buf_overrun = cnow.buf_overrun;
2213
2214 return 0;
2215 }
2216
2217 /* Service an IOCTL request
2218 *
2219 * Arguments:
2220 *
2221 * tty pointer to tty instance data
2222 * cmd IOCTL command code
2223 * arg command argument/context
2224 *
2225 * Return Value: 0 if success, otherwise error code
2226 */
mgslpc_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)2227 static int mgslpc_ioctl(struct tty_struct *tty,
2228 unsigned int cmd, unsigned long arg)
2229 {
2230 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2231 void __user *argp = (void __user *)arg;
2232
2233 if (debug_level >= DEBUG_LEVEL_INFO)
2234 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2235 info->device_name, cmd);
2236
2237 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2238 return -ENODEV;
2239
2240 if (cmd != TIOCMIWAIT) {
2241 if (tty_io_error(tty))
2242 return -EIO;
2243 }
2244
2245 switch (cmd) {
2246 case MGSL_IOCGPARAMS:
2247 return get_params(info, argp);
2248 case MGSL_IOCSPARAMS:
2249 return set_params(info, argp, tty);
2250 case MGSL_IOCGTXIDLE:
2251 return get_txidle(info, argp);
2252 case MGSL_IOCSTXIDLE:
2253 return set_txidle(info, (int)arg);
2254 case MGSL_IOCGIF:
2255 return get_interface(info, argp);
2256 case MGSL_IOCSIF:
2257 return set_interface(info,(int)arg);
2258 case MGSL_IOCTXENABLE:
2259 return set_txenable(info,(int)arg, tty);
2260 case MGSL_IOCRXENABLE:
2261 return set_rxenable(info,(int)arg);
2262 case MGSL_IOCTXABORT:
2263 return tx_abort(info);
2264 case MGSL_IOCGSTATS:
2265 return get_stats(info, argp);
2266 case MGSL_IOCWAITEVENT:
2267 return wait_events(info, argp);
2268 case TIOCMIWAIT:
2269 return modem_input_wait(info,(int)arg);
2270 default:
2271 return -ENOIOCTLCMD;
2272 }
2273 return 0;
2274 }
2275
2276 /* Set new termios settings
2277 *
2278 * Arguments:
2279 *
2280 * tty pointer to tty structure
2281 * termios pointer to buffer to hold returned old termios
2282 */
mgslpc_set_termios(struct tty_struct * tty,struct ktermios * old_termios)2283 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2284 {
2285 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2286 unsigned long flags;
2287
2288 if (debug_level >= DEBUG_LEVEL_INFO)
2289 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2290 tty->driver->name);
2291
2292 /* just return if nothing has changed */
2293 if ((tty->termios.c_cflag == old_termios->c_cflag)
2294 && (RELEVANT_IFLAG(tty->termios.c_iflag)
2295 == RELEVANT_IFLAG(old_termios->c_iflag)))
2296 return;
2297
2298 mgslpc_change_params(info, tty);
2299
2300 /* Handle transition to B0 status */
2301 if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
2302 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2303 spin_lock_irqsave(&info->lock, flags);
2304 set_signals(info);
2305 spin_unlock_irqrestore(&info->lock, flags);
2306 }
2307
2308 /* Handle transition away from B0 status */
2309 if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
2310 info->serial_signals |= SerialSignal_DTR;
2311 if (!C_CRTSCTS(tty) || !tty_throttled(tty))
2312 info->serial_signals |= SerialSignal_RTS;
2313 spin_lock_irqsave(&info->lock, flags);
2314 set_signals(info);
2315 spin_unlock_irqrestore(&info->lock, flags);
2316 }
2317
2318 /* Handle turning off CRTSCTS */
2319 if (old_termios->c_cflag & CRTSCTS && !C_CRTSCTS(tty)) {
2320 tty->hw_stopped = 0;
2321 tx_release(tty);
2322 }
2323 }
2324
mgslpc_close(struct tty_struct * tty,struct file * filp)2325 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2326 {
2327 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2328 struct tty_port *port = &info->port;
2329
2330 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2331 return;
2332
2333 if (debug_level >= DEBUG_LEVEL_INFO)
2334 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2335 __FILE__, __LINE__, info->device_name, port->count);
2336
2337 if (tty_port_close_start(port, tty, filp) == 0)
2338 goto cleanup;
2339
2340 if (tty_port_initialized(port))
2341 mgslpc_wait_until_sent(tty, info->timeout);
2342
2343 mgslpc_flush_buffer(tty);
2344
2345 tty_ldisc_flush(tty);
2346 shutdown(info, tty);
2347
2348 tty_port_close_end(port, tty);
2349 tty_port_tty_set(port, NULL);
2350 cleanup:
2351 if (debug_level >= DEBUG_LEVEL_INFO)
2352 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2353 tty->driver->name, port->count);
2354 }
2355
2356 /* Wait until the transmitter is empty.
2357 */
mgslpc_wait_until_sent(struct tty_struct * tty,int timeout)2358 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2359 {
2360 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2361 unsigned long orig_jiffies, char_time;
2362
2363 if (!info)
2364 return;
2365
2366 if (debug_level >= DEBUG_LEVEL_INFO)
2367 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2368 __FILE__, __LINE__, info->device_name);
2369
2370 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2371 return;
2372
2373 if (!tty_port_initialized(&info->port))
2374 goto exit;
2375
2376 orig_jiffies = jiffies;
2377
2378 /* Set check interval to 1/5 of estimated time to
2379 * send a character, and make it at least 1. The check
2380 * interval should also be less than the timeout.
2381 * Note: use tight timings here to satisfy the NIST-PCTS.
2382 */
2383
2384 if (info->params.data_rate) {
2385 char_time = info->timeout/(32 * 5);
2386 if (!char_time)
2387 char_time++;
2388 } else
2389 char_time = 1;
2390
2391 if (timeout)
2392 char_time = min_t(unsigned long, char_time, timeout);
2393
2394 if (info->params.mode == MGSL_MODE_HDLC) {
2395 while (info->tx_active) {
2396 msleep_interruptible(jiffies_to_msecs(char_time));
2397 if (signal_pending(current))
2398 break;
2399 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2400 break;
2401 }
2402 } else {
2403 while ((info->tx_count || info->tx_active) &&
2404 info->tx_enabled) {
2405 msleep_interruptible(jiffies_to_msecs(char_time));
2406 if (signal_pending(current))
2407 break;
2408 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2409 break;
2410 }
2411 }
2412
2413 exit:
2414 if (debug_level >= DEBUG_LEVEL_INFO)
2415 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2416 __FILE__, __LINE__, info->device_name);
2417 }
2418
2419 /* Called by tty_hangup() when a hangup is signaled.
2420 * This is the same as closing all open files for the port.
2421 */
mgslpc_hangup(struct tty_struct * tty)2422 static void mgslpc_hangup(struct tty_struct *tty)
2423 {
2424 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2425
2426 if (debug_level >= DEBUG_LEVEL_INFO)
2427 printk("%s(%d):mgslpc_hangup(%s)\n",
2428 __FILE__, __LINE__, info->device_name);
2429
2430 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2431 return;
2432
2433 mgslpc_flush_buffer(tty);
2434 shutdown(info, tty);
2435 tty_port_hangup(&info->port);
2436 }
2437
carrier_raised(struct tty_port * port)2438 static int carrier_raised(struct tty_port *port)
2439 {
2440 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2441 unsigned long flags;
2442
2443 spin_lock_irqsave(&info->lock, flags);
2444 get_signals(info);
2445 spin_unlock_irqrestore(&info->lock, flags);
2446
2447 if (info->serial_signals & SerialSignal_DCD)
2448 return 1;
2449 return 0;
2450 }
2451
dtr_rts(struct tty_port * port,int onoff)2452 static void dtr_rts(struct tty_port *port, int onoff)
2453 {
2454 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2455 unsigned long flags;
2456
2457 spin_lock_irqsave(&info->lock, flags);
2458 if (onoff)
2459 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2460 else
2461 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2462 set_signals(info);
2463 spin_unlock_irqrestore(&info->lock, flags);
2464 }
2465
2466
mgslpc_open(struct tty_struct * tty,struct file * filp)2467 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2468 {
2469 MGSLPC_INFO *info;
2470 struct tty_port *port;
2471 int retval, line;
2472 unsigned long flags;
2473
2474 /* verify range of specified line number */
2475 line = tty->index;
2476 if (line >= mgslpc_device_count) {
2477 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2478 __FILE__, __LINE__, line);
2479 return -ENODEV;
2480 }
2481
2482 /* find the info structure for the specified line */
2483 info = mgslpc_device_list;
2484 while(info && info->line != line)
2485 info = info->next_device;
2486 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2487 return -ENODEV;
2488
2489 port = &info->port;
2490 tty->driver_data = info;
2491 tty_port_tty_set(port, tty);
2492
2493 if (debug_level >= DEBUG_LEVEL_INFO)
2494 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2495 __FILE__, __LINE__, tty->driver->name, port->count);
2496
2497 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2498
2499 spin_lock_irqsave(&info->netlock, flags);
2500 if (info->netcount) {
2501 retval = -EBUSY;
2502 spin_unlock_irqrestore(&info->netlock, flags);
2503 goto cleanup;
2504 }
2505 spin_lock(&port->lock);
2506 port->count++;
2507 spin_unlock(&port->lock);
2508 spin_unlock_irqrestore(&info->netlock, flags);
2509
2510 if (port->count == 1) {
2511 /* 1st open on this device, init hardware */
2512 retval = startup(info, tty);
2513 if (retval < 0)
2514 goto cleanup;
2515 }
2516
2517 retval = tty_port_block_til_ready(&info->port, tty, filp);
2518 if (retval) {
2519 if (debug_level >= DEBUG_LEVEL_INFO)
2520 printk("%s(%d):block_til_ready(%s) returned %d\n",
2521 __FILE__, __LINE__, info->device_name, retval);
2522 goto cleanup;
2523 }
2524
2525 if (debug_level >= DEBUG_LEVEL_INFO)
2526 printk("%s(%d):mgslpc_open(%s) success\n",
2527 __FILE__, __LINE__, info->device_name);
2528 retval = 0;
2529
2530 cleanup:
2531 return retval;
2532 }
2533
2534 /*
2535 * /proc fs routines....
2536 */
2537
line_info(struct seq_file * m,MGSLPC_INFO * info)2538 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2539 {
2540 char stat_buf[30];
2541 unsigned long flags;
2542
2543 seq_printf(m, "%s:io:%04X irq:%d",
2544 info->device_name, info->io_base, info->irq_level);
2545
2546 /* output current serial signal states */
2547 spin_lock_irqsave(&info->lock, flags);
2548 get_signals(info);
2549 spin_unlock_irqrestore(&info->lock, flags);
2550
2551 stat_buf[0] = 0;
2552 stat_buf[1] = 0;
2553 if (info->serial_signals & SerialSignal_RTS)
2554 strcat(stat_buf, "|RTS");
2555 if (info->serial_signals & SerialSignal_CTS)
2556 strcat(stat_buf, "|CTS");
2557 if (info->serial_signals & SerialSignal_DTR)
2558 strcat(stat_buf, "|DTR");
2559 if (info->serial_signals & SerialSignal_DSR)
2560 strcat(stat_buf, "|DSR");
2561 if (info->serial_signals & SerialSignal_DCD)
2562 strcat(stat_buf, "|CD");
2563 if (info->serial_signals & SerialSignal_RI)
2564 strcat(stat_buf, "|RI");
2565
2566 if (info->params.mode == MGSL_MODE_HDLC) {
2567 seq_printf(m, " HDLC txok:%d rxok:%d",
2568 info->icount.txok, info->icount.rxok);
2569 if (info->icount.txunder)
2570 seq_printf(m, " txunder:%d", info->icount.txunder);
2571 if (info->icount.txabort)
2572 seq_printf(m, " txabort:%d", info->icount.txabort);
2573 if (info->icount.rxshort)
2574 seq_printf(m, " rxshort:%d", info->icount.rxshort);
2575 if (info->icount.rxlong)
2576 seq_printf(m, " rxlong:%d", info->icount.rxlong);
2577 if (info->icount.rxover)
2578 seq_printf(m, " rxover:%d", info->icount.rxover);
2579 if (info->icount.rxcrc)
2580 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2581 } else {
2582 seq_printf(m, " ASYNC tx:%d rx:%d",
2583 info->icount.tx, info->icount.rx);
2584 if (info->icount.frame)
2585 seq_printf(m, " fe:%d", info->icount.frame);
2586 if (info->icount.parity)
2587 seq_printf(m, " pe:%d", info->icount.parity);
2588 if (info->icount.brk)
2589 seq_printf(m, " brk:%d", info->icount.brk);
2590 if (info->icount.overrun)
2591 seq_printf(m, " oe:%d", info->icount.overrun);
2592 }
2593
2594 /* Append serial signal status to end */
2595 seq_printf(m, " %s\n", stat_buf+1);
2596
2597 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2598 info->tx_active,info->bh_requested,info->bh_running,
2599 info->pending_bh);
2600 }
2601
2602 /* Called to print information about devices
2603 */
mgslpc_proc_show(struct seq_file * m,void * v)2604 static int mgslpc_proc_show(struct seq_file *m, void *v)
2605 {
2606 MGSLPC_INFO *info;
2607
2608 seq_printf(m, "synclink driver:%s\n", driver_version);
2609
2610 info = mgslpc_device_list;
2611 while (info) {
2612 line_info(m, info);
2613 info = info->next_device;
2614 }
2615 return 0;
2616 }
2617
rx_alloc_buffers(MGSLPC_INFO * info)2618 static int rx_alloc_buffers(MGSLPC_INFO *info)
2619 {
2620 /* each buffer has header and data */
2621 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2622
2623 /* calculate total allocation size for 8 buffers */
2624 info->rx_buf_total_size = info->rx_buf_size * 8;
2625
2626 /* limit total allocated memory */
2627 if (info->rx_buf_total_size > 0x10000)
2628 info->rx_buf_total_size = 0x10000;
2629
2630 /* calculate number of buffers */
2631 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2632
2633 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2634 if (info->rx_buf == NULL)
2635 return -ENOMEM;
2636
2637 /* unused flag buffer to satisfy receive_buf calling interface */
2638 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2639 if (!info->flag_buf) {
2640 kfree(info->rx_buf);
2641 info->rx_buf = NULL;
2642 return -ENOMEM;
2643 }
2644
2645 rx_reset_buffers(info);
2646 return 0;
2647 }
2648
rx_free_buffers(MGSLPC_INFO * info)2649 static void rx_free_buffers(MGSLPC_INFO *info)
2650 {
2651 kfree(info->rx_buf);
2652 info->rx_buf = NULL;
2653 kfree(info->flag_buf);
2654 info->flag_buf = NULL;
2655 }
2656
claim_resources(MGSLPC_INFO * info)2657 static int claim_resources(MGSLPC_INFO *info)
2658 {
2659 if (rx_alloc_buffers(info) < 0) {
2660 printk("Can't allocate rx buffer %s\n", info->device_name);
2661 release_resources(info);
2662 return -ENODEV;
2663 }
2664 return 0;
2665 }
2666
release_resources(MGSLPC_INFO * info)2667 static void release_resources(MGSLPC_INFO *info)
2668 {
2669 if (debug_level >= DEBUG_LEVEL_INFO)
2670 printk("release_resources(%s)\n", info->device_name);
2671 rx_free_buffers(info);
2672 }
2673
2674 /* Add the specified device instance data structure to the
2675 * global linked list of devices and increment the device count.
2676 *
2677 * Arguments: info pointer to device instance data
2678 */
mgslpc_add_device(MGSLPC_INFO * info)2679 static int mgslpc_add_device(MGSLPC_INFO *info)
2680 {
2681 MGSLPC_INFO *current_dev = NULL;
2682 struct device *tty_dev;
2683 int ret;
2684
2685 info->next_device = NULL;
2686 info->line = mgslpc_device_count;
2687 sprintf(info->device_name,"ttySLP%d",info->line);
2688
2689 if (info->line < MAX_DEVICE_COUNT) {
2690 if (maxframe[info->line])
2691 info->max_frame_size = maxframe[info->line];
2692 }
2693
2694 mgslpc_device_count++;
2695
2696 if (!mgslpc_device_list)
2697 mgslpc_device_list = info;
2698 else {
2699 current_dev = mgslpc_device_list;
2700 while (current_dev->next_device)
2701 current_dev = current_dev->next_device;
2702 current_dev->next_device = info;
2703 }
2704
2705 if (info->max_frame_size < 4096)
2706 info->max_frame_size = 4096;
2707 else if (info->max_frame_size > 65535)
2708 info->max_frame_size = 65535;
2709
2710 printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2711 info->device_name, info->io_base, info->irq_level);
2712
2713 #if SYNCLINK_GENERIC_HDLC
2714 ret = hdlcdev_init(info);
2715 if (ret != 0)
2716 goto failed;
2717 #endif
2718
2719 tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2720 &info->p_dev->dev);
2721 if (IS_ERR(tty_dev)) {
2722 ret = PTR_ERR(tty_dev);
2723 #if SYNCLINK_GENERIC_HDLC
2724 hdlcdev_exit(info);
2725 #endif
2726 goto failed;
2727 }
2728
2729 return 0;
2730
2731 failed:
2732 if (current_dev)
2733 current_dev->next_device = NULL;
2734 else
2735 mgslpc_device_list = NULL;
2736 mgslpc_device_count--;
2737 return ret;
2738 }
2739
mgslpc_remove_device(MGSLPC_INFO * remove_info)2740 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2741 {
2742 MGSLPC_INFO *info = mgslpc_device_list;
2743 MGSLPC_INFO *last = NULL;
2744
2745 while(info) {
2746 if (info == remove_info) {
2747 if (last)
2748 last->next_device = info->next_device;
2749 else
2750 mgslpc_device_list = info->next_device;
2751 tty_unregister_device(serial_driver, info->line);
2752 #if SYNCLINK_GENERIC_HDLC
2753 hdlcdev_exit(info);
2754 #endif
2755 release_resources(info);
2756 tty_port_destroy(&info->port);
2757 kfree(info);
2758 mgslpc_device_count--;
2759 return;
2760 }
2761 last = info;
2762 info = info->next_device;
2763 }
2764 }
2765
2766 static const struct pcmcia_device_id mgslpc_ids[] = {
2767 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2768 PCMCIA_DEVICE_NULL
2769 };
2770 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2771
2772 static struct pcmcia_driver mgslpc_driver = {
2773 .owner = THIS_MODULE,
2774 .name = "synclink_cs",
2775 .probe = mgslpc_probe,
2776 .remove = mgslpc_detach,
2777 .id_table = mgslpc_ids,
2778 .suspend = mgslpc_suspend,
2779 .resume = mgslpc_resume,
2780 };
2781
2782 static const struct tty_operations mgslpc_ops = {
2783 .open = mgslpc_open,
2784 .close = mgslpc_close,
2785 .write = mgslpc_write,
2786 .put_char = mgslpc_put_char,
2787 .flush_chars = mgslpc_flush_chars,
2788 .write_room = mgslpc_write_room,
2789 .chars_in_buffer = mgslpc_chars_in_buffer,
2790 .flush_buffer = mgslpc_flush_buffer,
2791 .ioctl = mgslpc_ioctl,
2792 .throttle = mgslpc_throttle,
2793 .unthrottle = mgslpc_unthrottle,
2794 .send_xchar = mgslpc_send_xchar,
2795 .break_ctl = mgslpc_break,
2796 .wait_until_sent = mgslpc_wait_until_sent,
2797 .set_termios = mgslpc_set_termios,
2798 .stop = tx_pause,
2799 .start = tx_release,
2800 .hangup = mgslpc_hangup,
2801 .tiocmget = tiocmget,
2802 .tiocmset = tiocmset,
2803 .get_icount = mgslpc_get_icount,
2804 .proc_show = mgslpc_proc_show,
2805 };
2806
synclink_cs_init(void)2807 static int __init synclink_cs_init(void)
2808 {
2809 int rc;
2810
2811 if (break_on_load) {
2812 mgslpc_get_text_ptr();
2813 BREAKPOINT();
2814 }
2815
2816 serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2817 TTY_DRIVER_REAL_RAW |
2818 TTY_DRIVER_DYNAMIC_DEV);
2819 if (IS_ERR(serial_driver)) {
2820 rc = PTR_ERR(serial_driver);
2821 goto err;
2822 }
2823
2824 /* Initialize the tty_driver structure */
2825 serial_driver->driver_name = "synclink_cs";
2826 serial_driver->name = "ttySLP";
2827 serial_driver->major = ttymajor;
2828 serial_driver->minor_start = 64;
2829 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2830 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2831 serial_driver->init_termios = tty_std_termios;
2832 serial_driver->init_termios.c_cflag =
2833 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2834 tty_set_operations(serial_driver, &mgslpc_ops);
2835
2836 rc = tty_register_driver(serial_driver);
2837 if (rc < 0) {
2838 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2839 __FILE__, __LINE__);
2840 goto err_put_tty;
2841 }
2842
2843 rc = pcmcia_register_driver(&mgslpc_driver);
2844 if (rc < 0)
2845 goto err_unreg_tty;
2846
2847 printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2848 serial_driver->major);
2849
2850 return 0;
2851 err_unreg_tty:
2852 tty_unregister_driver(serial_driver);
2853 err_put_tty:
2854 put_tty_driver(serial_driver);
2855 err:
2856 return rc;
2857 }
2858
synclink_cs_exit(void)2859 static void __exit synclink_cs_exit(void)
2860 {
2861 pcmcia_unregister_driver(&mgslpc_driver);
2862 tty_unregister_driver(serial_driver);
2863 put_tty_driver(serial_driver);
2864 }
2865
2866 module_init(synclink_cs_init);
2867 module_exit(synclink_cs_exit);
2868
mgslpc_set_rate(MGSLPC_INFO * info,unsigned char channel,unsigned int rate)2869 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2870 {
2871 unsigned int M, N;
2872 unsigned char val;
2873
2874 /* note:standard BRG mode is broken in V3.2 chip
2875 * so enhanced mode is always used
2876 */
2877
2878 if (rate) {
2879 N = 3686400 / rate;
2880 if (!N)
2881 N = 1;
2882 N >>= 1;
2883 for (M = 1; N > 64 && M < 16; M++)
2884 N >>= 1;
2885 N--;
2886
2887 /* BGR[5..0] = N
2888 * BGR[9..6] = M
2889 * BGR[7..0] contained in BGR register
2890 * BGR[9..8] contained in CCR2[7..6]
2891 * divisor = (N+1)*2^M
2892 *
2893 * Note: M *must* not be zero (causes asymetric duty cycle)
2894 */
2895 write_reg(info, (unsigned char) (channel + BGR),
2896 (unsigned char) ((M << 6) + N));
2897 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2898 val |= ((M << 4) & 0xc0);
2899 write_reg(info, (unsigned char) (channel + CCR2), val);
2900 }
2901 }
2902
2903 /* Enabled the AUX clock output at the specified frequency.
2904 */
enable_auxclk(MGSLPC_INFO * info)2905 static void enable_auxclk(MGSLPC_INFO *info)
2906 {
2907 unsigned char val;
2908
2909 /* MODE
2910 *
2911 * 07..06 MDS[1..0] 10 = transparent HDLC mode
2912 * 05 ADM Address Mode, 0 = no addr recognition
2913 * 04 TMD Timer Mode, 0 = external
2914 * 03 RAC Receiver Active, 0 = inactive
2915 * 02 RTS 0=RTS active during xmit, 1=RTS always active
2916 * 01 TRS Timer Resolution, 1=512
2917 * 00 TLP Test Loop, 0 = no loop
2918 *
2919 * 1000 0010
2920 */
2921 val = 0x82;
2922
2923 /* channel B RTS is used to enable AUXCLK driver on SP505 */
2924 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2925 val |= BIT2;
2926 write_reg(info, CHB + MODE, val);
2927
2928 /* CCR0
2929 *
2930 * 07 PU Power Up, 1=active, 0=power down
2931 * 06 MCE Master Clock Enable, 1=enabled
2932 * 05 Reserved, 0
2933 * 04..02 SC[2..0] Encoding
2934 * 01..00 SM[1..0] Serial Mode, 00=HDLC
2935 *
2936 * 11000000
2937 */
2938 write_reg(info, CHB + CCR0, 0xc0);
2939
2940 /* CCR1
2941 *
2942 * 07 SFLG Shared Flag, 0 = disable shared flags
2943 * 06 GALP Go Active On Loop, 0 = not used
2944 * 05 GLP Go On Loop, 0 = not used
2945 * 04 ODS Output Driver Select, 1=TxD is push-pull output
2946 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
2947 * 02..00 CM[2..0] Clock Mode
2948 *
2949 * 0001 0111
2950 */
2951 write_reg(info, CHB + CCR1, 0x17);
2952
2953 /* CCR2 (Channel B)
2954 *
2955 * 07..06 BGR[9..8] Baud rate bits 9..8
2956 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
2957 * 04 SSEL Clock source select, 1=submode b
2958 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
2959 * 02 RWX Read/Write Exchange 0=disabled
2960 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
2961 * 00 DIV, data inversion 0=disabled, 1=enabled
2962 *
2963 * 0011 1000
2964 */
2965 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2966 write_reg(info, CHB + CCR2, 0x38);
2967 else
2968 write_reg(info, CHB + CCR2, 0x30);
2969
2970 /* CCR4
2971 *
2972 * 07 MCK4 Master Clock Divide by 4, 1=enabled
2973 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2974 * 05 TST1 Test Pin, 0=normal operation
2975 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
2976 * 03..02 Reserved, must be 0
2977 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
2978 *
2979 * 0101 0000
2980 */
2981 write_reg(info, CHB + CCR4, 0x50);
2982
2983 /* if auxclk not enabled, set internal BRG so
2984 * CTS transitions can be detected (requires TxC)
2985 */
2986 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2987 mgslpc_set_rate(info, CHB, info->params.clock_speed);
2988 else
2989 mgslpc_set_rate(info, CHB, 921600);
2990 }
2991
loopback_enable(MGSLPC_INFO * info)2992 static void loopback_enable(MGSLPC_INFO *info)
2993 {
2994 unsigned char val;
2995
2996 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
2997 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0);
2998 write_reg(info, CHA + CCR1, val);
2999
3000 /* CCR2:04 SSEL Clock source select, 1=submode b */
3001 val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
3002 write_reg(info, CHA + CCR2, val);
3003
3004 /* set LinkSpeed if available, otherwise default to 2Mbps */
3005 if (info->params.clock_speed)
3006 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3007 else
3008 mgslpc_set_rate(info, CHA, 1843200);
3009
3010 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3011 val = read_reg(info, CHA + MODE) | BIT0;
3012 write_reg(info, CHA + MODE, val);
3013 }
3014
hdlc_mode(MGSLPC_INFO * info)3015 static void hdlc_mode(MGSLPC_INFO *info)
3016 {
3017 unsigned char val;
3018 unsigned char clkmode, clksubmode;
3019
3020 /* disable all interrupts */
3021 irq_disable(info, CHA, 0xffff);
3022 irq_disable(info, CHB, 0xffff);
3023 port_irq_disable(info, 0xff);
3024
3025 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3026 clkmode = clksubmode = 0;
3027 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3028 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3029 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3030 clkmode = 7;
3031 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3032 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3033 /* clock mode 7b, rcv = BRG, xmt = BRG */
3034 clkmode = 7;
3035 clksubmode = 1;
3036 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3037 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3038 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3039 clkmode = 6;
3040 clksubmode = 1;
3041 } else {
3042 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3043 clkmode = 6;
3044 }
3045 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3046 /* clock mode 0b, rcv = RxC, xmt = BRG */
3047 clksubmode = 1;
3048 }
3049
3050 /* MODE
3051 *
3052 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3053 * 05 ADM Address Mode, 0 = no addr recognition
3054 * 04 TMD Timer Mode, 0 = external
3055 * 03 RAC Receiver Active, 0 = inactive
3056 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3057 * 01 TRS Timer Resolution, 1=512
3058 * 00 TLP Test Loop, 0 = no loop
3059 *
3060 * 1000 0010
3061 */
3062 val = 0x82;
3063 if (info->params.loopback)
3064 val |= BIT0;
3065
3066 /* preserve RTS state */
3067 if (info->serial_signals & SerialSignal_RTS)
3068 val |= BIT2;
3069 write_reg(info, CHA + MODE, val);
3070
3071 /* CCR0
3072 *
3073 * 07 PU Power Up, 1=active, 0=power down
3074 * 06 MCE Master Clock Enable, 1=enabled
3075 * 05 Reserved, 0
3076 * 04..02 SC[2..0] Encoding
3077 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3078 *
3079 * 11000000
3080 */
3081 val = 0xc0;
3082 switch (info->params.encoding)
3083 {
3084 case HDLC_ENCODING_NRZI:
3085 val |= BIT3;
3086 break;
3087 case HDLC_ENCODING_BIPHASE_SPACE:
3088 val |= BIT4;
3089 break; // FM0
3090 case HDLC_ENCODING_BIPHASE_MARK:
3091 val |= BIT4 | BIT2;
3092 break; // FM1
3093 case HDLC_ENCODING_BIPHASE_LEVEL:
3094 val |= BIT4 | BIT3;
3095 break; // Manchester
3096 }
3097 write_reg(info, CHA + CCR0, val);
3098
3099 /* CCR1
3100 *
3101 * 07 SFLG Shared Flag, 0 = disable shared flags
3102 * 06 GALP Go Active On Loop, 0 = not used
3103 * 05 GLP Go On Loop, 0 = not used
3104 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3105 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3106 * 02..00 CM[2..0] Clock Mode
3107 *
3108 * 0001 0000
3109 */
3110 val = 0x10 + clkmode;
3111 write_reg(info, CHA + CCR1, val);
3112
3113 /* CCR2
3114 *
3115 * 07..06 BGR[9..8] Baud rate bits 9..8
3116 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3117 * 04 SSEL Clock source select, 1=submode b
3118 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3119 * 02 RWX Read/Write Exchange 0=disabled
3120 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3121 * 00 DIV, data inversion 0=disabled, 1=enabled
3122 *
3123 * 0000 0000
3124 */
3125 val = 0x00;
3126 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3127 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3128 val |= BIT5;
3129 if (clksubmode)
3130 val |= BIT4;
3131 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3132 val |= BIT1;
3133 if (info->params.encoding == HDLC_ENCODING_NRZB)
3134 val |= BIT0;
3135 write_reg(info, CHA + CCR2, val);
3136
3137 /* CCR3
3138 *
3139 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3140 * 05 EPT Enable preamble transmission, 1=enabled
3141 * 04 RADD Receive address pushed to FIFO, 0=disabled
3142 * 03 CRL CRC Reset Level, 0=FFFF
3143 * 02 RCRC Rx CRC 0=On 1=Off
3144 * 01 TCRC Tx CRC 0=On 1=Off
3145 * 00 PSD DPLL Phase Shift Disable
3146 *
3147 * 0000 0000
3148 */
3149 val = 0x00;
3150 if (info->params.crc_type == HDLC_CRC_NONE)
3151 val |= BIT2 | BIT1;
3152 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3153 val |= BIT5;
3154 switch (info->params.preamble_length)
3155 {
3156 case HDLC_PREAMBLE_LENGTH_16BITS:
3157 val |= BIT6;
3158 break;
3159 case HDLC_PREAMBLE_LENGTH_32BITS:
3160 val |= BIT6;
3161 break;
3162 case HDLC_PREAMBLE_LENGTH_64BITS:
3163 val |= BIT7 | BIT6;
3164 break;
3165 }
3166 write_reg(info, CHA + CCR3, val);
3167
3168 /* PRE - Preamble pattern */
3169 val = 0;
3170 switch (info->params.preamble)
3171 {
3172 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3173 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3174 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3175 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3176 }
3177 write_reg(info, CHA + PRE, val);
3178
3179 /* CCR4
3180 *
3181 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3182 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3183 * 05 TST1 Test Pin, 0=normal operation
3184 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3185 * 03..02 Reserved, must be 0
3186 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3187 *
3188 * 0101 0000
3189 */
3190 val = 0x50;
3191 write_reg(info, CHA + CCR4, val);
3192 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3193 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3194 else
3195 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3196
3197 /* RLCR Receive length check register
3198 *
3199 * 7 1=enable receive length check
3200 * 6..0 Max frame length = (RL + 1) * 32
3201 */
3202 write_reg(info, CHA + RLCR, 0);
3203
3204 /* XBCH Transmit Byte Count High
3205 *
3206 * 07 DMA mode, 0 = interrupt driven
3207 * 06 NRM, 0=ABM (ignored)
3208 * 05 CAS Carrier Auto Start
3209 * 04 XC Transmit Continuously (ignored)
3210 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3211 *
3212 * 0000 0000
3213 */
3214 val = 0x00;
3215 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3216 val |= BIT5;
3217 write_reg(info, CHA + XBCH, val);
3218 enable_auxclk(info);
3219 if (info->params.loopback || info->testing_irq)
3220 loopback_enable(info);
3221 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3222 {
3223 irq_enable(info, CHB, IRQ_CTS);
3224 /* PVR[3] 1=AUTO CTS active */
3225 set_reg_bits(info, CHA + PVR, BIT3);
3226 } else
3227 clear_reg_bits(info, CHA + PVR, BIT3);
3228
3229 irq_enable(info, CHA,
3230 IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT |
3231 IRQ_UNDERRUN | IRQ_TXFIFO);
3232 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3233 wait_command_complete(info, CHA);
3234 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3235
3236 /* Master clock mode enabled above to allow reset commands
3237 * to complete even if no data clocks are present.
3238 *
3239 * Disable master clock mode for normal communications because
3240 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3241 * IRQ when in master clock mode.
3242 *
3243 * Leave master clock mode enabled for IRQ test because the
3244 * timer IRQ used by the test can only happen in master clock mode.
3245 */
3246 if (!info->testing_irq)
3247 clear_reg_bits(info, CHA + CCR0, BIT6);
3248
3249 tx_set_idle(info);
3250
3251 tx_stop(info);
3252 rx_stop(info);
3253 }
3254
rx_stop(MGSLPC_INFO * info)3255 static void rx_stop(MGSLPC_INFO *info)
3256 {
3257 if (debug_level >= DEBUG_LEVEL_ISR)
3258 printk("%s(%d):rx_stop(%s)\n",
3259 __FILE__, __LINE__, info->device_name);
3260
3261 /* MODE:03 RAC Receiver Active, 0=inactive */
3262 clear_reg_bits(info, CHA + MODE, BIT3);
3263
3264 info->rx_enabled = false;
3265 info->rx_overflow = false;
3266 }
3267
rx_start(MGSLPC_INFO * info)3268 static void rx_start(MGSLPC_INFO *info)
3269 {
3270 if (debug_level >= DEBUG_LEVEL_ISR)
3271 printk("%s(%d):rx_start(%s)\n",
3272 __FILE__, __LINE__, info->device_name);
3273
3274 rx_reset_buffers(info);
3275 info->rx_enabled = false;
3276 info->rx_overflow = false;
3277
3278 /* MODE:03 RAC Receiver Active, 1=active */
3279 set_reg_bits(info, CHA + MODE, BIT3);
3280
3281 info->rx_enabled = true;
3282 }
3283
tx_start(MGSLPC_INFO * info,struct tty_struct * tty)3284 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3285 {
3286 if (debug_level >= DEBUG_LEVEL_ISR)
3287 printk("%s(%d):tx_start(%s)\n",
3288 __FILE__, __LINE__, info->device_name);
3289
3290 if (info->tx_count) {
3291 /* If auto RTS enabled and RTS is inactive, then assert */
3292 /* RTS and set a flag indicating that the driver should */
3293 /* negate RTS when the transmission completes. */
3294 info->drop_rts_on_tx_done = false;
3295
3296 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3297 get_signals(info);
3298 if (!(info->serial_signals & SerialSignal_RTS)) {
3299 info->serial_signals |= SerialSignal_RTS;
3300 set_signals(info);
3301 info->drop_rts_on_tx_done = true;
3302 }
3303 }
3304
3305 if (info->params.mode == MGSL_MODE_ASYNC) {
3306 if (!info->tx_active) {
3307 info->tx_active = true;
3308 tx_ready(info, tty);
3309 }
3310 } else {
3311 info->tx_active = true;
3312 tx_ready(info, tty);
3313 mod_timer(&info->tx_timer, jiffies +
3314 msecs_to_jiffies(5000));
3315 }
3316 }
3317
3318 if (!info->tx_enabled)
3319 info->tx_enabled = true;
3320 }
3321
tx_stop(MGSLPC_INFO * info)3322 static void tx_stop(MGSLPC_INFO *info)
3323 {
3324 if (debug_level >= DEBUG_LEVEL_ISR)
3325 printk("%s(%d):tx_stop(%s)\n",
3326 __FILE__, __LINE__, info->device_name);
3327
3328 del_timer(&info->tx_timer);
3329
3330 info->tx_enabled = false;
3331 info->tx_active = false;
3332 }
3333
3334 /* Reset the adapter to a known state and prepare it for further use.
3335 */
reset_device(MGSLPC_INFO * info)3336 static void reset_device(MGSLPC_INFO *info)
3337 {
3338 /* power up both channels (set BIT7) */
3339 write_reg(info, CHA + CCR0, 0x80);
3340 write_reg(info, CHB + CCR0, 0x80);
3341 write_reg(info, CHA + MODE, 0);
3342 write_reg(info, CHB + MODE, 0);
3343
3344 /* disable all interrupts */
3345 irq_disable(info, CHA, 0xffff);
3346 irq_disable(info, CHB, 0xffff);
3347 port_irq_disable(info, 0xff);
3348
3349 /* PCR Port Configuration Register
3350 *
3351 * 07..04 DEC[3..0] Serial I/F select outputs
3352 * 03 output, 1=AUTO CTS control enabled
3353 * 02 RI Ring Indicator input 0=active
3354 * 01 DSR input 0=active
3355 * 00 DTR output 0=active
3356 *
3357 * 0000 0110
3358 */
3359 write_reg(info, PCR, 0x06);
3360
3361 /* PVR Port Value Register
3362 *
3363 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3364 * 03 AUTO CTS output 1=enabled
3365 * 02 RI Ring Indicator input
3366 * 01 DSR input
3367 * 00 DTR output (1=inactive)
3368 *
3369 * 0000 0001
3370 */
3371 // write_reg(info, PVR, PVR_DTR);
3372
3373 /* IPC Interrupt Port Configuration
3374 *
3375 * 07 VIS 1=Masked interrupts visible
3376 * 06..05 Reserved, 0
3377 * 04..03 SLA Slave address, 00 ignored
3378 * 02 CASM Cascading Mode, 1=daisy chain
3379 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3380 *
3381 * 0000 0101
3382 */
3383 write_reg(info, IPC, 0x05);
3384 }
3385
async_mode(MGSLPC_INFO * info)3386 static void async_mode(MGSLPC_INFO *info)
3387 {
3388 unsigned char val;
3389
3390 /* disable all interrupts */
3391 irq_disable(info, CHA, 0xffff);
3392 irq_disable(info, CHB, 0xffff);
3393 port_irq_disable(info, 0xff);
3394
3395 /* MODE
3396 *
3397 * 07 Reserved, 0
3398 * 06 FRTS RTS State, 0=active
3399 * 05 FCTS Flow Control on CTS
3400 * 04 FLON Flow Control Enable
3401 * 03 RAC Receiver Active, 0 = inactive
3402 * 02 RTS 0=Auto RTS, 1=manual RTS
3403 * 01 TRS Timer Resolution, 1=512
3404 * 00 TLP Test Loop, 0 = no loop
3405 *
3406 * 0000 0110
3407 */
3408 val = 0x06;
3409 if (info->params.loopback)
3410 val |= BIT0;
3411
3412 /* preserve RTS state */
3413 if (!(info->serial_signals & SerialSignal_RTS))
3414 val |= BIT6;
3415 write_reg(info, CHA + MODE, val);
3416
3417 /* CCR0
3418 *
3419 * 07 PU Power Up, 1=active, 0=power down
3420 * 06 MCE Master Clock Enable, 1=enabled
3421 * 05 Reserved, 0
3422 * 04..02 SC[2..0] Encoding, 000=NRZ
3423 * 01..00 SM[1..0] Serial Mode, 11=Async
3424 *
3425 * 1000 0011
3426 */
3427 write_reg(info, CHA + CCR0, 0x83);
3428
3429 /* CCR1
3430 *
3431 * 07..05 Reserved, 0
3432 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3433 * 03 BCR Bit Clock Rate, 1=16x
3434 * 02..00 CM[2..0] Clock Mode, 111=BRG
3435 *
3436 * 0001 1111
3437 */
3438 write_reg(info, CHA + CCR1, 0x1f);
3439
3440 /* CCR2 (channel A)
3441 *
3442 * 07..06 BGR[9..8] Baud rate bits 9..8
3443 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3444 * 04 SSEL Clock source select, 1=submode b
3445 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3446 * 02 RWX Read/Write Exchange 0=disabled
3447 * 01 Reserved, 0
3448 * 00 DIV, data inversion 0=disabled, 1=enabled
3449 *
3450 * 0001 0000
3451 */
3452 write_reg(info, CHA + CCR2, 0x10);
3453
3454 /* CCR3
3455 *
3456 * 07..01 Reserved, 0
3457 * 00 PSD DPLL Phase Shift Disable
3458 *
3459 * 0000 0000
3460 */
3461 write_reg(info, CHA + CCR3, 0);
3462
3463 /* CCR4
3464 *
3465 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3466 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3467 * 05 TST1 Test Pin, 0=normal operation
3468 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3469 * 03..00 Reserved, must be 0
3470 *
3471 * 0101 0000
3472 */
3473 write_reg(info, CHA + CCR4, 0x50);
3474 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3475
3476 /* DAFO Data Format
3477 *
3478 * 07 Reserved, 0
3479 * 06 XBRK transmit break, 0=normal operation
3480 * 05 Stop bits (0=1, 1=2)
3481 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3482 * 02 PAREN Parity Enable
3483 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3484 *
3485 */
3486 val = 0x00;
3487 if (info->params.data_bits != 8)
3488 val |= BIT0; /* 7 bits */
3489 if (info->params.stop_bits != 1)
3490 val |= BIT5;
3491 if (info->params.parity != ASYNC_PARITY_NONE)
3492 {
3493 val |= BIT2; /* Parity enable */
3494 if (info->params.parity == ASYNC_PARITY_ODD)
3495 val |= BIT3;
3496 else
3497 val |= BIT4;
3498 }
3499 write_reg(info, CHA + DAFO, val);
3500
3501 /* RFC Rx FIFO Control
3502 *
3503 * 07 Reserved, 0
3504 * 06 DPS, 1=parity bit not stored in data byte
3505 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3506 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3507 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3508 * 01 Reserved, 0
3509 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3510 *
3511 * 0101 1100
3512 */
3513 write_reg(info, CHA + RFC, 0x5c);
3514
3515 /* RLCR Receive length check register
3516 *
3517 * Max frame length = (RL + 1) * 32
3518 */
3519 write_reg(info, CHA + RLCR, 0);
3520
3521 /* XBCH Transmit Byte Count High
3522 *
3523 * 07 DMA mode, 0 = interrupt driven
3524 * 06 NRM, 0=ABM (ignored)
3525 * 05 CAS Carrier Auto Start
3526 * 04 XC Transmit Continuously (ignored)
3527 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3528 *
3529 * 0000 0000
3530 */
3531 val = 0x00;
3532 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3533 val |= BIT5;
3534 write_reg(info, CHA + XBCH, val);
3535 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3536 irq_enable(info, CHA, IRQ_CTS);
3537
3538 /* MODE:03 RAC Receiver Active, 1=active */
3539 set_reg_bits(info, CHA + MODE, BIT3);
3540 enable_auxclk(info);
3541 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3542 irq_enable(info, CHB, IRQ_CTS);
3543 /* PVR[3] 1=AUTO CTS active */
3544 set_reg_bits(info, CHA + PVR, BIT3);
3545 } else
3546 clear_reg_bits(info, CHA + PVR, BIT3);
3547 irq_enable(info, CHA,
3548 IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME |
3549 IRQ_ALLSENT | IRQ_TXFIFO);
3550 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3551 wait_command_complete(info, CHA);
3552 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3553 }
3554
3555 /* Set the HDLC idle mode for the transmitter.
3556 */
tx_set_idle(MGSLPC_INFO * info)3557 static void tx_set_idle(MGSLPC_INFO *info)
3558 {
3559 /* Note: ESCC2 only supports flags and one idle modes */
3560 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3561 set_reg_bits(info, CHA + CCR1, BIT3);
3562 else
3563 clear_reg_bits(info, CHA + CCR1, BIT3);
3564 }
3565
3566 /* get state of the V24 status (input) signals.
3567 */
get_signals(MGSLPC_INFO * info)3568 static void get_signals(MGSLPC_INFO *info)
3569 {
3570 unsigned char status = 0;
3571
3572 /* preserve RTS and DTR */
3573 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3574
3575 if (read_reg(info, CHB + VSTR) & BIT7)
3576 info->serial_signals |= SerialSignal_DCD;
3577 if (read_reg(info, CHB + STAR) & BIT1)
3578 info->serial_signals |= SerialSignal_CTS;
3579
3580 status = read_reg(info, CHA + PVR);
3581 if (!(status & PVR_RI))
3582 info->serial_signals |= SerialSignal_RI;
3583 if (!(status & PVR_DSR))
3584 info->serial_signals |= SerialSignal_DSR;
3585 }
3586
3587 /* Set the state of RTS and DTR based on contents of
3588 * serial_signals member of device extension.
3589 */
set_signals(MGSLPC_INFO * info)3590 static void set_signals(MGSLPC_INFO *info)
3591 {
3592 unsigned char val;
3593
3594 val = read_reg(info, CHA + MODE);
3595 if (info->params.mode == MGSL_MODE_ASYNC) {
3596 if (info->serial_signals & SerialSignal_RTS)
3597 val &= ~BIT6;
3598 else
3599 val |= BIT6;
3600 } else {
3601 if (info->serial_signals & SerialSignal_RTS)
3602 val |= BIT2;
3603 else
3604 val &= ~BIT2;
3605 }
3606 write_reg(info, CHA + MODE, val);
3607
3608 if (info->serial_signals & SerialSignal_DTR)
3609 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3610 else
3611 set_reg_bits(info, CHA + PVR, PVR_DTR);
3612 }
3613
rx_reset_buffers(MGSLPC_INFO * info)3614 static void rx_reset_buffers(MGSLPC_INFO *info)
3615 {
3616 RXBUF *buf;
3617 int i;
3618
3619 info->rx_put = 0;
3620 info->rx_get = 0;
3621 info->rx_frame_count = 0;
3622 for (i=0 ; i < info->rx_buf_count ; i++) {
3623 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3624 buf->status = buf->count = 0;
3625 }
3626 }
3627
3628 /* Attempt to return a received HDLC frame
3629 * Only frames received without errors are returned.
3630 *
3631 * Returns true if frame returned, otherwise false
3632 */
rx_get_frame(MGSLPC_INFO * info,struct tty_struct * tty)3633 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3634 {
3635 unsigned short status;
3636 RXBUF *buf;
3637 unsigned int framesize = 0;
3638 unsigned long flags;
3639 bool return_frame = false;
3640
3641 if (info->rx_frame_count == 0)
3642 return false;
3643
3644 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3645
3646 status = buf->status;
3647
3648 /* 07 VFR 1=valid frame
3649 * 06 RDO 1=data overrun
3650 * 05 CRC 1=OK, 0=error
3651 * 04 RAB 1=frame aborted
3652 */
3653 if ((status & 0xf0) != 0xA0) {
3654 if (!(status & BIT7) || (status & BIT4))
3655 info->icount.rxabort++;
3656 else if (status & BIT6)
3657 info->icount.rxover++;
3658 else if (!(status & BIT5)) {
3659 info->icount.rxcrc++;
3660 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3661 return_frame = true;
3662 }
3663 framesize = 0;
3664 #if SYNCLINK_GENERIC_HDLC
3665 {
3666 info->netdev->stats.rx_errors++;
3667 info->netdev->stats.rx_frame_errors++;
3668 }
3669 #endif
3670 } else
3671 return_frame = true;
3672
3673 if (return_frame)
3674 framesize = buf->count;
3675
3676 if (debug_level >= DEBUG_LEVEL_BH)
3677 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3678 __FILE__, __LINE__, info->device_name, status, framesize);
3679
3680 if (debug_level >= DEBUG_LEVEL_DATA)
3681 trace_block(info, buf->data, framesize, 0);
3682
3683 if (framesize) {
3684 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3685 framesize+1 > info->max_frame_size) ||
3686 framesize > info->max_frame_size)
3687 info->icount.rxlong++;
3688 else {
3689 if (status & BIT5)
3690 info->icount.rxok++;
3691
3692 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3693 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3694 ++framesize;
3695 }
3696
3697 #if SYNCLINK_GENERIC_HDLC
3698 if (info->netcount)
3699 hdlcdev_rx(info, buf->data, framesize);
3700 else
3701 #endif
3702 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3703 }
3704 }
3705
3706 spin_lock_irqsave(&info->lock, flags);
3707 buf->status = buf->count = 0;
3708 info->rx_frame_count--;
3709 info->rx_get++;
3710 if (info->rx_get >= info->rx_buf_count)
3711 info->rx_get = 0;
3712 spin_unlock_irqrestore(&info->lock, flags);
3713
3714 return true;
3715 }
3716
register_test(MGSLPC_INFO * info)3717 static bool register_test(MGSLPC_INFO *info)
3718 {
3719 static unsigned char patterns[] =
3720 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3721 static unsigned int count = ARRAY_SIZE(patterns);
3722 unsigned int i;
3723 bool rc = true;
3724 unsigned long flags;
3725
3726 spin_lock_irqsave(&info->lock, flags);
3727 reset_device(info);
3728
3729 for (i = 0; i < count; i++) {
3730 write_reg(info, XAD1, patterns[i]);
3731 write_reg(info, XAD2, patterns[(i + 1) % count]);
3732 if ((read_reg(info, XAD1) != patterns[i]) ||
3733 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3734 rc = false;
3735 break;
3736 }
3737 }
3738
3739 spin_unlock_irqrestore(&info->lock, flags);
3740 return rc;
3741 }
3742
irq_test(MGSLPC_INFO * info)3743 static bool irq_test(MGSLPC_INFO *info)
3744 {
3745 unsigned long end_time;
3746 unsigned long flags;
3747
3748 spin_lock_irqsave(&info->lock, flags);
3749 reset_device(info);
3750
3751 info->testing_irq = true;
3752 hdlc_mode(info);
3753
3754 info->irq_occurred = false;
3755
3756 /* init hdlc mode */
3757
3758 irq_enable(info, CHA, IRQ_TIMER);
3759 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3760 issue_command(info, CHA, CMD_START_TIMER);
3761
3762 spin_unlock_irqrestore(&info->lock, flags);
3763
3764 end_time=100;
3765 while(end_time-- && !info->irq_occurred) {
3766 msleep_interruptible(10);
3767 }
3768
3769 info->testing_irq = false;
3770
3771 spin_lock_irqsave(&info->lock, flags);
3772 reset_device(info);
3773 spin_unlock_irqrestore(&info->lock, flags);
3774
3775 return info->irq_occurred;
3776 }
3777
adapter_test(MGSLPC_INFO * info)3778 static int adapter_test(MGSLPC_INFO *info)
3779 {
3780 if (!register_test(info)) {
3781 info->init_error = DiagStatus_AddressFailure;
3782 printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3783 __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3784 return -ENODEV;
3785 }
3786
3787 if (!irq_test(info)) {
3788 info->init_error = DiagStatus_IrqFailure;
3789 printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3790 __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3791 return -ENODEV;
3792 }
3793
3794 if (debug_level >= DEBUG_LEVEL_INFO)
3795 printk("%s(%d):device %s passed diagnostics\n",
3796 __FILE__, __LINE__, info->device_name);
3797 return 0;
3798 }
3799
trace_block(MGSLPC_INFO * info,const char * data,int count,int xmit)3800 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3801 {
3802 int i;
3803 int linecount;
3804 if (xmit)
3805 printk("%s tx data:\n", info->device_name);
3806 else
3807 printk("%s rx data:\n", info->device_name);
3808
3809 while(count) {
3810 if (count > 16)
3811 linecount = 16;
3812 else
3813 linecount = count;
3814
3815 for(i=0;i<linecount;i++)
3816 printk("%02X ", (unsigned char)data[i]);
3817 for(;i<17;i++)
3818 printk(" ");
3819 for(i=0;i<linecount;i++) {
3820 if (data[i]>=040 && data[i]<=0176)
3821 printk("%c", data[i]);
3822 else
3823 printk(".");
3824 }
3825 printk("\n");
3826
3827 data += linecount;
3828 count -= linecount;
3829 }
3830 }
3831
3832 /* HDLC frame time out
3833 * update stats and do tx completion processing
3834 */
tx_timeout(struct timer_list * t)3835 static void tx_timeout(struct timer_list *t)
3836 {
3837 MGSLPC_INFO *info = from_timer(info, t, tx_timer);
3838 unsigned long flags;
3839
3840 if (debug_level >= DEBUG_LEVEL_INFO)
3841 printk("%s(%d):tx_timeout(%s)\n",
3842 __FILE__, __LINE__, info->device_name);
3843 if (info->tx_active &&
3844 info->params.mode == MGSL_MODE_HDLC) {
3845 info->icount.txtimeout++;
3846 }
3847 spin_lock_irqsave(&info->lock, flags);
3848 info->tx_active = false;
3849 info->tx_count = info->tx_put = info->tx_get = 0;
3850
3851 spin_unlock_irqrestore(&info->lock, flags);
3852
3853 #if SYNCLINK_GENERIC_HDLC
3854 if (info->netcount)
3855 hdlcdev_tx_done(info);
3856 else
3857 #endif
3858 {
3859 struct tty_struct *tty = tty_port_tty_get(&info->port);
3860 bh_transmit(info, tty);
3861 tty_kref_put(tty);
3862 }
3863 }
3864
3865 #if SYNCLINK_GENERIC_HDLC
3866
3867 /**
3868 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3869 * set encoding and frame check sequence (FCS) options
3870 *
3871 * dev pointer to network device structure
3872 * encoding serial encoding setting
3873 * parity FCS setting
3874 *
3875 * returns 0 if success, otherwise error code
3876 */
hdlcdev_attach(struct net_device * dev,unsigned short encoding,unsigned short parity)3877 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3878 unsigned short parity)
3879 {
3880 MGSLPC_INFO *info = dev_to_port(dev);
3881 struct tty_struct *tty;
3882 unsigned char new_encoding;
3883 unsigned short new_crctype;
3884
3885 /* return error if TTY interface open */
3886 if (info->port.count)
3887 return -EBUSY;
3888
3889 switch (encoding)
3890 {
3891 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
3892 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3893 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3894 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3895 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3896 default: return -EINVAL;
3897 }
3898
3899 switch (parity)
3900 {
3901 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
3902 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3903 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3904 default: return -EINVAL;
3905 }
3906
3907 info->params.encoding = new_encoding;
3908 info->params.crc_type = new_crctype;
3909
3910 /* if network interface up, reprogram hardware */
3911 if (info->netcount) {
3912 tty = tty_port_tty_get(&info->port);
3913 mgslpc_program_hw(info, tty);
3914 tty_kref_put(tty);
3915 }
3916
3917 return 0;
3918 }
3919
3920 /**
3921 * called by generic HDLC layer to send frame
3922 *
3923 * skb socket buffer containing HDLC frame
3924 * dev pointer to network device structure
3925 */
hdlcdev_xmit(struct sk_buff * skb,struct net_device * dev)3926 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3927 struct net_device *dev)
3928 {
3929 MGSLPC_INFO *info = dev_to_port(dev);
3930 unsigned long flags;
3931
3932 if (debug_level >= DEBUG_LEVEL_INFO)
3933 printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3934
3935 /* stop sending until this frame completes */
3936 netif_stop_queue(dev);
3937
3938 /* copy data to device buffers */
3939 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3940 info->tx_get = 0;
3941 info->tx_put = info->tx_count = skb->len;
3942
3943 /* update network statistics */
3944 dev->stats.tx_packets++;
3945 dev->stats.tx_bytes += skb->len;
3946
3947 /* done with socket buffer, so free it */
3948 dev_kfree_skb(skb);
3949
3950 /* save start time for transmit timeout detection */
3951 netif_trans_update(dev);
3952
3953 /* start hardware transmitter if necessary */
3954 spin_lock_irqsave(&info->lock, flags);
3955 if (!info->tx_active) {
3956 struct tty_struct *tty = tty_port_tty_get(&info->port);
3957 tx_start(info, tty);
3958 tty_kref_put(tty);
3959 }
3960 spin_unlock_irqrestore(&info->lock, flags);
3961
3962 return NETDEV_TX_OK;
3963 }
3964
3965 /**
3966 * called by network layer when interface enabled
3967 * claim resources and initialize hardware
3968 *
3969 * dev pointer to network device structure
3970 *
3971 * returns 0 if success, otherwise error code
3972 */
hdlcdev_open(struct net_device * dev)3973 static int hdlcdev_open(struct net_device *dev)
3974 {
3975 MGSLPC_INFO *info = dev_to_port(dev);
3976 struct tty_struct *tty;
3977 int rc;
3978 unsigned long flags;
3979
3980 if (debug_level >= DEBUG_LEVEL_INFO)
3981 printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
3982
3983 /* generic HDLC layer open processing */
3984 rc = hdlc_open(dev);
3985 if (rc != 0)
3986 return rc;
3987
3988 /* arbitrate between network and tty opens */
3989 spin_lock_irqsave(&info->netlock, flags);
3990 if (info->port.count != 0 || info->netcount != 0) {
3991 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3992 spin_unlock_irqrestore(&info->netlock, flags);
3993 return -EBUSY;
3994 }
3995 info->netcount=1;
3996 spin_unlock_irqrestore(&info->netlock, flags);
3997
3998 tty = tty_port_tty_get(&info->port);
3999 /* claim resources and init adapter */
4000 rc = startup(info, tty);
4001 if (rc != 0) {
4002 tty_kref_put(tty);
4003 spin_lock_irqsave(&info->netlock, flags);
4004 info->netcount=0;
4005 spin_unlock_irqrestore(&info->netlock, flags);
4006 return rc;
4007 }
4008 /* assert RTS and DTR, apply hardware settings */
4009 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4010 mgslpc_program_hw(info, tty);
4011 tty_kref_put(tty);
4012
4013 /* enable network layer transmit */
4014 netif_trans_update(dev);
4015 netif_start_queue(dev);
4016
4017 /* inform generic HDLC layer of current DCD status */
4018 spin_lock_irqsave(&info->lock, flags);
4019 get_signals(info);
4020 spin_unlock_irqrestore(&info->lock, flags);
4021 if (info->serial_signals & SerialSignal_DCD)
4022 netif_carrier_on(dev);
4023 else
4024 netif_carrier_off(dev);
4025 return 0;
4026 }
4027
4028 /**
4029 * called by network layer when interface is disabled
4030 * shutdown hardware and release resources
4031 *
4032 * dev pointer to network device structure
4033 *
4034 * returns 0 if success, otherwise error code
4035 */
hdlcdev_close(struct net_device * dev)4036 static int hdlcdev_close(struct net_device *dev)
4037 {
4038 MGSLPC_INFO *info = dev_to_port(dev);
4039 struct tty_struct *tty = tty_port_tty_get(&info->port);
4040 unsigned long flags;
4041
4042 if (debug_level >= DEBUG_LEVEL_INFO)
4043 printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4044
4045 netif_stop_queue(dev);
4046
4047 /* shutdown adapter and release resources */
4048 shutdown(info, tty);
4049 tty_kref_put(tty);
4050 hdlc_close(dev);
4051
4052 spin_lock_irqsave(&info->netlock, flags);
4053 info->netcount=0;
4054 spin_unlock_irqrestore(&info->netlock, flags);
4055
4056 return 0;
4057 }
4058
4059 /**
4060 * called by network layer to process IOCTL call to network device
4061 *
4062 * dev pointer to network device structure
4063 * ifr pointer to network interface request structure
4064 * cmd IOCTL command code
4065 *
4066 * returns 0 if success, otherwise error code
4067 */
hdlcdev_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)4068 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4069 {
4070 const size_t size = sizeof(sync_serial_settings);
4071 sync_serial_settings new_line;
4072 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4073 MGSLPC_INFO *info = dev_to_port(dev);
4074 unsigned int flags;
4075
4076 if (debug_level >= DEBUG_LEVEL_INFO)
4077 printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4078
4079 /* return error if TTY interface open */
4080 if (info->port.count)
4081 return -EBUSY;
4082
4083 if (cmd != SIOCWANDEV)
4084 return hdlc_ioctl(dev, ifr, cmd);
4085
4086 memset(&new_line, 0, size);
4087
4088 switch(ifr->ifr_settings.type) {
4089 case IF_GET_IFACE: /* return current sync_serial_settings */
4090
4091 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4092 if (ifr->ifr_settings.size < size) {
4093 ifr->ifr_settings.size = size; /* data size wanted */
4094 return -ENOBUFS;
4095 }
4096
4097 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4098 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4099 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4100 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4101
4102 switch (flags){
4103 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4104 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4105 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4106 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4107 default: new_line.clock_type = CLOCK_DEFAULT;
4108 }
4109
4110 new_line.clock_rate = info->params.clock_speed;
4111 new_line.loopback = info->params.loopback ? 1:0;
4112
4113 if (copy_to_user(line, &new_line, size))
4114 return -EFAULT;
4115 return 0;
4116
4117 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4118
4119 if(!capable(CAP_NET_ADMIN))
4120 return -EPERM;
4121 if (copy_from_user(&new_line, line, size))
4122 return -EFAULT;
4123
4124 switch (new_line.clock_type)
4125 {
4126 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4127 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4128 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4129 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4130 case CLOCK_DEFAULT: flags = info->params.flags &
4131 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4132 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4133 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4134 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4135 default: return -EINVAL;
4136 }
4137
4138 if (new_line.loopback != 0 && new_line.loopback != 1)
4139 return -EINVAL;
4140
4141 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4142 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4143 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4144 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4145 info->params.flags |= flags;
4146
4147 info->params.loopback = new_line.loopback;
4148
4149 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4150 info->params.clock_speed = new_line.clock_rate;
4151 else
4152 info->params.clock_speed = 0;
4153
4154 /* if network interface up, reprogram hardware */
4155 if (info->netcount) {
4156 struct tty_struct *tty = tty_port_tty_get(&info->port);
4157 mgslpc_program_hw(info, tty);
4158 tty_kref_put(tty);
4159 }
4160 return 0;
4161
4162 default:
4163 return hdlc_ioctl(dev, ifr, cmd);
4164 }
4165 }
4166
4167 /**
4168 * called by network layer when transmit timeout is detected
4169 *
4170 * dev pointer to network device structure
4171 */
hdlcdev_tx_timeout(struct net_device * dev,unsigned int txqueue)4172 static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
4173 {
4174 MGSLPC_INFO *info = dev_to_port(dev);
4175 unsigned long flags;
4176
4177 if (debug_level >= DEBUG_LEVEL_INFO)
4178 printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4179
4180 dev->stats.tx_errors++;
4181 dev->stats.tx_aborted_errors++;
4182
4183 spin_lock_irqsave(&info->lock, flags);
4184 tx_stop(info);
4185 spin_unlock_irqrestore(&info->lock, flags);
4186
4187 netif_wake_queue(dev);
4188 }
4189
4190 /**
4191 * called by device driver when transmit completes
4192 * reenable network layer transmit if stopped
4193 *
4194 * info pointer to device instance information
4195 */
hdlcdev_tx_done(MGSLPC_INFO * info)4196 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4197 {
4198 if (netif_queue_stopped(info->netdev))
4199 netif_wake_queue(info->netdev);
4200 }
4201
4202 /**
4203 * called by device driver when frame received
4204 * pass frame to network layer
4205 *
4206 * info pointer to device instance information
4207 * buf pointer to buffer contianing frame data
4208 * size count of data bytes in buf
4209 */
hdlcdev_rx(MGSLPC_INFO * info,char * buf,int size)4210 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4211 {
4212 struct sk_buff *skb = dev_alloc_skb(size);
4213 struct net_device *dev = info->netdev;
4214
4215 if (debug_level >= DEBUG_LEVEL_INFO)
4216 printk("hdlcdev_rx(%s)\n", dev->name);
4217
4218 if (skb == NULL) {
4219 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4220 dev->stats.rx_dropped++;
4221 return;
4222 }
4223
4224 skb_put_data(skb, buf, size);
4225
4226 skb->protocol = hdlc_type_trans(skb, dev);
4227
4228 dev->stats.rx_packets++;
4229 dev->stats.rx_bytes += size;
4230
4231 netif_rx(skb);
4232 }
4233
4234 static const struct net_device_ops hdlcdev_ops = {
4235 .ndo_open = hdlcdev_open,
4236 .ndo_stop = hdlcdev_close,
4237 .ndo_start_xmit = hdlc_start_xmit,
4238 .ndo_do_ioctl = hdlcdev_ioctl,
4239 .ndo_tx_timeout = hdlcdev_tx_timeout,
4240 };
4241
4242 /**
4243 * called by device driver when adding device instance
4244 * do generic HDLC initialization
4245 *
4246 * info pointer to device instance information
4247 *
4248 * returns 0 if success, otherwise error code
4249 */
hdlcdev_init(MGSLPC_INFO * info)4250 static int hdlcdev_init(MGSLPC_INFO *info)
4251 {
4252 int rc;
4253 struct net_device *dev;
4254 hdlc_device *hdlc;
4255
4256 /* allocate and initialize network and HDLC layer objects */
4257
4258 dev = alloc_hdlcdev(info);
4259 if (dev == NULL) {
4260 printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4261 return -ENOMEM;
4262 }
4263
4264 /* for network layer reporting purposes only */
4265 dev->base_addr = info->io_base;
4266 dev->irq = info->irq_level;
4267
4268 /* network layer callbacks and settings */
4269 dev->netdev_ops = &hdlcdev_ops;
4270 dev->watchdog_timeo = 10 * HZ;
4271 dev->tx_queue_len = 50;
4272
4273 /* generic HDLC layer callbacks and settings */
4274 hdlc = dev_to_hdlc(dev);
4275 hdlc->attach = hdlcdev_attach;
4276 hdlc->xmit = hdlcdev_xmit;
4277
4278 /* register objects with HDLC layer */
4279 rc = register_hdlc_device(dev);
4280 if (rc) {
4281 printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4282 free_netdev(dev);
4283 return rc;
4284 }
4285
4286 info->netdev = dev;
4287 return 0;
4288 }
4289
4290 /**
4291 * called by device driver when removing device instance
4292 * do generic HDLC cleanup
4293 *
4294 * info pointer to device instance information
4295 */
hdlcdev_exit(MGSLPC_INFO * info)4296 static void hdlcdev_exit(MGSLPC_INFO *info)
4297 {
4298 unregister_hdlc_device(info->netdev);
4299 free_netdev(info->netdev);
4300 info->netdev = NULL;
4301 }
4302
4303 #endif /* CONFIG_HDLC */
4304
4305
