1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of version 2 of the GNU General Public License as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 22 * USA 23 * 24 * The full GNU General Public License is included in this distribution 25 * in the file called COPYING. 26 * 27 * Contact Information: 28 * Intel Linux Wireless <linuxwifi@intel.com> 29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 30 * 31 * BSD LICENSE 32 * 33 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 40 * * Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * * Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in 44 * the documentation and/or other materials provided with the 45 * distribution. 46 * * Neither the name Intel Corporation nor the names of its 47 * contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 *****************************************************************************/ 63 /* 64 * Please use this file (commands.h) only for uCode API definitions. 65 * Please use iwl-xxxx-hw.h for hardware-related definitions. 66 * Please use dev.h for driver implementation definitions. 67 */ 68 69 #ifndef __iwl_commands_h__ 70 #define __iwl_commands_h__ 71 72 #include <linux/ieee80211.h> 73 #include <linux/types.h> 74 75 76 enum { 77 REPLY_ALIVE = 0x1, 78 REPLY_ERROR = 0x2, 79 REPLY_ECHO = 0x3, /* test command */ 80 81 /* RXON and QOS commands */ 82 REPLY_RXON = 0x10, 83 REPLY_RXON_ASSOC = 0x11, 84 REPLY_QOS_PARAM = 0x13, 85 REPLY_RXON_TIMING = 0x14, 86 87 /* Multi-Station support */ 88 REPLY_ADD_STA = 0x18, 89 REPLY_REMOVE_STA = 0x19, 90 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ 91 REPLY_TXFIFO_FLUSH = 0x1e, 92 93 /* Security */ 94 REPLY_WEPKEY = 0x20, 95 96 /* RX, TX, LEDs */ 97 REPLY_TX = 0x1c, 98 REPLY_LEDS_CMD = 0x48, 99 REPLY_TX_LINK_QUALITY_CMD = 0x4e, 100 101 /* WiMAX coexistence */ 102 COEX_PRIORITY_TABLE_CMD = 0x5a, 103 COEX_MEDIUM_NOTIFICATION = 0x5b, 104 COEX_EVENT_CMD = 0x5c, 105 106 /* Calibration */ 107 TEMPERATURE_NOTIFICATION = 0x62, 108 CALIBRATION_CFG_CMD = 0x65, 109 CALIBRATION_RES_NOTIFICATION = 0x66, 110 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 111 112 /* 802.11h related */ 113 REPLY_QUIET_CMD = 0x71, /* not used */ 114 REPLY_CHANNEL_SWITCH = 0x72, 115 CHANNEL_SWITCH_NOTIFICATION = 0x73, 116 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, 117 SPECTRUM_MEASURE_NOTIFICATION = 0x75, 118 119 /* Power Management */ 120 POWER_TABLE_CMD = 0x77, 121 PM_SLEEP_NOTIFICATION = 0x7A, 122 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, 123 124 /* Scan commands and notifications */ 125 REPLY_SCAN_CMD = 0x80, 126 REPLY_SCAN_ABORT_CMD = 0x81, 127 SCAN_START_NOTIFICATION = 0x82, 128 SCAN_RESULTS_NOTIFICATION = 0x83, 129 SCAN_COMPLETE_NOTIFICATION = 0x84, 130 131 /* IBSS/AP commands */ 132 BEACON_NOTIFICATION = 0x90, 133 REPLY_TX_BEACON = 0x91, 134 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ 135 136 /* Miscellaneous commands */ 137 REPLY_TX_POWER_DBM_CMD = 0x95, 138 QUIET_NOTIFICATION = 0x96, /* not used */ 139 REPLY_TX_PWR_TABLE_CMD = 0x97, 140 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ 141 TX_ANT_CONFIGURATION_CMD = 0x98, 142 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ 143 144 /* Bluetooth device coexistence config command */ 145 REPLY_BT_CONFIG = 0x9b, 146 147 /* Statistics */ 148 REPLY_STATISTICS_CMD = 0x9c, 149 STATISTICS_NOTIFICATION = 0x9d, 150 151 /* RF-KILL commands and notifications */ 152 REPLY_CARD_STATE_CMD = 0xa0, 153 CARD_STATE_NOTIFICATION = 0xa1, 154 155 /* Missed beacons notification */ 156 MISSED_BEACONS_NOTIFICATION = 0xa2, 157 158 REPLY_CT_KILL_CONFIG_CMD = 0xa4, 159 SENSITIVITY_CMD = 0xa8, 160 REPLY_PHY_CALIBRATION_CMD = 0xb0, 161 REPLY_RX_PHY_CMD = 0xc0, 162 REPLY_RX_MPDU_CMD = 0xc1, 163 REPLY_RX = 0xc3, 164 REPLY_COMPRESSED_BA = 0xc5, 165 166 /* BT Coex */ 167 REPLY_BT_COEX_PRIO_TABLE = 0xcc, 168 REPLY_BT_COEX_PROT_ENV = 0xcd, 169 REPLY_BT_COEX_PROFILE_NOTIF = 0xce, 170 171 /* PAN commands */ 172 REPLY_WIPAN_PARAMS = 0xb2, 173 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */ 174 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */ 175 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */ 176 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */ 177 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */ 178 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9, 179 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc, 180 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd, 181 182 REPLY_WOWLAN_PATTERNS = 0xe0, 183 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1, 184 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2, 185 REPLY_WOWLAN_TKIP_PARAMS = 0xe3, 186 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4, 187 REPLY_WOWLAN_GET_STATUS = 0xe5, 188 REPLY_D3_CONFIG = 0xd3, 189 190 REPLY_MAX = 0xff 191 }; 192 193 /* 194 * Minimum number of queues. MAX_NUM is defined in hw specific files. 195 * Set the minimum to accommodate 196 * - 4 standard TX queues 197 * - the command queue 198 * - 4 PAN TX queues 199 * - the PAN multicast queue, and 200 * - the AUX (TX during scan dwell) queue. 201 */ 202 #define IWL_MIN_NUM_QUEUES 11 203 204 /* 205 * Command queue depends on iPAN support. 206 */ 207 #define IWL_DEFAULT_CMD_QUEUE_NUM 4 208 #define IWL_IPAN_CMD_QUEUE_NUM 9 209 210 #define IWL_TX_FIFO_BK 0 /* shared */ 211 #define IWL_TX_FIFO_BE 1 212 #define IWL_TX_FIFO_VI 2 /* shared */ 213 #define IWL_TX_FIFO_VO 3 214 #define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 215 #define IWL_TX_FIFO_BE_IPAN 4 216 #define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 217 #define IWL_TX_FIFO_VO_IPAN 5 218 /* re-uses the VO FIFO, uCode will properly flush/schedule */ 219 #define IWL_TX_FIFO_AUX 5 220 #define IWL_TX_FIFO_UNUSED 255 221 222 #define IWLAGN_CMD_FIFO_NUM 7 223 224 /* 225 * This queue number is required for proper operation 226 * because the ucode will stop/start the scheduler as 227 * required. 228 */ 229 #define IWL_IPAN_MCAST_QUEUE 8 230 231 /****************************************************************************** 232 * (0) 233 * Commonly used structures and definitions: 234 * Command header, rate_n_flags, txpower 235 * 236 *****************************************************************************/ 237 238 /** 239 * iwlagn rate_n_flags bit fields 240 * 241 * rate_n_flags format is used in following iwlagn commands: 242 * REPLY_RX (response only) 243 * REPLY_RX_MPDU (response only) 244 * REPLY_TX (both command and response) 245 * REPLY_TX_LINK_QUALITY_CMD 246 * 247 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"): 248 * 2-0: 0) 6 Mbps 249 * 1) 12 Mbps 250 * 2) 18 Mbps 251 * 3) 24 Mbps 252 * 4) 36 Mbps 253 * 5) 48 Mbps 254 * 6) 54 Mbps 255 * 7) 60 Mbps 256 * 257 * 4-3: 0) Single stream (SISO) 258 * 1) Dual stream (MIMO) 259 * 2) Triple stream (MIMO) 260 * 261 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 262 * 263 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"): 264 * 3-0: 0xD) 6 Mbps 265 * 0xF) 9 Mbps 266 * 0x5) 12 Mbps 267 * 0x7) 18 Mbps 268 * 0x9) 24 Mbps 269 * 0xB) 36 Mbps 270 * 0x1) 48 Mbps 271 * 0x3) 54 Mbps 272 * 273 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"): 274 * 6-0: 10) 1 Mbps 275 * 20) 2 Mbps 276 * 55) 5.5 Mbps 277 * 110) 11 Mbps 278 */ 279 #define RATE_MCS_CODE_MSK 0x7 280 #define RATE_MCS_SPATIAL_POS 3 281 #define RATE_MCS_SPATIAL_MSK 0x18 282 #define RATE_MCS_HT_DUP_POS 5 283 #define RATE_MCS_HT_DUP_MSK 0x20 284 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ 285 #define RATE_MCS_RATE_MSK 0xff 286 287 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ 288 #define RATE_MCS_FLAGS_POS 8 289 #define RATE_MCS_HT_POS 8 290 #define RATE_MCS_HT_MSK 0x100 291 292 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 293 #define RATE_MCS_CCK_POS 9 294 #define RATE_MCS_CCK_MSK 0x200 295 296 /* Bit 10: (1) Use Green Field preamble */ 297 #define RATE_MCS_GF_POS 10 298 #define RATE_MCS_GF_MSK 0x400 299 300 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */ 301 #define RATE_MCS_HT40_POS 11 302 #define RATE_MCS_HT40_MSK 0x800 303 304 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */ 305 #define RATE_MCS_DUP_POS 12 306 #define RATE_MCS_DUP_MSK 0x1000 307 308 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 309 #define RATE_MCS_SGI_POS 13 310 #define RATE_MCS_SGI_MSK 0x2000 311 312 /** 313 * rate_n_flags Tx antenna masks 314 * bit14:16 315 */ 316 #define RATE_MCS_ANT_POS 14 317 #define RATE_MCS_ANT_A_MSK 0x04000 318 #define RATE_MCS_ANT_B_MSK 0x08000 319 #define RATE_MCS_ANT_C_MSK 0x10000 320 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) 321 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) 322 #define RATE_ANT_NUM 3 323 324 #define POWER_TABLE_NUM_ENTRIES 33 325 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 326 #define POWER_TABLE_CCK_ENTRY 32 327 328 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24 329 #define IWL_PWR_CCK_ENTRIES 2 330 331 /** 332 * struct tx_power_dual_stream 333 * 334 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH 335 * 336 * Same format as iwl_tx_power_dual_stream, but __le32 337 */ 338 struct tx_power_dual_stream { 339 __le32 dw; 340 } __packed; 341 342 /** 343 * Command REPLY_TX_POWER_DBM_CMD = 0x98 344 * struct iwlagn_tx_power_dbm_cmd 345 */ 346 #define IWLAGN_TX_POWER_AUTO 0x7f 347 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6) 348 349 struct iwlagn_tx_power_dbm_cmd { 350 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 351 u8 flags; 352 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ 353 u8 reserved; 354 } __packed; 355 356 /** 357 * Command TX_ANT_CONFIGURATION_CMD = 0x98 358 * This command is used to configure valid Tx antenna. 359 * By default uCode concludes the valid antenna according to the radio flavor. 360 * This command enables the driver to override/modify this conclusion. 361 */ 362 struct iwl_tx_ant_config_cmd { 363 __le32 valid; 364 } __packed; 365 366 /****************************************************************************** 367 * (0a) 368 * Alive and Error Commands & Responses: 369 * 370 *****************************************************************************/ 371 372 #define UCODE_VALID_OK cpu_to_le32(0x1) 373 374 /** 375 * REPLY_ALIVE = 0x1 (response only, not a command) 376 * 377 * uCode issues this "alive" notification once the runtime image is ready 378 * to receive commands from the driver. This is the *second* "alive" 379 * notification that the driver will receive after rebooting uCode; 380 * this "alive" is indicated by subtype field != 9. 381 * 382 * See comments documenting "BSM" (bootstrap state machine). 383 * 384 * This response includes two pointers to structures within the device's 385 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: 386 * 387 * 1) log_event_table_ptr indicates base of the event log. This traces 388 * a 256-entry history of uCode execution within a circular buffer. 389 * Its header format is: 390 * 391 * __le32 log_size; log capacity (in number of entries) 392 * __le32 type; (1) timestamp with each entry, (0) no timestamp 393 * __le32 wraps; # times uCode has wrapped to top of circular buffer 394 * __le32 write_index; next circular buffer entry that uCode would fill 395 * 396 * The header is followed by the circular buffer of log entries. Entries 397 * with timestamps have the following format: 398 * 399 * __le32 event_id; range 0 - 1500 400 * __le32 timestamp; low 32 bits of TSF (of network, if associated) 401 * __le32 data; event_id-specific data value 402 * 403 * Entries without timestamps contain only event_id and data. 404 * 405 * 406 * 2) error_event_table_ptr indicates base of the error log. This contains 407 * information about any uCode error that occurs. For agn, the format 408 * of the error log is defined by struct iwl_error_event_table. 409 * 410 * The Linux driver can print both logs to the system log when a uCode error 411 * occurs. 412 */ 413 414 /* 415 * Note: This structure is read from the device with IO accesses, 416 * and the reading already does the endian conversion. As it is 417 * read with u32-sized accesses, any members with a different size 418 * need to be ordered correctly though! 419 */ 420 struct iwl_error_event_table { 421 u32 valid; /* (nonzero) valid, (0) log is empty */ 422 u32 error_id; /* type of error */ 423 u32 pc; /* program counter */ 424 u32 blink1; /* branch link */ 425 u32 blink2; /* branch link */ 426 u32 ilink1; /* interrupt link */ 427 u32 ilink2; /* interrupt link */ 428 u32 data1; /* error-specific data */ 429 u32 data2; /* error-specific data */ 430 u32 line; /* source code line of error */ 431 u32 bcon_time; /* beacon timer */ 432 u32 tsf_low; /* network timestamp function timer */ 433 u32 tsf_hi; /* network timestamp function timer */ 434 u32 gp1; /* GP1 timer register */ 435 u32 gp2; /* GP2 timer register */ 436 u32 gp3; /* GP3 timer register */ 437 u32 ucode_ver; /* uCode version */ 438 u32 hw_ver; /* HW Silicon version */ 439 u32 brd_ver; /* HW board version */ 440 u32 log_pc; /* log program counter */ 441 u32 frame_ptr; /* frame pointer */ 442 u32 stack_ptr; /* stack pointer */ 443 u32 hcmd; /* last host command header */ 444 u32 isr0; /* isr status register LMPM_NIC_ISR0: 445 * rxtx_flag */ 446 u32 isr1; /* isr status register LMPM_NIC_ISR1: 447 * host_flag */ 448 u32 isr2; /* isr status register LMPM_NIC_ISR2: 449 * enc_flag */ 450 u32 isr3; /* isr status register LMPM_NIC_ISR3: 451 * time_flag */ 452 u32 isr4; /* isr status register LMPM_NIC_ISR4: 453 * wico interrupt */ 454 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ 455 u32 wait_event; /* wait event() caller address */ 456 u32 l2p_control; /* L2pControlField */ 457 u32 l2p_duration; /* L2pDurationField */ 458 u32 l2p_mhvalid; /* L2pMhValidBits */ 459 u32 l2p_addr_match; /* L2pAddrMatchStat */ 460 u32 lmpm_pmg_sel; /* indicate which clocks are turned on 461 * (LMPM_PMG_SEL) */ 462 u32 u_timestamp; /* indicate when the date and time of the 463 * compilation */ 464 u32 flow_handler; /* FH read/write pointers, RX credit */ 465 } __packed; 466 467 struct iwl_alive_resp { 468 u8 ucode_minor; 469 u8 ucode_major; 470 __le16 reserved1; 471 u8 sw_rev[8]; 472 u8 ver_type; 473 u8 ver_subtype; /* not "9" for runtime alive */ 474 __le16 reserved2; 475 __le32 log_event_table_ptr; /* SRAM address for event log */ 476 __le32 error_event_table_ptr; /* SRAM address for error log */ 477 __le32 timestamp; 478 __le32 is_valid; 479 } __packed; 480 481 /* 482 * REPLY_ERROR = 0x2 (response only, not a command) 483 */ 484 struct iwl_error_resp { 485 __le32 error_type; 486 u8 cmd_id; 487 u8 reserved1; 488 __le16 bad_cmd_seq_num; 489 __le32 error_info; 490 __le64 timestamp; 491 } __packed; 492 493 /****************************************************************************** 494 * (1) 495 * RXON Commands & Responses: 496 * 497 *****************************************************************************/ 498 499 /* 500 * Rx config defines & structure 501 */ 502 /* rx_config device types */ 503 enum { 504 RXON_DEV_TYPE_AP = 1, 505 RXON_DEV_TYPE_ESS = 3, 506 RXON_DEV_TYPE_IBSS = 4, 507 RXON_DEV_TYPE_SNIFFER = 6, 508 RXON_DEV_TYPE_CP = 7, 509 RXON_DEV_TYPE_2STA = 8, 510 RXON_DEV_TYPE_P2P = 9, 511 }; 512 513 514 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) 515 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) 516 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) 517 #define RXON_RX_CHAIN_VALID_POS (1) 518 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) 519 #define RXON_RX_CHAIN_FORCE_SEL_POS (4) 520 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7) 521 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 522 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10) 523 #define RXON_RX_CHAIN_CNT_POS (10) 524 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12) 525 #define RXON_RX_CHAIN_MIMO_CNT_POS (12) 526 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14) 527 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14) 528 529 /* rx_config flags */ 530 /* band & modulation selection */ 531 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) 532 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) 533 /* auto detection enable */ 534 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) 535 /* TGg protection when tx */ 536 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) 537 /* cck short slot & preamble */ 538 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) 539 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) 540 /* antenna selection */ 541 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) 542 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) 543 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) 544 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) 545 /* radar detection enable */ 546 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) 547 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) 548 /* rx response to host with 8-byte TSF 549 * (according to ON_AIR deassertion) */ 550 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) 551 552 553 /* HT flags */ 554 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) 555 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) 556 557 #define RXON_FLG_HT_OPERATING_MODE_POS (23) 558 559 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23) 560 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23) 561 562 #define RXON_FLG_CHANNEL_MODE_POS (25) 563 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) 564 565 /* channel mode */ 566 enum { 567 CHANNEL_MODE_LEGACY = 0, 568 CHANNEL_MODE_PURE_40 = 1, 569 CHANNEL_MODE_MIXED = 2, 570 CHANNEL_MODE_RESERVED = 3, 571 }; 572 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS) 573 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS) 574 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS) 575 576 /* CTS to self (if spec allows) flag */ 577 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) 578 579 /* rx_config filter flags */ 580 /* accept all data frames */ 581 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) 582 /* pass control & management to host */ 583 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) 584 /* accept multi-cast */ 585 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) 586 /* don't decrypt uni-cast frames */ 587 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) 588 /* don't decrypt multi-cast frames */ 589 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) 590 /* STA is associated */ 591 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) 592 /* transfer to host non bssid beacons in associated state */ 593 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) 594 595 /** 596 * REPLY_RXON = 0x10 (command, has simple generic response) 597 * 598 * RXON tunes the radio tuner to a service channel, and sets up a number 599 * of parameters that are used primarily for Rx, but also for Tx operations. 600 * 601 * NOTE: When tuning to a new channel, driver must set the 602 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent 603 * info within the device, including the station tables, tx retry 604 * rate tables, and txpower tables. Driver must build a new station 605 * table and txpower table before transmitting anything on the RXON 606 * channel. 607 * 608 * NOTE: All RXONs wipe clean the internal txpower table. Driver must 609 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), 610 * regardless of whether RXON_FILTER_ASSOC_MSK is set. 611 */ 612 613 struct iwl_rxon_cmd { 614 u8 node_addr[6]; 615 __le16 reserved1; 616 u8 bssid_addr[6]; 617 __le16 reserved2; 618 u8 wlap_bssid_addr[6]; 619 __le16 reserved3; 620 u8 dev_type; 621 u8 air_propagation; 622 __le16 rx_chain; 623 u8 ofdm_basic_rates; 624 u8 cck_basic_rates; 625 __le16 assoc_id; 626 __le32 flags; 627 __le32 filter_flags; 628 __le16 channel; 629 u8 ofdm_ht_single_stream_basic_rates; 630 u8 ofdm_ht_dual_stream_basic_rates; 631 u8 ofdm_ht_triple_stream_basic_rates; 632 u8 reserved5; 633 __le16 acquisition_data; 634 __le16 reserved6; 635 } __packed; 636 637 /* 638 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) 639 */ 640 struct iwl_rxon_assoc_cmd { 641 __le32 flags; 642 __le32 filter_flags; 643 u8 ofdm_basic_rates; 644 u8 cck_basic_rates; 645 __le16 reserved1; 646 u8 ofdm_ht_single_stream_basic_rates; 647 u8 ofdm_ht_dual_stream_basic_rates; 648 u8 ofdm_ht_triple_stream_basic_rates; 649 u8 reserved2; 650 __le16 rx_chain_select_flags; 651 __le16 acquisition_data; 652 __le32 reserved3; 653 } __packed; 654 655 #define IWL_CONN_MAX_LISTEN_INTERVAL 10 656 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ 657 658 /* 659 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) 660 */ 661 struct iwl_rxon_time_cmd { 662 __le64 timestamp; 663 __le16 beacon_interval; 664 __le16 atim_window; 665 __le32 beacon_init_val; 666 __le16 listen_interval; 667 u8 dtim_period; 668 u8 delta_cp_bss_tbtts; 669 } __packed; 670 671 /* 672 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) 673 */ 674 /** 675 * struct iwl5000_channel_switch_cmd 676 * @band: 0- 5.2GHz, 1- 2.4GHz 677 * @expect_beacon: 0- resume transmits after channel switch 678 * 1- wait for beacon to resume transmits 679 * @channel: new channel number 680 * @rxon_flags: Rx on flags 681 * @rxon_filter_flags: filtering parameters 682 * @switch_time: switch time in extended beacon format 683 * @reserved: reserved bytes 684 */ 685 struct iwl5000_channel_switch_cmd { 686 u8 band; 687 u8 expect_beacon; 688 __le16 channel; 689 __le32 rxon_flags; 690 __le32 rxon_filter_flags; 691 __le32 switch_time; 692 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 693 } __packed; 694 695 /** 696 * struct iwl6000_channel_switch_cmd 697 * @band: 0- 5.2GHz, 1- 2.4GHz 698 * @expect_beacon: 0- resume transmits after channel switch 699 * 1- wait for beacon to resume transmits 700 * @channel: new channel number 701 * @rxon_flags: Rx on flags 702 * @rxon_filter_flags: filtering parameters 703 * @switch_time: switch time in extended beacon format 704 * @reserved: reserved bytes 705 */ 706 struct iwl6000_channel_switch_cmd { 707 u8 band; 708 u8 expect_beacon; 709 __le16 channel; 710 __le32 rxon_flags; 711 __le32 rxon_filter_flags; 712 __le32 switch_time; 713 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; 714 } __packed; 715 716 /* 717 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) 718 */ 719 struct iwl_csa_notification { 720 __le16 band; 721 __le16 channel; 722 __le32 status; /* 0 - OK, 1 - fail */ 723 } __packed; 724 725 /****************************************************************************** 726 * (2) 727 * Quality-of-Service (QOS) Commands & Responses: 728 * 729 *****************************************************************************/ 730 731 /** 732 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM 733 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd 734 * 735 * @cw_min: Contention window, start value in numbers of slots. 736 * Should be a power-of-2, minus 1. Device's default is 0x0f. 737 * @cw_max: Contention window, max value in numbers of slots. 738 * Should be a power-of-2, minus 1. Device's default is 0x3f. 739 * @aifsn: Number of slots in Arbitration Interframe Space (before 740 * performing random backoff timing prior to Tx). Device default 1. 741 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. 742 * 743 * Device will automatically increase contention window by (2*CW) + 1 for each 744 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW 745 * value, to cap the CW value. 746 */ 747 struct iwl_ac_qos { 748 __le16 cw_min; 749 __le16 cw_max; 750 u8 aifsn; 751 u8 reserved1; 752 __le16 edca_txop; 753 } __packed; 754 755 /* QoS flags defines */ 756 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) 757 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) 758 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) 759 760 /* Number of Access Categories (AC) (EDCA), queues 0..3 */ 761 #define AC_NUM 4 762 763 /* 764 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) 765 * 766 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs 767 * 0: Background, 1: Best Effort, 2: Video, 3: Voice. 768 */ 769 struct iwl_qosparam_cmd { 770 __le32 qos_flags; 771 struct iwl_ac_qos ac[AC_NUM]; 772 } __packed; 773 774 /****************************************************************************** 775 * (3) 776 * Add/Modify Stations Commands & Responses: 777 * 778 *****************************************************************************/ 779 /* 780 * Multi station support 781 */ 782 783 /* Special, dedicated locations within device's station table */ 784 #define IWL_AP_ID 0 785 #define IWL_AP_ID_PAN 1 786 #define IWL_STA_ID 2 787 #define IWLAGN_PAN_BCAST_ID 14 788 #define IWLAGN_BROADCAST_ID 15 789 #define IWLAGN_STATION_COUNT 16 790 791 #define IWL_TID_NON_QOS IWL_MAX_TID_COUNT 792 793 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) 794 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8) 795 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13) 796 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) 797 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) 798 #define STA_FLG_MAX_AGG_SIZE_POS (19) 799 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19) 800 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21) 801 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22) 802 #define STA_FLG_AGG_MPDU_DENSITY_POS (23) 803 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23) 804 805 /* Use in mode field. 1: modify existing entry, 0: add new station entry */ 806 #define STA_CONTROL_MODIFY_MSK 0x01 807 808 /* key flags __le16*/ 809 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) 810 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) 811 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001) 812 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) 813 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) 814 815 #define STA_KEY_FLG_KEYID_POS 8 816 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) 817 /* wep key is either from global key (0) or from station info array (1) */ 818 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008) 819 820 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */ 821 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) 822 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) 823 #define STA_KEY_MAX_NUM 8 824 #define STA_KEY_MAX_NUM_PAN 16 825 /* must not match WEP_INVALID_OFFSET */ 826 #define IWLAGN_HW_KEY_DEFAULT 0xfe 827 828 /* Flags indicate whether to modify vs. don't change various station params */ 829 #define STA_MODIFY_KEY_MASK 0x01 830 #define STA_MODIFY_TID_DISABLE_TX 0x02 831 #define STA_MODIFY_TX_RATE_MSK 0x04 832 #define STA_MODIFY_ADDBA_TID_MSK 0x08 833 #define STA_MODIFY_DELBA_TID_MSK 0x10 834 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20 835 836 /* agn */ 837 struct iwl_keyinfo { 838 __le16 key_flags; 839 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ 840 u8 reserved1; 841 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ 842 u8 key_offset; 843 u8 reserved2; 844 u8 key[16]; /* 16-byte unicast decryption key */ 845 __le64 tx_secur_seq_cnt; 846 __le64 hw_tkip_mic_rx_key; 847 __le64 hw_tkip_mic_tx_key; 848 } __packed; 849 850 /** 851 * struct sta_id_modify 852 * @addr[ETH_ALEN]: station's MAC address 853 * @sta_id: index of station in uCode's station table 854 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change 855 * 856 * Driver selects unused table index when adding new station, 857 * or the index to a pre-existing station entry when modifying that station. 858 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). 859 * 860 * modify_mask flags select which parameters to modify vs. leave alone. 861 */ 862 struct sta_id_modify { 863 u8 addr[ETH_ALEN]; 864 __le16 reserved1; 865 u8 sta_id; 866 u8 modify_mask; 867 __le16 reserved2; 868 } __packed; 869 870 /* 871 * REPLY_ADD_STA = 0x18 (command) 872 * 873 * The device contains an internal table of per-station information, 874 * with info on security keys, aggregation parameters, and Tx rates for 875 * initial Tx attempt and any retries (agn devices uses 876 * REPLY_TX_LINK_QUALITY_CMD, 877 * 878 * REPLY_ADD_STA sets up the table entry for one station, either creating 879 * a new entry, or modifying a pre-existing one. 880 * 881 * NOTE: RXON command (without "associated" bit set) wipes the station table 882 * clean. Moving into RF_KILL state does this also. Driver must set up 883 * new station table before transmitting anything on the RXON channel 884 * (except active scans or active measurements; those commands carry 885 * their own txpower/rate setup data). 886 * 887 * When getting started on a new channel, driver must set up the 888 * IWL_BROADCAST_ID entry (last entry in the table). For a client 889 * station in a BSS, once an AP is selected, driver sets up the AP STA 890 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP 891 * are all that are needed for a BSS client station. If the device is 892 * used as AP, or in an IBSS network, driver must set up station table 893 * entries for all STAs in network, starting with index IWL_STA_ID. 894 */ 895 896 struct iwl_addsta_cmd { 897 u8 mode; /* 1: modify existing, 0: add new station */ 898 u8 reserved[3]; 899 struct sta_id_modify sta; 900 struct iwl_keyinfo key; 901 __le32 station_flags; /* STA_FLG_* */ 902 __le32 station_flags_msk; /* STA_FLG_* */ 903 904 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) 905 * corresponding to bit (e.g. bit 5 controls TID 5). 906 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ 907 __le16 tid_disable_tx; 908 __le16 legacy_reserved; 909 910 /* TID for which to add block-ack support. 911 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 912 u8 add_immediate_ba_tid; 913 914 /* TID for which to remove block-ack support. 915 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ 916 u8 remove_immediate_ba_tid; 917 918 /* Starting Sequence Number for added block-ack support. 919 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 920 __le16 add_immediate_ba_ssn; 921 922 /* 923 * Number of packets OK to transmit to station even though 924 * it is asleep -- used to synchronise PS-poll and u-APSD 925 * responses while ucode keeps track of STA sleep state. 926 */ 927 __le16 sleep_tx_count; 928 929 __le16 reserved2; 930 } __packed; 931 932 933 #define ADD_STA_SUCCESS_MSK 0x1 934 #define ADD_STA_NO_ROOM_IN_TABLE 0x2 935 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 936 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8 937 /* 938 * REPLY_ADD_STA = 0x18 (response) 939 */ 940 struct iwl_add_sta_resp { 941 u8 status; /* ADD_STA_* */ 942 } __packed; 943 944 #define REM_STA_SUCCESS_MSK 0x1 945 /* 946 * REPLY_REM_STA = 0x19 (response) 947 */ 948 struct iwl_rem_sta_resp { 949 u8 status; 950 } __packed; 951 952 /* 953 * REPLY_REM_STA = 0x19 (command) 954 */ 955 struct iwl_rem_sta_cmd { 956 u8 num_sta; /* number of removed stations */ 957 u8 reserved[3]; 958 u8 addr[ETH_ALEN]; /* MAC addr of the first station */ 959 u8 reserved2[2]; 960 } __packed; 961 962 963 /* WiFi queues mask */ 964 #define IWL_SCD_BK_MSK BIT(0) 965 #define IWL_SCD_BE_MSK BIT(1) 966 #define IWL_SCD_VI_MSK BIT(2) 967 #define IWL_SCD_VO_MSK BIT(3) 968 #define IWL_SCD_MGMT_MSK BIT(3) 969 970 /* PAN queues mask */ 971 #define IWL_PAN_SCD_BK_MSK BIT(4) 972 #define IWL_PAN_SCD_BE_MSK BIT(5) 973 #define IWL_PAN_SCD_VI_MSK BIT(6) 974 #define IWL_PAN_SCD_VO_MSK BIT(7) 975 #define IWL_PAN_SCD_MGMT_MSK BIT(7) 976 #define IWL_PAN_SCD_MULTICAST_MSK BIT(8) 977 978 #define IWL_AGG_TX_QUEUE_MSK 0xffc00 979 980 #define IWL_DROP_ALL BIT(1) 981 982 /* 983 * REPLY_TXFIFO_FLUSH = 0x1e(command and response) 984 * 985 * When using full FIFO flush this command checks the scheduler HW block WR/RD 986 * pointers to check if all the frames were transferred by DMA into the 987 * relevant TX FIFO queue. Only when the DMA is finished and the queue is 988 * empty the command can finish. 989 * This command is used to flush the TXFIFO from transmit commands, it may 990 * operate on single or multiple queues, the command queue can't be flushed by 991 * this command. The command response is returned when all the queue flush 992 * operations are done. Each TX command flushed return response with the FLUSH 993 * status set in the TX response status. When FIFO flush operation is used, 994 * the flush operation ends when both the scheduler DMA done and TXFIFO empty 995 * are set. 996 * 997 * @queue_control: bit mask for which queues to flush 998 * @flush_control: flush controls 999 * 0: Dump single MSDU 1000 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable. 1001 * 2: Dump all FIFO 1002 */ 1003 struct iwl_txfifo_flush_cmd_v3 { 1004 __le32 queue_control; 1005 __le16 flush_control; 1006 __le16 reserved; 1007 } __packed; 1008 1009 struct iwl_txfifo_flush_cmd_v2 { 1010 __le16 queue_control; 1011 __le16 flush_control; 1012 } __packed; 1013 1014 /* 1015 * REPLY_WEP_KEY = 0x20 1016 */ 1017 struct iwl_wep_key { 1018 u8 key_index; 1019 u8 key_offset; 1020 u8 reserved1[2]; 1021 u8 key_size; 1022 u8 reserved2[3]; 1023 u8 key[16]; 1024 } __packed; 1025 1026 struct iwl_wep_cmd { 1027 u8 num_keys; 1028 u8 global_key_type; 1029 u8 flags; 1030 u8 reserved; 1031 struct iwl_wep_key key[0]; 1032 } __packed; 1033 1034 #define WEP_KEY_WEP_TYPE 1 1035 #define WEP_KEYS_MAX 4 1036 #define WEP_INVALID_OFFSET 0xff 1037 #define WEP_KEY_LEN_64 5 1038 #define WEP_KEY_LEN_128 13 1039 1040 /****************************************************************************** 1041 * (4) 1042 * Rx Responses: 1043 * 1044 *****************************************************************************/ 1045 1046 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) 1047 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) 1048 1049 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) 1050 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) 1051 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) 1052 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) 1053 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70 1054 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4 1055 #define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7) 1056 1057 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) 1058 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) 1059 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) 1060 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) 1061 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) 1062 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8) 1063 1064 #define RX_RES_STATUS_STATION_FOUND (1<<6) 1065 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7) 1066 1067 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) 1068 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) 1069 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) 1070 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) 1071 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) 1072 1073 #define RX_MPDU_RES_STATUS_ICV_OK (0x20) 1074 #define RX_MPDU_RES_STATUS_MIC_OK (0x40) 1075 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) 1076 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) 1077 1078 1079 #define IWLAGN_RX_RES_PHY_CNT 8 1080 #define IWLAGN_RX_RES_AGC_IDX 1 1081 #define IWLAGN_RX_RES_RSSI_AB_IDX 2 1082 #define IWLAGN_RX_RES_RSSI_C_IDX 3 1083 #define IWLAGN_OFDM_AGC_MSK 0xfe00 1084 #define IWLAGN_OFDM_AGC_BIT_POS 9 1085 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff 1086 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00 1087 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0 1088 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000 1089 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000 1090 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16 1091 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff 1092 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00 1093 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0 1094 1095 struct iwlagn_non_cfg_phy { 1096 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */ 1097 } __packed; 1098 1099 1100 /* 1101 * REPLY_RX = 0xc3 (response only, not a command) 1102 * Used only for legacy (non 11n) frames. 1103 */ 1104 struct iwl_rx_phy_res { 1105 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ 1106 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ 1107 u8 stat_id; /* configurable DSP phy data set ID */ 1108 u8 reserved1; 1109 __le64 timestamp; /* TSF at on air rise */ 1110 __le32 beacon_time_stamp; /* beacon at on-air rise */ 1111 __le16 phy_flags; /* general phy flags: band, modulation, ... */ 1112 __le16 channel; /* channel number */ 1113 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ 1114 __le32 rate_n_flags; /* RATE_MCS_* */ 1115 __le16 byte_count; /* frame's byte-count */ 1116 __le16 frame_time; /* frame's time on the air */ 1117 } __packed; 1118 1119 struct iwl_rx_mpdu_res_start { 1120 __le16 byte_count; 1121 __le16 reserved; 1122 } __packed; 1123 1124 1125 /****************************************************************************** 1126 * (5) 1127 * Tx Commands & Responses: 1128 * 1129 * Driver must place each REPLY_TX command into one of the prioritized Tx 1130 * queues in host DRAM, shared between driver and device (see comments for 1131 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode 1132 * are preparing to transmit, the device pulls the Tx command over the PCI 1133 * bus via one of the device's Tx DMA channels, to fill an internal FIFO 1134 * from which data will be transmitted. 1135 * 1136 * uCode handles all timing and protocol related to control frames 1137 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler 1138 * handle reception of block-acks; uCode updates the host driver via 1139 * REPLY_COMPRESSED_BA. 1140 * 1141 * uCode handles retrying Tx when an ACK is expected but not received. 1142 * This includes trying lower data rates than the one requested in the Tx 1143 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn). 1144 * 1145 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. 1146 * This command must be executed after every RXON command, before Tx can occur. 1147 *****************************************************************************/ 1148 1149 /* REPLY_TX Tx flags field */ 1150 1151 /* 1152 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it 1153 * before this frame. if CTS-to-self required check 1154 * RXON_FLG_SELF_CTS_EN status. 1155 */ 1156 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0) 1157 1158 /* 1: Expect ACK from receiving station 1159 * 0: Don't expect ACK (MAC header's duration field s/b 0) 1160 * Set this for unicast frames, but not broadcast/multicast. */ 1161 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) 1162 1163 /* For agn devices: 1164 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). 1165 * Tx command's initial_rate_index indicates first rate to try; 1166 * uCode walks through table for additional Tx attempts. 1167 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. 1168 * This rate will be used for all Tx attempts; it will not be scaled. */ 1169 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) 1170 1171 /* 1: Expect immediate block-ack. 1172 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ 1173 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) 1174 1175 /* Tx antenna selection field; reserved (0) for agn devices. */ 1176 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) 1177 1178 /* 1: Ignore Bluetooth priority for this frame. 1179 * 0: Delay Tx until Bluetooth device is done (normal usage). */ 1180 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12) 1181 1182 /* 1: uCode overrides sequence control field in MAC header. 1183 * 0: Driver provides sequence control field in MAC header. 1184 * Set this for management frames, non-QOS data frames, non-unicast frames, 1185 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ 1186 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) 1187 1188 /* 1: This frame is non-last MPDU; more fragments are coming. 1189 * 0: Last fragment, or not using fragmentation. */ 1190 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) 1191 1192 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. 1193 * 0: No TSF required in outgoing frame. 1194 * Set this for transmitting beacons and probe responses. */ 1195 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) 1196 1197 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword 1198 * alignment of frame's payload data field. 1199 * 0: No pad 1200 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 1201 * field (but not both). Driver must align frame data (i.e. data following 1202 * MAC header) to DWORD boundary. */ 1203 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) 1204 1205 /* accelerate aggregation support 1206 * 0 - no CCMP encryption; 1 - CCMP encryption */ 1207 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22) 1208 1209 /* HCCA-AP - disable duration overwriting. */ 1210 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) 1211 1212 1213 /* 1214 * TX command security control 1215 */ 1216 #define TX_CMD_SEC_WEP 0x01 1217 #define TX_CMD_SEC_CCM 0x02 1218 #define TX_CMD_SEC_TKIP 0x03 1219 #define TX_CMD_SEC_MSK 0x03 1220 #define TX_CMD_SEC_SHIFT 6 1221 #define TX_CMD_SEC_KEY128 0x08 1222 1223 /* 1224 * REPLY_TX = 0x1c (command) 1225 */ 1226 1227 /* 1228 * Used for managing Tx retries when expecting block-acks. 1229 * Driver should set these fields to 0. 1230 */ 1231 struct iwl_dram_scratch { 1232 u8 try_cnt; /* Tx attempts */ 1233 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ 1234 __le16 reserved; 1235 } __packed; 1236 1237 struct iwl_tx_cmd { 1238 /* 1239 * MPDU byte count: 1240 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, 1241 * + 8 byte IV for CCM or TKIP (not used for WEP) 1242 * + Data payload 1243 * + 8-byte MIC (not used for CCM/WEP) 1244 * NOTE: Does not include Tx command bytes, post-MAC pad bytes, 1245 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i 1246 * Range: 14-2342 bytes. 1247 */ 1248 __le16 len; 1249 1250 /* 1251 * MPDU or MSDU byte count for next frame. 1252 * Used for fragmentation and bursting, but not 11n aggregation. 1253 * Same as "len", but for next frame. Set to 0 if not applicable. 1254 */ 1255 __le16 next_frame_len; 1256 1257 __le32 tx_flags; /* TX_CMD_FLG_* */ 1258 1259 /* uCode may modify this field of the Tx command (in host DRAM!). 1260 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */ 1261 struct iwl_dram_scratch scratch; 1262 1263 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */ 1264 __le32 rate_n_flags; /* RATE_MCS_* */ 1265 1266 /* Index of destination station in uCode's station table */ 1267 u8 sta_id; 1268 1269 /* Type of security encryption: CCM or TKIP */ 1270 u8 sec_ctl; /* TX_CMD_SEC_* */ 1271 1272 /* 1273 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial 1274 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for 1275 * data frames, this field may be used to selectively reduce initial 1276 * rate (via non-0 value) for special frames (e.g. management), while 1277 * still supporting rate scaling for all frames. 1278 */ 1279 u8 initial_rate_index; 1280 u8 reserved; 1281 u8 key[16]; 1282 __le16 next_frame_flags; 1283 __le16 reserved2; 1284 union { 1285 __le32 life_time; 1286 __le32 attempt; 1287 } stop_time; 1288 1289 /* Host DRAM physical address pointer to "scratch" in this command. 1290 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */ 1291 __le32 dram_lsb_ptr; 1292 u8 dram_msb_ptr; 1293 1294 u8 rts_retry_limit; /*byte 50 */ 1295 u8 data_retry_limit; /*byte 51 */ 1296 u8 tid_tspec; 1297 union { 1298 __le16 pm_frame_timeout; 1299 __le16 attempt_duration; 1300 } timeout; 1301 1302 /* 1303 * Duration of EDCA burst Tx Opportunity, in 32-usec units. 1304 * Set this if txop time is not specified by HCCA protocol (e.g. by AP). 1305 */ 1306 __le16 driver_txop; 1307 1308 /* 1309 * MAC header goes here, followed by 2 bytes padding if MAC header 1310 * length is 26 or 30 bytes, followed by payload data 1311 */ 1312 u8 payload[0]; 1313 struct ieee80211_hdr hdr[0]; 1314 } __packed; 1315 1316 /* 1317 * TX command response is sent after *agn* transmission attempts. 1318 * 1319 * both postpone and abort status are expected behavior from uCode. there is 1320 * no special operation required from driver; except for RFKILL_FLUSH, 1321 * which required tx flush host command to flush all the tx frames in queues 1322 */ 1323 enum { 1324 TX_STATUS_SUCCESS = 0x01, 1325 TX_STATUS_DIRECT_DONE = 0x02, 1326 /* postpone TX */ 1327 TX_STATUS_POSTPONE_DELAY = 0x40, 1328 TX_STATUS_POSTPONE_FEW_BYTES = 0x41, 1329 TX_STATUS_POSTPONE_BT_PRIO = 0x42, 1330 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43, 1331 TX_STATUS_POSTPONE_CALC_TTAK = 0x44, 1332 /* abort TX */ 1333 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81, 1334 TX_STATUS_FAIL_SHORT_LIMIT = 0x82, 1335 TX_STATUS_FAIL_LONG_LIMIT = 0x83, 1336 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, 1337 TX_STATUS_FAIL_DRAIN_FLOW = 0x85, 1338 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86, 1339 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, 1340 TX_STATUS_FAIL_DEST_PS = 0x88, 1341 TX_STATUS_FAIL_HOST_ABORTED = 0x89, 1342 TX_STATUS_FAIL_BT_RETRY = 0x8a, 1343 TX_STATUS_FAIL_STA_INVALID = 0x8b, 1344 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, 1345 TX_STATUS_FAIL_TID_DISABLE = 0x8d, 1346 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e, 1347 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, 1348 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90, 1349 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, 1350 }; 1351 1352 #define TX_PACKET_MODE_REGULAR 0x0000 1353 #define TX_PACKET_MODE_BURST_SEQ 0x0100 1354 #define TX_PACKET_MODE_BURST_FIRST 0x0200 1355 1356 enum { 1357 TX_POWER_PA_NOT_ACTIVE = 0x0, 1358 }; 1359 1360 enum { 1361 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ 1362 TX_STATUS_DELAY_MSK = 0x00000040, 1363 TX_STATUS_ABORT_MSK = 0x00000080, 1364 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ 1365 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ 1366 TX_RESERVED = 0x00780000, /* bits 19:22 */ 1367 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ 1368 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ 1369 }; 1370 1371 /* ******************************* 1372 * TX aggregation status 1373 ******************************* */ 1374 1375 enum { 1376 AGG_TX_STATE_TRANSMITTED = 0x00, 1377 AGG_TX_STATE_UNDERRUN_MSK = 0x01, 1378 AGG_TX_STATE_BT_PRIO_MSK = 0x02, 1379 AGG_TX_STATE_FEW_BYTES_MSK = 0x04, 1380 AGG_TX_STATE_ABORT_MSK = 0x08, 1381 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10, 1382 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20, 1383 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40, 1384 AGG_TX_STATE_SCD_QUERY_MSK = 0x80, 1385 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100, 1386 AGG_TX_STATE_RESPONSE_MSK = 0x1ff, 1387 AGG_TX_STATE_DUMP_TX_MSK = 0x200, 1388 AGG_TX_STATE_DELAY_TX_MSK = 0x400 1389 }; 1390 1391 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */ 1392 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */ 1393 #define AGG_TX_TRY_POS 12 1394 1395 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \ 1396 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \ 1397 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK) 1398 1399 /* # tx attempts for first frame in aggregation */ 1400 #define AGG_TX_STATE_TRY_CNT_POS 12 1401 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000 1402 1403 /* Command ID and sequence number of Tx command for this frame */ 1404 #define AGG_TX_STATE_SEQ_NUM_POS 16 1405 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000 1406 1407 /* 1408 * REPLY_TX = 0x1c (response) 1409 * 1410 * This response may be in one of two slightly different formats, indicated 1411 * by the frame_count field: 1412 * 1413 * 1) No aggregation (frame_count == 1). This reports Tx results for 1414 * a single frame. Multiple attempts, at various bit rates, may have 1415 * been made for this frame. 1416 * 1417 * 2) Aggregation (frame_count > 1). This reports Tx results for 1418 * 2 or more frames that used block-acknowledge. All frames were 1419 * transmitted at same rate. Rate scaling may have been used if first 1420 * frame in this new agg block failed in previous agg block(s). 1421 * 1422 * Note that, for aggregation, ACK (block-ack) status is not delivered here; 1423 * block-ack has not been received by the time the agn device records 1424 * this status. 1425 * This status relates to reasons the tx might have been blocked or aborted 1426 * within the sending station (this agn device), rather than whether it was 1427 * received successfully by the destination station. 1428 */ 1429 struct agg_tx_status { 1430 __le16 status; 1431 __le16 sequence; 1432 } __packed; 1433 1434 /* refer to ra_tid */ 1435 #define IWLAGN_TX_RES_TID_POS 0 1436 #define IWLAGN_TX_RES_TID_MSK 0x0f 1437 #define IWLAGN_TX_RES_RA_POS 4 1438 #define IWLAGN_TX_RES_RA_MSK 0xf0 1439 1440 struct iwlagn_tx_resp { 1441 u8 frame_count; /* 1 no aggregation, >1 aggregation */ 1442 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ 1443 u8 failure_rts; /* # failures due to unsuccessful RTS */ 1444 u8 failure_frame; /* # failures due to no ACK (unused for agg) */ 1445 1446 /* For non-agg: Rate at which frame was successful. 1447 * For agg: Rate at which all frames were transmitted. */ 1448 __le32 rate_n_flags; /* RATE_MCS_* */ 1449 1450 /* For non-agg: RTS + CTS + frame tx attempts time + ACK. 1451 * For agg: RTS + CTS + aggregation tx time + block-ack time. */ 1452 __le16 wireless_media_time; /* uSecs */ 1453 1454 u8 pa_status; /* RF power amplifier measurement (not used) */ 1455 u8 pa_integ_res_a[3]; 1456 u8 pa_integ_res_b[3]; 1457 u8 pa_integ_res_C[3]; 1458 1459 __le32 tfd_info; 1460 __le16 seq_ctl; 1461 __le16 byte_cnt; 1462 u8 tlc_info; 1463 u8 ra_tid; /* tid (0:3), sta_id (4:7) */ 1464 __le16 frame_ctrl; 1465 /* 1466 * For non-agg: frame status TX_STATUS_* 1467 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status 1468 * fields follow this one, up to frame_count. 1469 * Bit fields: 1470 * 11- 0: AGG_TX_STATE_* status code 1471 * 15-12: Retry count for 1st frame in aggregation (retries 1472 * occur if tx failed for this frame when it was a 1473 * member of a previous aggregation block). If rate 1474 * scaling is used, retry count indicates the rate 1475 * table entry used for all frames in the new agg. 1476 * 31-16: Sequence # for this frame's Tx cmd (not SSN!) 1477 */ 1478 struct agg_tx_status status; /* TX status (in aggregation - 1479 * status of 1st frame) */ 1480 } __packed; 1481 /* 1482 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) 1483 * 1484 * Reports Block-Acknowledge from recipient station 1485 */ 1486 struct iwl_compressed_ba_resp { 1487 __le32 sta_addr_lo32; 1488 __le16 sta_addr_hi16; 1489 __le16 reserved; 1490 1491 /* Index of recipient (BA-sending) station in uCode's station table */ 1492 u8 sta_id; 1493 u8 tid; 1494 __le16 seq_ctl; 1495 __le64 bitmap; 1496 __le16 scd_flow; 1497 __le16 scd_ssn; 1498 u8 txed; /* number of frames sent */ 1499 u8 txed_2_done; /* number of frames acked */ 1500 __le16 reserved1; 1501 } __packed; 1502 1503 /* 1504 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) 1505 * 1506 */ 1507 1508 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ 1509 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) 1510 1511 /* # of EDCA prioritized tx fifos */ 1512 #define LINK_QUAL_AC_NUM AC_NUM 1513 1514 /* # entries in rate scale table to support Tx retries */ 1515 #define LINK_QUAL_MAX_RETRY_NUM 16 1516 1517 /* Tx antenna selection values */ 1518 #define LINK_QUAL_ANT_A_MSK (1 << 0) 1519 #define LINK_QUAL_ANT_B_MSK (1 << 1) 1520 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) 1521 1522 1523 /** 1524 * struct iwl_link_qual_general_params 1525 * 1526 * Used in REPLY_TX_LINK_QUALITY_CMD 1527 */ 1528 struct iwl_link_qual_general_params { 1529 u8 flags; 1530 1531 /* No entries at or above this (driver chosen) index contain MIMO */ 1532 u8 mimo_delimiter; 1533 1534 /* Best single antenna to use for single stream (legacy, SISO). */ 1535 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1536 1537 /* Best antennas to use for MIMO */ 1538 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ 1539 1540 /* 1541 * If driver needs to use different initial rates for different 1542 * EDCA QOS access categories (as implemented by tx fifos 0-3), 1543 * this table will set that up, by indicating the indexes in the 1544 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start. 1545 * Otherwise, driver should set all entries to 0. 1546 * 1547 * Entry usage: 1548 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice 1549 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. 1550 */ 1551 u8 start_rate_index[LINK_QUAL_AC_NUM]; 1552 } __packed; 1553 1554 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ 1555 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) 1556 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) 1557 1558 #define LINK_QUAL_AGG_DISABLE_START_DEF (3) 1559 #define LINK_QUAL_AGG_DISABLE_START_MAX (255) 1560 #define LINK_QUAL_AGG_DISABLE_START_MIN (0) 1561 1562 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) 1563 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) 1564 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) 1565 1566 /** 1567 * struct iwl_link_qual_agg_params 1568 * 1569 * Used in REPLY_TX_LINK_QUALITY_CMD 1570 */ 1571 struct iwl_link_qual_agg_params { 1572 1573 /* 1574 *Maximum number of uSec in aggregation. 1575 * default set to 4000 (4 milliseconds) if not configured in .cfg 1576 */ 1577 __le16 agg_time_limit; 1578 1579 /* 1580 * Number of Tx retries allowed for a frame, before that frame will 1581 * no longer be considered for the start of an aggregation sequence 1582 * (scheduler will then try to tx it as single frame). 1583 * Driver should set this to 3. 1584 */ 1585 u8 agg_dis_start_th; 1586 1587 /* 1588 * Maximum number of frames in aggregation. 1589 * 0 = no limit (default). 1 = no aggregation. 1590 * Other values = max # frames in aggregation. 1591 */ 1592 u8 agg_frame_cnt_limit; 1593 1594 __le32 reserved; 1595 } __packed; 1596 1597 /* 1598 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) 1599 * 1600 * For agn devices 1601 * 1602 * Each station in the agn device's internal station table has its own table 1603 * of 16 1604 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when 1605 * an ACK is not received. This command replaces the entire table for 1606 * one station. 1607 * 1608 * NOTE: Station must already be in agn device's station table. 1609 * Use REPLY_ADD_STA. 1610 * 1611 * The rate scaling procedures described below work well. Of course, other 1612 * procedures are possible, and may work better for particular environments. 1613 * 1614 * 1615 * FILLING THE RATE TABLE 1616 * 1617 * Given a particular initial rate and mode, as determined by the rate 1618 * scaling algorithm described below, the Linux driver uses the following 1619 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the 1620 * Link Quality command: 1621 * 1622 * 1623 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate: 1624 * a) Use this same initial rate for first 3 entries. 1625 * b) Find next lower available rate using same mode (SISO or MIMO), 1626 * use for next 3 entries. If no lower rate available, switch to 1627 * legacy mode (no HT40 channel, no MIMO, no short guard interval). 1628 * c) If using MIMO, set command's mimo_delimiter to number of entries 1629 * using MIMO (3 or 6). 1630 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel, 1631 * no MIMO, no short guard interval), at the next lower bit rate 1632 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow 1633 * legacy procedure for remaining table entries. 1634 * 1635 * 2) If using legacy initial rate: 1636 * a) Use the initial rate for only one entry. 1637 * b) For each following entry, reduce the rate to next lower available 1638 * rate, until reaching the lowest available rate. 1639 * c) When reducing rate, also switch antenna selection. 1640 * d) Once lowest available rate is reached, repeat this rate until 1641 * rate table is filled (16 entries), switching antenna each entry. 1642 * 1643 * 1644 * ACCUMULATING HISTORY 1645 * 1646 * The rate scaling algorithm for agn devices, as implemented in Linux driver, 1647 * uses two sets of frame Tx success history: One for the current/active 1648 * modulation mode, and one for a speculative/search mode that is being 1649 * attempted. If the speculative mode turns out to be more effective (i.e. 1650 * actual transfer rate is better), then the driver continues to use the 1651 * speculative mode as the new current active mode. 1652 * 1653 * Each history set contains, separately for each possible rate, data for a 1654 * sliding window of the 62 most recent tx attempts at that rate. The data 1655 * includes a shifting bitmap of success(1)/failure(0), and sums of successful 1656 * and attempted frames, from which the driver can additionally calculate a 1657 * success ratio (success / attempted) and number of failures 1658 * (attempted - success), and control the size of the window (attempted). 1659 * The driver uses the bit map to remove successes from the success sum, as 1660 * the oldest tx attempts fall out of the window. 1661 * 1662 * When the agn device makes multiple tx attempts for a given frame, each 1663 * attempt might be at a different rate, and have different modulation 1664 * characteristics (e.g. antenna, fat channel, short guard interval), as set 1665 * up in the rate scaling table in the Link Quality command. The driver must 1666 * determine which rate table entry was used for each tx attempt, to determine 1667 * which rate-specific history to update, and record only those attempts that 1668 * match the modulation characteristics of the history set. 1669 * 1670 * When using block-ack (aggregation), all frames are transmitted at the same 1671 * rate, since there is no per-attempt acknowledgment from the destination 1672 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in 1673 * rate_n_flags field. After receiving a block-ack, the driver can update 1674 * history for the entire block all at once. 1675 * 1676 * 1677 * FINDING BEST STARTING RATE: 1678 * 1679 * When working with a selected initial modulation mode (see below), the 1680 * driver attempts to find a best initial rate. The initial rate is the 1681 * first entry in the Link Quality command's rate table. 1682 * 1683 * 1) Calculate actual throughput (success ratio * expected throughput, see 1684 * table below) for current initial rate. Do this only if enough frames 1685 * have been attempted to make the value meaningful: at least 6 failed 1686 * tx attempts, or at least 8 successes. If not enough, don't try rate 1687 * scaling yet. 1688 * 1689 * 2) Find available rates adjacent to current initial rate. Available means: 1690 * a) supported by hardware && 1691 * b) supported by association && 1692 * c) within any constraints selected by user 1693 * 1694 * 3) Gather measured throughputs for adjacent rates. These might not have 1695 * enough history to calculate a throughput. That's okay, we might try 1696 * using one of them anyway! 1697 * 1698 * 4) Try decreasing rate if, for current rate: 1699 * a) success ratio is < 15% || 1700 * b) lower adjacent rate has better measured throughput || 1701 * c) higher adjacent rate has worse throughput, and lower is unmeasured 1702 * 1703 * As a sanity check, if decrease was determined above, leave rate 1704 * unchanged if: 1705 * a) lower rate unavailable 1706 * b) success ratio at current rate > 85% (very good) 1707 * c) current measured throughput is better than expected throughput 1708 * of lower rate (under perfect 100% tx conditions, see table below) 1709 * 1710 * 5) Try increasing rate if, for current rate: 1711 * a) success ratio is < 15% || 1712 * b) both adjacent rates' throughputs are unmeasured (try it!) || 1713 * b) higher adjacent rate has better measured throughput || 1714 * c) lower adjacent rate has worse throughput, and higher is unmeasured 1715 * 1716 * As a sanity check, if increase was determined above, leave rate 1717 * unchanged if: 1718 * a) success ratio at current rate < 70%. This is not particularly 1719 * good performance; higher rate is sure to have poorer success. 1720 * 1721 * 6) Re-evaluate the rate after each tx frame. If working with block- 1722 * acknowledge, history and statistics may be calculated for the entire 1723 * block (including prior history that fits within the history windows), 1724 * before re-evaluation. 1725 * 1726 * FINDING BEST STARTING MODULATION MODE: 1727 * 1728 * After working with a modulation mode for a "while" (and doing rate scaling), 1729 * the driver searches for a new initial mode in an attempt to improve 1730 * throughput. The "while" is measured by numbers of attempted frames: 1731 * 1732 * For legacy mode, search for new mode after: 1733 * 480 successful frames, or 160 failed frames 1734 * For high-throughput modes (SISO or MIMO), search for new mode after: 1735 * 4500 successful frames, or 400 failed frames 1736 * 1737 * Mode switch possibilities are (3 for each mode): 1738 * 1739 * For legacy: 1740 * Change antenna, try SISO (if HT association), try MIMO (if HT association) 1741 * For SISO: 1742 * Change antenna, try MIMO, try shortened guard interval (SGI) 1743 * For MIMO: 1744 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI) 1745 * 1746 * When trying a new mode, use the same bit rate as the old/current mode when 1747 * trying antenna switches and shortened guard interval. When switching to 1748 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate 1749 * for which the expected throughput (under perfect conditions) is about the 1750 * same or slightly better than the actual measured throughput delivered by 1751 * the old/current mode. 1752 * 1753 * Actual throughput can be estimated by multiplying the expected throughput 1754 * by the success ratio (successful / attempted tx frames). Frame size is 1755 * not considered in this calculation; it assumes that frame size will average 1756 * out to be fairly consistent over several samples. The following are 1757 * metric values for expected throughput assuming 100% success ratio. 1758 * Only G band has support for CCK rates: 1759 * 1760 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60 1761 * 1762 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186 1763 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186 1764 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202 1765 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211 1766 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251 1767 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257 1768 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257 1769 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264 1770 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289 1771 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293 1772 * 1773 * After the new mode has been tried for a short while (minimum of 6 failed 1774 * frames or 8 successful frames), compare success ratio and actual throughput 1775 * estimate of the new mode with the old. If either is better with the new 1776 * mode, continue to use the new mode. 1777 * 1778 * Continue comparing modes until all 3 possibilities have been tried. 1779 * If moving from legacy to HT, try all 3 possibilities from the new HT 1780 * mode. After trying all 3, a best mode is found. Continue to use this mode 1781 * for the longer "while" described above (e.g. 480 successful frames for 1782 * legacy), and then repeat the search process. 1783 * 1784 */ 1785 struct iwl_link_quality_cmd { 1786 1787 /* Index of destination/recipient station in uCode's station table */ 1788 u8 sta_id; 1789 u8 reserved1; 1790 __le16 control; /* not used */ 1791 struct iwl_link_qual_general_params general_params; 1792 struct iwl_link_qual_agg_params agg_params; 1793 1794 /* 1795 * Rate info; when using rate-scaling, Tx command's initial_rate_index 1796 * specifies 1st Tx rate attempted, via index into this table. 1797 * agn devices works its way through table when retrying Tx. 1798 */ 1799 struct { 1800 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ 1801 } rs_table[LINK_QUAL_MAX_RETRY_NUM]; 1802 __le32 reserved2; 1803 } __packed; 1804 1805 /* 1806 * BT configuration enable flags: 1807 * bit 0 - 1: BT channel announcement enabled 1808 * 0: disable 1809 * bit 1 - 1: priority of BT device enabled 1810 * 0: disable 1811 * bit 2 - 1: BT 2 wire support enabled 1812 * 0: disable 1813 */ 1814 #define BT_COEX_DISABLE (0x0) 1815 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0) 1816 #define BT_ENABLE_PRIORITY BIT(1) 1817 #define BT_ENABLE_2_WIRE BIT(2) 1818 1819 #define BT_COEX_DISABLE (0x0) 1820 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY) 1821 1822 #define BT_LEAD_TIME_MIN (0x0) 1823 #define BT_LEAD_TIME_DEF (0x1E) 1824 #define BT_LEAD_TIME_MAX (0xFF) 1825 1826 #define BT_MAX_KILL_MIN (0x1) 1827 #define BT_MAX_KILL_DEF (0x5) 1828 #define BT_MAX_KILL_MAX (0xFF) 1829 1830 #define BT_DURATION_LIMIT_DEF 625 1831 #define BT_DURATION_LIMIT_MAX 1250 1832 #define BT_DURATION_LIMIT_MIN 625 1833 1834 #define BT_ON_THRESHOLD_DEF 4 1835 #define BT_ON_THRESHOLD_MAX 1000 1836 #define BT_ON_THRESHOLD_MIN 1 1837 1838 #define BT_FRAG_THRESHOLD_DEF 0 1839 #define BT_FRAG_THRESHOLD_MAX 0 1840 #define BT_FRAG_THRESHOLD_MIN 0 1841 1842 #define BT_AGG_THRESHOLD_DEF 1200 1843 #define BT_AGG_THRESHOLD_MAX 8000 1844 #define BT_AGG_THRESHOLD_MIN 400 1845 1846 /* 1847 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) 1848 * 1849 * agn devices support hardware handshake with Bluetooth device on 1850 * same platform. Bluetooth device alerts wireless device when it will Tx; 1851 * wireless device can delay or kill its own Tx to accommodate. 1852 */ 1853 struct iwl_bt_cmd { 1854 u8 flags; 1855 u8 lead_time; 1856 u8 max_kill; 1857 u8 reserved; 1858 __le32 kill_ack_mask; 1859 __le32 kill_cts_mask; 1860 } __packed; 1861 1862 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0) 1863 1864 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5)) 1865 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3 1866 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0 1867 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1 1868 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2 1869 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3 1870 1871 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) 1872 /* Disable Sync PSPoll on SCO/eSCO */ 1873 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) 1874 1875 #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */ 1876 #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */ 1877 1878 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF 1879 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00 1880 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0 1881 #define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0 1882 1883 #define IWLAGN_BT_MAX_KILL_DEFAULT 5 1884 1885 #define IWLAGN_BT3_T7_DEFAULT 1 1886 1887 enum iwl_bt_kill_idx { 1888 IWL_BT_KILL_DEFAULT = 0, 1889 IWL_BT_KILL_OVERRIDE = 1, 1890 IWL_BT_KILL_REDUCE = 2, 1891 }; 1892 1893 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) 1894 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) 1895 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff) 1896 #define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0) 1897 1898 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 1899 1900 #define IWLAGN_BT3_T2_DEFAULT 0xc 1901 1902 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0)) 1903 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1)) 1904 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2)) 1905 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3)) 1906 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4)) 1907 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5)) 1908 #define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6)) 1909 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7)) 1910 1911 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \ 1912 IWLAGN_BT_VALID_BOOST | \ 1913 IWLAGN_BT_VALID_MAX_KILL | \ 1914 IWLAGN_BT_VALID_3W_TIMERS | \ 1915 IWLAGN_BT_VALID_KILL_ACK_MASK | \ 1916 IWLAGN_BT_VALID_KILL_CTS_MASK | \ 1917 IWLAGN_BT_VALID_REDUCED_TX_PWR | \ 1918 IWLAGN_BT_VALID_3W_LUT) 1919 1920 #define IWLAGN_BT_REDUCED_TX_PWR BIT(0) 1921 1922 #define IWLAGN_BT_DECISION_LUT_SIZE 12 1923 1924 struct iwl_basic_bt_cmd { 1925 u8 flags; 1926 u8 ledtime; /* unused */ 1927 u8 max_kill; 1928 u8 bt3_timer_t7_value; 1929 __le32 kill_ack_mask; 1930 __le32 kill_cts_mask; 1931 u8 bt3_prio_sample_time; 1932 u8 bt3_timer_t2_value; 1933 __le16 bt4_reaction_time; /* unused */ 1934 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE]; 1935 /* 1936 * bit 0: use reduced tx power for control frame 1937 * bit 1 - 7: reserved 1938 */ 1939 u8 reduce_txpower; 1940 u8 reserved; 1941 __le16 valid; 1942 }; 1943 1944 struct iwl_bt_cmd_v1 { 1945 struct iwl_basic_bt_cmd basic; 1946 u8 prio_boost; 1947 /* 1948 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1949 * if configure the following patterns 1950 */ 1951 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1952 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1953 }; 1954 1955 struct iwl_bt_cmd_v2 { 1956 struct iwl_basic_bt_cmd basic; 1957 __le32 prio_boost; 1958 /* 1959 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask 1960 * if configure the following patterns 1961 */ 1962 u8 reserved; 1963 u8 tx_prio_boost; /* SW boost of WiFi tx priority */ 1964 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */ 1965 }; 1966 1967 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0)) 1968 1969 struct iwlagn_bt_sco_cmd { 1970 __le32 flags; 1971 }; 1972 1973 /****************************************************************************** 1974 * (6) 1975 * Spectrum Management (802.11h) Commands, Responses, Notifications: 1976 * 1977 *****************************************************************************/ 1978 1979 /* 1980 * Spectrum Management 1981 */ 1982 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ 1983 RXON_FILTER_CTL2HOST_MSK | \ 1984 RXON_FILTER_ACCEPT_GRP_MSK | \ 1985 RXON_FILTER_DIS_DECRYPT_MSK | \ 1986 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ 1987 RXON_FILTER_ASSOC_MSK | \ 1988 RXON_FILTER_BCON_AWARE_MSK) 1989 1990 struct iwl_measure_channel { 1991 __le32 duration; /* measurement duration in extended beacon 1992 * format */ 1993 u8 channel; /* channel to measure */ 1994 u8 type; /* see enum iwl_measure_type */ 1995 __le16 reserved; 1996 } __packed; 1997 1998 /* 1999 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) 2000 */ 2001 struct iwl_spectrum_cmd { 2002 __le16 len; /* number of bytes starting from token */ 2003 u8 token; /* token id */ 2004 u8 id; /* measurement id -- 0 or 1 */ 2005 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ 2006 u8 periodic; /* 1 = periodic */ 2007 __le16 path_loss_timeout; 2008 __le32 start_time; /* start time in extended beacon format */ 2009 __le32 reserved2; 2010 __le32 flags; /* rxon flags */ 2011 __le32 filter_flags; /* rxon filter flags */ 2012 __le16 channel_count; /* minimum 1, maximum 10 */ 2013 __le16 reserved3; 2014 struct iwl_measure_channel channels[10]; 2015 } __packed; 2016 2017 /* 2018 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) 2019 */ 2020 struct iwl_spectrum_resp { 2021 u8 token; 2022 u8 id; /* id of the prior command replaced, or 0xff */ 2023 __le16 status; /* 0 - command will be handled 2024 * 1 - cannot handle (conflicts with another 2025 * measurement) */ 2026 } __packed; 2027 2028 enum iwl_measurement_state { 2029 IWL_MEASUREMENT_START = 0, 2030 IWL_MEASUREMENT_STOP = 1, 2031 }; 2032 2033 enum iwl_measurement_status { 2034 IWL_MEASUREMENT_OK = 0, 2035 IWL_MEASUREMENT_CONCURRENT = 1, 2036 IWL_MEASUREMENT_CSA_CONFLICT = 2, 2037 IWL_MEASUREMENT_TGH_CONFLICT = 3, 2038 /* 4-5 reserved */ 2039 IWL_MEASUREMENT_STOPPED = 6, 2040 IWL_MEASUREMENT_TIMEOUT = 7, 2041 IWL_MEASUREMENT_PERIODIC_FAILED = 8, 2042 }; 2043 2044 #define NUM_ELEMENTS_IN_HISTOGRAM 8 2045 2046 struct iwl_measurement_histogram { 2047 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ 2048 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ 2049 } __packed; 2050 2051 /* clear channel availability counters */ 2052 struct iwl_measurement_cca_counters { 2053 __le32 ofdm; 2054 __le32 cck; 2055 } __packed; 2056 2057 enum iwl_measure_type { 2058 IWL_MEASURE_BASIC = (1 << 0), 2059 IWL_MEASURE_CHANNEL_LOAD = (1 << 1), 2060 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), 2061 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), 2062 IWL_MEASURE_FRAME = (1 << 4), 2063 /* bits 5:6 are reserved */ 2064 IWL_MEASURE_IDLE = (1 << 7), 2065 }; 2066 2067 /* 2068 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) 2069 */ 2070 struct iwl_spectrum_notification { 2071 u8 id; /* measurement id -- 0 or 1 */ 2072 u8 token; 2073 u8 channel_index; /* index in measurement channel list */ 2074 u8 state; /* 0 - start, 1 - stop */ 2075 __le32 start_time; /* lower 32-bits of TSF */ 2076 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ 2077 u8 channel; 2078 u8 type; /* see enum iwl_measurement_type */ 2079 u8 reserved1; 2080 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only 2081 * valid if applicable for measurement type requested. */ 2082 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ 2083 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ 2084 __le32 cca_time; /* channel load time in usecs */ 2085 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - 2086 * unidentified */ 2087 u8 reserved2[3]; 2088 struct iwl_measurement_histogram histogram; 2089 __le32 stop_time; /* lower 32-bits of TSF */ 2090 __le32 status; /* see iwl_measurement_status */ 2091 } __packed; 2092 2093 /****************************************************************************** 2094 * (7) 2095 * Power Management Commands, Responses, Notifications: 2096 * 2097 *****************************************************************************/ 2098 2099 /** 2100 * struct iwl_powertable_cmd - Power Table Command 2101 * @flags: See below: 2102 * 2103 * POWER_TABLE_CMD = 0x77 (command, has simple generic response) 2104 * 2105 * PM allow: 2106 * bit 0 - '0' Driver not allow power management 2107 * '1' Driver allow PM (use rest of parameters) 2108 * 2109 * uCode send sleep notifications: 2110 * bit 1 - '0' Don't send sleep notification 2111 * '1' send sleep notification (SEND_PM_NOTIFICATION) 2112 * 2113 * Sleep over DTIM 2114 * bit 2 - '0' PM have to walk up every DTIM 2115 * '1' PM could sleep over DTIM till listen Interval. 2116 * 2117 * PCI power managed 2118 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1) 2119 * '1' !(PCI_CFG_LINK_CTRL & 0x1) 2120 * 2121 * Fast PD 2122 * bit 4 - '1' Put radio to sleep when receiving frame for others 2123 * 2124 * Force sleep Modes 2125 * bit 31/30- '00' use both mac/xtal sleeps 2126 * '01' force Mac sleep 2127 * '10' force xtal sleep 2128 * '11' Illegal set 2129 * 2130 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then 2131 * ucode assume sleep over DTIM is allowed and we don't need to wake up 2132 * for every DTIM. 2133 */ 2134 #define IWL_POWER_VEC_SIZE 5 2135 2136 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) 2137 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) 2138 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) 2139 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) 2140 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) 2141 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) 2142 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) 2143 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) 2144 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) 2145 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) 2146 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) 2147 2148 struct iwl_powertable_cmd { 2149 __le16 flags; 2150 u8 keep_alive_seconds; 2151 u8 debug_flags; 2152 __le32 rx_data_timeout; 2153 __le32 tx_data_timeout; 2154 __le32 sleep_interval[IWL_POWER_VEC_SIZE]; 2155 __le32 keep_alive_beacons; 2156 } __packed; 2157 2158 /* 2159 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) 2160 * all devices identical. 2161 */ 2162 struct iwl_sleep_notification { 2163 u8 pm_sleep_mode; 2164 u8 pm_wakeup_src; 2165 __le16 reserved; 2166 __le32 sleep_time; 2167 __le32 tsf_low; 2168 __le32 bcon_timer; 2169 } __packed; 2170 2171 /* Sleep states. all devices identical. */ 2172 enum { 2173 IWL_PM_NO_SLEEP = 0, 2174 IWL_PM_SLP_MAC = 1, 2175 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, 2176 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, 2177 IWL_PM_SLP_PHY = 4, 2178 IWL_PM_SLP_REPENT = 5, 2179 IWL_PM_WAKEUP_BY_TIMER = 6, 2180 IWL_PM_WAKEUP_BY_DRIVER = 7, 2181 IWL_PM_WAKEUP_BY_RFKILL = 8, 2182 /* 3 reserved */ 2183 IWL_PM_NUM_OF_MODES = 12, 2184 }; 2185 2186 /* 2187 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) 2188 */ 2189 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ 2190 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ 2191 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ 2192 struct iwl_card_state_cmd { 2193 __le32 status; /* CARD_STATE_CMD_* request new power state */ 2194 } __packed; 2195 2196 /* 2197 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) 2198 */ 2199 struct iwl_card_state_notif { 2200 __le32 flags; 2201 } __packed; 2202 2203 #define HW_CARD_DISABLED 0x01 2204 #define SW_CARD_DISABLED 0x02 2205 #define CT_CARD_DISABLED 0x04 2206 #define RXON_CARD_DISABLED 0x10 2207 2208 struct iwl_ct_kill_config { 2209 __le32 reserved; 2210 __le32 critical_temperature_M; 2211 __le32 critical_temperature_R; 2212 } __packed; 2213 2214 /* 1000, and 6x00 */ 2215 struct iwl_ct_kill_throttling_config { 2216 __le32 critical_temperature_exit; 2217 __le32 reserved; 2218 __le32 critical_temperature_enter; 2219 } __packed; 2220 2221 /****************************************************************************** 2222 * (8) 2223 * Scan Commands, Responses, Notifications: 2224 * 2225 *****************************************************************************/ 2226 2227 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0) 2228 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1) 2229 2230 /** 2231 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table 2232 * 2233 * One for each channel in the scan list. 2234 * Each channel can independently select: 2235 * 1) SSID for directed active scans 2236 * 2) Txpower setting (for rate specified within Tx command) 2237 * 3) How long to stay on-channel (behavior may be modified by quiet_time, 2238 * quiet_plcp_th, good_CRC_th) 2239 * 2240 * To avoid uCode errors, make sure the following are true (see comments 2241 * under struct iwl_scan_cmd about max_out_time and quiet_time): 2242 * 1) If using passive_dwell (i.e. passive_dwell != 0): 2243 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) 2244 * 2) quiet_time <= active_dwell 2245 * 3) If restricting off-channel time (i.e. max_out_time !=0): 2246 * passive_dwell < max_out_time 2247 * active_dwell < max_out_time 2248 */ 2249 2250 struct iwl_scan_channel { 2251 /* 2252 * type is defined as: 2253 * 0:0 1 = active, 0 = passive 2254 * 1:20 SSID direct bit map; if a bit is set, then corresponding 2255 * SSID IE is transmitted in probe request. 2256 * 21:31 reserved 2257 */ 2258 __le32 type; 2259 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */ 2260 u8 tx_gain; /* gain for analog radio */ 2261 u8 dsp_atten; /* gain for DSP */ 2262 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ 2263 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ 2264 } __packed; 2265 2266 /* set number of direct probes __le32 type */ 2267 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) 2268 2269 /** 2270 * struct iwl_ssid_ie - directed scan network information element 2271 * 2272 * Up to 20 of these may appear in REPLY_SCAN_CMD, 2273 * selected by "type" bit field in struct iwl_scan_channel; 2274 * each channel may select different ssids from among the 20 entries. 2275 * SSID IEs get transmitted in reverse order of entry. 2276 */ 2277 struct iwl_ssid_ie { 2278 u8 id; 2279 u8 len; 2280 u8 ssid[32]; 2281 } __packed; 2282 2283 #define PROBE_OPTION_MAX 20 2284 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2285 #define IWL_GOOD_CRC_TH_DISABLED 0 2286 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) 2287 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) 2288 #define IWL_MAX_CMD_SIZE 4096 2289 2290 /* 2291 * REPLY_SCAN_CMD = 0x80 (command) 2292 * 2293 * The hardware scan command is very powerful; the driver can set it up to 2294 * maintain (relatively) normal network traffic while doing a scan in the 2295 * background. The max_out_time and suspend_time control the ratio of how 2296 * long the device stays on an associated network channel ("service channel") 2297 * vs. how long it's away from the service channel, i.e. tuned to other channels 2298 * for scanning. 2299 * 2300 * max_out_time is the max time off-channel (in usec), and suspend_time 2301 * is how long (in "extended beacon" format) that the scan is "suspended" 2302 * after returning to the service channel. That is, suspend_time is the 2303 * time that we stay on the service channel, doing normal work, between 2304 * scan segments. The driver may set these parameters differently to support 2305 * scanning when associated vs. not associated, and light vs. heavy traffic 2306 * loads when associated. 2307 * 2308 * After receiving this command, the device's scan engine does the following; 2309 * 2310 * 1) Sends SCAN_START notification to driver 2311 * 2) Checks to see if it has time to do scan for one channel 2312 * 3) Sends NULL packet, with power-save (PS) bit set to 1, 2313 * to tell AP that we're going off-channel 2314 * 4) Tunes to first channel in scan list, does active or passive scan 2315 * 5) Sends SCAN_RESULT notification to driver 2316 * 6) Checks to see if it has time to do scan on *next* channel in list 2317 * 7) Repeats 4-6 until it no longer has time to scan the next channel 2318 * before max_out_time expires 2319 * 8) Returns to service channel 2320 * 9) Sends NULL packet with PS=0 to tell AP that we're back 2321 * 10) Stays on service channel until suspend_time expires 2322 * 11) Repeats entire process 2-10 until list is complete 2323 * 12) Sends SCAN_COMPLETE notification 2324 * 2325 * For fast, efficient scans, the scan command also has support for staying on 2326 * a channel for just a short time, if doing active scanning and getting no 2327 * responses to the transmitted probe request. This time is controlled by 2328 * quiet_time, and the number of received packets below which a channel is 2329 * considered "quiet" is controlled by quiet_plcp_threshold. 2330 * 2331 * For active scanning on channels that have regulatory restrictions against 2332 * blindly transmitting, the scan can listen before transmitting, to make sure 2333 * that there is already legitimate activity on the channel. If enough 2334 * packets are cleanly received on the channel (controlled by good_CRC_th, 2335 * typical value 1), the scan engine starts transmitting probe requests. 2336 * 2337 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. 2338 * 2339 * To avoid uCode errors, see timing restrictions described under 2340 * struct iwl_scan_channel. 2341 */ 2342 2343 enum iwl_scan_flags { 2344 /* BIT(0) currently unused */ 2345 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), 2346 /* bits 2-7 reserved */ 2347 }; 2348 2349 struct iwl_scan_cmd { 2350 __le16 len; 2351 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */ 2352 u8 channel_count; /* # channels in channel list */ 2353 __le16 quiet_time; /* dwell only this # millisecs on quiet channel 2354 * (only for active scan) */ 2355 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ 2356 __le16 good_CRC_th; /* passive -> active promotion threshold */ 2357 __le16 rx_chain; /* RXON_RX_CHAIN_* */ 2358 __le32 max_out_time; /* max usec to be away from associated (service) 2359 * channel */ 2360 __le32 suspend_time; /* pause scan this long (in "extended beacon 2361 * format") when returning to service chnl: 2362 */ 2363 __le32 flags; /* RXON_FLG_* */ 2364 __le32 filter_flags; /* RXON_FILTER_* */ 2365 2366 /* For active scans (set to all-0s for passive scans). 2367 * Does not include payload. Must specify Tx rate; no rate scaling. */ 2368 struct iwl_tx_cmd tx_cmd; 2369 2370 /* For directed active scans (set to all-0s otherwise) */ 2371 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX]; 2372 2373 /* 2374 * Probe request frame, followed by channel list. 2375 * 2376 * Size of probe request frame is specified by byte count in tx_cmd. 2377 * Channel list follows immediately after probe request frame. 2378 * Number of channels in list is specified by channel_count. 2379 * Each channel in list is of type: 2380 * 2381 * struct iwl_scan_channel channels[0]; 2382 * 2383 * NOTE: Only one band of channels can be scanned per pass. You 2384 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait 2385 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) 2386 * before requesting another scan. 2387 */ 2388 u8 data[0]; 2389 } __packed; 2390 2391 /* Can abort will notify by complete notification with abort status. */ 2392 #define CAN_ABORT_STATUS cpu_to_le32(0x1) 2393 /* complete notification statuses */ 2394 #define ABORT_STATUS 0x2 2395 2396 /* 2397 * REPLY_SCAN_CMD = 0x80 (response) 2398 */ 2399 struct iwl_scanreq_notification { 2400 __le32 status; /* 1: okay, 2: cannot fulfill request */ 2401 } __packed; 2402 2403 /* 2404 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) 2405 */ 2406 struct iwl_scanstart_notification { 2407 __le32 tsf_low; 2408 __le32 tsf_high; 2409 __le32 beacon_timer; 2410 u8 channel; 2411 u8 band; 2412 u8 reserved[2]; 2413 __le32 status; 2414 } __packed; 2415 2416 #define SCAN_OWNER_STATUS 0x1 2417 #define MEASURE_OWNER_STATUS 0x2 2418 2419 #define IWL_PROBE_STATUS_OK 0 2420 #define IWL_PROBE_STATUS_TX_FAILED BIT(0) 2421 /* error statuses combined with TX_FAILED */ 2422 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1) 2423 #define IWL_PROBE_STATUS_FAIL_BT BIT(2) 2424 2425 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ 2426 /* 2427 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) 2428 */ 2429 struct iwl_scanresults_notification { 2430 u8 channel; 2431 u8 band; 2432 u8 probe_status; 2433 u8 num_probe_not_sent; /* not enough time to send */ 2434 __le32 tsf_low; 2435 __le32 tsf_high; 2436 __le32 statistics[NUMBER_OF_STATISTICS]; 2437 } __packed; 2438 2439 /* 2440 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) 2441 */ 2442 struct iwl_scancomplete_notification { 2443 u8 scanned_channels; 2444 u8 status; 2445 u8 bt_status; /* BT On/Off status */ 2446 u8 last_channel; 2447 __le32 tsf_low; 2448 __le32 tsf_high; 2449 } __packed; 2450 2451 2452 /****************************************************************************** 2453 * (9) 2454 * IBSS/AP Commands and Notifications: 2455 * 2456 *****************************************************************************/ 2457 2458 enum iwl_ibss_manager { 2459 IWL_NOT_IBSS_MANAGER = 0, 2460 IWL_IBSS_MANAGER = 1, 2461 }; 2462 2463 /* 2464 * BEACON_NOTIFICATION = 0x90 (notification only, not a command) 2465 */ 2466 2467 struct iwlagn_beacon_notif { 2468 struct iwlagn_tx_resp beacon_notify_hdr; 2469 __le32 low_tsf; 2470 __le32 high_tsf; 2471 __le32 ibss_mgr_status; 2472 } __packed; 2473 2474 /* 2475 * REPLY_TX_BEACON = 0x91 (command, has simple generic response) 2476 */ 2477 2478 struct iwl_tx_beacon_cmd { 2479 struct iwl_tx_cmd tx; 2480 __le16 tim_idx; 2481 u8 tim_size; 2482 u8 reserved1; 2483 struct ieee80211_hdr frame[0]; /* beacon frame */ 2484 } __packed; 2485 2486 /****************************************************************************** 2487 * (10) 2488 * Statistics Commands and Notifications: 2489 * 2490 *****************************************************************************/ 2491 2492 #define IWL_TEMP_CONVERT 260 2493 2494 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 2495 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 2496 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 2497 2498 /* Used for passing to driver number of successes and failures per rate */ 2499 struct rate_histogram { 2500 union { 2501 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2502 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2503 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2504 } success; 2505 union { 2506 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; 2507 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; 2508 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; 2509 } failed; 2510 } __packed; 2511 2512 /* statistics command response */ 2513 2514 struct statistics_dbg { 2515 __le32 burst_check; 2516 __le32 burst_count; 2517 __le32 wait_for_silence_timeout_cnt; 2518 __le32 reserved[3]; 2519 } __packed; 2520 2521 struct statistics_rx_phy { 2522 __le32 ina_cnt; 2523 __le32 fina_cnt; 2524 __le32 plcp_err; 2525 __le32 crc32_err; 2526 __le32 overrun_err; 2527 __le32 early_overrun_err; 2528 __le32 crc32_good; 2529 __le32 false_alarm_cnt; 2530 __le32 fina_sync_err_cnt; 2531 __le32 sfd_timeout; 2532 __le32 fina_timeout; 2533 __le32 unresponded_rts; 2534 __le32 rxe_frame_limit_overrun; 2535 __le32 sent_ack_cnt; 2536 __le32 sent_cts_cnt; 2537 __le32 sent_ba_rsp_cnt; 2538 __le32 dsp_self_kill; 2539 __le32 mh_format_err; 2540 __le32 re_acq_main_rssi_sum; 2541 __le32 reserved3; 2542 } __packed; 2543 2544 struct statistics_rx_ht_phy { 2545 __le32 plcp_err; 2546 __le32 overrun_err; 2547 __le32 early_overrun_err; 2548 __le32 crc32_good; 2549 __le32 crc32_err; 2550 __le32 mh_format_err; 2551 __le32 agg_crc32_good; 2552 __le32 agg_mpdu_cnt; 2553 __le32 agg_cnt; 2554 __le32 unsupport_mcs; 2555 } __packed; 2556 2557 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) 2558 2559 struct statistics_rx_non_phy { 2560 __le32 bogus_cts; /* CTS received when not expecting CTS */ 2561 __le32 bogus_ack; /* ACK received when not expecting ACK */ 2562 __le32 non_bssid_frames; /* number of frames with BSSID that 2563 * doesn't belong to the STA BSSID */ 2564 __le32 filtered_frames; /* count frames that were dumped in the 2565 * filtering process */ 2566 __le32 non_channel_beacons; /* beacons with our bss id but not on 2567 * our serving channel */ 2568 __le32 channel_beacons; /* beacons with our bss id and in our 2569 * serving channel */ 2570 __le32 num_missed_bcon; /* number of missed beacons */ 2571 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the 2572 * ADC was in saturation */ 2573 __le32 ina_detection_search_time;/* total time (in 0.8us) searched 2574 * for INA */ 2575 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ 2576 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ 2577 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ 2578 __le32 interference_data_flag; /* flag for interference data 2579 * availability. 1 when data is 2580 * available. */ 2581 __le32 channel_load; /* counts RX Enable time in uSec */ 2582 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM 2583 * and CCK) counter */ 2584 __le32 beacon_rssi_a; 2585 __le32 beacon_rssi_b; 2586 __le32 beacon_rssi_c; 2587 __le32 beacon_energy_a; 2588 __le32 beacon_energy_b; 2589 __le32 beacon_energy_c; 2590 } __packed; 2591 2592 struct statistics_rx_non_phy_bt { 2593 struct statistics_rx_non_phy common; 2594 /* additional stats for bt */ 2595 __le32 num_bt_kills; 2596 __le32 reserved[2]; 2597 } __packed; 2598 2599 struct statistics_rx { 2600 struct statistics_rx_phy ofdm; 2601 struct statistics_rx_phy cck; 2602 struct statistics_rx_non_phy general; 2603 struct statistics_rx_ht_phy ofdm_ht; 2604 } __packed; 2605 2606 struct statistics_rx_bt { 2607 struct statistics_rx_phy ofdm; 2608 struct statistics_rx_phy cck; 2609 struct statistics_rx_non_phy_bt general; 2610 struct statistics_rx_ht_phy ofdm_ht; 2611 } __packed; 2612 2613 /** 2614 * struct statistics_tx_power - current tx power 2615 * 2616 * @ant_a: current tx power on chain a in 1/2 dB step 2617 * @ant_b: current tx power on chain b in 1/2 dB step 2618 * @ant_c: current tx power on chain c in 1/2 dB step 2619 */ 2620 struct statistics_tx_power { 2621 u8 ant_a; 2622 u8 ant_b; 2623 u8 ant_c; 2624 u8 reserved; 2625 } __packed; 2626 2627 struct statistics_tx_non_phy_agg { 2628 __le32 ba_timeout; 2629 __le32 ba_reschedule_frames; 2630 __le32 scd_query_agg_frame_cnt; 2631 __le32 scd_query_no_agg; 2632 __le32 scd_query_agg; 2633 __le32 scd_query_mismatch; 2634 __le32 frame_not_ready; 2635 __le32 underrun; 2636 __le32 bt_prio_kill; 2637 __le32 rx_ba_rsp_cnt; 2638 } __packed; 2639 2640 struct statistics_tx { 2641 __le32 preamble_cnt; 2642 __le32 rx_detected_cnt; 2643 __le32 bt_prio_defer_cnt; 2644 __le32 bt_prio_kill_cnt; 2645 __le32 few_bytes_cnt; 2646 __le32 cts_timeout; 2647 __le32 ack_timeout; 2648 __le32 expected_ack_cnt; 2649 __le32 actual_ack_cnt; 2650 __le32 dump_msdu_cnt; 2651 __le32 burst_abort_next_frame_mismatch_cnt; 2652 __le32 burst_abort_missing_next_frame_cnt; 2653 __le32 cts_timeout_collision; 2654 __le32 ack_or_ba_timeout_collision; 2655 struct statistics_tx_non_phy_agg agg; 2656 /* 2657 * "tx_power" are optional parameters provided by uCode, 2658 * 6000 series is the only device provide the information, 2659 * Those are reserved fields for all the other devices 2660 */ 2661 struct statistics_tx_power tx_power; 2662 __le32 reserved1; 2663 } __packed; 2664 2665 2666 struct statistics_div { 2667 __le32 tx_on_a; 2668 __le32 tx_on_b; 2669 __le32 exec_time; 2670 __le32 probe_time; 2671 __le32 reserved1; 2672 __le32 reserved2; 2673 } __packed; 2674 2675 struct statistics_general_common { 2676 __le32 temperature; /* radio temperature */ 2677 __le32 temperature_m; /* radio voltage */ 2678 struct statistics_dbg dbg; 2679 __le32 sleep_time; 2680 __le32 slots_out; 2681 __le32 slots_idle; 2682 __le32 ttl_timestamp; 2683 struct statistics_div div; 2684 __le32 rx_enable_counter; 2685 /* 2686 * num_of_sos_states: 2687 * count the number of times we have to re-tune 2688 * in order to get out of bad PHY status 2689 */ 2690 __le32 num_of_sos_states; 2691 } __packed; 2692 2693 struct statistics_bt_activity { 2694 /* Tx statistics */ 2695 __le32 hi_priority_tx_req_cnt; 2696 __le32 hi_priority_tx_denied_cnt; 2697 __le32 lo_priority_tx_req_cnt; 2698 __le32 lo_priority_tx_denied_cnt; 2699 /* Rx statistics */ 2700 __le32 hi_priority_rx_req_cnt; 2701 __le32 hi_priority_rx_denied_cnt; 2702 __le32 lo_priority_rx_req_cnt; 2703 __le32 lo_priority_rx_denied_cnt; 2704 } __packed; 2705 2706 struct statistics_general { 2707 struct statistics_general_common common; 2708 __le32 reserved2; 2709 __le32 reserved3; 2710 } __packed; 2711 2712 struct statistics_general_bt { 2713 struct statistics_general_common common; 2714 struct statistics_bt_activity activity; 2715 __le32 reserved2; 2716 __le32 reserved3; 2717 } __packed; 2718 2719 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) 2720 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) 2721 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2) 2722 2723 /* 2724 * REPLY_STATISTICS_CMD = 0x9c, 2725 * all devices identical. 2726 * 2727 * This command triggers an immediate response containing uCode statistics. 2728 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. 2729 * 2730 * If the CLEAR_STATS configuration flag is set, uCode will clear its 2731 * internal copy of the statistics (counters) after issuing the response. 2732 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). 2733 * 2734 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue 2735 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag 2736 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. 2737 */ 2738 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ 2739 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ 2740 struct iwl_statistics_cmd { 2741 __le32 configuration_flags; /* IWL_STATS_CONF_* */ 2742 } __packed; 2743 2744 /* 2745 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) 2746 * 2747 * By default, uCode issues this notification after receiving a beacon 2748 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the 2749 * REPLY_STATISTICS_CMD 0x9c, above. 2750 * 2751 * Statistics counters continue to increment beacon after beacon, but are 2752 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD 2753 * 0x9c with CLEAR_STATS bit set (see above). 2754 * 2755 * uCode also issues this notification during scans. uCode clears statistics 2756 * appropriately so that each notification contains statistics for only the 2757 * one channel that has just been scanned. 2758 */ 2759 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) 2760 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) 2761 2762 struct iwl_notif_statistics { 2763 __le32 flag; 2764 struct statistics_rx rx; 2765 struct statistics_tx tx; 2766 struct statistics_general general; 2767 } __packed; 2768 2769 struct iwl_bt_notif_statistics { 2770 __le32 flag; 2771 struct statistics_rx_bt rx; 2772 struct statistics_tx tx; 2773 struct statistics_general_bt general; 2774 } __packed; 2775 2776 /* 2777 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) 2778 * 2779 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed 2780 * in regardless of how many missed beacons, which mean when driver receive the 2781 * notification, inside the command, it can find all the beacons information 2782 * which include number of total missed beacons, number of consecutive missed 2783 * beacons, number of beacons received and number of beacons expected to 2784 * receive. 2785 * 2786 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio 2787 * in order to bring the radio/PHY back to working state; which has no relation 2788 * to when driver will perform sensitivity calibration. 2789 * 2790 * Driver should set it own missed_beacon_threshold to decide when to perform 2791 * sensitivity calibration based on number of consecutive missed beacons in 2792 * order to improve overall performance, especially in noisy environment. 2793 * 2794 */ 2795 2796 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1) 2797 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5) 2798 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF 2799 2800 struct iwl_missed_beacon_notif { 2801 __le32 consecutive_missed_beacons; 2802 __le32 total_missed_becons; 2803 __le32 num_expected_beacons; 2804 __le32 num_recvd_beacons; 2805 } __packed; 2806 2807 2808 /****************************************************************************** 2809 * (11) 2810 * Rx Calibration Commands: 2811 * 2812 * With the uCode used for open source drivers, most Tx calibration (except 2813 * for Tx Power) and most Rx calibration is done by uCode during the 2814 * "initialize" phase of uCode boot. Driver must calibrate only: 2815 * 2816 * 1) Tx power (depends on temperature), described elsewhere 2817 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas) 2818 * 3) Receiver sensitivity (to optimize signal detection) 2819 * 2820 *****************************************************************************/ 2821 2822 /** 2823 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response) 2824 * 2825 * This command sets up the Rx signal detector for a sensitivity level that 2826 * is high enough to lock onto all signals within the associated network, 2827 * but low enough to ignore signals that are below a certain threshold, so as 2828 * not to have too many "false alarms". False alarms are signals that the 2829 * Rx DSP tries to lock onto, but then discards after determining that they 2830 * are noise. 2831 * 2832 * The optimum number of false alarms is between 5 and 50 per 200 TUs 2833 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e. 2834 * time listening, not transmitting). Driver must adjust sensitivity so that 2835 * the ratio of actual false alarms to actual Rx time falls within this range. 2836 * 2837 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each 2838 * received beacon. These provide information to the driver to analyze the 2839 * sensitivity. Don't analyze statistics that come in from scanning, or any 2840 * other non-associated-network source. Pertinent statistics include: 2841 * 2842 * From "general" statistics (struct statistics_rx_non_phy): 2843 * 2844 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level) 2845 * Measure of energy of desired signal. Used for establishing a level 2846 * below which the device does not detect signals. 2847 * 2848 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB) 2849 * Measure of background noise in silent period after beacon. 2850 * 2851 * channel_load 2852 * uSecs of actual Rx time during beacon period (varies according to 2853 * how much time was spent transmitting). 2854 * 2855 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately: 2856 * 2857 * false_alarm_cnt 2858 * Signal locks abandoned early (before phy-level header). 2859 * 2860 * plcp_err 2861 * Signal locks abandoned late (during phy-level header). 2862 * 2863 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from 2864 * beacon to beacon, i.e. each value is an accumulation of all errors 2865 * before and including the latest beacon. Values will wrap around to 0 2866 * after counting up to 2^32 - 1. Driver must differentiate vs. 2867 * previous beacon's values to determine # false alarms in the current 2868 * beacon period. 2869 * 2870 * Total number of false alarms = false_alarms + plcp_errs 2871 * 2872 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd 2873 * (notice that the start points for OFDM are at or close to settings for 2874 * maximum sensitivity): 2875 * 2876 * START / MIN / MAX 2877 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120 2878 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210 2879 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140 2880 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270 2881 * 2882 * If actual rate of OFDM false alarms (+ plcp_errors) is too high 2883 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity 2884 * by *adding* 1 to all 4 of the table entries above, up to the max for 2885 * each entry. Conversely, if false alarm rate is too low (less than 5 2886 * for each 204.8 msecs listening), *subtract* 1 from each entry to 2887 * increase sensitivity. 2888 * 2889 * For CCK sensitivity, keep track of the following: 2890 * 2891 * 1). 20-beacon history of maximum background noise, indicated by 2892 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the 2893 * 3 receivers. For any given beacon, the "silence reference" is 2894 * the maximum of last 60 samples (20 beacons * 3 receivers). 2895 * 2896 * 2). 10-beacon history of strongest signal level, as indicated 2897 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers, 2898 * i.e. the strength of the signal through the best receiver at the 2899 * moment. These measurements are "upside down", with lower values 2900 * for stronger signals, so max energy will be *minimum* value. 2901 * 2902 * Then for any given beacon, the driver must determine the *weakest* 2903 * of the strongest signals; this is the minimum level that needs to be 2904 * successfully detected, when using the best receiver at the moment. 2905 * "Max cck energy" is the maximum (higher value means lower energy!) 2906 * of the last 10 minima. Once this is determined, driver must add 2907 * a little margin by adding "6" to it. 2908 * 2909 * 3). Number of consecutive beacon periods with too few false alarms. 2910 * Reset this to 0 at the first beacon period that falls within the 2911 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx). 2912 * 2913 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd 2914 * (notice that the start points for CCK are at maximum sensitivity): 2915 * 2916 * START / MIN / MAX 2917 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200 2918 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400 2919 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100 2920 * 2921 * If actual rate of CCK false alarms (+ plcp_errors) is too high 2922 * (greater than 50 for each 204.8 msecs listening), method for reducing 2923 * sensitivity is: 2924 * 2925 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2926 * up to max 400. 2927 * 2928 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160, 2929 * sensitivity has been reduced a significant amount; bring it up to 2930 * a moderate 161. Otherwise, *add* 3, up to max 200. 2931 * 2932 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160, 2933 * sensitivity has been reduced only a moderate or small amount; 2934 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX, 2935 * down to min 0. Otherwise (if gain has been significantly reduced), 2936 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value. 2937 * 2938 * b) Save a snapshot of the "silence reference". 2939 * 2940 * If actual rate of CCK false alarms (+ plcp_errors) is too low 2941 * (less than 5 for each 204.8 msecs listening), method for increasing 2942 * sensitivity is used only if: 2943 * 2944 * 1a) Previous beacon did not have too many false alarms 2945 * 1b) AND difference between previous "silence reference" and current 2946 * "silence reference" (prev - current) is 2 or more, 2947 * OR 2) 100 or more consecutive beacon periods have had rate of 2948 * less than 5 false alarms per 204.8 milliseconds rx time. 2949 * 2950 * Method for increasing sensitivity: 2951 * 2952 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX, 2953 * down to min 125. 2954 * 2955 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX, 2956 * down to min 200. 2957 * 2958 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100. 2959 * 2960 * If actual rate of CCK false alarms (+ plcp_errors) is within good range 2961 * (between 5 and 50 for each 204.8 msecs listening): 2962 * 2963 * 1) Save a snapshot of the silence reference. 2964 * 2965 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors), 2966 * give some extra margin to energy threshold by *subtracting* 8 2967 * from value in HD_MIN_ENERGY_CCK_DET_INDEX. 2968 * 2969 * For all cases (too few, too many, good range), make sure that the CCK 2970 * detection threshold (energy) is below the energy level for robust 2971 * detection over the past 10 beacon periods, the "Max cck energy". 2972 * Lower values mean higher energy; this means making sure that the value 2973 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". 2974 * 2975 */ 2976 2977 /* 2978 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd) 2979 */ 2980 #define HD_TABLE_SIZE (11) /* number of entries */ 2981 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */ 2982 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1) 2983 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2) 2984 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3) 2985 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4) 2986 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5) 2987 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6) 2988 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7) 2989 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8) 2990 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9) 2991 #define HD_OFDM_ENERGY_TH_IN_INDEX (10) 2992 2993 /* 2994 * Additional table entries in enhance SENSITIVITY_CMD 2995 */ 2996 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11) 2997 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12) 2998 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13) 2999 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14) 3000 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15) 3001 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16) 3002 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17) 3003 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18) 3004 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19) 3005 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20) 3006 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21) 3007 #define HD_RESERVED (22) 3008 3009 /* number of entries for enhanced tbl */ 3010 #define ENHANCE_HD_TABLE_SIZE (23) 3011 3012 /* number of additional entries for enhanced tbl */ 3013 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE) 3014 3015 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0) 3016 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0) 3017 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0) 3018 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668) 3019 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3020 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486) 3021 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37) 3022 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853) 3023 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4) 3024 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476) 3025 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99) 3026 3027 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1) 3028 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1) 3029 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1) 3030 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600) 3031 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40) 3032 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486) 3033 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45) 3034 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853) 3035 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60) 3036 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476) 3037 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99) 3038 3039 3040 /* Control field in struct iwl_sensitivity_cmd */ 3041 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0) 3042 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1) 3043 3044 /** 3045 * struct iwl_sensitivity_cmd 3046 * @control: (1) updates working table, (0) updates default table 3047 * @table: energy threshold values, use HD_* as index into table 3048 * 3049 * Always use "1" in "control" to update uCode's working table and DSP. 3050 */ 3051 struct iwl_sensitivity_cmd { 3052 __le16 control; /* always use "1" */ 3053 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ 3054 } __packed; 3055 3056 /* 3057 * 3058 */ 3059 struct iwl_enhance_sensitivity_cmd { 3060 __le16 control; /* always use "1" */ 3061 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */ 3062 } __packed; 3063 3064 3065 /** 3066 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response) 3067 * 3068 * This command sets the relative gains of agn device's 3 radio receiver chains. 3069 * 3070 * After the first association, driver should accumulate signal and noise 3071 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20 3072 * beacons from the associated network (don't collect statistics that come 3073 * in from scanning, or any other non-network source). 3074 * 3075 * DISCONNECTED ANTENNA: 3076 * 3077 * Driver should determine which antennas are actually connected, by comparing 3078 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the 3079 * following values over 20 beacons, one accumulator for each of the chains 3080 * a/b/c, from struct statistics_rx_non_phy: 3081 * 3082 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB) 3083 * 3084 * Find the strongest signal from among a/b/c. Compare the other two to the 3085 * strongest. If any signal is more than 15 dB (times 20, unless you 3086 * divide the accumulated values by 20) below the strongest, the driver 3087 * considers that antenna to be disconnected, and should not try to use that 3088 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected, 3089 * driver should declare the stronger one as connected, and attempt to use it 3090 * (A and B are the only 2 Tx chains!). 3091 * 3092 * 3093 * RX BALANCE: 3094 * 3095 * Driver should balance the 3 receivers (but just the ones that are connected 3096 * to antennas, see above) for gain, by comparing the average signal levels 3097 * detected during the silence after each beacon (background noise). 3098 * Accumulate (add) the following values over 20 beacons, one accumulator for 3099 * each of the chains a/b/c, from struct statistics_rx_non_phy: 3100 * 3101 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB) 3102 * 3103 * Find the weakest background noise level from among a/b/c. This Rx chain 3104 * will be the reference, with 0 gain adjustment. Attenuate other channels by 3105 * finding noise difference: 3106 * 3107 * (accum_noise[i] - accum_noise[reference]) / 30 3108 * 3109 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB. 3110 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the 3111 * driver should limit the difference results to a range of 0-3 (0-4.5 dB), 3112 * and set bit 2 to indicate "reduce gain". The value for the reference 3113 * (weakest) chain should be "0". 3114 * 3115 * diff_gain_[abc] bit fields: 3116 * 2: (1) reduce gain, (0) increase gain 3117 * 1-0: amount of gain, units of 1.5 dB 3118 */ 3119 3120 /* Phy calibration command for series */ 3121 enum { 3122 IWL_PHY_CALIBRATE_DC_CMD = 8, 3123 IWL_PHY_CALIBRATE_LO_CMD = 9, 3124 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3125 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, 3126 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, 3127 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, 3128 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18, 3129 }; 3130 3131 /* This enum defines the bitmap of various calibrations to enable in both 3132 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 3133 */ 3134 enum iwl_ucode_calib_cfg { 3135 IWL_CALIB_CFG_RX_BB_IDX = BIT(0), 3136 IWL_CALIB_CFG_DC_IDX = BIT(1), 3137 IWL_CALIB_CFG_LO_IDX = BIT(2), 3138 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3), 3139 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4), 3140 IWL_CALIB_CFG_NOISE_IDX = BIT(5), 3141 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6), 3142 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7), 3143 IWL_CALIB_CFG_PAPD_IDX = BIT(8), 3144 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9), 3145 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10), 3146 }; 3147 3148 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3149 IWL_CALIB_CFG_DC_IDX | \ 3150 IWL_CALIB_CFG_LO_IDX | \ 3151 IWL_CALIB_CFG_TX_IQ_IDX | \ 3152 IWL_CALIB_CFG_RX_IQ_IDX | \ 3153 IWL_CALIB_CFG_CRYSTAL_IDX) 3154 3155 #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \ 3156 IWL_CALIB_CFG_DC_IDX | \ 3157 IWL_CALIB_CFG_LO_IDX | \ 3158 IWL_CALIB_CFG_TX_IQ_IDX | \ 3159 IWL_CALIB_CFG_RX_IQ_IDX | \ 3160 IWL_CALIB_CFG_TEMPERATURE_IDX | \ 3161 IWL_CALIB_CFG_PAPD_IDX | \ 3162 IWL_CALIB_CFG_TX_PWR_IDX | \ 3163 IWL_CALIB_CFG_CRYSTAL_IDX) 3164 3165 #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) 3166 3167 struct iwl_calib_cfg_elmnt_s { 3168 __le32 is_enable; 3169 __le32 start; 3170 __le32 send_res; 3171 __le32 apply_res; 3172 __le32 reserved; 3173 } __packed; 3174 3175 struct iwl_calib_cfg_status_s { 3176 struct iwl_calib_cfg_elmnt_s once; 3177 struct iwl_calib_cfg_elmnt_s perd; 3178 __le32 flags; 3179 } __packed; 3180 3181 struct iwl_calib_cfg_cmd { 3182 struct iwl_calib_cfg_status_s ucd_calib_cfg; 3183 struct iwl_calib_cfg_status_s drv_calib_cfg; 3184 __le32 reserved1; 3185 } __packed; 3186 3187 struct iwl_calib_hdr { 3188 u8 op_code; 3189 u8 first_group; 3190 u8 groups_num; 3191 u8 data_valid; 3192 } __packed; 3193 3194 struct iwl_calib_cmd { 3195 struct iwl_calib_hdr hdr; 3196 u8 data[0]; 3197 } __packed; 3198 3199 struct iwl_calib_xtal_freq_cmd { 3200 struct iwl_calib_hdr hdr; 3201 u8 cap_pin1; 3202 u8 cap_pin2; 3203 u8 pad[2]; 3204 } __packed; 3205 3206 #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700) 3207 struct iwl_calib_temperature_offset_cmd { 3208 struct iwl_calib_hdr hdr; 3209 __le16 radio_sensor_offset; 3210 __le16 reserved; 3211 } __packed; 3212 3213 struct iwl_calib_temperature_offset_v2_cmd { 3214 struct iwl_calib_hdr hdr; 3215 __le16 radio_sensor_offset_high; 3216 __le16 radio_sensor_offset_low; 3217 __le16 burntVoltageRef; 3218 __le16 reserved; 3219 } __packed; 3220 3221 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3222 struct iwl_calib_chain_noise_reset_cmd { 3223 struct iwl_calib_hdr hdr; 3224 u8 data[0]; 3225 }; 3226 3227 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */ 3228 struct iwl_calib_chain_noise_gain_cmd { 3229 struct iwl_calib_hdr hdr; 3230 u8 delta_gain_1; 3231 u8 delta_gain_2; 3232 u8 pad[2]; 3233 } __packed; 3234 3235 /****************************************************************************** 3236 * (12) 3237 * Miscellaneous Commands: 3238 * 3239 *****************************************************************************/ 3240 3241 /* 3242 * LEDs Command & Response 3243 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) 3244 * 3245 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), 3246 * this command turns it on or off, or sets up a periodic blinking cycle. 3247 */ 3248 struct iwl_led_cmd { 3249 __le32 interval; /* "interval" in uSec */ 3250 u8 id; /* 1: Activity, 2: Link, 3: Tech */ 3251 u8 off; /* # intervals off while blinking; 3252 * "0", with >0 "on" value, turns LED on */ 3253 u8 on; /* # intervals on while blinking; 3254 * "0", regardless of "off", turns LED off */ 3255 u8 reserved; 3256 } __packed; 3257 3258 /* 3259 * station priority table entries 3260 * also used as potential "events" value for both 3261 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD 3262 */ 3263 3264 /* 3265 * COEX events entry flag masks 3266 * RP - Requested Priority 3267 * WP - Win Medium Priority: priority assigned when the contention has been won 3268 */ 3269 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1) 3270 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2) 3271 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4) 3272 3273 #define COEX_CU_UNASSOC_IDLE_RP 4 3274 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4 3275 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4 3276 #define COEX_CU_CALIBRATION_RP 4 3277 #define COEX_CU_PERIODIC_CALIBRATION_RP 4 3278 #define COEX_CU_CONNECTION_ESTAB_RP 4 3279 #define COEX_CU_ASSOCIATED_IDLE_RP 4 3280 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4 3281 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4 3282 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4 3283 #define COEX_CU_RF_ON_RP 6 3284 #define COEX_CU_RF_OFF_RP 4 3285 #define COEX_CU_STAND_ALONE_DEBUG_RP 6 3286 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4 3287 #define COEX_CU_RSRVD1_RP 4 3288 #define COEX_CU_RSRVD2_RP 4 3289 3290 #define COEX_CU_UNASSOC_IDLE_WP 3 3291 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3 3292 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3 3293 #define COEX_CU_CALIBRATION_WP 3 3294 #define COEX_CU_PERIODIC_CALIBRATION_WP 3 3295 #define COEX_CU_CONNECTION_ESTAB_WP 3 3296 #define COEX_CU_ASSOCIATED_IDLE_WP 3 3297 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3 3298 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3 3299 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3 3300 #define COEX_CU_RF_ON_WP 3 3301 #define COEX_CU_RF_OFF_WP 3 3302 #define COEX_CU_STAND_ALONE_DEBUG_WP 6 3303 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3 3304 #define COEX_CU_RSRVD1_WP 3 3305 #define COEX_CU_RSRVD2_WP 3 3306 3307 #define COEX_UNASSOC_IDLE_FLAGS 0 3308 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \ 3309 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3310 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3311 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \ 3312 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3313 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3314 #define COEX_CALIBRATION_FLAGS \ 3315 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3316 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3317 #define COEX_PERIODIC_CALIBRATION_FLAGS 0 3318 /* 3319 * COEX_CONNECTION_ESTAB: 3320 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3321 */ 3322 #define COEX_CONNECTION_ESTAB_FLAGS \ 3323 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3324 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3325 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3326 #define COEX_ASSOCIATED_IDLE_FLAGS 0 3327 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \ 3328 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3329 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3330 #define COEX_ASSOC_AUTO_SCAN_FLAGS \ 3331 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3332 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3333 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0 3334 #define COEX_RF_ON_FLAGS 0 3335 #define COEX_RF_OFF_FLAGS 0 3336 #define COEX_STAND_ALONE_DEBUG_FLAGS \ 3337 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3338 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG) 3339 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \ 3340 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3341 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3342 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3343 #define COEX_RSRVD1_FLAGS 0 3344 #define COEX_RSRVD2_FLAGS 0 3345 /* 3346 * COEX_CU_RF_ON is the event wrapping all radio ownership. 3347 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. 3348 */ 3349 #define COEX_CU_RF_ON_FLAGS \ 3350 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \ 3351 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \ 3352 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG) 3353 3354 3355 enum { 3356 /* un-association part */ 3357 COEX_UNASSOC_IDLE = 0, 3358 COEX_UNASSOC_MANUAL_SCAN = 1, 3359 COEX_UNASSOC_AUTO_SCAN = 2, 3360 /* calibration */ 3361 COEX_CALIBRATION = 3, 3362 COEX_PERIODIC_CALIBRATION = 4, 3363 /* connection */ 3364 COEX_CONNECTION_ESTAB = 5, 3365 /* association part */ 3366 COEX_ASSOCIATED_IDLE = 6, 3367 COEX_ASSOC_MANUAL_SCAN = 7, 3368 COEX_ASSOC_AUTO_SCAN = 8, 3369 COEX_ASSOC_ACTIVE_LEVEL = 9, 3370 /* RF ON/OFF */ 3371 COEX_RF_ON = 10, 3372 COEX_RF_OFF = 11, 3373 COEX_STAND_ALONE_DEBUG = 12, 3374 /* IPAN */ 3375 COEX_IPAN_ASSOC_LEVEL = 13, 3376 /* reserved */ 3377 COEX_RSRVD1 = 14, 3378 COEX_RSRVD2 = 15, 3379 COEX_NUM_OF_EVENTS = 16 3380 }; 3381 3382 /* 3383 * Coexistence WIFI/WIMAX Command 3384 * COEX_PRIORITY_TABLE_CMD = 0x5a 3385 * 3386 */ 3387 struct iwl_wimax_coex_event_entry { 3388 u8 request_prio; 3389 u8 win_medium_prio; 3390 u8 reserved; 3391 u8 flags; 3392 } __packed; 3393 3394 /* COEX flag masks */ 3395 3396 /* Station table is valid */ 3397 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1) 3398 /* UnMask wake up src at unassociated sleep */ 3399 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4) 3400 /* UnMask wake up src at associated sleep */ 3401 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8) 3402 /* Enable CoEx feature. */ 3403 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80) 3404 3405 struct iwl_wimax_coex_cmd { 3406 u8 flags; 3407 u8 reserved[3]; 3408 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; 3409 } __packed; 3410 3411 /* 3412 * Coexistence MEDIUM NOTIFICATION 3413 * COEX_MEDIUM_NOTIFICATION = 0x5b 3414 * 3415 * notification from uCode to host to indicate medium changes 3416 * 3417 */ 3418 /* 3419 * status field 3420 * bit 0 - 2: medium status 3421 * bit 3: medium change indication 3422 * bit 4 - 31: reserved 3423 */ 3424 /* status option values, (0 - 2 bits) */ 3425 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */ 3426 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */ 3427 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */ 3428 #define COEX_MEDIUM_MSK (0x7) 3429 3430 /* send notification status (1 bit) */ 3431 #define COEX_MEDIUM_CHANGED (0x8) 3432 #define COEX_MEDIUM_CHANGED_MSK (0x8) 3433 #define COEX_MEDIUM_SHIFT (3) 3434 3435 struct iwl_coex_medium_notification { 3436 __le32 status; 3437 __le32 events; 3438 } __packed; 3439 3440 /* 3441 * Coexistence EVENT Command 3442 * COEX_EVENT_CMD = 0x5c 3443 * 3444 * send from host to uCode for coex event request. 3445 */ 3446 /* flags options */ 3447 #define COEX_EVENT_REQUEST_MSK (0x1) 3448 3449 struct iwl_coex_event_cmd { 3450 u8 flags; 3451 u8 event; 3452 __le16 reserved; 3453 } __packed; 3454 3455 struct iwl_coex_event_resp { 3456 __le32 status; 3457 } __packed; 3458 3459 3460 /****************************************************************************** 3461 * Bluetooth Coexistence commands 3462 * 3463 *****************************************************************************/ 3464 3465 /* 3466 * BT Status notification 3467 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce 3468 */ 3469 enum iwl_bt_coex_profile_traffic_load { 3470 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0, 3471 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1, 3472 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2, 3473 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3, 3474 /* 3475 * There are no more even though below is a u8, the 3476 * indication from the BT device only has two bits. 3477 */ 3478 }; 3479 3480 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1 3481 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2 3482 3483 /* BT UART message - Share Part (BT -> WiFi) */ 3484 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0) 3485 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \ 3486 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS) 3487 #define BT_UART_MSG_FRAME1SSN_POS (3) 3488 #define BT_UART_MSG_FRAME1SSN_MSK \ 3489 (0x3 << BT_UART_MSG_FRAME1SSN_POS) 3490 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5) 3491 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \ 3492 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS) 3493 #define BT_UART_MSG_FRAME1RESERVED_POS (6) 3494 #define BT_UART_MSG_FRAME1RESERVED_MSK \ 3495 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS) 3496 3497 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0) 3498 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \ 3499 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS) 3500 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2) 3501 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \ 3502 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS) 3503 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4) 3504 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \ 3505 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS) 3506 #define BT_UART_MSG_FRAME2INBAND_POS (5) 3507 #define BT_UART_MSG_FRAME2INBAND_MSK \ 3508 (0x1 << BT_UART_MSG_FRAME2INBAND_POS) 3509 #define BT_UART_MSG_FRAME2RESERVED_POS (6) 3510 #define BT_UART_MSG_FRAME2RESERVED_MSK \ 3511 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS) 3512 3513 #define BT_UART_MSG_FRAME3SCOESCO_POS (0) 3514 #define BT_UART_MSG_FRAME3SCOESCO_MSK \ 3515 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS) 3516 #define BT_UART_MSG_FRAME3SNIFF_POS (1) 3517 #define BT_UART_MSG_FRAME3SNIFF_MSK \ 3518 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS) 3519 #define BT_UART_MSG_FRAME3A2DP_POS (2) 3520 #define BT_UART_MSG_FRAME3A2DP_MSK \ 3521 (0x1 << BT_UART_MSG_FRAME3A2DP_POS) 3522 #define BT_UART_MSG_FRAME3ACL_POS (3) 3523 #define BT_UART_MSG_FRAME3ACL_MSK \ 3524 (0x1 << BT_UART_MSG_FRAME3ACL_POS) 3525 #define BT_UART_MSG_FRAME3MASTER_POS (4) 3526 #define BT_UART_MSG_FRAME3MASTER_MSK \ 3527 (0x1 << BT_UART_MSG_FRAME3MASTER_POS) 3528 #define BT_UART_MSG_FRAME3OBEX_POS (5) 3529 #define BT_UART_MSG_FRAME3OBEX_MSK \ 3530 (0x1 << BT_UART_MSG_FRAME3OBEX_POS) 3531 #define BT_UART_MSG_FRAME3RESERVED_POS (6) 3532 #define BT_UART_MSG_FRAME3RESERVED_MSK \ 3533 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS) 3534 3535 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0) 3536 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \ 3537 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS) 3538 #define BT_UART_MSG_FRAME4RESERVED_POS (6) 3539 #define BT_UART_MSG_FRAME4RESERVED_MSK \ 3540 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS) 3541 3542 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0) 3543 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \ 3544 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS) 3545 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2) 3546 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \ 3547 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS) 3548 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4) 3549 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \ 3550 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS) 3551 #define BT_UART_MSG_FRAME5RESERVED_POS (6) 3552 #define BT_UART_MSG_FRAME5RESERVED_MSK \ 3553 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS) 3554 3555 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0) 3556 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \ 3557 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS) 3558 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5) 3559 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \ 3560 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS) 3561 #define BT_UART_MSG_FRAME6RESERVED_POS (6) 3562 #define BT_UART_MSG_FRAME6RESERVED_MSK \ 3563 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS) 3564 3565 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0) 3566 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \ 3567 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS) 3568 #define BT_UART_MSG_FRAME7PAGE_POS (3) 3569 #define BT_UART_MSG_FRAME7PAGE_MSK \ 3570 (0x1 << BT_UART_MSG_FRAME7PAGE_POS) 3571 #define BT_UART_MSG_FRAME7INQUIRY_POS (4) 3572 #define BT_UART_MSG_FRAME7INQUIRY_MSK \ 3573 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS) 3574 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5) 3575 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \ 3576 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS) 3577 #define BT_UART_MSG_FRAME7RESERVED_POS (6) 3578 #define BT_UART_MSG_FRAME7RESERVED_MSK \ 3579 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS) 3580 3581 /* BT Session Activity 2 UART message (BT -> WiFi) */ 3582 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5) 3583 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \ 3584 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS) 3585 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6) 3586 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \ 3587 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS) 3588 3589 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0) 3590 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \ 3591 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS) 3592 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6) 3593 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \ 3594 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS) 3595 3596 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0) 3597 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \ 3598 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS) 3599 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4) 3600 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \ 3601 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS) 3602 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5) 3603 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \ 3604 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS) 3605 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6) 3606 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \ 3607 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS) 3608 3609 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0) 3610 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \ 3611 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS) 3612 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4) 3613 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \ 3614 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS) 3615 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6) 3616 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \ 3617 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS) 3618 3619 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0) 3620 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \ 3621 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS) 3622 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4) 3623 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \ 3624 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS) 3625 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5) 3626 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \ 3627 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS) 3628 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6) 3629 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \ 3630 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS) 3631 3632 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0) 3633 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \ 3634 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS) 3635 #define BT_UART_MSG_2_FRAME6RFU_POS (5) 3636 #define BT_UART_MSG_2_FRAME6RFU_MSK \ 3637 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS) 3638 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6) 3639 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \ 3640 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS) 3641 3642 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0) 3643 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \ 3644 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS) 3645 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3) 3646 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \ 3647 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS) 3648 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4) 3649 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \ 3650 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS) 3651 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5) 3652 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \ 3653 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS) 3654 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6) 3655 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \ 3656 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS) 3657 3658 3659 #define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62) 3660 #define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65) 3661 3662 struct iwl_bt_uart_msg { 3663 u8 header; 3664 u8 frame1; 3665 u8 frame2; 3666 u8 frame3; 3667 u8 frame4; 3668 u8 frame5; 3669 u8 frame6; 3670 u8 frame7; 3671 } __packed; 3672 3673 struct iwl_bt_coex_profile_notif { 3674 struct iwl_bt_uart_msg last_bt_uart_msg; 3675 u8 bt_status; /* 0 - off, 1 - on */ 3676 u8 bt_traffic_load; /* 0 .. 3? */ 3677 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */ 3678 u8 reserved; 3679 } __packed; 3680 3681 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0 3682 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1 3683 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1 3684 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e 3685 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4 3686 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0 3687 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1 3688 3689 /* 3690 * BT Coexistence Priority table 3691 * REPLY_BT_COEX_PRIO_TABLE = 0xcc 3692 */ 3693 enum bt_coex_prio_table_events { 3694 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0, 3695 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1, 3696 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2, 3697 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */ 3698 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4, 3699 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5, 3700 BT_COEX_PRIO_TBL_EVT_DTIM = 6, 3701 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7, 3702 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8, 3703 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9, 3704 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10, 3705 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11, 3706 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12, 3707 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13, 3708 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14, 3709 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15, 3710 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */ 3711 BT_COEX_PRIO_TBL_EVT_MAX, 3712 }; 3713 3714 enum bt_coex_prio_table_priorities { 3715 BT_COEX_PRIO_TBL_DISABLED = 0, 3716 BT_COEX_PRIO_TBL_PRIO_LOW = 1, 3717 BT_COEX_PRIO_TBL_PRIO_HIGH = 2, 3718 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3, 3719 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4, 3720 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5, 3721 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6, 3722 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7, 3723 BT_COEX_PRIO_TBL_MAX, 3724 }; 3725 3726 struct iwl_bt_coex_prio_table_cmd { 3727 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX]; 3728 } __packed; 3729 3730 #define IWL_BT_COEX_ENV_CLOSE 0 3731 #define IWL_BT_COEX_ENV_OPEN 1 3732 /* 3733 * BT Protection Envelope 3734 * REPLY_BT_COEX_PROT_ENV = 0xcd 3735 */ 3736 struct iwl_bt_coex_prot_env_cmd { 3737 u8 action; /* 0 = closed, 1 = open */ 3738 u8 type; /* 0 .. 15 */ 3739 u8 reserved[2]; 3740 } __packed; 3741 3742 /* 3743 * REPLY_D3_CONFIG 3744 */ 3745 enum iwlagn_d3_wakeup_filters { 3746 IWLAGN_D3_WAKEUP_RFKILL = BIT(0), 3747 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1), 3748 }; 3749 3750 struct iwlagn_d3_config_cmd { 3751 __le32 min_sleep_time; 3752 __le32 wakeup_flags; 3753 } __packed; 3754 3755 /* 3756 * REPLY_WOWLAN_PATTERNS 3757 */ 3758 #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16 3759 #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128 3760 3761 struct iwlagn_wowlan_pattern { 3762 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8]; 3763 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN]; 3764 u8 mask_size; 3765 u8 pattern_size; 3766 __le16 reserved; 3767 } __packed; 3768 3769 #define IWLAGN_WOWLAN_MAX_PATTERNS 20 3770 3771 struct iwlagn_wowlan_patterns_cmd { 3772 __le32 n_patterns; 3773 struct iwlagn_wowlan_pattern patterns[]; 3774 } __packed; 3775 3776 /* 3777 * REPLY_WOWLAN_WAKEUP_FILTER 3778 */ 3779 enum iwlagn_wowlan_wakeup_filters { 3780 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0), 3781 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1), 3782 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2), 3783 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3), 3784 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4), 3785 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5), 3786 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6), 3787 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7), 3788 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8), 3789 }; 3790 3791 struct iwlagn_wowlan_wakeup_filter_cmd { 3792 __le32 enabled; 3793 __le16 non_qos_seq; 3794 __le16 reserved; 3795 __le16 qos_seq[8]; 3796 }; 3797 3798 /* 3799 * REPLY_WOWLAN_TSC_RSC_PARAMS 3800 */ 3801 #define IWLAGN_NUM_RSC 16 3802 3803 struct tkip_sc { 3804 __le16 iv16; 3805 __le16 pad; 3806 __le32 iv32; 3807 } __packed; 3808 3809 struct iwlagn_tkip_rsc_tsc { 3810 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC]; 3811 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC]; 3812 struct tkip_sc tsc; 3813 } __packed; 3814 3815 struct aes_sc { 3816 __le64 pn; 3817 } __packed; 3818 3819 struct iwlagn_aes_rsc_tsc { 3820 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC]; 3821 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC]; 3822 struct aes_sc tsc; 3823 } __packed; 3824 3825 union iwlagn_all_tsc_rsc { 3826 struct iwlagn_tkip_rsc_tsc tkip; 3827 struct iwlagn_aes_rsc_tsc aes; 3828 }; 3829 3830 struct iwlagn_wowlan_rsc_tsc_params_cmd { 3831 union iwlagn_all_tsc_rsc all_tsc_rsc; 3832 } __packed; 3833 3834 /* 3835 * REPLY_WOWLAN_TKIP_PARAMS 3836 */ 3837 #define IWLAGN_MIC_KEY_SIZE 8 3838 #define IWLAGN_P1K_SIZE 5 3839 struct iwlagn_mic_keys { 3840 u8 tx[IWLAGN_MIC_KEY_SIZE]; 3841 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE]; 3842 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE]; 3843 } __packed; 3844 3845 struct iwlagn_p1k_cache { 3846 __le16 p1k[IWLAGN_P1K_SIZE]; 3847 } __packed; 3848 3849 #define IWLAGN_NUM_RX_P1K_CACHE 2 3850 3851 struct iwlagn_wowlan_tkip_params_cmd { 3852 struct iwlagn_mic_keys mic_keys; 3853 struct iwlagn_p1k_cache tx; 3854 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE]; 3855 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE]; 3856 } __packed; 3857 3858 /* 3859 * REPLY_WOWLAN_KEK_KCK_MATERIAL 3860 */ 3861 3862 #define IWLAGN_KCK_MAX_SIZE 32 3863 #define IWLAGN_KEK_MAX_SIZE 32 3864 3865 struct iwlagn_wowlan_kek_kck_material_cmd { 3866 u8 kck[IWLAGN_KCK_MAX_SIZE]; 3867 u8 kek[IWLAGN_KEK_MAX_SIZE]; 3868 __le16 kck_len; 3869 __le16 kek_len; 3870 __le64 replay_ctr; 3871 } __packed; 3872 3873 #define RF_KILL_INDICATOR_FOR_WOWLAN 0x87 3874 3875 /* 3876 * REPLY_WOWLAN_GET_STATUS = 0xe5 3877 */ 3878 struct iwlagn_wowlan_status { 3879 __le64 replay_ctr; 3880 __le32 rekey_status; 3881 __le32 wakeup_reason; 3882 u8 pattern_number; 3883 u8 reserved1; 3884 __le16 qos_seq_ctr[8]; 3885 __le16 non_qos_seq_ctr; 3886 __le16 reserved2; 3887 union iwlagn_all_tsc_rsc tsc_rsc; 3888 __le16 reserved3; 3889 } __packed; 3890 3891 /* 3892 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification) 3893 */ 3894 3895 /* 3896 * Minimum slot time in TU 3897 */ 3898 #define IWL_MIN_SLOT_TIME 20 3899 3900 /** 3901 * struct iwl_wipan_slot 3902 * @width: Time in TU 3903 * @type: 3904 * 0 - BSS 3905 * 1 - PAN 3906 */ 3907 struct iwl_wipan_slot { 3908 __le16 width; 3909 u8 type; 3910 u8 reserved; 3911 } __packed; 3912 3913 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */ 3914 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */ 3915 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */ 3916 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4) 3917 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5) 3918 3919 /** 3920 * struct iwl_wipan_params_cmd 3921 * @flags: 3922 * bit0: reserved 3923 * bit1: CP leave channel with CTS 3924 * bit2: CP leave channel qith Quiet 3925 * bit3: slotted mode 3926 * 1 - work in slotted mode 3927 * 0 - work in non slotted mode 3928 * bit4: filter beacon notification 3929 * bit5: full tx slotted mode. if this flag is set, 3930 * uCode will perform leaving channel methods in context switch 3931 * also when working in same channel mode 3932 * @num_slots: 1 - 10 3933 */ 3934 struct iwl_wipan_params_cmd { 3935 __le16 flags; 3936 u8 reserved; 3937 u8 num_slots; 3938 struct iwl_wipan_slot slots[10]; 3939 } __packed; 3940 3941 /* 3942 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9 3943 * 3944 * TODO: Figure out what this is used for, 3945 * it can only switch between 2.4 GHz 3946 * channels!! 3947 */ 3948 3949 struct iwl_wipan_p2p_channel_switch_cmd { 3950 __le16 channel; 3951 __le16 reserved; 3952 }; 3953 3954 /* 3955 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc 3956 * 3957 * This is used by the device to notify us of the 3958 * NoA schedule it determined so we can forward it 3959 * to userspace for inclusion in probe responses. 3960 * 3961 * In beacons, the NoA schedule is simply appended 3962 * to the frame we give the device. 3963 */ 3964 3965 struct iwl_wipan_noa_descriptor { 3966 u8 count; 3967 __le32 duration; 3968 __le32 interval; 3969 __le32 starttime; 3970 } __packed; 3971 3972 struct iwl_wipan_noa_attribute { 3973 u8 id; 3974 __le16 length; 3975 u8 index; 3976 u8 ct_window; 3977 struct iwl_wipan_noa_descriptor descr0, descr1; 3978 u8 reserved; 3979 } __packed; 3980 3981 struct iwl_wipan_noa_notification { 3982 u32 noa_active; 3983 struct iwl_wipan_noa_attribute noa_attribute; 3984 } __packed; 3985 3986 #endif /* __iwl_commands_h__ */ 3987
